DEPARTMENT

OF
ELECTRONICS & COMMUNICATION ENGINEERING

EMBEDDED SYSTEM DESIGN

(Theory Notes)

Autonomous Course

Prepared by

Prof.Tejashree S

Module – 3 Contents
Memory Hierarchy, Bus and Cache: Memory Hierarchy Technology, Virtual Memory
Technology, Backplane Bus Systems, Cache Memory Organizations

Dayananda Sagar College of Engineering

Shavige Malleshwara Hills, Kumaraswamy Layout,
Banashankari, Bangalore-560078, Karnataka
Tel : +91 80 26662226 26661104 Extn : 2731 Fax : +90 80 2666 0789
Web - http://www.dayanandasagar.edu Email : hod-ece@dayanandasagar.edu
( An Autonomous Institute Affiliated to VTU, Approved by AICTE & ISO 9001:2008 Certified )
( Accredited by NBA, National Assessment & Accreditation Council (NAAC) with 'A' grade )
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