MP & MC Chap4

Chapter-4
8051 Assembly Language

Programming
Dr. Mukesh M Bhesaniya

Department of Electrical Engineering
G H Patel College of Engineering and Technology
Vallabh Vidyanagar, Gujarat, India
3160914:MP & MC DR. MUKESH M BHESANIYA 1
Content
Programming model of 8051
Addressing modes
Data transfer instructions
I/O Port programming
Arithmetic and Logical instructions
Bit level instructions
Branching instructions (Jump and loop Jump and call)
Concept of stack
Subroutine and related instructions
Writing programs (like time delay using loop, data conversions HEX to ASCII, BCD
to ASCII, use of look up table etc) in assembly language 8051 and testing the
same using IDE.

Programming model of 8051

Types of Instructions
The 8051 has 255 instructions.
Every 8-bit op-code from 00 to FF is used except for A5.
Depending on operation they perform, all instructions are divided in several
groups:
✓ Data Transfer Instructions (MOV A,R0; MOV R1,#43H)
✓ Arithmetic Instructions (ADD A,R0; INC A)
✓ Logic Instructions (ANL A, R0; ORL A, R1)
✓ Branch Instructions (JC add; JB add)
✓ Bit-oriented Instructions (SETB P1.0; CLR ACC.0)



Addressing Modes
The different ways of specifying a source operand in an instruction are known as
the addressing modes.
The 8051 provides a total of 5 distinct addressing modes.
Addressing Modes Instruction
Register Addressing Modes MOV A, B
Direct Addressing Modes MOV 30H,A
Indirect Addressing Modes ADD A,@R0
Immediate Addressing Modes ADD A,#80H
Indexed Addressing Modes MOVC A,@A+DPTR

Addressing Modes
Register Addressing Mode
✓ The register addressing instruction involves information transfer between
registers. For example
MOV A, R0 ;Transfer the data of Register R0 to Accumulator
ADD A, R1
Direct Addressing
✓ In direct addressing mode, the data is in a RAM memory location whose
address is known, and this address is given as a part of the instruction. For
example
MOV A, 20H ;Transfer the data of 20H to Accumulator
ADD A, 30H

Addressing Modes
Indirect Addressing
✓ In the register indirect addressing mode, a register is used as a pointer to the data.
✓ This mode uses a pointer to hold the effective address of the operand.
✓ Only registers R0, R1 and DPTR can be used as the pointer registers. When they
hold the address of RAM locations , they must be preceded by the “@” sign.
✓ The R0 and R1 registers can hold an 8-bit address, whereas DPTR can hold a 16-bit
address. For example
MOV @R0,A
✓ Store the content of accumulator into the memory location pointed to by register
R0. R0 could have an 8-bit address, such as 60H.
MOVX A,@DPTR
✓ Transfer the contents from the memory location pointed to by DPTR into the
accumulator. DPTR could have a 16-bit address, such as 1234H.
Addressing Modes
Immediate Addressing
✓ This mode of addressing uses either an 8- or 16-bit constant value as the source
operand
✓ This constant is specified in the instruction, rather than in a register or a memory
location
✓ The destination register should hold the same data size which is specified by the
source operand. For example
ADD A,#030H
✓ Add 8-bit value 30H to the accumulator register (which is an 8-bit register).
MOV DPTR,#0FE00H
✓ Move 16-bit data constant FE00H into the 16-bit Data Pointer Register.

Addressing Modes
Indexed Addressing
✓ The Indexed addressing is useful when there is a need to retrieve data from a look-
up table.
✓ A 16-bit register (data pointer) holds the base address and the accumulator holds
an 8-bit displacement or index value.
✓ The sum of these two registers forms the effective address for a JMP or MOVC
instruction. For example
MOV A,#08H ;Offset from table start
MOV DPTR,#300H ;Table start address
MOVC A,@A+DPTR ;Gets target value from the table
✓ After the execution of the above instructions, the program will branch to address
300H (300H+08H) and transfer into the accumulator the data byte retrieved from
that location (from the look-up table)
Instruction Classifications





Data Transfer Instructions
Perform data movement between registers, memory and ports.
MOV <destination>, <source> : Data transfer in the internal RAM. This type of
instructions supported by virtually all addresses, direct, indirect, register and
immediate.
MOVX : Data transfer in the external RAM (XRAM). This type of instructions only
supports indirect addressing, register 8 -bit by R0 or R1 and 16-bit register DPTR.
MOVC : Allows transfer of the ROM data to accumulator. By this statement we can
make the transfer of tables from the program memory.
XCH : Swaps the contents of the accumulator and the internal RAM.
XCHD :Swaps the contents of the first 4 bits of the Accumulator with internal RAM.
PUSH and POP : To transfer data to the stack.

MOV <destination>, <source>
• MOV A, Rn • MOV direct, A
• MOV A, direct • MOV direct, Rn
• MOV A, @Ri • MOV direct, direct
• MOV A, #data • MOV direct, @Ri
• MOV direct, #data
• MOV Rn, A
• MOV Rn, direct • MOV @Ri, A
• MOV Rn, #data • MOV @Ri, direct
• MOV @Ri, #data

✓ 16-bit data transfer involving the DPTR
• MOV DPTR, # 16-bit data
MOVX <destination>, <source>
✓ Data transfer between the accumulator and a byte from external data
memory.
MOVX A, @Ri
MOVX A, @DPTR
MOVX @Ri, A
MOVX @DPTR, A
MOVC <destination>, <source>

✓ Move Code Byte to the accumulator
✓ Must use indexed addressing
MOVC A, @A+DPTR
MOVC A, @A+PC
PUSH direct
Description:
✓ The Stack Pointer is incremented by one.
✓ The contents of the indicated variable is then copied into the internal RAM
location addressed by the Stack Pointer.
✓ No flags are affected.
Example:
ORG 0H
MOV 30H,#23H
PUSH 30H ;SP=07+1, 08H=23H
POP 20H ;20H=23H, SP=08-1
END

PUSH direct
Example:
Show the stack and stack pointer from the following. Assume the default stack
area.
MOV R6, #25H

MOV R1, #12H
MOV R4, #0F3H
PUSH 6
PUSH 1
PUSH 4
Solution:

POP direct
Description:
✓ The contents of the internal RAM location addressed by the Stack Pointer is
read, and the Stack Pointer is decremented by one.
✓ The value read is then transferred to the directly addressed byte indicated.
Example:
✓ The Stack Pointer originally contains the value 32H.
✓ Internal RAM locations 30H through 32H contain the values 20H, 23H, and
01H, respectively.
✓ The instruction sequence,
POP DPH
POP DPL
✓ will leave the Stack Pointer equal to the value 30H and the Data Pointer set to
0123H.
POP direct
Example:
Examining the stack, show the contents of the register and SP after execution of
the following instructions. All value are in hex.
POP 3 ; POP stack into R3

Solution:

Example:
Examining the stack, show the contents of the register and SP after execution of
the following instructions. All value are in hex.

Solution:

XCH
✓ Exchange accumulator and a byte variable
XCH A, Rn
XCH A, direct
XCH A, @Ri
XCHD
✓ Exchange lower digit of accumulator with the lower digit of the memory
location specified.
XCHD A, @Ri
✓ The lower 4-bits of the accumulator are exchanged with the lower 4-bits of
the internal memory location identified indirectly by the index register.
✓ The upper 4-bits of each are not modified.

Arithmetic Instructions
Using Arithmetic Instructions, you can perform addition, subtraction,
multiplication and division.
The arithmetic instructions also include increment by one, decrement by one
and a special instruction called Decimal Adjust Accumulator.
The Mnemonics associated with the Arithmetic Instructions of the 8051
Microcontroller Instruction Set are:
✓ ADD
✓ ADDC
✓ SUBB
✓ INC
✓ DEC
✓ MUL
✓ DIV
✓ DA A

ADD A, #data ADDC A, #data SUBB A, #data
ADD A, direct ADDC A, direct SUBB A, direct
ADD A, @Ri ADDC A, @Ri SUBB A, @Ri
ADD A, Rn ADDC A, Rn SUBB A, Rn
INC A DEC A MUL AB

INC direct DEC direct DIV AB
INC @Ri DEC @Ri DA A
INC Rn DEC Rn
INC DPTR

Instructions which affects flag bits

ADD
✓ 8-bit addition between the accumulator (A) and a second operand.
✓ The result is always in the accumulator.
✓ Source operand can be a register, immediate data, or in memory
✓ Memory-to-memory arithmetic operations are never allowed in 8051
Assembly language
Example
✓ Show how the flag register is affected by the following instruction.
MOV A,#0F5H ;A=F5 hex
ADD A,#0BH ;A=F5+0B=00
Solution:
F5H 1111 010
+ 0BH + 0000 1011
100H 0000 0000
✓ CY =1, since there is a carry out from D7 PF =1, because the number of 1s is zero
(an even number), PF is set to 1. AC =1, since there is a carry from D3 to D4
ADDC
✓ 8-bit addition between the accumulator, a second operand and the previous
value of the CY flag.
✓ Useful for 16-bit addition in two steps.
Example:
1
3C E7
+ 3B 8D
78 74 MOV A, #0E7H ;load the low byte now A=E7H
ADD A, #8DH ;add the low byte
MOV R6, A ;save the low byte sum in R6
MOV A, #3CH ;load the high byte
ADDC A, #3BH ;add with the carry
MOV R7, A ;save the high byte sum

SUBB
✓ Subtract with Borrow.
✓ Subtract an operand and the previous value of the borrow (carry) flag from the
accumulator.
✓ A -> A - <operand> - CY.
✓ The result is always saved in the accumulator.
Example:
ORG 0000h
MOV R0, #03H // move the value 3 is register R0//
MOV A, #05H // move the value 5 in accumulator A and assume Cy=0
SUBB A, 00H // A=5-3-cy final value is 2 stored in the Accumulator A //
END

INC
✓ Increment the operand by one. INC A
✓ The operand can be a register, a
direct address, an indirect address, INC direct
the data pointer. INC @Ri , where i =0 or 1
INC Rn, where n =0,1,,7
DEC INC DPTR
✓ Decrement the operand by one.
✓ The operand can be a register, a
direct address, an indirect address.
DEC A
✓ There is no instruction to
DEC direct
decrement DPTR
DEC @Ri , where i =0 or 1
DEC Rn, where n =0,1,,7

MUL AB
✓ MUL AB multiplies the unsigned eight-bit integers in the Accumulator and
register B.
✓ The low-order byte of the sixteen-bit product is left in the Accumulator, and
the high-order byte in B.
✓ If the product is greater than 255 (0FFH) the overflow flag is set; otherwise it
is cleared. The carry flag is always cleared.
Example
✓ Originally the Accumulator holds the value 80 (50H). Register B holds the
value 160 (0A0H). The instruction,
MUL AB
✓ will give the product 12,800 (3200H), so B is changed to 32H (00110010B)

and the Accumulator is cleared. The overflow flag is set, carry is cleared.

DIV AB
✓ DIV AB divides the unsigned eight-bit integer in the Acc. by the unsigned 8-bit
integer in register B.
✓ The Acc. receives the integer part of the quotient; register B receives the
integer remainder.
✓ The carry and OV flags will be cleared. Exception: if B had originally contained
00H, the values returned in the Acc. and B will be undefined and the overflow
flag will be set. The carry flag is cleared in any case.
Example
✓ The Accumulator contains 251 (0FBH or 11111011B) and B contains 18 (12H
or 00010010B). The instruction,
DIV AB
✓ will leave 13 in the Accumulator (0DH or 00001101B) and the value 17 (11H
or 00010001B) in B, since 251 = (13 x 18) + 17. Carry and OV will both be
cleared.
Examples
Multiplication:
ORG 0000h
MOV B, #03H // move the value 3 is register B//
MOV A, #05H // move the value 5 in accumulator A//
MUL AB // A=5*3 final value is 0FH, stored in the Accumulator A & B=0 //
END
Division:
ORG 0000h
MOV B, #03H // move the value 3 is register B//
MOV A, #15H // move the value 5 in accumulator A//
DIV AB // A=15/3 final value is 5 stored in the Accumulator A & B=0//
END
DA A
✓ Decimal-adjust Accumulator for Addition
✓ DA A adjusts the 8-bit value in the Acc. resulting from the earlier addition of
two variable (each in packed-BCD format), producing two 4-bit digits.
✓ Any ADD or ADDC instruction may have been used to perform the addition.
Example
✓ The Acc. holds the value 56H representing the packed BCD digits of the
decimal number 56. R3 contains the value 67H representing the packed BCD
digits of the decimal number 67. The carry flag is set. The instruction
sequence,
ADDC A,R3 0101 0110 = A

DA A + 0110 0111 = R3
+ 0000 0001 = CY
1011 1110
✓ will first perform a standard binary addition, resulting in the value 0BEH
(10111110B) in the Acc. The carry and auxiliary carry flags will be cleared.
Example
✓ The Acc. holds the value 56H representing the packed BCD digits of the
decimal number 56. R3 contains the value 67H representing the packed BCD
digits of the decimal number 67. The carry flag is set. The instruction
sequence,
0101 0110 = A
ADDC A,R3 + 0110 0111 = R3
DA A + 0000 0001 = CY
1011 1110
✓ will first perform a standard binary addition, resulting in the value 0BEH
(10111110B) in the Acc. The carry and auxiliary carry flags will be cleared.
✓ The Decimal Adjust instruction will then alter the Accumulator to the value
24H (00100100B), indicating the packed BCD digits of the decimal number 24,
the low-order two digits of the decimal sum of 56, 67, and the carry-in.
✓ The carry flag will be set by the Decimal Adjust instruction, indicating that a
decimal overflow occurred. The true sum 56, 67, and 1 is 124.
The DA Instruction
Example:
MOV A, #47h ; A=47h first BCD operand
MOV B, #25h ; B=25h second BCD operand
ADD A, B ; hex (binary) addition (A=6Ch)
DA A ; adjust for BCD addition (A=72h)
Hex BCD
47 0100 0111
+ 25 + 0010 0101
6C 0110 1100
+ 6 + 0110
72 0111 0010
Example
Write a program segment to add two 16-bit numbers. The numbers are 3CE7h
and 3B8Dh.
Place the sum in R7 and R6; R6 should store the lower byte.
Solution:
CLR C ; make C=0

MOV A, #0E7h ; load the low byte now A=E7h
ADD A, #8Dh ; add the low byte now A=74h and C=1
MOV R6, A ; save the low byte of the sum in R6
MOV A, #3Ch ; load the high byte
ADDC A, #3Bh ; add with the carry
; 3B + 3C + 1 = 78 (all in hex)
MOV R7, A ; save the high byte of the sum

Logical Instructions
Logical AND Logical OR Logical Ex-OR
ANL A, Rn ORL A, Rn XRL A, Rn

ANL A, direct ORL A, direct XRL A, direct
ANL A, @Ri ORL A, @Ri XRL A, @Ri
ANL A, #data ORL A, #data XRL A, #data
ANL direct, A ORL direct, A XRL direct, A
ANL direct, #data ORL direct, #data XRL direct, #data
Examples
Instruction ANL A,R0 ORL A,R0 XRL A,R0
A before: 10010111 10010111 10010111

R0 before: 11110010 11110010 11110010
A afterwards: 10010010 11110111 01100101
40
The Rotate Instructions
RL A
✓ Rotates A one bit position to the left
RLC A
✓ Rotates A and the carry flag one bit position to the left
RR A
✓ Rotates A one bit position to the right
RRC A
✓ Rotates A and the carry flag one bit position to the right
Note that for RLC and RRC, you have to know the C flag first

The Rotate Instructions
7 6 5 4 3 2 1 0
Before: 10011100
After: 00111001
RL A
C 7 6 5 4 3 2 1 0 Before: 10011100 CY = 0
After: 00111000 CY = 1
Carry Flag RLC A
7 6 5 4 3 2 1 0 Before: 10011100
After: 01001110
RR A
7 6 5 4 3 2 1 0 C Before: 10011100 CY = 1
After: 11001110 CY = 0
RRC A Carry Flag

CLR A
✓ Clear Accumulator. All bits in register A are cleared
CPL A
✓ Complement Accumulator. All bits in register A are complemented.
SWAP
✓ Swapping the lower-nibble (lower 4 bits) and the higher-nibble (upper 4 bits)
of register A.
7 6 5 4 3 2 1 0
High Nibble Low Nibble
SWAP A

Boolean Operations
This group of instructions is associated with the single-bit operations of the 8051.
This group allows manipulating the individual bits of bit addressable registers and
memory locations as well as the CY flag.
CLR C
CLR bit
✓ Clear a bit or the CY flag.
SETB C
SETB bit
✓ Set a bit or the CY flag.
CPL C
CPL bit
✓ Complement a bit or the CY flag.

Boolean Operations
ANL C,bit
✓ AND a bit with the CY flag.
ANL C,/bit
✓ AND complement of a bit with the CY flag.
ORL C,bit
✓ OR a bit with the CY flag.
ORL C,/bit
✓ OR complement of a bit with the CY flag.
MOV C,bit
✓ Move bit to the CY flag.
MOV bit,C
✓ Move CY flag to the bit.

Branching Instructions
There are numerous instructions to control the flow of programs, including those
that call and return from subroutines or branch conditionally or unconditionally.
There are three variations of the JMP instruction: SJMP, LJMP, and AJMP (using
the relative, longs and absolute addressing).
Relative Jump
✓ Range +127d, -128d bytes from the instruction following the jump instruction.
Short Absolute Jump
✓ Range on the same 2K byte page.
Long Absolute Jump
✓ Range of any address from 0000h to 0FFFFh in 64K bytes of memory.

Branching Instructions

SJMP rel
Function:
✓ Short Jump
Description:
✓ Program control branches unconditionally to the address indicated. The range
of destinations allowed is from 128 bytes preceding this instruction to 127
bytes following it.
Example:
✓ The label “Rel_Address” is assigned to an instruction at program memory
location 0123H. The instruction,
SJMP Rel_Address
✓ will assemble into location 0100H. After the instruction is executed, the PC
will contain the value 0123H.

AJMP addr11
Function:
✓ Absolute Jump
Description:
✓ The AJMP instruction specifies the destination address as an 11 bit constant.
As with SJMP, this instruction is 2 bytes long, but the encoding is different.
✓ The opcode contains three of the 11 address bits, and byte 2 holds the low-
order eight bits of the destination address. When the instruction is executed,
these 11 bits replace the low-order 11 bits in the PC, and the high-order five
bits in the PC stay the same.
✓ The destination therefore must be within the same 2K block as the instruction
following the AJMP. Since there is 64K of code memory space, there are 32
such block, each beginning at a 2K address boundary (0000H, 0800H, 1000H,
1800H, etc., up to F800H.

Absolute Jump Pages
Page Address Page Address Page Address Page Address

00 0000–07FF 08 4000-47FF 10 8000-87FF 18 C000-C7FF
01 0800-0FFF 09 4800-4FFF 11 8800-8FFF 19 C800-CFFF
02 1000-17FF 0A 5000-57FF 12 9000-97FF 1A D000-D7FF
03 1800-1FFF 0B 5800-5FFF 13 9800-9FFF 1B D800-DFFF
04 2000–27FF 0C 6000-67FF 14 A000-A7FF 1C E000-E7FF
05 2800-2FFF 0D 6800-6FFF 15 A800-AFFF 1D E800-EFFF
06 3000–37FF 0E 7000-77FF 16 B000-B7FF 1E F000-F7FF
07 3800-3FFF 0F 7800-7FFF 17 B800-BFFF 1F F800-FFFF

LJMP addr16
Function:
✓ Long Jump
Description:
✓ LJMP causes an unconditional branch to the indicated address, by loading the
high-order and low-order bytes of the PC (respectively) with the second and
third instruction bytes. The destination may therefore be anywhere in the full
64k program memory address space. No flags are affected.
Example:
✓ The label “JMPADR” is assigned to the instruction at program memory location
1234H. The instruction,
LJMP JMPADR
✓ at location 0123H will load the program counter with 1234H.

JMP @A+DPTR
Function:
✓ Jump indirect
Description:
✓ Add the eight-bit unsigned contents of the Accumulator with the sixteen-bit
data pointer, and load the resulting sum to the program counter. This will be
the address for subsequent instruction fetches.
✓ Sixteen-bit addition is performed and a carry-out from the low-order eight bits
propagates through the higher-order bits.
✓ Neither the Accumulator nor the Data Pointer is altered.

JMP @A+DPTR
Function:
✓ An even number from 0 to 6 is in the Accumulator. The following sequence of
instructions will branch to one of four AJMP instructions in a jump table
starting at JMP_TBL:
MOV DPTR,#JMP_TBL
JMP @A+DPTR
JMP_TBL:
AJMP LABEL0
AJMP LABEL1
AJMP LABEL2
AJMP LABEL3

Conditional Bit Jumps
All bit jumps are relative to the program counter. Jump instructions that test for
bit conditions are shown in the following table.
Mnemonic Operation
JC radd Jump relative if the carry flag is set to 1
JNC radd Jump relative if the carry flag is reset to 0
JB b,radd Jump relative if addressable bit is set to 1
JNB b,radd Jump relative if addressable bit is reset to 0
Jump relative if addressable bit is set, and clear

JBC b.radd
the addressable bit to 0

Example
Assume that RAM locations 40h – 42h have the following values. Write a program
to find the sum of the values in these locations. At the end of the program,
register A should contain the low byte and R7 contain the high byte.
RAM locations: 40h = (7Dh), 41h = (EBh), 42h = (C5h)
Solution:
MOV A, 40h ; set A = RAM location 40h
MOV R7, #0 ; set R7 = 0
ADD A, 41h ; add A with RAM location 41h
JNC NEXT ; if CY = 0 don’t accumulate carry
INC R7 ; keep track of carry
NEXT: ADD A, 42h ; add A with RAM location 42h
JNC NEXT1 ; if CY = 0 don’t accumulate carry
INC R7 ; keep track of carry
NEXT1:
END

Conditional Byte Jumps
Byte jumps-jump instructions that test bytes of data-behave as bit jumps.
If the condition that is tested is true, the jump is taken; if the condition is false,
the instruction after the jump is executed.
All byte jumps are relative to the program counter. The following table lists
examples of byte jumps:
Mnemonic Operation
CJNE A,direct,radd Compare the contents of the A register with the contents of the direct
address; if they are not equal, then jump to the relative address; set
the carry flag to 1 if A is less than the contents of the direct address;
otherwise, set the carry flag to 0
CJNE A,#n,radd Compare the contents of the A register with the immediate number n;
if they are not equal, then jump to the relative address; set the carry
flag to 1 if A is less than the number; otherwise, set the carry flag to 0
CJNE Rn,#n,radd Compare the contents of register Rn with the immediate number n; if
they are not equal, then jump to the relative address; set the carry flag
to 1 if Rn is less than the number; otherwise, set the carry flag to 0
CJNE @Ri,#n,radd Compare the contents of the address contained in register Ri to the
number n; if they are not equal, then jump to the relative address; set
the carry flag to 1 if the contents of the address in Rp are less than the
3160914:MP & MC DR. MUKESH
number; otherwise, M BHESANIYA
set the carry flag to 0 56
Example
✓ Write a program segment to monitor P1 continuously for the value of 63h. It
should get out of the monitoring only if P1 = 63h.
Solution :
MOV P1, #0FFh ; make P1 an input port

HERE: MOV A, P1 ; get P1
CJNE A, #63h, HERE ; keep monitoring unless P1=63h

Example
Assume that P1 is an input port connected to a temperature sensor. Write a
program to read the temperature and test it for the value 75. According to the
test results, place the temperature value into the registers indicated by the
following.
✓ If T = 75 then A = 75
✓ If T < 75 then R1 = T
✓ If T > 75 then R2 = T
Solution :
MOV P1,#0FFH ;make P1 an input port
MOV A,P1 ;read P1 port
CJNE A,#75,OVER ;jump if A≠75
SJMP EXIT ;A=75
OVER: JNC NEXT ;
MOV R1,A ;A<75, save A R1
SJMP EXIT ;
NEXT: MOV R2,A ;A>75, save A in R2
EXIT: ...

Example
Assume internal RAM memory locations 40H – 44H contain the daily temperature
for five days, as shown below. Search to see if any of the values equals 65. If value
65 does exist in the table, give its location to R4; otherwise, make R4 = 0.
✓ 40H=（76）41H=（79）42H=（69）43H=（65）44H=（62）
Solution :
MOV R4,#0 ;R4=0
MOV R0,#40H ;load pointer
MOV R2,#05 ;load counter
BACK: CJNE @R0, #65H, NEXT ;compare RAM data with 65
MOV A,R0 ;if 65, save address
MOV R4,A ;if 65, save address
SJMP EXIT ;and exit
NEXT: INC R0 ;increment pointer
DJNZ R2,BACK ;keep check until count=0
EXIT: ...

Mnemonic Operation
DJNZ Rn,radd Decrement register Rn by I and jump to the relative address if
the result is not zero; no flags are affected
DJNZ direct,radd Decrement the direct address by I and jump to the relative
address if the result is not O; no flags are affected unless the
direct address is the PSW
JZ radd Jump to the relative address if A is 0; the flags and the A

register are not changed
JNZ radd Jump to the relative address if A is not 0; the flags and the A
register are not changed

Example
One array of five elements is stored at ROM location starting from 300h. Copy this
array in RAM location starting at 40h.
ORG 0000H
MOV DPTR, #300H // STARTING ROM LOCATION
MOV R0, #40H // STARTING RAM LOCATION
MOV R2, #05H // LOAD COUNTER
LOOP: CLR A
MOVC A, @A+DPTR //COPY ROM LOCATION DATA TO ACC
MOV @R0, A // COPY ACC DATA TO RAM LOCATION
INC DPTR
INC R0
DJNZ R2, LOOP
END
Example
Write an ALP to add 10 data bytes stored at internal RAM locations starting from
40H. Store the result at the location of R5 (LSB of the result) of bank 2 and the
location of R4 (MSB of the result) of bank 2.
ORG 0H
SETB PSW.4
CLR PSW.3
MOV R2,#00H
MOV R0,#0AH
MOV R1,#40H
CLR A
Loop: ADD A,@R1
JNC Skip
INC R2
Skip: INC R1
DJNZ R0,Loop
MOV R4,A
MOV A,R2
MOV R5,A
END
Software delay in 8051
In an 8051 microcontroller, it requires 12 cycles of the processor clock for
executing a single instruction cycle.
For an 8051 microcontroller clocked by a 12MHz crystal, the time taken for
executing one instruction cycle is 1μS and it is according to the equation, Time for
1 instruction cycle= 12 /12MHz = 1μS.
The shortest instructions will execute in 1μS and other instructions will take 2 or
more micro seconds depending up on the size of the instruction.
Thus a time delay of any magnitude can be generated by looping suitable
instructions a required number of time.

Machine Cycle
Example
✓ Lets find the time period of the machine cycle in each case for the following
crystal frequency of different 8051 based systems: 11.0592 MHz, 16 MHz, 20
MHz.
Answer:
✓ 11.0592 MHz:
11.0592/12 = 921.6 KHz
Machine cycle = 1/921.6 KHz = 1.085us [us=microsecond]
✓ 16 MHz:
16MHz/12 = 1.333 MHz
Machine cycle = 1/1.333 MHz = 0.75us [us=microsecond]
✓ 20MHz:
20MHz/12 = 1.66 MHz
Machine Cycle = 1/1.66 MHz = 0.60us [us=microsecond]

Machine Cycle
Example:
✓ Lets find how long it takes to execute each of the following instructions, for a
crystal frequency of 11.0592 MHz.
✓ The machine cycle of a system of 11.0592 MHz is 1.085 us.
Instruction Machine Cycle Time To Execute
MOV R2,#55H 1 1x1.085 us = 1.085 us
DEC R2 1 1x1.085 us = 1.085 us
DJNZ R2,target 2 2x1.085 us = 2.17 us
LJMP 2 2x1.085 us = 2.17 us
SJMP 2 2x1.085 us = 2.17 us
NOP 1 1x1.085 us = 1.085 us
MUL AB 4 4x1.085 us = 4.34 us

Example
Program for generating square wave.
✓ Using software delay subroutines square waves over a wide frequency range
(limited by the crystal frequency) can be produced using 8051.
✓ The idea is very simple, run a subroutine with delay equal to half the time
period of the square wave, complement any port pin after the delay routine is
finished, repeat the delay subroutine again, complement the same port pin
again and repeat the cycle again and again over time.
✓ This will result in a square wave of the required frequency at the
corresponding port pin.
Delay Example: (fclock=11.0592 MHz)
DELAY: MOV R2,#255 Machine Cycle = 1
HERE: DJNZ R2,HERE Machine Cycle = 2
RET Machine Cycle = 1
✓ Therefore, we have a time delay of [(255 x 2) + 1 + 1] x 1.085 us = 555.52 us

Example
Program for generating 1KHz square wave. (f=12MHz)
ORG 000H
MOV P1,#00000000B
MOV A,#00000000B
MAIN: MOV R6,#248D
LOOP1: DJNZ R6,LOOP1
CPL A
MOV P1,A
SJMP MAIN
END

Example
Program for generating 500Hz square wave. (f=12MHz)
ORG 000H
MOV P1,#00000000B
MOV A,#00000000B
MAIN: MOV R6,#2D
LOOP2: MOV R7,#245D
LOOP1: DJNZ R7,LOOP1
DJNZ R6,LOOP2
CPL A
MOV P1,A
SJMP MAIN
END
ACALL addr11
Function:
✓ Absolute Call
Description:
✓ ACALL unconditionally calls a subroutine located at the indicated address. The
instruction increments the PC twice to obtain the address of the following
instruction, then pushes the 16-bit result onto the stack (low-order byte first)
and increments the Stack Pointer twice.
✓ The subroutine called must start within the same 2k block of the program
memory as the first byte of the instruction following ACALL.

ACALL addr11
Example:
✓ Initially SP equals 07H. The label “SUBRTN” is at program memory location
0345 H. After executing the instruction,
ACALL SUBRTN
✓ at location 0123H, SP will contain 09H, internal RAM locations 08H and 09H
will contain 25H and 01H, respectively, and the PC will contain 0345H.

LCALL addr16
Function:
✓ Long Call
Description:
✓ LCALL calls a subroutine located at the indicated address.
✓ The instruction adds three to the program counter to generate the address of
the next instruction and then pushes the 16-bit result onto the stack (low byte
first), incrementing the Stack Pointer by two.
✓ The high-order and low-order bytes of the PC are then loaded, respectively,
with the second and third bytes of the LCALL instruction.
✓ Program execution continues with the instruction at this address. The
subroutine may therefore begin anywhere in the full 64k-byte program
memory address space. No flags are affected.

LCALL addr16
Example:
✓ Initially the Stack Pointer equals 07H. The label “SUBRTN” is assigned to
program memory location 1234H. After executing the instruction,
LCALL SUBRTN
✓ at location 0123H, the Stack Pointer will contain 09H, internal RAM locations
08H and 09H will contain 26H and 01H, and the PC will contain 1235H.

LCALL addr16
The diagram below shows the contents of the PC and the SP as the instruction
LCALL sub (at location 103BH in code memory) is about to be executed.
Notice the SP is at its reset value of 07H and the PC contains the address of the
next instruction to be executed (LCALL sub).

LCALL addr16
The diagram below shows the state of the PC, the SP and the stack after the LCALL
sub instruction has been executed.
Notice the return address is stored on the stack, the low-byte in location 08H and
the high-byte in location 09H.

RET
Function:
✓ Return from subroutine
Description:
✓ RET pops the high- and low-order bytes of the PC successively from the stack,
decrementing the Stack Pointer by two. Program execution continues at the
resulting address, generally the instruction immediately following an ACALL or
LCALL. No flags are affected.
Example:
✓ The Stack Pointer originally contains the value 0BH. Internal RAM locations
0AH and 0BH contain the values 23H and 01H, respectively. The instruction,
RET
✓ will leave the Stack Pointer equal to the value 09H. Program execution will
continue at location 0123H.

Example
Use of Subroutine
ORG 0
BACK: MOV A,#55H ;Load A with 55H
MOV P2,A ;Send 55H to Port 2
LCALL DELAY ;Time Delay
MOV A,#0AAH ;Load accumulator with AAH [in hex]
MOV P2,A ;Send AAH to port 2
LCALL DELAY ;Time Delay
SJMP BACK ;Keep doing this indefinitely
;---This is the delay subroutine
ORG 300H ;Put the time delay at address 300H
DELAY: MOV R4,#0FFH ;R4=255 [FF in hex], the counter
AGAIN: DJNZ R5,AGAIN ;Stay here until R4 becomes 0
RET ;Return to Caller [when R4=0]
END ;End of asm file
Example
Rewriting Previous Example more efficiently:
ORG 0
MOV A,#55H ;Load accumulator A with 55H
BACK: MOV P1,A ;Issue value in register accumulator A to Port1
ACALL DELAY ;time delay
CPL A ;Complement register A i.e 55H becomes AAH
SJMP BACK ;Keep doing this indefinitely
;----------this is the delay subroutine

DELAY: MOV R5,#0FFH ;R5=255 [FF in Hex], the counter
AGAIN: DJNZ R5,AGAIN ;Stay here until R5 becomes 0
RET ;Return to caller
END ;End of asm file

PUSH
01 0000
and POP
ORG 0
Instructions in Subroutines
02 0000 7455 BACK: MOV A,#55H ;Load accumulator with 55H
03 0002 F590 MOV P1,A ;Send 55H to Port 1
04 0004 7C99 MOV R4,#88H
05 0006 7D67 MOV R5,#57H
06 0008 120300 LCALL DELAY ;Time delay
07 000B 74AA MOV A,#0AAH ;Load accumulator with AA
08 000D F590 MOV P1,A ;Send AAH to Port 1
09 000F 120300 LCALL DELAY
10 0012 80EC SJMP BACK ;Keep doing this
11 0014 ;---this is the delay subroutine
12 0300 ORG 300H
13 0300 C004 DELAY:PUSH 4 ;PUSH R4
14 0302 C005 PUSH 5 ;PUSH R5
15 0304 7CFF MOV R4,#0FFH ;R4=FFH
16 0306 7DFF NEXT: MOV R5,#0FFH ;R5=255
17 0308 DDFE AGAIN:DJNZ R5,AGAIN
18 030A DCFA DJNZ R4,NEXT
19 030C D005 POP 5 ;POP into R5
20 030E D004 POP 4 ;POP into R4
21 0310 22 RET ;Return to caller
3160914:MP
22 0311 & MC END DR. MUKESH M BHESANIYA ;End of asm file 78
The stack frame is given below
After the first LCALL Byte Remarks
0B
0A
09 00 Program counter Hight Byte [PCH]
08 0B Program counter Low Byte [PCL]
After PUSH 4
0B
0A 88 R4
08 0B Program counter Low Byte [PCH]
After PUSH 5
0B 57 R5
0A 88 R4
08 0B Program counter Low Byte [PCH]
BCD, ASCII, and other application programs
In this section we provide some real-world examples on how to use arithmetic
and logic instructions.
We will see their applications in real-world devices covered in future chapters.
ASCII numbers
✓ On ASCII keyboards, when the key “0″ is activated, 30H (0011 0000) is
provided to the computer. Similarly, 31H (0011 0001) is provided for the key
“1″, and so on, as shown in Table.
✓ It must be noted that although ASCII is standard in the United States (and
many other countries), BCD numbers are universal. Since the keyboard,
printers, and monitors all use ASCII, how does data get converted from ASCII
to BCD, and vice versa? These are the subjects covered next.

ASCII Code for Digits 0 – 9
Key ASCII (hex) Binary BCD (unpacked)
0 30 011 0000 0000 0000
1 31 011 0001 0000 0001
2 32 011 0010 0000 0010
3 33 011 0011 0000 0011
4 34 011 0100 0000 0100
5 35 011 0101 0000 0101
6 36 011 0110 0000 0110
7 37 011 0111 0000 0111
8 38 011 1000 0000 1000
9 39 011 1001 0000 1001

Packed BCD to ASCII conversion
Many systems have what is called a real-time clock (RTC). The RTC provides the
time of day (hour, minute, second) and the date (year, month, day) continuously,
regardless of whether the power is on or off (see Chapter 16). However, this data
is provided in packed BCD. For this data to be displayed on a device such as an
LCD, or to be printed by the printer, it must be in ASCII format.
To convert packed BCD to ASCII, it must first be converted to unpacked BCD. Then
the unpacked BCD is tagged with Oil 0000 (30H). The following demonstrates
converting from packed BCD to ASCII.

Packed BCD to ASCII conversion
Assume that register A has packed BCD, write a program to convert packed BCD to
two ASCII numbers and place them in R2 and R6.
Solution:
MOV A,#29H ;packed BCD
ANL A,#0FH ;Lower nibble: A=09H
ORL A,#30H ;make it an ASCII, A=39H (‘9’)
MOV R6,A ;R6=39H ASCII char
MOV A,#29H ;
ANL A,#0F0H ;upper nibble: A=20H
SWAP A ;A=02H, equals to ”RR A” 4 times
ORL A,#30H ;A=32H,ASCII char ’2’
MOV R2,A ;R2=32H ASCII char

ASCII to packed BCD conversion
To convert ASCII to packed BCD, it is first converted to unpacked and then
combined to make packed BCD.
For example, for 4 and 7 the keyboard gives 34 and 37, respectively. The goal is to
produce 47H or “0100 0111″, which is packed BCD. This process is illustrated next.

Using a look-up table for ASCII
In some applications it is much easier to use a look-up table to get the ASCII
character we need. This is a widely used concept in interfacing a keyboard to the
microcontroller.
Assume that the lower three bits of P1 are connected to three switches. Write a
program to send the following ASCII characters to P2 based on the status of the
switches.

Create Checksum Byte in ROM
To ensure the integrity of the ROM contents, every system perform the checksum
calculation.
The checksum byte is an extra byte that is tagged to the end of a series of bytes of
data.
To calculate the checksum byte:
✓ Add the bytes together and drop the carries.
25H+62H+3FH+52H=118H → sum=18H
✓ Take the 2’s complement of the sum. This is checksum byte, attached as the
last byte of the series.
2’s complement of 18H = E8H
✓ The series becomes 25H-62H-3FH-52H-E8H

To perform the checksum operations:
1. Add all the bytes, including the checksum byte
2. The result must be zero. If the result is not zero, there is some error occurred.
ASCII numbers
Assume that we have 4 bytes of hexadecimal data: 25H, 62H, 3FH, and 52H.
a. Find the checksum byte,
b. perform the checksum operation to ensure data integrity, and
c. if the second byte 62H has been changed to 22H, show how checksum
detects the error.
Solution:
(a) Find the checksum byte
25H+62H+3FH+52H=118H → sum=18H
Dropping the carry of 1, we have 18H.
The 2’s complement of 18H is E8H.

The checksum byte = E8H
(b) Perform the checksum operation to ensure data integrity
25H+62H+3FH+52H+E8H=200H → sum=00H
Dropping the carries, we have 00H.
Data is correct!
(c) If the second byte 62H has been changed to 22H, show how checksum detects
the error.
25H+22H+3FH+52H+E8H=1C0H → sum=C0H
Dropping the carries, we have C0H, which is not 00H.
The ROM data is corrupted

Checksum Program
Calculating checksum byte and save checksum in RAM location
#RAM_ADDR+Count
CAL_CHKSUM:
MOV R1,#RAM_ADDR
MOV R2,#COUNT
CLR A
H2: ADD A,@R1 ;calculate the sum
INC R1
DJNZ R2,H2
CPL A ;2’s complement
INC A
MOV @R1,A ;save checksum
RET
Binary to BCD Conversion
This subroutine converts 8 bit Hexadecimal number into its equivalent BCD value.
BIN_DEC:
MOV A,R0
MOV B,#100
DIV AB
MOV R3,A ; R3 CONTAIN HUNDRED NUMBER
MOV A,B
MOV B,#10
DIV AB
MOV R2,A ; R2 CONTAIN TENTH NUMBER
MOV R1,B ; R1 CONTAIN LEFT DECIMAL NUMBER
RET

Binary to BCD Conversion
This subroutine converts 8 bit Hexadecimal number into its equivalent BCD value.
BIN_DEC_CONVRT: ; converting binary to decimal
MOV R0,#RAM_ADDR
MOV A,P1
MOV B,#10
DIV AB
MOV @R0,B ;save lower digit
INC R0
MOV B,#10
DIV AB
MOV @R0,B ;save next digit
INC R0
MOV @R0,A ;save last digit
RET

BCD to Binary Conversion
A set of ten 2-digit BCD numbers is stored in the memory location starting at 30h.
Convert these numbers into their binary equivalent and store them in the
memory locations starting from 40h.
ORG 0000H
MOV R0,#30H ;starting location of source array
MOV R1,#40H ;starting location of destination array
MOV R2,#0AH ;no of elements
LOOP: MOV A,@R0 ;get the number
ANL A,#0FH ;mask the higher nibble
MOV R5,A ;sotre the lower nibble
MOV A,@R0 ;get the number
ANL A,#0F0H ;mask the lower nibble
SWAP A ;get the higher nibble
MOV B,#0AH
MUL AB ;multipy higher nibble by 10
ADD A,R5 ;add lower nibble to get the result
MOV @R1,A ;store the binay number
INC R0
INC R1
DJNZ R2,LOOP
3160914:MP & MC END DR. MUKESH M BHESANIYA 92
References
The 8051 Microcontroller and Embedded Systems Using Assembly and C
By Muhammad Ali Mazidi, Janice Gillispie Mazidi and Rolin McKinlay
Pearson Education
The 8051 Microcontroller & Embedded Systems using Assembly and C

By K. J. Ayala, D. V. Gadre
Cengage Learning , India Edition
Using the MCS-51 Microcontrollers

By Han Way Huang
Oxford Uni Press
Programming and Customizing the 8051 Microcontroller

By Myke Predko
Tata Mcgraw Hill

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Chapter-4

8051 Assembly Language

Dr. Mukesh M Bhesaniya

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Addressing Modes Instruction

Register Addressing Modes MOV A, B

Direct Addressing Modes MOV 30H,A

Indirect Addressing Modes ADD A,@R0

Immediate Addressing Modes ADD A,#80H

Indexed Addressing Modes MOVC A,@A+DPTR

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• MOV A, direct • MOV direct, Rn

• MOV A, @Ri • MOV direct, direct

• MOV A, #data • MOV direct, @Ri

• MOV direct, #data

• MOV Rn, direct • MOV @Ri, A

• MOV Rn, #data • MOV @Ri, direct

• MOV @Ri, #data

MOVC <destination>, <source>

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MOV R6, #25H

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POP 3 ; POP stack into R3

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POP 3 ; POP stack into R3

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INC A DEC A MUL AB

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✓ will give the product 12,800 (3200H), so B is changed to 32H (00110010B)

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ADDC A,R3 0101 0110 = A

CLR C ; make C=0

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ANL A, Rn ORL A, Rn XRL A, Rn

Instruction ANL A,R0 ORL A,R0 XRL A,R0

A before: 10010111 10010111 10010111

✓ Rotates A one bit position to the left

✓ Rotates A one bit position to the right

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Carry Flag RLC A

RRC A Carry Flag

✓ Clear Accumulator. All bits in register A are cleared

✓ Complement Accumulator. All bits in register A are complemented.

High Nibble Low Nibble

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MP & MC Chap4

MP & MC Chap4