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COM
A B C D E

MODEL NAME : BBV00/ BBV10

PCB NO : LA-D993P

1
BOM P/N :
Dell/Compal Confidential 1

Schematic Document
KABYLAKE-H

2016-11-01
2
Rev: 1.0 (A00) 2

@ : Nopop Component
CONN@ : Connector Component
R1@ / R3@ : R1/R3 CPN for CPU, GPU, PCB
EMC@ : Pop of EMI parts
S4G@ : Samsung GDDR5 4G for GPU
M4G@ : Micron GDDR5 4G for GPU
H4G@ : Hynix GDDR5 4G for GPU
BreakDown@ : For measure power consumption
14G0@ : 14" N17P-G0
3 15G1@ : 15" N17P-G1 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

WWW.ALISALER.COM
Issued Date 2011/08/25 Deciphered Date 2011/08/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Cover Page
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 1 of 70
A B C D E
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A B C D E

128M*32 x4 =2G 256M*32 x4 =4G

VRAM * 4
GDDR5 P.28~30

GB4-128 Memory Bus (DDR4) DDRIV-DIMM X2

1.2V DDR4 2400 MHz
GPU PEG 3.0 x16 Dual Channel P.14~15
HDMI 2.0 Retimer IFP
1

Conn. P.36 PS8409A P35

N17PG0/ N17P-G1 Intel 32GB Max
1

40W/ 50W P.23~27

KBL-Lake-H
Processor
45W
14.0'' / 15.6'' BGA
HD / FHD / UHD eDP 1.2 *4 lane
P.34
P.7~13

DMI x4
100MHz
5GB/s

Port 5 PCI-E x1
LOM SATA3.0 Port 1 HDD
RJ45
P.47 RTL8111H P.47 Conn. P.44

Port 0
2 M.2 Slot C Key-M Touch Panel 2

M.2 Slot A Key-E Port 6 Port 9~12 (SATA/PCIe SSD) Conn. P.35
Digital Camera PCI-E x1 PCI-E x4 P.44
(WLAN+BT4.0)
Conn. P.34
P.43 USB2.0 Port 9

USB2.0 Port 12
Intel
USB2.0 Port 4
USB2.0 Port 1
KBL-H-PCH
USB 3.0 Conn.
SPI Flash USB 3.0 Port 1
SPI P.46
(BIOS 16MB) BGA 837 Balls
P.17
Port 2
USB2.0 Port 2 USB Powershare USB 3.0 Conn.
( USB Charger ) P.46
TPS2544 P.45

Subwoofer Subwoofer AMP

USB2.0 Port 3 IO Board
ALC1302 P.39

HDA Codec HD Audio USB 3.0 Re-driver USB 3.0 Conn.

USB 3.0 Port 3
3

Main SPKR *2 ALC3246 SN65LVPE50

3

P.38
P.37

USB2.0 Port 7
P16~22
Universal Card Reader 2 in 1
Audio Jack P.38 RTS5176E SD / MS
I2C
Touch Pad LPC Bus
P.41 PS2 33MHz

LED Board

SMSC 1404 LED Hall Sensor

SIO P.48

Power Button Board

4 4

Charger & KB Conn. Power Button

Battery P.55 P.40

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2011/08/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Block diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 2 of 70
A B C D E
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A B C D E

Compal Confidential
Project Code :
File Name :

1 1

M/B

2 2

IO Board LED Board PWB Board

3 3

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DB block diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 3 of 70
A B C D E
 WWW.AliFixit.COM
A

Board ID Resistor USB3 DESTINATION USB 2.0 DESTINATION DDI DESTINATION

X00 N/A 1 USB Conn 1 (Right Side) 1 USB Conn 1 (Right Side) 1 Alpine Ridge

X01 2 USB Conn 2 (Left Side) 2 USB Conn 2 (Left Side) 2 Alpine Ridge

X02 3 None 3 None 3 None

X03 4 None 4 NGFF-1 WLAN + BT

X04 22.1K 5 None 5 None

A00 6 None 6 None

7 None LPC DESTINATION

PCI EXPRESS DESTINATION USB3 DESTINATION 8 None LPC0 MEC5085

Lane 1 NGFF-1 WLAN + BT 7 None 9 Touch screen LPC1 DEBUG PORT

Lane 2 CARD READER 8 None 10 None

Lane 3 None 9 None 11 None

Lane 4 None 10 None 12 CAMERA

Lane 5 None

Lane 6 None CLKOUT_PCIE DESTINATION CLKOUT_PCIE DESTINATION

Lane 7 None 0 None 10 None

Lane 8 None SATA DESTINATION 1 None 11 None

1 Lane 9 SSD 0A SSD 2 None 12 None 1

Lane 10 SSD 1A N/A 3 NGFF-1 WLAN 13 None

Lane 11 SSD N/A N/A 4 CARD READER 14 None

Lane 12 SSD N/A N/A 5 Thunderbolt 15 None

Lane 13 None 0B None 6 NGFF-2 SSD

Lane 14 None 1B HDD 7 GPU

Lane 15 2 None 8 None

Alpine Ridge
Lane 16 3 None 9 None

Symbol Note :

: means Digital Ground : means Analog Ground

Security Classification Compal Secret Data Compal Electronics, Inc.

2011/08/25 2012/07/25 Title

WWW.ALISALER.COM
Issued Date Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Notes List
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 4 of 70
A
 WWW.AliFixit.COM
5 4 3 2 1

1K 1K
SMBUS Address [0x9a]
+3V_PCH +3VS
1K 1K
SMBCLK
+3VS
AW44
SMBDATA DMN65D8L
BB43 DIMMA
DMN65D8L
D D
1K 1K

+3VALW DIMMB
+3V_PCH
1K 1K
+3V_PCH
AW42 SML1_SMBCLK
PCH DMN65D8L
AW45 SML1_SMBDAT Thermal
DMN65D8L

4.7K 2.4K
GPU
+3VS +3VS_TP
4.7K 2.4K
+3VS
AR41 I2C1_SCK_TP
I2C1_SDA_TP DMN65D8L TP
AR44
DMN65D8L
AW45 AW42

SML0_SMBCLK 499

SML0_SMBDATA
+3V_PCH
499
C C

4.7K

A5 B6
+3VALW_EC
4.7K
9 PBAT_CHG_SMBCLK 100 ohm
8 100 ohm BATT
PBAT_CHG_SMBDAT 0x16
2.2K
0 ohm

0 ohm Charger

MEC1404

2.2K 5.1K
B B

+3VALW_EC +3.3V_GFX_AON
5.1K
2.2K DGPU_PEX_RST#
12 GPU_THM_SMBCLK DMN66D0
11 GPU
GPU_THM_SMBDAT
DMN66D0 0x9E

DMN66D0
Thermal
DMN66D0

2.2K

+3VALW_EC
2.2K
A B4 MCP23017_SMBCLK 0 ohm A

A3 0 ohm MCP23017
MCP23017_SMBDAT 0x42

Compal Electronics, Inc.

Security Classification Compal Secret Data
Issued Date 2011/08/25 Deciphered Date 2012/07/15 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SMBus Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 5 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

D D

+VCCST

RH97 1 @ 2 PCH_JTAG_TDO
51_0402_5% PCH_JTAG_TDO [18]
RH98 1 @ 2 PCH_JTAG_TMS
51_0402_5% PCH_JTAG_TMS [18]
RH100 1 @ 2 PCH_JTAG_TDI
51_0402_5% PCH_JTAG_TDI [18]

+VCCSTG

RH497 1 2 CPU_XDP_TDO
51_0402_5%
RH496 1 2 CPU_XDP_TMS
51_0402_5%
RH56 1 2 CPU_XDP_TDI
51_0402_5%

RH95 1 @ 2 PCH_JTAG_TCK
51_0402_5% PCH_JTAG_TCK [18]
RH61 1 2 CPU_XDP_TCK
51_0402_5% CPU_XDP_TCK [9,18]
RH60 1 @ 2 CPU_XDP_TRST# CPU_XDP_TRST# [9,22]
51_0402_5%

C C

PCH_JTAG_TDO RH115 1 @ 2 0_0402_5% CPU_XDP_TDO [9]

PCH_JTAG_TMS RH492 1 @ 2 0_0402_5% CPU_XDP_TMS [9]

PCH_JTAG_TDI RH118 1 @ 2 0_0402_5% CPU_XDP_TDI [9]

Pilot_05

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
XDP CONN
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 6 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

?
SKYLAKE_HALO
UH1C
BGA1440

PEG_GTX_C_HRX_P15 E25 B25 PEG_HTX_GRX_P15 CH5 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P15

PEG_GTX_C_HRX_N15 D25 PEG_RXP[0] PEG_TXP[0] A25 PEG_HTX_GRX_N15 CH6 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N15
PEG_HTX_C_GRX_P[0..15] PEG_RXN[0] PEG_TXN[0]
[23] PEG_HTX_C_GRX_P[0..15]
PEG_GTX_C_HRX_P14 E24 B24 PEG_HTX_GRX_P14 CH7 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P14
PEG_HTX_C_GRX_N[0..15] PEG_GTX_C_HRX_N14 F24 PEG_RXP[1] PEG_TXP[1] C24 PEG_HTX_GRX_N14 CH8 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N14
[23] PEG_HTX_C_GRX_N[0..15] PEG_RXN[1] PEG_TXN[1]
PEG_GTX_C_HRX_P[0..15] PEG_GTX_C_HRX_P13 E23 B23 PEG_HTX_GRX_P13 CH9 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P13
[23] PEG_GTX_C_HRX_P[0..15] PEG_RXP[2] PEG_TXP[2]
PEG_GTX_C_HRX_N13 D23 A23 PEG_HTX_GRX_N13 CH10 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N13
PEG_GTX_C_HRX_N[0..15] PEG_RXN[2] PEG_TXN[2]
[23] PEG_GTX_C_HRX_N[0..15]
PEG_GTX_C_HRX_P12 E22 B22 PEG_HTX_GRX_P12 CH11 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P12
PEG_GTX_C_HRX_N12 F22 PEG_RXP[3] PEG_TXP[3] C22 PEG_HTX_GRX_N12 CH12 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N12
PEG_RXN[3] PEG_TXN[3]
PEG_GTX_C_HRX_P11 E21 B21 PEG_HTX_GRX_P11 CH13 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P11
D
PEG_GTX_C_HRX_N11 D21 PEG_RXP[4] PEG_TXP[4] A21 PEG_HTX_GRX_N11 CH14 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N11 D
PEG_RXN[4] PEG_TXN[4]
PEG_GTX_C_HRX_P10 E20 B20 PEG_HTX_GRX_P10 CH15 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P10
PEG_GTX_C_HRX_N10 F20 PEG_RXP[5] PEG_TXP[5] C20 PEG_HTX_GRX_N10 CH16 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N10
PEG_RXN[5] PEG_TXN[5]
PEG_GTX_C_HRX_P9 E19 B19 PEG_HTX_GRX_P9 CH17 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P9
PEG_GTX_C_HRX_N9 D19 PEG_RXP[6] PEG_TXP[6] A19 PEG_HTX_GRX_N9 CH18 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N9
PEG_RXN[6] PEG_TXN[6]
PEG_GTX_C_HRX_P8 E18 B18 PEG_HTX_GRX_P8 CH19 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P8
PEG_GTX_C_HRX_N8 F18 PEG_RXP[7] PEG_TXP[7] C18 PEG_HTX_GRX_N8 CH20 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N8
PEG_RXN[7] PEG_TXN[7]
PEG_GTX_C_HRX_P7 D17 A17 PEG_HTX_GRX_P7 CH21 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P7
PEG_GTX_C_HRX_N7 E17 PEG_RXP[8] PEG_TXP[8] B17 PEG_HTX_GRX_N7 CH22 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N7
PEG_RXN[8] PEG_TXN[8]
PEG_GTX_C_HRX_P6 F16 C16 PEG_HTX_GRX_P6 CH23 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P6
PEG_GTX_C_HRX_N6 E16 PEG_RXP[9] PEG_TXP[9] B16 PEG_HTX_GRX_N6 CH24 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N6
PEG_RXN[9] PEG_TXN[9]
PEG_GTX_C_HRX_P5 D15 A15 PEG_HTX_GRX_P5 CH25 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P5
PEG_GTX_C_HRX_N5 E15 PEG_RXP[10] PEG_TXP[10] B15 PEG_HTX_GRX_N5 CH26 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N5
PEG_RXN[10] PEG_TXN[10]
PEG_GTX_C_HRX_P4 F14 C14 PEG_HTX_GRX_P4 CH27 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P4
PEG_GTX_C_HRX_N4 E14 PEG_RXP[11] PEG_TXP[11] B14 PEG_HTX_GRX_N4 CH28 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N4
PEG_RXN[11] PEG_TXN[11]
PEG_GTX_C_HRX_P3 D13 A13 PEG_HTX_GRX_P3 CH29 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P3
PEG_GTX_C_HRX_N3 E13 PEG_RXP[12] PEG_TXP[12] B13 PEG_HTX_GRX_N3 CH30 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N3
PEG_RXN[12] PEG_TXN[12]
PEG_GTX_C_HRX_P2 F12 C12 PEG_HTX_GRX_P2 CH31 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P2
PEG_GTX_C_HRX_N2 E12 PEG_RXP[13] PEG_TXP[13] B12 PEG_HTX_GRX_N2 CH32 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N2
PEG_RXN[13] PEG_TXN[13]
PEG_GTX_C_HRX_P1 D11 A11 PEG_HTX_GRX_P1 CH33 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P1
PEG_GTX_C_HRX_N1 E11 PEG_RXP[14] PEG_TXP[14] B11 PEG_HTX_GRX_N1 CH34 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N1
PEG_RXN[14] PEG_TXN[14]
+VCCIO PEG_GTX_C_HRX_P0 F10 C10 PEG_HTX_GRX_P0 CH35 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_P0
PEG_GTX_C_HRX_N0 E10 PEG_RXP[15] PEG_TXP[15] B10 PEG_HTX_GRX_N0 CH36 1 2 0.22U_0201_6.3V6M PEG_HTX_C_GRX_N0
PEG_RXN[15] PEG_TXN[15]
RH24
1 2 PEG_RCOMP G2
PEG_RCOMP
C C
24.9_0402_1%

D8 B8
[19] DMI_CRX_PTX_P0 DMI_RXP[0] DMI_TXP[0] DMI_CTX_PRX_P0 [19]
[19] DMI_CRX_PTX_N0 E8 A8 DMI_CTX_PRX_N0 [19]
DMI_RXN[0] DMI_TXN[0]

[19] DMI_CRX_PTX_P1 E6 C6 DMI_CTX_PRX_P1 [19]

F6 DMI_RXP[1] DMI_TXP[1] B6
[19] DMI_CRX_PTX_N1 DMI_RXN[1] DMI_TXN[1] DMI_CTX_PRX_N1 [19]

[19] DMI_CRX_PTX_P2 D5 B5 DMI_CTX_PRX_P2 [19]

E5 DMI_RXP[2] DMI_TXP[2] A5
[19] DMI_CRX_PTX_N2 DMI_RXN[2] DMI_TXN[2] DMI_CTX_PRX_N2 [19]
J8 D4
[19] DMI_CRX_PTX_P3 DMI_RXP[3] DMI_TXP[3] DMI_CTX_PRX_P3 [19]
J9 B4
[19] DMI_CRX_PTX_N3 DMI_RXN[3] DMI_TXN[3] DMI_CTX_PRX_N3 [19]

3 OF 14
SKL-H_BGA1440
REV = 1 ?
@

?
SKYLAKE_HALO
UH1D
BGA1440
K36 D29
DDI1_TXP[0] EDP_TXP[0] EDP_TXP0 [34]
K37 E29 EDP_TXN0 [34]
B
J35 DDI1_TXN[0] EDP_TXN[0] F28 B
DDI1_TXP[1] EDP_TXP[1] EDP_TXP1 [34]
J34 E28
DDI1_TXN[1] EDP_TXN[1] EDP_TXN1 [34]
H37 B29 EDP_TXN2 [34]
H36 DDI1_TXP[2] EDP_TXN[2] A29
DDI1_TXN[2] EDP_TXP[2] EDP_TXP2 [34]
J37 B28 EDP_TXN3 [34]
J38 DDI1_TXP[3] EDP_TXN[3] C28
DDI1_TXN[3] EDP_TXP[3] EDP_TXP3 [34]
D27 C26 EDP_AUXP [34]
E27 DDI1_AUXP EDP_AUXP B26
DDI1_AUXN EDP_AUXN EDP_AUXN [34]
H34
H33 DDI2_TXP[0] +VCCIO
F37 DDI2_TXN[0] A33 EDP_DISP_UTIL RH20 1 @ 2 0_0402_5%
DDI2_TXP[1] EDP_DISP_UTIL BIA_PWM_PCH [16,34]
G38
F34 DDI2_TXN[1]
F35 DDI2_TXP[2] D37 EDP_COMP RH30 1 2 24.9_0402_1%
E37 DDI2_TXN[2] EDP_RCOMP
E36 DDI2_TXP[3] EDP_COMP
DDI2_TXN[3] CAD Note:Trace width=20 mils ,Spacing=25mil,
F26 Max length=100 mils.
E26 DDI2_AUXP
DDI2_AUXN
C34
D34 DDI3_TXP[0]
B36 DDI3_TXN[0]
B34 DDI3_TXP[1]
F33 DDI3_TXN[1]
E33 DDI3_TXP[2]
C33 DDI3_TXN[2]
B33 DDI3_TXP[3]
DDI3_TXN[3] G27
PROC_AUDIO_CLK AUD_AZA_CPU_SCLK [18]
A27 G25
DDI3_AUXP PROC_AUDIO_SDI AUD_AZA_CPU_SDO [18]
B27 G29 1 RH145 2 20_0402_5% AUD_AZA_CPU_SDI_R [18]
DDI3_AUXN PROC_AUDIO_SDO

4 OF 14 Close to CPU
SKL-H_BGA1440
?
A REV = 1 A
@

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(1/7) DMI,FDI,PEG
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 7 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

Interleave

?
SKYLAKE_HALO ?
SKYLAKE_HALO
UH1A UH1B
BGA1440 BGA1440
DDR_A_D0 BR6 AG1 DDR_B_D0 BT11 AM9
DDR0_DQ[0] DDR0_CKP[0] M_CLK_DDR0 [14] DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] M_CLK_DDR2 [15]
DDR_A_D1 BT6 AG2 DDR_B_D1 BR11 AN9
DDR0_DQ[1] DDR0_CKN[0] M_CLK_DDR#0 [14] DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] M_CLK_DDR#2 [15]
[14] DDR_A_D[0..63] DDR_A_D2 BP3 AK1 M_CLK_DDR#1 [14] DDR_B_D6 BT8 AM8 M_CLK_DDR#3 [15]
DDR_A_D7 BR3 DDR0_DQ[2] DDR0_CKN[1] AK2 DDR_B_D2 BR8 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKN[1] AM7
[14] DDR_A_MA[0..13] DDR0_DQ[3] DDR0_CKP[1] M_CLK_DDR1 [14] DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] M_CLK_DDR3 [15]
[14] DDR_A_DQS#[0..7] DDR_A_D4 BN5 AL3 DDR_B_D4 BP11 AM11
DDR_A_D5 BP6 DDR0_DQ[4] DDR0_CLKP[2] AK3 DDR_B_D5 BN11 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CLKP[2] AM10
[14] DDR_A_DQS[0..7] DDR0_DQ[5] DDR0_CLKN[2] DDR1_DQ[5]/DDR0_DQ[21] DDR1_CLKN[2]
DDR_A_D6 BP2 AL2 DDR_B_D3 BP8 AJ10
DDR_A_D3 BN3 DDR0_DQ[6] DDR0_CLKP[3] AL1 DDR_B_D7 BN8 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CLKP[3] AJ11
DDR_A_D9 BL4 DDR0_DQ[7] DDR0_CLKN[3] DDR_B_D12 BL12 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CLKN[3]
DDR_A_D13 BL5 DDR0_DQ[8] AT1 DDR_B_D8 BL11 DDR1_DQ[8]/DDR0_DQ[24] AT8
D DDR0_DQ[9] DDR0_CKE[0] DDR_CKE0_DIMMA [14] DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] DDR_CKE2_DIMMB [15] D
DDR_A_D10 BL2 AT2 DDR_B_D9 BL8 AT10
DDR0_DQ[10] DDR0_CKE[1] DDR_CKE1_DIMMA [14] DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] DDR_CKE3_DIMMB [15]
DDR_A_D11 BM1 AT3 DDR_B_D10 BJ8 AT7
[15] DDR_B_D[0..63] DDR0_DQ[11] DDR0_CKE[2] DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2]
[15] DDR_B_MA[0..13] DDR_A_D12 BK4 AT5 DDR_B_D14 BJ11 AT11
DDR_A_D8 BK5 DDR0_DQ[12] DDR0_CKE[3] DDR_B_D11 BJ10 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3]
[15] DDR_B_DQS#[0..7] DDR0_DQ[13] DDR1_DQ[13]/DDR0_DQ[29]
[15] DDR_B_DQS[0..7] DDR_A_D14 BK1 AD5 DDR_CS0_DIMMA# [14] DDR_B_D13 BL7 AF11 DDR_CS2_DIMMB# [15]
DDR_A_D15 BK2 DDR0_DQ[14] DDR0_CS#[0] AE2 DDR_B_D15 BJ7 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] AE7
DDR0_DQ[15] DDR0_CS#[1] DDR_CS1_DIMMA# [14] DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1] DDR_CS3_DIMMB# [15]
DDR_A_D20 BG4 AD2 DDR_B_D16 BG11 AF10
DDR_A_D16 BG5 DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] AE5 DDR_B_D17 BG10 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] AE10
DDR_A_D23 BF4 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] DDR_B_D21 BG8 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3]
DDR_A_D19 BF5 DDR0_DQ[18]/DDR0_DQ[34] AD3 DDR_B_D19 BF8 DDR1_DQ[18]/DDR0_DQ[50] AF7
DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] M_ODT0 [14] DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] M_ODT2 [15]
DDR_A_D21 BG2 AE4 DDR_B_D18 BF11 AE8
DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] M_ODT1 [14] DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] M_ODT3 [15]
DDR_A_D17 BG1 AE1 DDR_B_D22 BF10 AE9
DDR_A_D22 BF1 DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2] AD4 DDR_B_D20 BG7 DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2] AE11
DDR_A_D18 BF2 DDR0_DQ[22]/DDR0_DQ[38] DDR0_ODT[3] DDR_B_D23 BF7 DDR1_DQ[22]/DDR0_DQ[54] DDR1_ODT[3]
DDR_A_D24 BD2 DDR0_DQ[23]/DDR0_DQ[39] AH5 DDR_B_D26 BB11 DDR1_DQ[23]/DDR0_DQ[55] AH10
DDR0_DQ[24]/DDR0_DQ[40] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR_A_BS0 [14] DDR1_DQ[24]/DDR0_DQ[56] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDR_B_RAS# [15]
DDR_A_D25 BD1 AH1 DDR_B_D24 BC11 AH11
DDR0_DQ[25]/DDR0_DQ[41] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDR_A_BS1 [14] DDR1_DQ[25]/DDR0_DQ[57] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] DDR_B_WE# [15]
DDR_A_D26 BC4 AU1 DDR_B_D31 BB8 AF8
DDR0_DQ[26]/DDR0_DQ[42] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] DDR_A_BG0 [14] DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDR_B_CAS# [15]
DDR_A_D27 BC5 DDR_B_D25 BC8
DDR_A_D28 BD5 DDR0_DQ[27]/DDR0_DQ[43] AH4 DDR_B_D28 BC10 DDR1_DQ[27]/DDR0_DQ[59] AH8
DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDR_A_RAS# [14] DDR1_DQ[28]/DDR0_DQ[60] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] DDR_B_BS0 [15]
DDR_A_D29 BD4 AG4 DDR_A_WE# [14] DDR_B_D30 BB10 AH9 DDR_B_BS1 [15]
DDR_A_D30 BC1 DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AD1 DDR_B_D29 BC7 DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] AR9
DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDR_A_CAS# [14] DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR_B_BG0 [15]
DDR_A_D31 BC2 DDR_B_D27 BB7
DDR_A_D32 AB1 DDR0_DQ[31]/DDR0_DQ[47] AH3 DDR_A_MA0 DDR_B_D34 AA11 DDR1_DQ[31]/DDR0_DQ[63] AJ9 DDR_B_MA0
DDR_A_D33 AB2 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] AP4 DDR_A_MA1 DDR_B_D38 AA10 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] AK6 DDR_B_MA1
DDR_A_D34 AA4 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] AN4 DDR_A_MA2 DDR_B_D32 AC11 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] AK5 DDR_B_MA2
DDR_A_D35 AA5 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AP5 DDR_A_MA3 DDR_B_D36 AC10 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] AL5 DDR_B_MA3
DDR_A_D36 AB5 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] AP2 DDR_A_MA4 DDR_B_D35 AA7 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] AL6 DDR_B_MA4
DDR_A_D37 AB4 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] AP1 DDR_A_MA5 DDR_B_D39 AA8 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] AM6 DDR_B_MA5
DDR_A_D38 AA2 DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] AP3 DDR_A_MA6 DDR_B_D37 AC8 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] AN7 DDR_B_MA6
DDR_A_D39 AA1 DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] AN1 DDR_A_MA7 DDR_B_D33 AC7 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] AN10 DDR_B_MA7
DDR_A_D44 V5 DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] AN3 DDR_A_MA8 DDR_B_D40 W8 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AN8 DDR_B_MA8
DDR_A_D45 V2 DDR0_DQ[40]/DDR1_DQ[8] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AT4 DDR_A_MA9 DDR_B_D41 W7 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] AR11 DDR_B_MA9
DDR_A_D43 U1 DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] AH2 DDR_A_MA10 DDR_B_D42 V10 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] AH7 DDR_B_MA10
DDR_A_D47 U2 DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] AN2 DDR_A_MA11 DDR_B_D43 V11 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] AN11 DDR_B_MA11
DDR_A_D41 V1 DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] AU4 DDR_A_MA12 DDR_B_D44 W11 DDR1_DQ[43]/DDR1_DQ[27] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AR10 DDR_B_MA12
DDR_A_D40 V4 DDR0_DQ[44]/DDR1_DQ[12] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] AE3 DDR_A_MA13 DDR_B_D45 W10 DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] AF9 DDR_B_MA13
DDR_A_D42 U5 DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU2 DDR_B_D47 V7 DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] AR7
DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDR_A_BG1 [14] DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDR_B_BG1 [15]
C DDR_A_D46 U4 AU3 DDR_A_ACT# [14] DDR_B_D46 V8 AT9 DDR_B_ACT# [15] C
DDR_A_D53 R2 DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR_B_D48 R11 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT#
DDR_A_D51 P5 DDR0_DQ[48]/DDR1_DQ[32] AG3 DDR_B_D51 P11 DDR1_DQ[48] AJ7
DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR DDR_A_PAR [14] DDR1_DQ[49] DDR1_PAR DDR_B_PAR [15]
DDR_A_D49 R4 AU5 DDR_B_D50 P7 AR8
DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# DDR_A_ALERT# [14] DDR1_DQ[50] DDR1_ALERT# DDR_B_ALERT# [15]
DDR_A_D55 P4 DDR_B_D52 R8
DDR_A_D52 R5 DDR0_DQ[51]/DDR1_DQ[35] DDR_B_D53 R10 DDR1_DQ[51]
DDR_A_D54 P2 DDR0_DQ[52]/DDR1_DQ[36] BR5 DDR_A_DQS#0 DDR_B_D55 P10 DDR1_DQ[52] BP9 DDR_B_DQS#0
DDR_A_D48 R1 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] BL3 DDR_A_DQS#1 DDR_B_D49 R7 DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2] BL9 DDR_B_DQS#1
DDR_A_D50 P1 DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] BG3 DDR_A_DQS#2 DDR_B_D54 P8 DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3] BG9 DDR_B_DQS#2
DDR_A_D56 M4 DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] BD3 DDR_A_DQS#3 DDR_B_D58 L11 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6] BC9 DDR_B_DQS#3
DDR_A_D57 M1 DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] AB3 DDR_A_DQS4 DDR_B_D57 M11 DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] AC9 DDR_B_DQS#4
DDR_A_D58 L4 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSP[4]/DDR1_DQSP[0] V3 DDR_A_DQS5 DDR_B_D59 L7 DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2] W9 DDR_B_DQS#5
DDR_A_D63 L2 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] R3 DDR_A_DQS6 DDR_B_D61 M8 DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3] R9 DDR_B_DQS#6
DDR_A_D60 M5 DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSP[6]/DDR1_DQSP[4] M3 DDR_A_DQS7 DDR_B_D62 L10 DDR1_DQ[59] DDR1_DQSN[6] M9 DDR_B_DQS#7
DDR_A_D61 M2 DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSP[7]/DDR1_DQSP[5] DDR_B_D60 M10 DDR1_DQ[60] DDR1_DQSN[7]
DDR_A_D62 L5 DDR0_DQ[61]/DDR1_DQ[45] BP5 DDR_A_DQS0 DDR_B_D56 M7 DDR1_DQ[61] BR9 DDR_B_DQS0
DDR_A_D59 L1 DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] BK3 DDR_A_DQS1 DDR_B_D63 L8 DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2] BJ9 DDR_B_DQS1
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] BF3 DDR_A_DQS2 DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3] BF9 DDR_B_DQS2
BA2 DDR0_DQSP[2]/DDR0_DQSP[4] BC3 DDR_A_DQS3 AW11 DDR1_DQSP[2]/DDR0_DQSP[6] BB9 DDR_B_DQS3
BA1 DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] AA3 DDR_A_DQS#4 AY11 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] AA9 DDR_B_DQS4
AY4 DDR0_ECC[1] DDR0_DQSN[4]/DDR1_DQSN[0] U3 DDR_A_DQS#5 AY8 DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] V9 DDR_B_DQS5
AY5 DDR0_ECC[2] DDR0_DQSN[5]/DDR1_DQSN[1] P3 DDR_A_DQS#6 AW8 DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3] P9 DDR_B_DQS6
BA5 DDR0_ECC[3] DDR0_DQSN[6]/DDR1_DQSN[4] L3 DDR_A_DQS#7 AY10 DDR1_ECC[3] DDR1_DQSP[6] L9 DDR_B_DQS7
BA4 DDR0_ECC[4] DDR0_DQSN[7]/DDR1_DQSN[5] AW10 DDR1_ECC[4] DDR1_DQSP[7]
AY1 DDR0_ECC[5] AY3 AY7 DDR1_ECC[5] AW9
AY2 DDR0_ECC[6] DDR0_DQSP[8] BA3 AW7 DDR1_ECC[6] DDR1_DQSP[8] AY9
DDR0_ECC[7] DDR0_DQSN[8] DDR1_ECC[7] DDR1_DQSN[8]

DDR CHANNEL B

DDR CHANNEL A RH148 1 2 121_0402_1% G1 BN13

DDR_RCOMP[0] DDR_VREF_CA +V_DDR_REFA_R
RH149 1 2 75_0402_1% H1 BP13
RH150 1 2 100_0402_1% J2 DDR_RCOMP[1] DDR0_VREF_DQ BR13
DDR_RCOMP[2] DDR1_VREF_DQ +V_DDR_REFB_R
1 OF 14 2 OF 14
SKL-H_BGA1440 SKL-H_BGA1440
REV = 1 ? REV = 1 ?
B @ @ B

A A

Security Classification Compal Secret Data

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(3/7) DDRIII
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 8 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

CFG Straps for Processor +VCCST

Stall reset sequence after CPU PLL lock until de-asserted 1 2 H_THERMTRIP#_R
RH163 1K_0402_5%
?
SKYLAKE_HALO
UH1E
1 = (Default) Normal Operation; No stall. 1 @ 2 XDP_PREQ#
CFG0 * RH156 51_0402_5% [17]
[17]
PCH_CPU_BCLK_P
PCH_CPU_BCLK_N
B31
A32 BCLKP
BCLKN
BGA1440
CFG[0]
CFG[1]
BN25
BN27
CFG0

1 2 H_VCCST_PWRGD BN26 CFG2

D
RH164 1K_0402_5% D35 CFG[2] BN28 D
0 = Stall. [17] PCH_CPU_PCIBCLK_P PCI_BCLKP CFG[3]
C36 BR20 CFG4
[17] PCH_CPU_PCIBCLK_N PCI_BCLKN CFG[4]
1 2 VR_SVID_DATA BM20 CFG5
RH151 100_0402_5% E31 CFG[5] BT20 CFG6
[17] CPU_24MHZ_P CLK24P CFG[6]
CFG0 1 @ 2 [17] CPU_24MHZ_N D31 BP20 CFG7
RH183 1K_0402_5% 1 2 VR_SVID_ALERT# CLK24N CFG[7] BR23
RH152 56.2_0402_1% CFG[8] BR22
CFG[9] BT23
1 @ 2 H_CATERR# CFG[10] BT22
RH144 49.9_0402_1% CFG[11] BM19
CFG[12] BR19
CFG[13] BP19
VR_SVID_ALERT# RH153 1 2 220_0402_5% VR_SVID_ALERT#_R BH31 CFG[14] BT19
[63] VR_SVID_ALERT# VIDALERT# CFG[15]
BH32
+VCCSTG [63] VR_SVID_CLK VIDSCK
[63] VR_SVID_DATA VR_SVID_DATA BH29 BN23
H_PROCHOT# RH158 1 2 499_0402_1% H_PROCHOT#_R BR30 VIDSOUT CFG[17] BP23
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS [48,54,55,63] H_PROCHOT# PROCHOT# CFG[16] BP22
DDR_VTT_PG_CTRL BT13 CFG[19] BN22
DDR_VTT_CNTL CFG[18]
1: Normal Operation; Lane # definition matches
CFG2 1 2 H_PROCHOT# BR27
socket pin map definition RH165 1K_0402_5% BPM#[0] BT27
BPM#[1] BM31
H_VCCST_PWRGD 1 2 VCCST_PWRGD_CPU H13 BPM#[2] BT30
0:Lane Reversed
* [18]

[18]
H_VCCST_PWRGD

H_CPUPWRGD
RH154 60.4_0402_1%
BT31
VCCST_PWRGD

PROCPWRGD
BPM#[3]

PLTRST_CPU# BP35 BT28 CPU_XDP_TDO

[16] PLTRST_CPU# RESET# PROC_TDO CPU_XDP_TDO [6]
CFG2 1 2 H_PM_SYNC_R BM34 BL32 CPU_XDP_TDI
[16] H_PM_SYNC_R PM_SYNC PROC_TDI CPU_XDP_TDI [6]
RH184 1K_0402_5% [16] H_PM_DOWN H_PM_DOWN RH155 1 2 20_0402_5% H_PM_DOWN_R BP31 BP28 CPU_XDP_TMS CPU_XDP_TMS [6]
RH190 1 @ 2 0_0402_5% PECI_EC_R BT34 PM_DOWN PROC_TMS BR28 CPU_XDP_TCK
Pilot_05 [16,48] PECI_EC PECI PROC_TCK CPU_XDP_TCK [6,18]
[16] H_THERMTRIP#_R H_THERMTRIP#_R J31
THERMTRIP# BP30 CPU_XDP_TRST#
PROC_TRST# CPU_XDP_TRST# [6,22]
RH89 1 @ 2 0_0402_5% BR33 BL30 XDP_PREQ#
[16] PROC_DETECT# SKTOCC# PROC_PREQ# XDP_PREQ# [22]
BN1 BP27 XDP_PRDY# XDP_PRDY# [22]
PROC_SELECT# PROC_PRDY#
H_CATERR# BM30
CATERR# BT25 CFG_RCOMP
CFG_RCOMP
Display Port Presence Strap
C C

1
1 : Disabled; No Physical Display Port RH59
5 OF 14
CFG4 attached to Embedded Display Port SKL-H_BGA1440 49.9_0402_1%
?
REV = 1

2
0 : Enabled; An external Display Port device is
* connected to the Embedded Display Port
@

Enable because PS175(DP to HDMI Converter)

CFG4 1 2
RH185 1K_0402_5% +1.2V_DDR
UC1
5 1
VCC NC
1 2 DDR_VTT_PG_CTRL
@ 4 A
CH197 Y 3
0.1U_0402_10V7K GND
2 74AUP1G07GW_TSSOP5
PCIE Port Bifurcation Straps

?
SKYLAKE_HALO
11: (Default) x16 - Device 1 functions 1 and 2 disabled UH1K

CFG[6:5] *10: x8, x8 - Device 1 function 1 enabled ; function 2 +3VS

BGA1440

D1 BM33
disabled
1

E1 RSVD_TP RSVD_TP BL33

E3 RSVD_TP RSVD_TP
01: Reserved - (Device 1 function 1 disabled ; function RSVD_TP
RH93 E2 BJ14
2 enabled) 220K_0402_5% RSVD_TP RSVD_TP BJ13
BR1 RSVD_TP
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
2

BT2 RSVD_TP BK28

RSVD_TP RSVD BJ28
[57] SM_PG_CTRL BN35 RSVD
CFG5 1 @ 2 RSVD BJ18
B
RH186 1K_0402_5% J24 VSS B
H24 RSVD BJ16
CFG6 1 @ 2 BN33 RSVD RSVD_TP BK16
RH187 1K_0402_5% BL34 RSVD RSVD_TP
RSVD
N29 BK24
R14 RSVD RSVD_TP BJ24
AE29 RSVD RSVD_TP
AA14 RSVD BK21
RSVD RSVD BJ21
A36 RSVD
PEG DEFER TRAINING RSVD
A37 BT17
RSVD RSVD BR17
PCH_TRIGGER RH167 1 2 30_0402_5% PCH_TRIGGER_R H23 RSVD
1: (Default) PEG Train immediately following xxRESETB
CFG7 * de assertion
[22]
[22]
PCH_TRIGGER
CPU_TRIGGER CPU_TRIGGER RH192 1 2 30_0402_5% CPU_TRIGGER_R J23 PROC_TRIGIN
PROC_TRIGOUT VSS
BK18

F30 BJ34
E30 RSVD RSVD_TP BJ33
0: PEG Wait for BIOS for training RSVD RSVD_TP
B30
C30 RSVD
CFG7 1 @ 2 RSVD G13
RH188 1K_0402_5% G3 RSVD AJ8
J3 RSVD RSVD BL31
RSVD RSVD
B2
NCTF B38
NCTF BP1
BR35 NCTF BR2
BR31 RSVD NCTF C1
BH30 RSVD NCTF C38
RSVD NCTF

11 OF 14
SKL-H_BGA1440
REV = 1 ?
@
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(4/7) RSVD,CFG
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 9 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

+VCC_CORE +VCC_CORE

?
SKYLAKE_HALO
UH1J
D D
? BGA1440
BJ17
UH1G SKYLAKE_HALO BJ19 VCCOPC
BJ20 VCCOPC
BGA1440 BK17 VCCOPC
AA13 V32 BK19 VCCOPC
AA31 VCC VCC V33 BK20 VCCOPC
AA32 VCC VCC V34 BL16 VCCOPC
AA33 VCC VCC V35 BL17 VCCOPC
AA34 VCC VCC V36 BL18 VCCOPC
AA35 VCC VCC V37 BL19 VCCOPC
AA36 VCC VCC V38 BL20 VCCOPC
AA37 VCC VCC W13 BL21 VCCOPC
AA38 VCC VCC W14 BM17 VCCOPC
AB29 VCC VCC W29 BN17 VCCOPC
AB30 VCC VCC W30 VCCOPC
AB31 VCC VCC W31 BJ23
AB32 VCC VCC W32 BJ26 RSVD
AB35 VCC VCC W35 BJ27 RSVD
AB36 VCC VCC W36 BK23 RSVD
AB37 VCC VCC W37 BK26 RSVD
AB38 VCC VCC W38 BK27 RSVD
AC13 VCC VCC Y29 BL23 RSVD
AC14 VCC VCC Y30 BL24 RSVD
AC29 VCC VCC Y31 BL25 RSVD
AC30 VCC VCC Y32 BL26 RSVD
AC31 VCC VCC Y33 BL27 RSVD
AC32 VCC VCC Y34 BL28 RSVD
AC33 VCC VCC Y35 BM24 RSVD
AC34 VCC VCC Y36 RSVD
AC35 VCC VCC L14
AC36 VCC VCC P29 BL15
AD13 VCC VCC P30 BM16 VCCOPC_SENSE
AD14 VCC VCC P31 VSSOPC_SENSE
C
AD31 VCC VCC P32 BL22 C
AD32 VCC VCC P33 BM22 RSVD
AD33 VCC VCC P34 RSVD
AD34 VCC VCC P35
AD35 VCC VCC P36 BP15
AD36 VCC VCC R13 BR15 VCCEOPIO
AD37 VCC VCC R31 BT15 VCCEOPIO
AD38 VCC VCC R32 VCCEOPIO
AE13 VCC VCC R33 BP16
AE14 VCC VCC R34 BR16 RSVD
AE30 VCC VCC R35 BT16 RSVD
AE31 VCC VCC R36 RSVD
AE32 VCC VCC R37
AE35 VCC VCC R38 BN15
AE36 VCC VCC T29 BM15 VCCEOPIO_SENSE
AE37 VCC VCC T30 VSSEOPIO_SENSE
AE38 VCC VCC T31 BP17
AF35 VCC VCC T32 BN16 RSVD
AF36 VCC VCC T35 RSVD
AF37 VCC VCC T36
AF38 VCC VCC T37 BM14
K13 VCC VCC T38 BL14 VCC_OPC_1P8
K14 VCC VCC U29 VCC_OPC_1P8
L13 VCC VCC U30 BJ35
N13 VCC VCC U31 BJ36 RSVD
N14 VCC VCC U32 RSVD
N30 VCC VCC U33
N31 VCC VCC U34 +VCC_CORE AT13
N32 VCC VCC U35 AW13 ZVM#
N35 VCC VCC U36 MSM#
N36 VCC VCC V13 AU13
VCC VCC ZVM2#
1

N37 V14 AY13

N38 VCC VCC V31 RH197 MSM2#
P13 VCC VCC P14 RH166 1 @ 2 49.9_0402_1% BT29
VCC VCC 100_0402_1% OPC_RCOMP
B RH57 1 @ 2 49.9_0402_1% BR25 B
RH58 1 @ 2 49.9_0402_1% BP25 OPCE_RCOMP
2

OPCE_RCOMP2
AG37 RH198 1 @ 2 0_0402_5% VCC_SENSE [63]
VCC_SENSE AG38 RH28 1 @ 2 0_0402_5%
VSS_SENSE VSS_SENSE [63] 10 OF 14
SKL-H_BGA1440
REV = 1 ?
1

Pilot_05 @
RH29
7 OF 14
SKL-H_BGA1440 100_0402_1%
REV = 1 ?
2

A A

Security Classification Compal Secret Data

Issued Date 2011/08/25 2012/07/25 Title

WWW.ALISALER.COM
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(5/7) PWR,BYPASS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 10 of 70
5 4 3 2 1
 5 4 3 2
WWW.AliFixit.COM 1

+VCCSA
+VCCIO +VCCSTG +VCCST

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
1U_0402_6.3V6K

1U_0402_6.3V6K
D D
1

CH106
1 1 1 1 1 1 1 1 1 1 1 1

CH102

CH103

CH104

CH110

CH204

CH111

CH112

CH113

CH114

CH115

CH116

CH117
+VCCSA +1.2V_DDR
2
2 2 2 2 2 2 2 2 2 2 2 2

?
SKYLAKE_HALO
UH1I
BGA1440
J30 AA6
K29 VCCSA VDDQ AE12
K30 VCCSA VDDQ AF5
K31 VCCSA VDDQ AF6 +1.2V_DDR +VCCSA +VCCSA
K32 VCCSA VDDQ AG5
K33 VCCSA VDDQ AG9
K34 VCCSA VDDQ AJ12
K35 VCCSA VDDQ AL11
VCCSA VDDQ

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
L31 AP6
VCCSA VDDQ

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
L32 AP7 1 1 1 1 1 1 1
VCCSA VDDQ

CH133

CH134

CH135

47U_0603_6.3V6M
L35 AR12 1
VCCSA VDDQ

CH129

CH130

CH131

CH132

CH136
L36 AR6
L37 VCCSA VDDQ AT12 +1.2V_DDR
L38 VCCSA VDDQ AW6 2 2 2 2 2 2 2
M29 VCCSA VDDQ AY6 2
VCCSA VDDQ Pilot_05
M30 J5
M31 VCCSA VDDQ J6
VCCSA VDDQ

1
M32 K12
M33 VCCSA VDDQ K6 RH34
M34 VCCSA VDDQ L12 @ 0_0402_5%
M35 VCCSA VDDQ L6
C +VCCIO M36 VCCSA VDDQ R6
2
C
VCCSA VDDQ T6 +1.2V_VCCPLL_OC +1.2V_DDR
VDDQ W6
AG12 VDDQ RH107 1 @ 2 0_0402_5%
G15 VCCIO Y12
G17 VCCIO VDDQC
G19 VCCIO BH13 +1.2V_DDR
G21 VCCIO VCCPLL_OC G11
H15 VCCIO VCCPLL_OC +VCCST
H16 VCCIO
H17 VCCIO H30
VCCIO VCCST +VCCSTG

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
H19
H20 VCCIO H29
H21 VCCIO VCCSTG
VCCIO 1 1 1 1 1 1 1 1 1 1 1

CH118

CH121

CH124

CH120

CH119

CH122

CH123

CH125

CH126

CH127

CH128
H26 G30
H27 VCCIO VCCSTG +VCCST
J15 VCCIO H28
J16 VCCIO VCCPLL J28 2 2 2 2 2 2 2 2 2 2 2
J17 VCCIO VCCPLL
J19 VCCIO RH201 1 2 100_0402_1%
VCCIO +VCCSA
J20 M38 RH202 1 @ 2 0_0402_5% VCCSA_SENSE [63]
J21 VCCIO VCCSA_SENSE M37 RH31 1 @ 2 0_0402_5%
VCCIO VSSSA_SENSE VSSSA_SENSE [63]
J26 RH41 1 2 100_0402_1%
J27 VCCIO H14
VCCIO VCCIO_SENSE J14
VSSIO_SENSE

RH515 1 2 100_0402_1% +VCCIO

RH514 1 @ 2 0_0402_5% VCCIO_SENSE [59]
RH513 1 @ 2 0_0402_5% VSSIO_SENSE [59]
RH516 1 2 100_0402_1%

B B
9 OF 14
SKL-H_BGA1440
REV = 1 ? Pilot_05
@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(6/7) PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 11 of 70

WWW.ALISALER.COM
5 4 3 2 1
 5 4 3 2
WWW.AliFixit.COM 1

+VCCGT
+VCCGT +VCCGT
?
? SKYLAKE_HALO
UH1HSKYLAKE_HALO UH1N
BGA1440
D BG34 BGA1440 D
VCCGT AV29 AJ29
BG35 VCCGT VCCGT
VCCGT AV30 AJ30
BG36 VCCGT VCCGT AF29
VCCGT AV31 AJ31 VCCGTX
BH33 VCCGT VCCGT AF30
VCCGT AV32 AJ32 VCCGTX
BH34 VCCGT VCCGT AF31
VCCGT AV33 AJ33 VCCGTX
BH35 VCCGT VCCGT AF32
VCCGT AV34 AJ34 VCCGTX
BH36 VCCGT VCCGT AF33
VCCGT AV35 AJ35 VCCGTX
BH37 VCCGT VCCGT AF34
VCCGT AV36 AJ36 VCCGTX
BH38 VCCGT VCCGT AG13
VCCGT AW14 AK31 VCCGTX
BJ37 VCCGT VCCGT AG14
VCCGT AW31 AK32 VCCGTX
BJ38 VCCGT VCCGT AG31
VCCGT AW32 AK33 VCCGTX
BL36 VCCGT VCCGT AG32
VCCGT AW33 AK34 VCCGTX
BL37 VCCGT VCCGT AG33
VCCGT AW34 AK35 VCCGTX
BM36 VCCGT VCCGT AG34
VCCGT AW35 AK36 VCCGTX
BM37 VCCGT VCCGT AG35
VCCGT AW36 AK37 VCCGTX
BN36 VCCGT VCCGT AG36
VCCGT AW37 AK38 VCCGTX
BN37 VCCGT VCCGT AH13
VCCGT AW38 AL13 VCCGTX
BN38 VCCGT VCCGT AH14
VCCGT AY29 AL29 VCCGTX
BP37 VCCGT VCCGT AH29
VCCGT AY30 AL30 VCCGTX
BP38 VCCGT VCCGT AH30
VCCGT AY31 AL31 VCCGTX
BR37 VCCGT VCCGT AH31
VCCGT AY32 AL32 VCCGTX
BT37 VCCGT VCCGT AH32
VCCGT AY35 AL35 VCCGTX
BE38 VCCGT VCCGT AJ13
VCCGT AY36 AL36 VCCGTX
BF13 VCCGT VCCGT AJ14
VCCGT AY37 AL37 VCCGTX
BF14 VCCGT VCCGT
VCCGT AY38 AL38
BF29 VCCGT VCCGT
VCCGT BA13 AM13
BF30 VCCGT VCCGT
VCCGT BA14 AM14
BF31 VCCGT VCCGT
VCCGT BA29 AM29
BF32 VCCGT VCCGT
VCCGT BA30 AM30
BF35 VCCGT VCCGT
VCCGT BA31 AM31
BF36 VCCGT VCCGT
VCCGT BA32 AM32
BF37 VCCGT VCCGT
C VCCGT BA33 AM33 C
BF38 VCCGT VCCGT
VCCGT BA34 AM34
BG29 VCCGT VCCGT
VCCGT BA35 AM35
BG30 VCCGT VCCGT
VCCGT BA36 AM36
BG31 VCCGT VCCGT
VCCGT BB13 AN13
BG32 VCCGT VCCGT
VCCGT BB14 AN14
BG33 VCCGT VCCGT
VCCGT BB31 AN31
BC36 VCCGT VCCGT
VCCGT BB32 AN32
BC37 VCCGT VCCGT
VCCGT BB33 AN33
BC38 VCCGT VCCGT
VCCGT BB34 AN34
BD13 VCCGT VCCGT
VCCGT BB35 AN35
BD14 VCCGT VCCGT
VCCGT BB36 AN36
BD29 VCCGT VCCGT
VCCGT BB37 AN37
BD30 VCCGT VCCGT
VCCGT BB38 AN38
BD31 VCCGT VCCGT
VCCGT BC29 AP13
BD32 VCCGT VCCGT
VCCGT BC30 AP14
BD33 VCCGT VCCGT +VCCGT
VCCGT BC31 AP29
BD34 VCCGT VCCGT
VCCGT BC32 AP30
BD35 VCCGT VCCGT
VCCGT BC35 AP31
BD36 VCCGT VCCGT
VCCGT BE33 AP32
BE31 VCCGT VCCGT
VCCGT BE34 AP35
BE32 VCCGT VCCGT
VCCGT BE35 AP36
BE37 VCCGT VCCGT
VCCGT BE36 AP37

1
VCCGT AP38 VCCGT
VCCGT RH203
AR29
8 OF 14 AR30 VCCGT 100_0402_1%
SKL-H_BGA1440 AR31 VCCGT
? AR32 VCCGT

2
REV = 1 AR33 VCCGT AH38 RH204 1 @ 2 0_0402_5%
VCCGT VCCGT_SENSE VCCGT_SENSE [63]
@ AR34 AH35
AR35 VCCGT VSSGTX_SENSE AH37 RH32 1 @ 2 0_0402_5%
VCCGT VSSGT_SENSE VSSGT_SENSE [63]
AR36 AH36
AT14 VCCGT VCCGTX_SENSE
B VCCGT B
AT31
AT32 VCCGT Pilot_05
AT33 VCCGT

1
AT34 VCCGT
VCCGT RH33
AT35
AT36 VCCGT 100_0402_1%
AT37 VCCGT
AT38 VCCGT
2

AU14 VCCGT
AU29 VCCGT
AU30 VCCGT
AU31 VCCGT
AU32 VCCGT
AU35 VCCGT
AU36 VCCGT
AU37 VCCGT
VCCGT 14 OF 14
AU38
VCCGT

SKL-H_BGA1440
?
REV = 1
@

A A

Security Classification Compal Secret Data Compal Electronics,TitleInc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PROCESSOR(2/7) PM,XDP,CLK
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 12 of 70

WWW.ALISALER.COM
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

? ?
SKYLAKE_HALO SKYLAKE_HALO
UH1F UH1L
BGA1440 UH1MSKYLAKE_HALO
BGA1440
Y38 K1 BGA1440
VSS VSS C17 C25
Y37 J36 VSS VSS BB4 AK30
VSS VSS C13 C23 VSS VSS
Y14 J33 VSS VSS BB3 AK29
VSS VSS C9 C21 VSS VSS
Y13 J32 VSS VSS BB2 AK4
D VSS VSS BT32 C19 VSS VSS D
Y11 J25 VSS VSS BB1 AJ38
VSS VSS BT26 C15 VSS VSS
Y10 J22 VSS VSS BA38 AJ37
VSS VSS BT24 C11 VSS VSS
Y9 J18 VSS VSS BA37 AJ6
VSS VSS BT21 C8 VSS VSS
Y8 J10 VSS VSS BA12 AJ5
VSS VSS BT18 C5 VSS VSS
Y7 J7 VSS VSS BA11 AJ4
VSS VSS BT14 BM29 VSS VSS
W34 J4 VSS VSS BA10 AJ3
VSS VSS BT12 BM25 VSS VSS
W33 H35 VSS VSS BA9 AJ2
VSS VSS BT9 BM18 VSS VSS
W12 H32 VSS VSS BA8 AJ1
VSS VSS BT5 BM11 VSS VSS
W5 H25 VSS VSS BA7 AH34
VSS VSS BR36 BM8 VSS VSS
W4 H22 VSS VSS BA6 AH33
VSS VSS BR34 BM7 VSS ? VSS
W3 H18 VSS VSS B9 AH12
VSS VSS BR29 BM5 VSS VSS
W2 H12 VSS VSS AY34 AH6
VSS VSS BR26 BM3 VSS VSS
W1 H11 VSS VSS AY33 AG30
VSS VSS BR24 BL38 VSS VSS
V30 G28 VSS VSS AY14 AG29
VSS VSS BR21 BL35 VSS VSS
V29 G26 VSS VSS AY12 AG11
VSS VSS BR18 BL13 VSS VSS
V12 G24 VSS VSS AW30 AG10
VSS VSS BR14 BL6 VSS VSS
V6 G23 VSS VSS AW29 AG8
VSS VSS BR12 BK25 VSS VSS
U38 G22 VSS VSS AW12 AG7
VSS VSS BR7 BK22 VSS VSS
U37 G20 VSS VSS AW5 AG6
VSS VSS BP34 BK13 VSS VSS
U6 G18 VSS VSS AW4 AF14
VSS VSS BP33 BK6 VSS VSS
T34 G16 VSS VSS AW3 AF13
VSS VSS BP29 BJ30 VSS VSS
T33 G14 VSS VSS AW2 AF12
VSS VSS BP26 BJ29 VSS VSS
T14 G12 VSS VSS AW1 AF4
VSS VSS BP24 BJ15 VSS VSS
T13 G10 VSS VSS AV38 AF3
VSS VSS BP21 BJ12 VSS VSS
T12 G9 VSS VSS AV37 AF2
VSS VSS BP18 BH11 VSS VSS
T11 G8 VSS VSS AU34 AF1
VSS VSS BP14 BH10 VSS VSS
T10 G6 VSS VSS AU33 AE34
VSS VSS BP12 BH7 VSS VSS
T9 G5 VSS VSS AU12 AE33
VSS VSS BP7 BH6 VSS VSS
T8 G4 VSS VSS AU11 AE6
VSS VSS BN34 BH3 VSS VSS
T7 F36 VSS VSS AU10 AD30
VSS VSS BN31 BH2 VSS VSS
T5 F31 VSS VSS AU9 AD29
VSS VSS BN30 BG37 VSS VSS
T4 F29 VSS VSS AU8 AD12
C VSS VSS BN29 BG14 VSS VSS C
T3 F27 VSS VSS AU7 AD11
VSS VSS BN24 BG6 VSS VSS
T2 F25 VSS VSS AU6 AD10
VSS VSS BN21 BF34 VSS VSS
T1 F23 VSS VSS AT30 AD9
VSS VSS BN20 BF6 VSS VSS
R30 F21 VSS VSS AT29 AD8
VSS VSS BN19 BE30 VSS VSS
R29 F19 VSS VSS AT6 AD7
VSS VSS BN18 BE5 VSS VSS
R12 F17 VSS VSS AR38 AD6
VSS VSS BN14 BE4 VSS VSS
P38 F15 VSS VSS AR37 AC38
VSS VSS BN12 BE3 VSS VSS
P37 F13 VSS VSS AR14 AC37
VSS VSS BN9 BE2 VSS VSS
P12 F11 VSS VSS AR13 AC12
VSS VSS BN7 BE1 VSS VSS
P6 F9 VSS VSS AR5 AC6
VSS VSS BN4 BD38 VSS VSS
N34 F8 VSS VSS AR4 AC5
VSS VSS BN2 BD37 VSS VSS
N33 F5 VSS VSS AR3 AC4
VSS VSS BM38 BD12 VSS VSS
N12 F4 VSS VSS AR2 AC3
VSS VSS BM35 BD11 VSS VSS
N11 F3 VSS VSS AR1 AC2
VSS VSS BM28 BD10 VSS VSS
N10 F2 VSS VSS AP34 AC1
VSS VSS BM27 BD8 VSS VSS
N9 E38 VSS VSS AP33 AB34
VSS VSS BM26 BD7 VSS VSS
N8 E35 VSS VSS AP12 AB33
VSS VSS BM23 BD6 VSS VSS
N7 E34 VSS VSS AP11 AB6
VSS VSS BM21 BC33 VSS VSS
N6 E9 VSS VSS AP10 AA30
VSS VSS BM13 BC14 VSS VSS
N5 E4 VSS VSS AP9 AA29
VSS VSS BM12 BC13 VSS VSS
N4 D33 VSS VSS AP8 AA12
VSS VSS BM9 BC6 VSS VSS
N3 D30 VSS VSS AN30 A30
VSS VSS BM6 BB30 VSS VSS
N2 D28 VSS VSS AN29 A28
VSS VSS BM2 BB29 VSS VSS
N1 D26 VSS VSS AN12 A26
VSS VSS BL29 BB6 VSS VSS
M14 D24 VSS VSS AN6 A24
VSS VSS BK29 BB5 VSS VSS
M13 D22 VSS VSS AN5 A22
VSS VSS BK15 VSS VSS
M12 D20 VSS AM38 A20
VSS VSS BK14 VSS VSS
M6 D18 VSS AM37 A18
VSS VSS BJ32 VSS VSS
L34 D16 VSS AM12 A16
VSS VSS BJ31 VSS VSS
L33 D14 VSS AM5 A14
VSS VSS BJ25 VSS VSS
L30 D12 VSS AM4 A12
VSS VSS BJ22 VSS VSS
L29 D10 VSS AM3 A10
B VSS VSS BH14 VSS VSS B
K38 D9 VSS C2 AM2 A9
VSS VSS BH12 NCTFVSS VSS VSS
K11 D6 VSS BT36 AM1 A6
VSS VSS BH9 NCTFVSS VSS VSS
K10 D3 VSS BT35 AL34
VSS VSS BH8 NCTFVSS VSS
K9 C37 VSS BT4 AL33
VSS VSS BH5 NCTFVSS VSS
K8 C31 VSS BT3 AL14 B37
VSS VSS BH4 NCTFVSS VSS NCTFVSS
K7 C29 VSS BR38 AL12 B3
VSS VSS BH1 NCTFVSS VSS NCTFVSS
K5 C27 VSS AL10 A34
VSS VSS BG38 VSS NCTFVSS
K4 VSS AL9 A4
VSS BG13 VSS NCTFVSS
K3 D38 VSS AL8 A3
VSS NCTFVSS BG12 VSS NCTFVSS
K2 VSS AL7
VSS BF33 VSS
VSS AL4
BF12 VSS
6 OF 14 BE29 VSS
SKL-H_BGA1440 BE6 VSS
? BD9 VSS 13 OF 14
REV = 1 BC34 VSS SKL-H_BGA1440
@ BC12 VSS ?
BB12 VSS REV = 1
VSS @
12 OF 14
SKL-H_BGA1440
?
REV = 1
@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title
PROCESSOR(7/7) VSS

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 13 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

+1.2V_DDR +1.2V_DDR
[8] DDR_A_D[0..63]
[8] DDR_A_MA[0..13]
[8] DDR_A_DQS#[0..7] JDIMM1
[8] DDR_A_DQS[0..7]
1 2
DDR_A_D5 3 VSS1 VSS2 4 DDR_A_D4
Layout Note: Layout Note: DQ5 DQ4
5 6
Place near JDIMM1.257,259 Place near JDIMM1.258 DDR_A_D1 7 VSS3 VSS4 8 DDR_A_D0
9 DQ1 DQ0 10
DDR_A_DQS#0 11 VSS5 VSS6 12
DDR_A_DQS0 13 DQS0_c DM0_n/DBI0_n 14
15 DQS0_t VSS7 16 DDR_A_D6
DDR_A_D7 17 VSS8 DQ6 18
+2.5V_MEM +0.6VS 19 DQ7 VSS9 20 DDR_A_D2
DDR_A_D3 21 VSS10 DQ2 22
Layout Note: DQ3 VSS11
23 24 DDR_A_D12
Place near JDIMM1.255 DDR_A_D13 25 VSS12 DQ12 26
DQ13 VSS13

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
D 27 28 DDR_A_D8 D
VSS14 DQ8

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K
DDR_A_D9 29 30
DQ9 VSS15

1U_0402_6.3V6K

1U_0402_6.3V6K
1 1 1 1 31 32 DDR_A_DQS#1
VSS16 DQS1_c

CD12

CD13

CD14

CD15
1 1 1 1 33 34 DDR_A_DQS1
DM1_n/DBI_n DQS1_t

CD3

CD4
35 36
VSS17 VSS18
CD9

CD10
DDR_A_D15 37 38 DDR_A_D14
2 2 2 2 +3VS 39 DQ15 DQ14 40
2 2 2 2 DDR_A_D10 41 VSS19 VSS20 42 DDR_A_D11
43 DQ10 DQ11 44
DDR_A_D21 45 VSS21 VSS22 46 DDR_A_D20
47 DQ21 DQ20 48
VSS23 VSS24

0.1U_0402_10V6K
DDR_A_D17 49 50 DDR_A_D16
51 DQ17 DQ16 52
1 1 VSS25 VSS26

CD16
DDR_A_DQS#2 53 54
CD17 DDR_A_DQS2 55 DQS2_c DM2_n/DBI2_n 56
2.2U_0402_6.3V6M 57 DQS2_t VSS27 58 DDR_A_D22
2 2 DDR_A_D23 59 VSS28 DQ22 60
61 DQ23 VSS29 62 DDR_A_D18
DDR_A_D19 63 VSS30 DQ18 64
65 DQ19 VSS31 66 DDR_A_D28
DDR_A_D29 67 VSS32 DQ28 68
Layout Note: DQ29 VSS33
69 70 DDR_A_D24
Place near JDIMM1 DDR_A_D25 71 VSS34 DQ24 72
73 DQ25 VSS35 74 DDR_A_DQS#3
75 VSS36 DQS3_c 76 DDR_A_DQS3
77 DM3_n/DBI3_n DQS3_t 78
DDR_A_D30 79 VSS37 VSS38 80 DDR_A_D31
+1.2V_DDR 81 DQ30 DQ31 82
DDR_A_D26 83 VSS39 VSS40 84 DDR_A_D27
85 DQ26 DQ27 86
87 VSS41 VSS42 88
CB5/NC CB4/NC
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
89 90
91 VSS43 VSS44 92
1 1 1 1 1 1 1 1 CB1/NC CB0/NC
CD1

CD2

CD75

CD74

CD77

CD76

CD79

CD78
93 94
95 VSS45 VSS46 96
97 DQS8_c DM8_n/DBI_n/NC 98
2 2 2 2 2 2 2 2 99 DQS8_t VSS47 100
101 VSS48 CB6/NC 102
103 CB2/NC VSS49 104
105 VSS50 CB7/NC 106
C 107 CB3/NC VSS51 108 DDR4_DRAMRST# C
DDR_CKE0_DIMMA 109 VSS52 RESET_n 110 DDR_CKE1_DIMMA
[8] DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA [8]
111 112
DDR_A_BG1 113 VDD1 VDD2 114
[8] DDR_A_BG1 BG1 ACT_n DDR_A_ACT# [8]
DDR_A_BG0 115 116 DDR_A_ALERT#
+1.2V_DDR [8] DDR_A_BG0 BG0 ALERT_n DDR_A_ALERT# [8]
117 118
DDR_A_MA12 119 VDD3 VDD4 120 DDR_A_MA11
DDR_A_MA9 121 A12 A11 122 DDR_A_MA7
123 A9 A7 124
DDR_A_MA8 125 VDD5 VDD6 126 DDR_A_MA5
A8 A5
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

DDR_A_MA6 127 128 DDR_A_MA4 All VREF traces should

129 A6 A4 130
1 VDD7 VDD8
have 10 mil trace width
1 1 1 1 1 1 1 1 DDR_A_MA3 131 132 DDR_A_MA2
+ CD11 DDR_A_MA1 133 A3 A2 134
A1 EVENT_n/NF
CD5

CD6

CD7

CD8

CD70

CD71

CD72

CD73

@ 330U_X_2VM_R6M 135 136

M_CLK_DDR0 137 VDD9 VDD10 138 M_CLK_DDR1
2 2 2 2 2 2 2 2 2 [8] M_CLK_DDR0 CK0_t CK1_t/NF M_CLK_DDR1 [8]
M_CLK_DDR#0 139 140 M_CLK_DDR#1
[8] M_CLK_DDR#0 CK0_c CK1_c/NF M_CLK_DDR#1 [8]
141 142
DDR_A_PAR 143 VDD11 VDD12 144 DDR_A_MA0
[8] DDR_A_PAR PARITY A0
DDR_A_BS1 145 146 DDR_A_MA10
[8] DDR_A_BS1 BA1 A10/AP
147 148
DDR_CS0_DIMMA# 149 VDD13 VDD14 150 DDR_A_BS0
[8] DDR_CS0_DIMMA# CS0_n BA0 DDR_A_BS0 [8]
DDR_A_WE# 151 152 DDR_A_RAS#
[8] DDR_A_WE# WE_n/A14 RAS_n/A16 DDR_A_RAS# [8]
153 154
M_ODT0 155 VDD15 VDD16 156 DDR_A_CAS#
[8] M_ODT0 ODT0 CAS_n/A15 DDR_A_CAS# [8]
[8] DDR_CS1_DIMMA# DDR_CS1_DIMMA# 157 158 DDR_A_MA13
159 CS1_n A13 160
M_ODT1 161 VDD17 VDD18 162
[8] M_ODT1 ODT1 C0/CS2_n/NC
163 164 +V_DDR_REFA
165 VDD19 VREFCA 166 DIMM_CHA_SA2
167 C1, CS3_n,NC SA2 168
VSS53 VSS54

0.1U_0402_10V6K
DDR_A_D37 169 170 DDR_A_D36
171 DQ37 DQ36 172
VSS55 VSS56 1

CD96
DDR_A_D33 173 174 DDR_A_D32
175 DQ33 DQ32 176
DDR_A_DQS#4 177 VSS57 VSS58 178
DDR_A_DQS4 179 DQS4_c DM4_n/DBI4_n 180
+1.2V_DDR 2
+1.2V_DDR 181 DQS4_t VSS59 182 DDR_A_D39
DDR_A_D38 183 VSS60 DQ39 184
185 DQ38 VSS61 186 DDR_A_D35
B DDR_A_D34 187 VSS62 DQ35 188 B
189 DQ34 VSS63 190 DDR_A_D45
DDR_A_D44 191 VSS64 DQ45 192
193 DQ44 VSS65 194 DDR_A_D41
VSS66 DQ41
1

DDR_A_D40 195 196

RD35 197 DQ40 VSS67 198 DDR_A_DQS#5
470_0402_1% 199 VSS68 DQS5_c 200 DDR_A_DQS5
+1.2V_DDR 201 DM5_n/DBI5_n DQS5_t 202
DIMM_CHA_SA2 DDR_A_D46 203 VSS69 VSS70 204 DDR_A_D47
2

205 DQ46 DQ47 206

DIMM_CHA_SA1 RD31 DDR_A_D42 207 VSS71 VSS72 208 DDR_A_D43
DDR4_DRAMRST# 1 @ 2 209 DQ42 DQ43 210
[15] DDR4_DRAMRST# H_DRAMRST# [18] VSS73 VSS74
DIMM_CHA_SA0 DDR_A_D52 211 212 DDR_A_D53
DQ52 DQ53
.1U_0402_16V7K

0_0402_5% 213 214

DDR_A_D49 215 VSS75 VSS76 216 DDR_A_D48
1 DQ49 DQ48
CD69

Pilot_05 @ 217 218

DDR_A_DQS#6 219 VSS77 VSS78 220
DDR_A_DQS6 221 DQS6_c DM6_n/DBI6_n 222
+1.2V_DDR
2 223 DQS6_t VSS79 224 DDR_A_D54
DDR_A_D55 225 VSS80 DQ54 226
227 DQ55 VSS81 228 DDR_A_D50
DDR_A_D51 229 VSS82 DQ50 230
231 DQ51 VSS83 232 DDR_A_D60
DDR_A_D61 233 VSS84 DQ60 234
235 DQ61 VSS85 236 DDR_A_D57
DDR_A_D56 237 VSS86 DQ57 238
239 DQ56 VSS87 240 DDR_A_DQS#7
241 VSS88 DQS7_c 242 DDR_A_DQS7
+V_DDR_REFA_R +1.2V_DDR +1.2V_DDR 243 DM7_n/DBI7_n DQS7_t 244
DDR_A_D62 245 VSS89 VSS90 246 DDR_A_D63
247 DQ62 DQ63 248
VSS91 VSS92
1

DDR_A_D58 249 250 DDR_A_D59

RH206 251 DQ58 DQ59 252
1K_0402_1% PCH_SMBCLK 253 VSS93 VSS94 254 PCH_SMBDATA
20mil [15,18] PCH_SMBCLK
255 SCL SDA 256 DIMM_CHA_SA0
PCH_SMBDATA [15,18]
+3VS VDDSPD SA0
257 258
+2.5V_MEM +0.6VS
2

259 VPP1 VTT 260 DIMM_CHA_SA1

RH45 1 2 2_0402_1% +V_DDR_REFA 261 VPP2 SA1 262
GND1 GND2
1
1

A A
CH101 RH209
0.022U_0402_16V7K 1K_0402_1%
2
1

DEREN_40-42271-26001RHF
2

RH211 CONN@
24.9_0402_1%
2

Security Classification Compal Secret Data Compal Electronics, Inc.

WWW.ALISALER.COM
Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII DIMMA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 14 of 70
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5 4 3 2 1

JDIMM2
+1.2V_DDR JP?
[8] DDR_B_D[0..63] +1.2V_DDR
[8] DDR_B_MA[0..13]
[8] DDR_B_DQS#[0..7]
1 2
DDR_B_D5 3 VSS1 VSS2 4 DDR_B_D4
[8] DDR_B_DQS[0..7] DQ5 DQ4
Layout Note: Layout Note: 5 6
DDR_B_D1 7 VSS3 VSS4 8 DDR_B_D0
Place near JDIMM1.258 Place near JDIMM2.257,259 9 DQ1 DQ0 10
DDR_B_DQS#0 11 VSS5 VSS6 12
DDR_B_DQS0 13 DQS0_c DM0_n/DBI0_n 14
15 DQS0_t VSS7 16 DDR_B_D6
DDR_B_D7 17 VSS8 DQ6 18
19 DQ7 VSS9 20 DDR_B_D2
DDR_B_D3 21 VSS10 DQ2 22
+0.6VS +2.5V_MEM 23 DQ3 VSS11 24 DDR_B_D12
DDR_B_D13 25 VSS12 DQ12 26
D 27 DQ13 VSS13 28 DDR_B_D8 D
DDR_B_D9 29 VSS14 DQ8 30
31 DQ9 VSS15 32 DDR_B_DQS#1
1U_0402_6.3V6K VSS16 DQS1_c

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0603_6.3V6M

10U_0603_6.3V6M
Layout Note: 33 34 DDR_B_DQS1
35 DM1_n/DBI_n DQS1_t 36
1 1 1 1 1 1 1 1 Place near JDIMM2.255 VSS17 VSS18
CD32

CD30

CD31
DDR_B_D15 37 38 DDR_B_D14
DQ15 DQ14

CD90

CD89

CD88

CD27

CD28
39 40
DDR_B_D10 41 VSS19 VSS20 42 DDR_B_D11
2 2 2 2 2 2 2 2 43 DQ10 DQ11 44
DDR_B_D21 45 VSS21 VSS22 46 DDR_B_D20
47 DQ21 DQ20 48
DDR_B_D17 49 VSS23 VSS24 50 DDR_B_D16
+3VS 51 DQ17 DQ16 52
DDR_B_DQS#2 53 VSS25 VSS26 54
DDR_B_DQS2 55 DQS2_c DM2_n/DBI2_n 56
57 DQS2_t VSS27 58 DDR_B_D22
DDR_B_D23 59 VSS28 DQ22 60
DQ23 VSS29

0.1U_0402_10V6K
61 62 DDR_B_D18
DDR_B_D19 63 VSS30 DQ18 64
1 1 DQ19 VSS31

CD34
65 66 DDR_B_D28
CD35 DDR_B_D29 67 VSS32 DQ28 68
2.2U_0402_6.3V6M 69 DQ29 VSS33 70 DDR_B_D24
2 2 DDR_B_D25 71 VSS34 DQ24 72
DQ25 VSS35
Layout Note:
73 74 DDR_B_DQS#3
Place near JDIMMB 75 VSS36 DQS3_c 76 DDR_B_DQS3
77 DM3_n/DBI3_n DQS3_t 78
DDR_B_D30 79 VSS37 VSS38 80 DDR_B_D31
81 DQ30 DQ31 82
DDR_B_D26 83 VSS39 VSS40 84 DDR_B_D27
85 DQ26 DQ27 86
87 VSS41 VSS42 88
89 CB5/NC CB4/NC 90
91 VSS43 VSS44 92
+1.2V_DDR 93 CB1/NC CB0/NC 94
95 VSS45 VSS46 96
97 DQS8_c DM8_n/DBI_n/NC 98
99 DQS8_t VSS47 100
VSS48 CB6/NC
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
101 102
C 103 CB2/NC VSS49 104 C
1 1 1 1 1 1 1 1 VSS50 CB7/NC
CD19

CD20

CD21

CD22

CD83

CD81

CD80

CD82

105 106
107 CB3/NC VSS51 108 DDR4_DRAMRST#
VSS52 RESET_n DDR4_DRAMRST# [14]
DDR_CKE2_DIMMB 109 110 DDR_CKE3_DIMMB
2 2 2 2 2 2 2 2 [8] DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB [8]
111 112
DDR_B_BG1 113 VDD1 VDD2 114
[8] DDR_B_BG1 BG1 ACT_n DDR_B_ACT# [8]
DDR_B_BG0 115 116 DDR_B_ALERT#
[8] DDR_B_BG0 BG0 ALERT_n DDR_B_ALERT# [8]
117 118
DDR_B_MA12 119 VDD3 VDD4 120 DDR_B_MA11
DDR_B_MA9 121 A12 A11 122 DDR_B_MA7
123 A9 A7 124
DDR_B_MA8 125 VDD5 VDD6 126 DDR_B_MA5
+1.2V_DDR DDR_B_MA6 127 A8 A5 128 DDR_B_MA4
129 A6 A4 130
DDR_B_MA3 131 VDD7 VDD8 132 DDR_B_MA2
DDR_B_MA1 133 A3 A2 134 All VREF traces should
135 A1 EVENT_n/NF 136
VDD9 VDD10
have 10 mil trace width
10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

M_CLK_DDR2 137 138 M_CLK_DDR3

[8] M_CLK_DDR2 CK0_t CK1_t/NF M_CLK_DDR3 [8]
1 M_CLK_DDR#2 139 140 M_CLK_DDR#3
[8] M_CLK_DDR#2 CK0_c CK1_c/NF M_CLK_DDR#3 [8]
1 1 1 1 1 1 1 1 141 142
+ CD33 DDR_B_PAR 143 VDD11 VDD12 144 DDR_B_MA0
[8] DDR_B_PAR PARITY A0
CD23

CD24

CD25

CD26

CD87

CD85

CD84

CD86

330U_2.5V_M DDR_B_BS1 145 146 DDR_B_MA10

[8] DDR_B_BS1 BA1 A10/AP
147 148
2 2 2 2 2 2 2 2 2 DDR_CS2_DIMMB# 149 VDD13 VDD14 150 DDR_B_BS0
[8] DDR_CS2_DIMMB# CS0_n BA0 DDR_B_BS0 [8]
DDR_B_WE# 151 152 DDR_B_RAS#
[8] DDR_B_WE# WE_n/A14 RAS_n/A16 DDR_B_RAS# [8]
153 154
M_ODT2 155 VDD15 VDD16 156 DDR_B_CAS#
[8] M_ODT2 ODT0 CAS_n/A15 DDR_B_CAS# [8]
[8] DDR_CS3_DIMMB# DDR_CS3_DIMMB# 157 158 DDR_B_MA13
159 CS1_n A13 160
M_ODT3 161 VDD17 VDD18 162
[8] M_ODT3 ODT1 C0/CS2_n/NC
163 164 +V_DDR_REFB
165 VDD19 VREFCA 166 DIMM_CHB_SA2
167 C1, CS3_n,NC SA2 168
VSS53 VSS54

0.1U_0402_10V6K
DDR_B_D37 169 170 DDR_B_D36
171 DQ37 DQ36 172
VSS55 VSS56 1

CD29
DDR_B_D33 173 174 DDR_B_D32
175 DQ33 DQ32 176
DDR_B_DQS#4 177 VSS57 VSS58 178
DDR_B_DQS4 179 DQS4_c DM4_n/DBI4_n 180
+1.2V_DDR 2
181 DQS4_t VSS59 182 DDR_B_D39
B DDR_B_D38 183 VSS60 DQ39 184 B
185 DQ38 VSS61 186 DDR_B_D35
DDR_B_D34 187 VSS62 DQ35 188
189 DQ34 VSS63 190 DDR_B_D45
DDR_B_D44 191 VSS64 DQ45 192
193 DQ44 VSS65 194 DDR_B_D41
DDR_B_D40 195 VSS66 DQ41 196
197 DQ40 VSS67 198 DDR_B_DQS#5
199 VSS68 DQS5_c 200 DDR_B_DQS5
+3VS +1.2V_DDR 201 DM5_n/DBI5_n DQS5_t 202
DDR_B_D46 203 VSS69 VSS70 204 DDR_B_D47
205 DQ46 DQ47 206
DIMM_CHB_SA1 DDR_B_D42 207 VSS71 VSS72 208 DDR_B_D43
209 DQ42 DQ43 210
DDR_B_D52 211 VSS73 VSS74 212 DDR_B_D53
DIMM_CHB_SA2 213 DQ52 DQ53 214
DDR_B_D49 215 VSS75 VSS76 216 DDR_B_D48
DIMM_CHB_SA0 217 DQ49 DQ48 218
DDR_B_DQS#6 219 VSS77 VSS78 220
DDR_B_DQS6 221 DQS6_c DM6_n/DBI6_n 222 +1.2V_DDR
223 DQS6_t VSS79 224 DDR_B_D54
DDR_B_D55 225 VSS80 DQ54 226
227 DQ55 VSS81 228 DDR_B_D50
DDR_B_D51 229 VSS82 DQ50 230
231 DQ51 VSS83 232 DDR_B_D60
DDR_B_D61 233 VSS84 DQ60 234
235 DQ61 VSS85 236 DDR_B_D57
DDR_B_D56 237 VSS86 DQ57 238
239 DQ56 VSS87 240 DDR_B_DQS#7
241 VSS88 DQS7_c 242 DDR_B_DQS7
+1.2V_DDR 243 DM7_n/DBI7_n DQS7_t 244
+V_DDR_REFB_R DDR_B_D62 245 VSS89 VSS90 246 DDR_B_D63
+1.2V_DDR 247 DQ62 DQ63 248
DDR_B_D58 249 VSS91 VSS92 250 DDR_B_D59
251 DQ58 DQ59 252
VSS93 VSS94
1

PCH_SMBCLK 253 254 PCH_SMBDATA

[14,18] PCH_SMBCLK SCL SDA PCH_SMBDATA [14,18]
RH207 255 256 DIMM_CHB_SA0
+3VS VDDSPD SA0
1K_0402_1% 257 258
+2.5V_MEM VPP1 VTT +0.6VS
259 260 DIMM_CHB_SA1
20mil 261 VPP2 SA1 262
2

A GND1 GND2 A
RH46 1 2 2_0402_1% +V_DDR_REFB
1

1 BELLW_SD-80886-1021
RH210 CONN@
CH100 1K_0402_1%
0.022U_0402_16V7K
2
2
1

RH212
24.9_0402_1% Security Classification Compal Secret Data Compal Electronics, Inc.

WWW.ALISALER.COM
Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title
2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DDRIII DIMMB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 15 of 70
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5 4 3 2 1

SKY-S-PCH_BGA837
UH2C

AV2
CL_CLK G31
AV3 PCIE9_RXN/SATA0A_RXN SATA_PRX_SSDTX_N0A [44]
CL_DATA CLINK H31 SATA_PRX_SSDTX_P0A [44]
AW2 PCIE9_RXP/SATA0A_RXP
CL_RST# C31
PCIE9_TXN/SATA0A_TXN SATA_PTX_SSDRX_N0A [44]
B31
@ PAD~D T91 R44 PCIE9_TXP/SATA0A_TXP SATA_PTX_SSDRX_P0A [44]
R43 GPP_G8/FAN_PWM_0
U39 GPP_G9/FAN_PWM_1 G29
SSD
GPP_G10/FAN_PWM_2 PCIE10_RXN/SATA1A_RXN PCIE_PRX_SSDTX_N10 [44]
N42 E29 PCIE_PRX_SSDTX_P10 [44]
GPP_G11/FAN_PWM_3 PCIE10_RXP/SATA1A_RXP C32
FAN PCIE10_TXN/SATA1A_TXN PCIE_PTX_SSDRX_N10 [44]
B32 PCIE_PTX_SSDRX_P10 [44]
D [34] CAM_CBL_DET# CAM_CBL_DET# U43 PCIE10_TXP/SATA1A_TXP D
@ PAD~D T94 U42 GPP_G0/FAN_TACH_0
GPP_G1/FAN_TACH_1 F41
U41 PCIE15_RXN/SATA2_RXN
GPP_G2/FAN_TACH_2 E41
M44 PCIE15_RXP/SATA2_RXP +3VALW
GPP_G3/FAN_TACH_3 B39
U36 PCIE15_TXN/SATA2_TXN
GPP_G4/FAN_TACH_4 A39
P44 PCIE15_TXP/SATA2_TXP
T45 GPP_G5/FAN_TACH_5
[40] KB_BL_DET GPP_G6/FAN_TACH_6 D43 mCARD_PCIE#_SATA 1 2
T44

PCIe/SATA
PCIE16_RXN/SATA3_RXN E42 RH68 10K_0402_5%
GPP_G7/FAN_TACH_7
PCIE16_RXP/SATA3_RXP A41
B33 PCIE16_TXN/SATA3_TXN
[44] PCIE_PTX_SSDRX_P11 PCIE11_TXP A40
[44] PCIE_PTX_SSDRX_N11 C33 PCIE16_TXP/SATA3_TXP
SSD K31 PCIE11_TXN
[44] PCIE_PRX_SSDTX_P11 PCIE11_RXP H42
[44] PCIE_PRX_SSDTX_N11 L31 PCIE17_RXN/SATA4_RXN
PCIE11_RXN H40
PCIE17_RXP/SATA4_RXP E45
AB33 PCIE17_TXN/SATA4_TXN
GPP_F10/SCLOCK F45
AB35 PCIE17_TXP/SATA4_TXP
AA44 GPP_F11/SLOAD
GPP_F13/SDATAOUT0 K37
AA45 PCIE18_RXN/SATA5_RXN
GPP_F12/SDATAOUT1 G37 +3VS
B38 PCIE18_RXP/SATA5_RXP G45
[44] SATA_PTX_DRX_N1B PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN
HDD [44] SATA_PTX_DRX_P1B C38 G44
D39 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP CAM_CBL_DET# 1 2
[44] SATA_PRX_DTX_N1B PCIE14_RXN/SATA1B_RXN
E37 AD44 PCH_SATA_LED# RH79 10K_0402_5%
[44] SATA_PRX_DTX_P1B PCIE14_RXP/SATA1B_RXP GPP_E8/SATALED# PCH_SATA_LED# [49]
AG36
C36 GPP_E0/SATAXPCIE0/SATAGP0 mCARD_PCIE#_SATA [44] PCH_SATA_LED# 1 2
PCIE13_TXN/SATA0B_TXN AG35 T182 PAD~D @
B36 GPP_E1/SATAXPCIE1/SATAGP1 RH80 10K_0402_5%
PCIE13_TXP/SATA0B_TXP AG39
G35 GPP_E2/SATAXPCIE2/SATAGP2
PCIE13_RXN/SATA0B_RXN AD35
E35 GPP_F0/SATAXPCIE3/SATAGP3
PCIE13_RXP/SATA0B_RXP AD31
GPP_F1/SATAXPCIE4/SATAGP4 AD38
A35 GPP_F2/SATAXPCIE5/SATAGP5
[44] PCIE_PTX_SSDRX_P12 PCIE12_TXP AC43
SSD [44] PCIE_PTX_SSDRX_N12 B35 GPP_F3/SATAXPCIE6/SATAGP6
PCIE12_TXN AB44
H33 GPP_F4/SATAXPCIE7/SATAGP7
[44] PCIE_PRX_SSDTX_P12 PCIE12_RXP
G33
[44] PCIE_PRX_SSDTX_N12 PCIE12_RXN W36
GPP_F21/EDP_BKLTCTL BIA_PWM_PCH [7,34]
J45 W35
PCIE20_TXP GPP_F20/EDP_BKLTEN L_BKLT_EN_EC [48]
K44 W42
PCIE20_TXN GPP_F19/EDP_VDDEN ENVDD_PCH [32]
N38
N39 PCIE20_RXP HOST AJ3 H_THERMTRIP# RH191 1 2 620_0402_5%
PCIE20_RXN THERMTRIP# H_THERMTRIP#_R [9]
H44 AL3 PECI RH138 1 2 13_0402_5% PECI_EC [9,48]
C
H43 PCIE19_TXP PECI AJ4 RH189 1 2 30_0402_5% C
PCIE19_TXN PM_SYNC H_PM_SYNC_R [9]
L39 AK2
PCIE19_RXP PLTRST_CPU# PLTRST_CPU# [9]
L37 AH2 H_PM_DOWN [9]
PCIE19_RXN PM_DOWN

SKY-H-PCH_BGA837
REV = 1.3 3 OF 12
@

UH2E
SKY-S-PCH_BGA837

BB3
AW4 GPP_I7/DDPC_CTRLCLK
GPP_I0/DDPB_HPD0 BD6
AY2 GPP_I8/DDPC_CTRLDATA
GPP_I1/DDPC_HPD1 BA5 DDI1_DDPB_CTRLCLK
AV4 GPP_I5/DDPB_CTRLCLK
GPP_I2/DDPD_HPD2 BC4 DDI1_DDPB_CTRLDAT
BA4 GPP_I6/DDPB_CTRLDATA
GPP_I3/DDPE_HPD3 BE5
GPP_I9/DDPD_CTRLCLK BE6
GPP_I10/DDPD_CTRLDATA
Y44
GPP_F14 PROC_DETECT# [9]
V44 T2 PAD~D @
GPP_F23 W39
BD7 GPP_F22
[34] EDP_HPD GPP_I4/EDP_HPD L43 T4 PAD~D @
GPP_G23 L44
GPP_G22 U35
GPP_G21 R35
GPP_G20 BD36 +3VS
T8 PAD~D @
GPP_H23

DDI1_DDPB_CTRLCLK RH141 1 2 2.2K_0402_5%

DDI1_DDPB_CTRLDAT RH142 1 2 2.2K_0402_5%
B B
SKY-H-PCH_BGA837
REV = 1.3 5 OF 12
@

PCH Strap PIN

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (1/8) SATA,HDA
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
SSD
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 16 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

UH2G SKY-S-PCH_BGA837
RTC CRYSTAL
PCH_RTCX1
@ PAD~D T92 AR17
GPP_A16/CLKOUT_48
L1 RH70 1 2 10M_0402_5% PCH_RTCX2
+3VS [9] CPU_24MHZ_P G1 CLKOUT_ITPXDP
CLKOUT_CPUNSSC_P L2
F1 CLKOUT_ITPXDP_P
RP3 [9] CPU_24MHZ_N CLKOUT_CPUNSSC YH1
J1
4 5 LAN_CLKREQ# CLKOUT_CPUPCIBCLK PCH_CPU_PCIBCLK_N [9] 32.768KHZ 9PF 20PPM 9H03280012
[9] PCH_CPU_BCLK_P G2 J2 PCH_CPU_PCIBCLK_P [9]
3 6 SRCCLKREQ7# CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK_P 1 2
H2
2 7 WLAN_CLK_REQ# [9] PCH_CPU_BCLK_N CLKOUT_CPUBCLK
1 8 SSD_CLK_REQ# N7 Max Crystal ESR
+1VALW XTAL24_OUT A5 CLKOUT_PCIE_N0
XTAL24_OUT N8
10K_0804_8P4R_5%
XTAL24_IN A6
XTAL24_IN
CLKOUT_PCIE_P0 = 50k Ohm.
D D
L7 1 1
RH71 1 2 2.7K_0402_1% E1 CLKOUT_PCIE_N1
XCLK_BIASREF L5
CLKOUT_PCIE_P1 CH45 CH46
+3VS PCH_RTCX1 BC9
RTCX1 D3 8.2P_0402_50V8D 8.2P_0402_50V8D
PCH_RTCX2 BD10 CLKOUT_PCIE_N2 CLK_PCIE_LAN# [47] 2 2
RTCX2 F2 CLK_PCIE_LAN [47] LAN
RP2 @ CLKOUT_PCIE_P2
CLKREQ_PCIE#0 BC24
4 5 SRCCLKREQ5# GPP_B5/SRCCLKREQ0# E5
SRCCLKREQ1# AW24 CLKOUT_PCIE_N3 CLK_PCIE_WLAN# [43]
3 6 CLKREQ_PCIE#0 GPP_B6/SRCCLKREQ1# G4 CLK_PCIE_WLAN [43] NGFF - WLAN
LAN_CLKREQ# AT24 CLKOUT_PCIE_P3
2 7 SRCCLKREQ4# [47] LAN_CLKREQ# GPP_B7/SRCCLKREQ2#
WLAN_CLK_REQ# BD25
1 8 SRCCLKREQ1# [43] WLAN_CLK_REQ# GPP_B8/SRCCLKREQ3# D5
SRCCLKREQ4# BB24 CLKOUT_PCIE_N4
GPP_B9/SRCCLKREQ4# E6
SRCCLKREQ5# BE25 CLKOUT_PCIE_P4
10K_0804_8P4R_5% GPP_B10/SRCCLKREQ5#
[44] SSD_CLK_REQ# SSD_CLK_REQ# AT33
GPP_H0/SRCCLKREQ6# D8
SRCCLKREQ7# AR31 CLKOUT_PCIE_N5
GPP_H1/SRCCLKREQ7# D7
SRCCLKREQ8# BD32 CLKOUT_PCIE_P5
SRCCLKREQ9# BC32 GPP_H2/SRCCLKREQ8#
+3VS GPP_H3/SRCCLKREQ9# R8
SRCCLKREQ10# BB31 CLKOUT_PCIE_N6 CLK_PCIE_SSD# [44]
GPP_H4/SRCCLKREQ10# R7 NGFF - SSD
SRCCLKREQ11# BC33 CLKOUT_PCIE_P6 CLK_PCIE_SSD [44]
RP22@ GPP_H5/SRCCLKREQ11#
VGA_CLK_REQ# BA33
4 5 SRCCLKREQ15# [23] VGA_CLK_REQ# GPP_H6/SRCCLKREQ12# U5
SRCCLKREQ13# AW33 CLKOUT_PCIE_N7
3 6 SRCCLKREQ9# GPP_H7/SRCCLKREQ13# U7
SRCCLKREQ14# BB33 CLKOUT_PCIE_P7
2 7 SRCCLKREQ8# GPP_H8/SRCCLKREQ14#
SRCCLKREQ15# BD33
1 8 SRCCLKREQ10# GPP_H9/SRCCLKREQ15# W10
CLKOUT_PCIE_N8 W11
R13 CLKOUT_PCIE_P8
10K_0804_8P4R_5% CLKOUT_PCIE_N15 XTAL24_IN
+3VS R11
CLKOUT_PCIE_P15 N3
CLKOUT_PCIE_N9 N2
P1 CLKOUT_PCIE_P9
RP23 CLKOUT_PCIE_N14 RH72 1 2 1M_0402_5% XTAL24_OUT
R2
4 5 VGA_CLK_REQ# CLKOUT_PCIE_P14 P3
3 6 SRCCLKREQ13# CLKOUT_PCIE_N10 P2
W7 CLKOUT_PCIE_P10 YH2
2 7 SRCCLKREQ14# CLKOUT_PCIE_N13
Y5
1 8 SRCCLKREQ11# CLKOUT_PCIE_P13 R3 1 3
CLKOUT_PCIE_N11 R4 2 4
[23] CLK_PEG_N16P# U2 CLKOUT_PCIE_P11
10K_0804_8P4R_5% CLKOUT_PCIE_N12
U3
GPU - N16P-GX [23] CLK_PEG_N16P CLKOUT_PCIE_P12
1 24MHZ_12PF_X3G024000DC1H 1
SKY-H-PCH_BGA837
REV = 1.3 7 OF 12 CH47 CH48
C @ 15P_0402_50V8J 18P_0402_50V8J C
2 2

+3V_ROM

RH74 1 2 4.7K_0402_5% PCH_SPI_CS#

SKY-S-PCH_BGA837
+3VS
UH2A
DGPU_PWRGD_EC RH500 1 2 10K_0402_5%
@ PAD~D T17 BD17 BB27 PCH_PLTRST#
GPP_A11/PME# GPP_B13/PLTRST# TOUCH_SCREEN_PD# RH69 1 2 10K_0402_5%
AG15
RSVD_AG15 P43
AG14 GPP_G16/GSXCLK TOUCHPAD_INTR# RH179 1 2 10K_0402_5%
RSVD_AG14 R39
AF17 GPP_G12/GSXDOUT
RSVD_AF17 R36
AE17 GPP_G13/GSXSLOAD
RSVD_AE17 R42
GPP_G14/GSXDIN R41
AR19 GPP_G15/GSXSRESET#
AN17 TP5 +3VALW
TP4
AF41 SIO_EXT_SMI#
PCH_SPI_SI BB29 GPP_E3/CPU_GP0 SIO_EXT_SMI# [48]
SPI0_MOSI AE44 TOUCH_SCREEN_PD# TOUCH_SCREEN_PD# [34]
PCH_SPI_SO BE30 GPP_E7/CPU_GP1 SIO_EXT_SMI# RH110 1 2 10K_0402_5%
SPI0_MISO BC23 TOUCHPAD_INTR#
PCH_SPI_CS# BD31 GPP_B3/CPU_GP2
SPI0_CS0# BD24 DGPU_PWRGD_EC
PCH_SPI_CLK BC31 GPP_B4/CPU_GP3 DGPU_PWRGD_EC [48]
AW31 SPI0_CLK
SPI0_CS1# BC36
PCH_SPI_WP# BC29 GPP_H18/SML4ALERT# BE34
PCH_SPI_HOLD# BD30 SPI0_IO2 GPP_H17/SML4DATA BD39
AT31 SPI0_IO3 GPP_H16/SML4CLK BB36
SPI0_CS2# GPP_H15/SML3ALERT# BA35
AN36 GPP_H14/SML3DATA +RTCVCC
GPP_D1/SPI1_CLK BC35
AL39 GPP_H13/SML3CLK
GPP_D0/SPI1_CS# BD35
AN41 GPP_H12/SML2ALERT#
GPP_D3/SPI1_MOSI AW35
AN38 GPP_H11/SML2DATA INTRUDER# RH143 1 2 330K_0402_5%
GPP_D2/SPI1_MISO BD34
AH43 GPP_H10/SML2CLK
B
AG44 GPP_D22/SPI1_IO3 BE11 INTRUDER# B
GPP_D21/SPI1_IO2 INTRUDER#

SKY-H-PCH_BGA837 1 OF 12 REV = 1.3

@ DH1
TOUCHPAD_INTR# 2 1
PTP_INT# [41,48]
RB751S40T1G_SOD523-2

@
+3V_ROM +3VALW RH1 2 1 0_0402_5%

SPI ROM FOR ME ( 16MByte )

+3VS
1 @ 2
RH121 0_0603_5%

Pilot_05 UH8 Pilot_05

PCH_SPI_CS# RH101 1 @ 2 0_0402_5% 1 8
PCH_SPI_HOLD# RH104 1 2 22_0402_1% RE71 1 2 PCH_SPI_HOLD#_R PCH_SPI_SO_R 2 /CS VCC 7 PCH_SPI_HOLD#_R MC74VHC1G08DFT2G_SC70-5
DO(IO1) /HOLD(IO3)

5
15_0402_1% PCH_SPI_WP#_R 3 6 PCH_SPI_CLK_R UH7
4 /WP(IO2) CLK 5 PCH_SPI_SI_R

VCC
GND DI(IO0)
PCH
1 PCH_PLTRST#
W25Q128FVSIQ_SO8 4 IN1
[23,43,44,47,48] PCH_PLTRST#_EC OUT 2

GND
PCH_SPI_CLK RH507 1 2 22_0402_1% RE126 1 2 15_0402_1% PCH_SPI_CLK_R IN2

1
PCH_SPI_SO RH508 1 2 22_0402_1% RE127 1 2 15_0402_1% PCH_SPI_SO_R
PCH_SPI_SI RH509 1 2 22_0402_1% RE128 1 2 15_0402_1% PCH_SPI_SI_R

3
PCH_SPI_WP# RH510 1 2 22_0402_1% RE129 1 2 15_0402_1% PCH_SPI_WP#_R RH77
100K_0402_5%

2
A A

[48] EC_SPI_CLK_R
[48] EC_SPI_SI_R

EC [48]
[48]
EC_SPI_SO_R
EC_SPI_CS#_R

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (2/8) SMBUS, CLK, SPI, LPC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 17 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

+3V_PCH_DSW

PCH_PCIE_WAKE# RH17 1 2 1K_0402_5%

PCH_BATLOW# RH81 1 2 8.2K_0402_5%

LAN_WAKE# RH181 1 2 10K_0402_5%

RP15
1 8 HDA_SDOUT UH2D SKY-S-PCH_BGA837 AC_PRESENT RH125 1 2 8.2K_0402_5%
[37] HDA_SDOUT_AUDIO
2 7 HDA_BITCLK
[37] HDA_BITCLK_AUDIO
3 6 HDA_SYNC Pilot_05
[37] HDA_SYNC_AUDIO
4 5 HDA_BITCLK BA9 BB17
BD8 HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF# AW22 CLKRUN#
HDA_RST# GPP_A8/CLKRUN# CLKRUN# [48] +3VALW
33_0804_8P4R_5% [37] HDA_SDIN0_AUDIO RH96 1 @ 2 0_0402_5% HDA_SDIN0 BE7
D
BC8 HDA_SDI0 AR15 D
HDA_SDI1 GPD11/LANPHYPC ME_SUS_PWR_ACK RH67 1 @ 2 1M_0402_5%
HDA_SDOUT BB7 AV13 SIO_SLP_WLAN# T4934 PAD~D @
HDA_SYNC BD9 HDA_SDO GPD9/SLP_WLAN# SYS_RESET# RH193 1 2 8.2K_0402_5%
HDA_SYNC BC14
DRAM_RESET# H_DRAMRST# [14]
BD1 BD23
Close to PCH BE2 RSVD_BD1 GPP_B2/VRALERT# AL27 +3VS
+RTCVCC RSVD_BE2 GPP_B1 AR27 LAN_DISABLE#_R [47]
AUDIO GPP_B0 3.3V_CAM_EN# [34,53]
1 2 AUD_AZA_CPU_SDO_R AM1 N44 CLKRUN# RH85 1 2 8.2K_0402_5%
[7] AUD_AZA_CPU_SDO DISPA_SDO GPP_G17/ADR_COMPLETE
RH83 1 2 20K_0402_5% PCH_SRTCRST# RH146 30_0402_5% AUD_AZA_CPU_SDI_R AN2 AN24
[7] AUD_AZA_CPU_SDI_R DISPA_SDI GPP_B11
1 2 AUD_AZA_CPU_SCLK_R AM2 AY1 SYS_PWROK
[7] AUD_AZA_CPU_SCLK DISPA_BCLK SYS_PWROK SYS_PWROK [48]
RH147 30_0402_5%

1
BC13 PCH_PCIE_WAKE# RH114 1 @ 2 0_0402_5% Pilot_05
@ T120 AL42
PAD~D WAKE# BC15 PCIE_WAKE# [43,47,48]
CH52 AN42 GPP_D8/SSP0_SCLK SIO_SLP_A# [49]
GPD6/SLP_A# AV15 T20 PAD~D @
1U_0402_6.3V6K AM43 GPP_D7/SSP0_RXD
2
SLP_LAN# BC26
AJ33 GPP_D6/SSP0_TXD SIO_SLP_S0# [49]
GPP_B12/SLP_S0# AW15
AH44 GPP_D5/SSP0_SFRM SIO_SLP_S3# [32,33,34,39,48,49,57]
GPD4/SLP_S3# BD15
AJ35 GPP_D20/DMIC_DATA0 SIO_SLP_S4# [32,33,48,49,69]
GPD5/SLP_S4# BA13
DGPU_PWROK AJ38 GPP_D19/DMIC_CLK0 SIO_SLP_S5# [49]
+RTCVCC [23,61] DGPU_PWROK GPD10/SLP_S5#
AJ42 GPP_D18/DMIC_DATA1
GPP_D17/DMIC_CLK1 AN15
GPD8/SUSCLK SUSCLK [43,44,48]
RH84 1 2 20K_0402_5% PCH_RTCRST# BD13 PCH_BATLOW#
GPD0/BATLOW# BB19
PCH_RTCRST# BC10 GPP_A15/SUSACK# BD19 ME_SUS_PWR_ACK +3VALW
[49] PCH_RTCRST# RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK ME_SUS_PWR_ACK [48]
1

PCH_SRTCRST# BB10
CH53 CLRP1 SRTCRST#
Pilot_05
1U_0402_6.3V6K SHORT PADS PCH_PWROK AW11 BD11 LAN_WAKE# RH11 1 @ 2 0_0402_5% RH82 1 @ 2 4.7K_0402_5% SPKR
EC_WAKE# [48]
2

@ 1 @ 2 PCH_RSMRST#_R BA11 PCH_PWROK GPD2/LAN_WAKE# BB15 AC_PRESENT 2 1

[48] PCH_RSMRST# RSMRST# GPD1/ACPRESENT ACAV_IN [48,54,55]
RH503 0_0402_5% BB13 DV1 RB751S40T1G_SOD523-2
SLP_SUS# AT13
1 @ 2 PCH_DPWROK AV11 GPD3/PWRBTN# SIO_PWRBTN# [48]
DSW_PWROK AW1 SYS_RESET#
RH9 0_0402_5%
SMBALERT# BB41 SYS_RESET# BD26 SPKR
SYS_RESET# [49] Top Swap Override (internal PD)
GPP_C2/SMBALERT#

SMBUS
SMBCLK AW44 GPP_B14/SPKR SPKR [37]
GPP_C0/SMBCLK AM3 H_CPUPWRGD [9] HIGH ENABLE
SMBDATA BB43 PROCPWRGD
GPP_C1/SMBDATA
+3VALW Pilot_05
SML0ALERT# BA40
GPP_C5/SML0ALERT# AT2 LOW(DEFAULT) DISABLE
SML0_SMBCLK AY44 ITP_PMODE
GPP_C3/SML0CLK AR3 PCH_JTAGX RH38 1 @ 2 0_0402_5%
SML0_SMBDATA BB39 JTAGX CPU_XDP_TCK [6,9]
GPP_C4/SML0DATA JTAG AR2 PCH_JTAG_TMS
SML1ALERT# AT27 JTAG_TMS PCH_JTAG_TMS [6]
C GPP_B23/SML1ALERT#/PCHHOT# AP1 PCH_JTAG_TDO PCH_JTAG_TDO [6] Pilot_05 C
SML1_SMBCLK AW42 JTAG_TDO
RH21 1 2 1K_0402_5% SMBCLK GPP_C6/SML1CLK AP2 PCH_JTAG_TDI
SML1_SMBDAT AW45 JTAG_TDI PCH_JTAG_TDI [6]
RH22 1 2 1K_0402_5% SMBDATA GPP_C7/SML1DATA AN3 PCH_JTAG_TCK PCH_JTAG_TCK [6]
RH23 1 2 1K_0402_5% SML1_SMBCLK JTAG_TCK
RH25 1 2 1K_0402_5% SML1_SMBDAT +3VALW
RH62 1 2 499_0402_1% SML0_SMBCLK SKY-H-PCH_BGA837 REV = 1.3 4 OF 12
RH63 1 2 499_0402_1% SML0_SMBDATA @
RH66 1 2 4.7K_0402_5% SMBALERT#
+3VS +3VALW

RH27 1 2 1K_0402_5% PCH_SMBCLK

TLS CONFIDENTIALITY
RH26 1 2 1K_0402_5% PCH_SMBDATA
RH86 1 2 10K_0402_5% DGPU_PWROK @
HIGH vPRO
RH102 1 2 0_0402_5% LOW(DEFAULT) non-vPRO

QH5A
2

2N7002EDW 2N SOT-363-6

SML1_SMBCLK 1 6 +3VS
GPU_THM_SMBCLK [23,42,48]
5

+3VALW

5
UH14
RH88 1 @ 2 47K_0402_5% PCH_RSMRST#_R SML1_SMBDAT 4 3

VCC
GPU_THM_SMBDAT [23,42,48]
1
[63] IMVP_VR_PG IN1 4 PCH_PWROK RH64 1 @ 2 4.7K_0402_5% SML0ALERT#
RH13 1 2 100K_0402_5% PCH_DPWROK QH5B 1 @ 2 2 OUT

GND
2N7002EDW 2N SOT-363-6 [18,48,56] ALL_SYS_PWRGD IN2
RH106 0_0402_5%
EC interface

1
Pilot_05 MC74VHC1G08DFT2G_SC70-5

3
+3VS RH94
10K_0402_5%
HIGH ESPI
LOW(DEFAULT) LPC

2
B PCH to DDR B

QH4A +3VALW
2

2N7002EDW 2N SOT-363-6

SMBCLK 6 1 PCH_SMBCLK PCH_SMBCLK [14,15]

RH65 1 2 150K_0402_5% SML1ALERT#
5

Service Mode Switch: SMBDATA 3 4 PCH_SMBDATA

Add a switch to ME_FWP signal to unlock the ME region and PCH_SMBDATA [14,15] PCHHOT#
allow the entire region of the SPI flash to be updated using FPT. QH4B HIGH Enable
2N7002EDW 2N SOT-363-6 LOW(DEFAULT) Disable

Buffer with Open Drain Output For VTT power control Reserve for EMI
+3VALW

HDA_SDOUT 1K_0402_5% 2 1 RH18 ME_EN 0.1U_0402_16V7K 2 1 CC298 CH50 1 2 10P_0402_25V8J HDA_BITCLK

EMC@
UC16
1 5 +3VS @ CH51 1 2 10P_0402_25V8J HDA_SDOUT
0_0402_5% 2 @ 1 RH47 NC VCC
[48] ME_FWP_EC
2
[33,63] VR_ON A 4 H_VCCST_PWRGD Reserve for RF please close to UH1
H_VCCST_PWRGD [9]

1
3 Y
Pilot_05 GND
ME_FWP PCH has internal 20K PD. RH180
74AUP1G07GW_TSSOP5 100K_0402_5%
FLASH DESCRIPTOR SECURITY OVERRIDE

2
A
Disable ME Protect (ME can be updated) ----> Pin1 & Pin2 short RH499 1 @ 2 0_0402_5% A
Enable ME Protect (ME cannot be updated)-->Pin3 & Pin2 short(Default position) IMVP_VR_ON [33,48]

RH103 RH105
1 @ 2 1 @ 2
[59] +VCCIO_PG ALL_SYS_PWRGD [18,48,56]
0_0402_5% 0_0402_5%

Pilot_05
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (3/8) DMI,FDI,PM,GFX,DP
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 18 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

SKY-S-PCH_BGA837
UH2B

[7] DMI_CTX_PRX_N0 L27

DMI_RXN0 AF5 USB20_N1 [46]
N27 USB2N_1
[7] DMI_CTX_PRX_P0 AG7
[7] DMI_CRX_PTX_N0
C27 DMI_RXP0
USB2P_1 AD5
USB20_P1 [46] USB Conn 1
B27 DMI_TXN0 USB20_N2 [45]
D [7] DMI_CRX_PTX_P0 USB2N_2 AD7 D
[7] DMI_CTX_PRX_N1
E24 DMI_TXP0
USB2P_2 AG8
USB20_P2 [45] USB Conn 2
G24 DMI_RXN1 USB20_N3 [49]
[7] DMI_CTX_PRX_P1 USB2N_3 AG10
[7] DMI_CRX_PTX_N1
B28 DMI_RXP1
USB2P_3 AE1
USB20_P3 [49] USB Conn 3 (IO Board)
A28 DMI_TXN1 USB20_N4 [43]
[7] DMI_CRX_PTX_P1 USB2N_4 AE2
[7] DMI_CTX_PRX_N2 G27 DMI_TXP1 DMI
USB2P_4 AC2
USB20_P4 [43] Mini Card(WLAN)
E26 DMI_RXN2
[7] DMI_CTX_PRX_P2 USB2N_5 AC3
B29 DMI_RXP2
[7] DMI_CRX_PTX_N2 USB2P_5 AF2
C29 DMI_TXN2
[7] DMI_CRX_PTX_P2 USB2N_6 AF3
L29 DMI_TXP2
[7] DMI_CTX_PRX_N3 USB2P_6 AB3
K29 DMI_RXN3 USB20_N7 [49]
[7] DMI_CTX_PRX_P3 USB2N_7 AB2
[7] DMI_CRX_PTX_N3
B30 DMI_RXP3 USB 2.0
USB2P_7 AL8
USB20_P7 [49] Card Reader
A30 DMI_TXN3
[7] DMI_CRX_PTX_P3 USB2N_8 AL7
DMI_TXP3
USB2P_8 AA1
PCIE_RCOMPN B18 USB2N_9 USB20_N9 [34]
PCIE_RCOMPN AA2 USB20_P9 [34] Touch Screen
1 2 PCIE_RCOMPP C17 USB2P_9
PCIE_RCOMPP AJ8
RH108 100_0402_1% USB2N_10 AJ7
H15 USB2P_10 W2
G15 PCIE1_RXN/USB3_7_RXN USB2N_11 W3
A16 PCIE1_RXP/USB3_7_RXP USB2P_11 AD3
PCIE1_TXN/USB3_7_TXN USB2N_12 USB20_N12 [34]
B16 AD2 Camera

PCIe/USB 3
PCIE1_TXP/USB3_7_TXP USB2P_12 USB20_P12 [34] +3VALW
B19 V2
C19 PCIE2_TXN/USB3_8_TXN USB2N_13 V1
E17 PCIE2_TXP/USB3_8_TXP USB2P_13 AJ11 USB_OC3# RH134 1 2 10K_0402_5%
G17 PCIE2_RXN/USB3_8_RXN USB2N_14 AJ13 USB_OC2# RH135 1 2 10K_0402_5%
L17 PCIE2_RXP/USB3_8_RXP USB2P_14 USB_OC1# RH132 1 2 10K_0402_5%
K17 PCIE3_RXN/USB3_9_RXN USB_OC0# RH131 1 2 10K_0402_5%
B20 PCIE3_RXP/USB3_9_RXP
C20 PCIE3_TXN/USB3_9_TXN
PCIE3_TXP/USB3_9_TXP AD43 USB_OC0#
E20 GPP_E9/USB2_OC0# USB_OC0# [46]
PCIE4_RXN/USB3_10_RXN AD42 USB_OC1# USB_OC1# [45]
G19 GPP_E10/USB2_OC1#
PCIE4_RXP/USB3_10_RXP AD39 USB_OC2#
B21 GPP_E11/USB2_OC2# USB_OC2# [49]
PCIE4_TXN/USB3_10_TXN AC44 USB_OC3# +3VALW
A21 GPP_E12/USB2_OC3#
PCIE4_TXP/USB3_10_TXP Y43 USB_OC4#
K19 GPP_F15/USB2_OCB_4 RP8
[47] PCIE_PRX_LANTX_N5 PCIE5_RXN Y41 USB_OC5#
[47] PCIE_PRX_LANTX_P5 L19 GPP_F16/USB2_OCB_5 USB_OC5# 4 5
PCIE5_RXP W44 USB_OC6#
LAN [47] PCIE_PTX_LANRX_N5
D22
PCIE5_TXN
GPP_F17/USB2_OCB_6 W43 USB_OC7#
USB_OC4# 3 6
C22 GPP_F18/USB2_OCB_7 USB_OC6# 2 7
[47] PCIE_PTX_LANRX_P5 PCIE5_TXP
C [43] PCIE_PRX_WLANTX_N6 G22 USB_OC7# 1 8 C
E22 PCIE6_RXN
NGFF [43] PCIE_PRX_WLANTX_P6 PCIE6_RXP AG3 USB2_COMP RH109 1 2 113_0402_1%
[43] PCIE_PTX_WLANRX_N6 B22 USB2_COMP 10K_0804_8P4R_5%
PCIE6_TXN AD10 USB2_VBUSSENSE RH112 1 2 1K_0402_5%
A23 USB2_VBUSSENSE
[43] PCIE_PTX_WLANRX_P6 PCIE6_TXP AB13
L22 RSVD_AB13
PCIE7_RXN AG2 USB2_ID RH113 1 2 1K_0402_5%
K22 USB2_ID
C23 PCIE7_RXP
B23 PCIE7_TXN
K24 PCIE7_TXP BD14
L24 PCIE8_RXN GPD7/RSVD
C24 PCIE8_RXP
B24 PCIE8_TXN
PCIE8_TXP

SKY-H-PCH_BGA837
REV = 1.3 2 OF 12
@

UH2F SKY-S-PCH_BGA837

C11 AT22
LPC/eSPI

[46] USB3TN1 USB3_1_TXN GPP_A1/LAD0/ESPI_IO0 LPC_LAD0 [43,48]

B11 AV22
[46] USB3TP1 USB3_1_TXP GPP_A2/LAD1/ESPI_IO1 LPC_LAD1 [43,48]
USB Conn 1 [46] USB3RN1 B7 AT19 LPC_LAD2 [43,48]
B
A7 USB3_1_RXN GPP_A3/LAD2/ESPI_IO2 BD16 +3VS B
[46] USB3RP1 USB3_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_LAD3 [43,48]
[46] USB3TN2 B12
USB3_2_TXN/SSIC_1_TXN IRQ_SERIRQ 1 2
A12 BE16
[46] USB3TP2 LPC_LFRAME# [43,48] RH111 10K_0402_5%
USB Conn 2 [46] USB3RN2
C8 USB3_2_TXP/SSIC_1_TXP GPP_A5/LFRAME#/ESPI_CS# BA17 IRQ_SERIRQ
IRQ_SERIRQ [48] SIO_RCIN# 1 2
B8 USB3_2_RXN/SSIC_1_RXN GPP_A6/SERIRQ AW17 PIRQA#
[46] USB3RP2 USB3_2_RXP/SSIC_1_RXP GPP_A7/PIRQA#/ESPI_ALERT0# RH87 10K_0402_5%
AT17 SIO_RCIN#
B15 GPP_A0/RCIN#/ESPI_ALERT1# SIO_RCIN# [48] PIRQA# 1 2
USB3_6_TXN BC18 T1
C15 GPP_A14/SUS_STAT#/ESPI_RESET# PAD~D @ RH90 10K_0402_5%
K15 USB3_6_TXP
USB3_6_RXN
USB

K13 BC17 CLKOUT_LPC0 RH168 1 2 22_0402_5% CLK_PCI_LPC_MEC [48]

USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK AV19 CLKOUT_LPC1 RH16 1 2 22_0402_5%
B14 GPP_A10/CLKOUT_LPC1 CLK_PCI_LPDEBUG [43,48]
C14 USB3_5_TXN
USB3_5_TXP M45
G13 GPP_G19/SMI#
USB3_5_RXN N43
H13 GPP_G18/NMI#
USB3_5_RXP
D13
[49] USB3TP3 USB3_3_TXP/SSIC_2_TXP AE45
[49] USB3TN3 C13 GPP_E6/DEVSLP2
USB Conn 3 ( IO Board) USB3_3_TXN/SSIC_2_TXN AG43 HDD_DEVSLP [44]
A9 GPP_E5/DEVSLP1
[49] USB3RP3 USB3_3_RXP/SSIC_2_RXP AG42
B10 GPP_E4/DEVSLP0 mSATA_DEVSLP [44]
[49] USB3RN3 USB3_3_RXN/SSIC_2_RXN AB39
GPP_F9/DEVSLP7 AB36
Reserve for RF
SATA

B13 GPP_F8/DEVSLP6
USB3_4_TXP AB43
A14 GPP_F7/DEVSLP5
USB3_4_TXN AB42
G11 GPP_F6/DEVSLP4
USB3_4_RXP AB41 CLK_PCI_LPC_MEC 2 1
E11 GPP_F5/DEVSLP3
USB3_4_RXN 12P_0402_50V8J EMC@
CC4
SKY-H-PCH_BGA837
REV = 1.3 6 OF 12 CLK_PCI_LPDEBUG 2 1
@ 12P_0402_50V8J EMC@
CC5

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (4/8) PCI, USB
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 19 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

+3VS +3VS

1
RH14 1 @ 2 5.1K_0402_1% I2C0_SCK
RH15 1 @ 2 5.1K_0402_1% I2C0_SDA RH494
RH10 1 2 10K_0402_5% SIO_EXT_SCI# 14G0@ 10K_0402_5%
RH159 1 2 49.9K_0402_1% UART2_TXD
RH160 1 2 49.9K_0402_1% UART2_RXD

2
RH119 1 2 2.2K_0402_5% I2C1_SCK_TP Board_ID_14_15
RH120 1 2 2.2K_0402_5% I2C1_SDA_TP

1
RH495
+3VALW 15G1@ 10K_0402_5%

2
RH91 1 2 10K_0402_5% SIO_EXT_WAKE#
D D

+1.8V_GFX_AON +3VS

UH2K SKY-S-PCH_BGA837
SYSTEM ID
BBS_BIT0 AT29

1
GPP_B22/GSPI1_MOSI AL44 IR_CAM_DET# [34] HIGH 14'' & N16P_GT
AR29 GPP_D9
RH517 GPP_B21/GSPI1_MISO AL36
100K_0402_5% [48] SIO_EXT_SCI#
SIO_EXT_SCI# AV29
GPP_B20/GSPI1_CLK
GPP_D10 AL35 Board_ID_14_15
DGPU_HOLD_RST# [23] LOW 15'' & N16P_GX
[43] WLAN_WIGIG60GHZ_DIS# BC27 GPP_D11
GPP_B19/GSPI1_CS# AJ39
DGPU_PWR_EN [31,62]

2
GPP_D12

G
NRB_BIT BD28

2
BD27 GPP_B18/GSPI0_MOSI AJ43
3 1 AW27 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# AL43
[23] GPU_GC6_FB_EN GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#
AR24 AK44

D
[23] GPU_EVENT# GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD +3VS
AK45
AV44 GPP_D13/ISH_UART0_RXD
QV10 BA41 GPP_C9/UART0_TXD
BSS138W 1N SOT-323-3 AU44 GPP_C8/UART0_RXD DGPU_PWR_EN RH129 1 @ 2 10K_0402_5%
AV43 GPP_C11/UART0_CTS#
[43] BT_RADIO_DIS# GPP_C10/UART0_RTS# RH127 1 2 10K_0402_5%
AU41 BC38
[36] HDMI_HPD_PCH GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL
AT44 BB38
AT43 GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA
AU43 GPP_C13/UART1_TXD/ISH_UART1_TXD BD38
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL BE39
AN43 GPP_H21/ISH_I2C1_SDA
SIO_EXT_WAKE# AN44 GPP_C23/UART2_CTS# +3VALW
[48] SIO_EXT_WAKE# AR39 GPP_C22/UART2_RTS#
[49] UART2_TXD UART2_TXD
UART2_RXD AR45 GPP_C21/UART2_TXD BC22
[49] UART2_RXD GPP_C20/UART2_RXD GPP_A23/ISH_GP5 BD18
I2C1_SCK_TP AR41 GPP_A22/ISH_GP4 BE21 KB_DET# RH128 1 2 10K_0402_5%
[41] I2C1_SCK_TP GPP_C19/I2C1_SCL GPP_A21/ISH_GP3
[41] I2C1_SDA_TP I2C1_SDA_TP AR44 BD22 KB_DET#
AR38 GPP_C18/I2C1_SDA GPP_A20/ISH_GP2 BD21 KB_DET# [40] 1 2 10K_0402_5%
I2C0_SCK CLKDET# RH126 @
I2C0_SDA AT42 GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 BB22 CLKDET#
GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 BC19
AM44 GPP_A17/ISH_GP7
AJ44 GPP_D4/ISH_I2C2_SDA
C GPP_D23/ISH_I2C2_SCL C

+3VALW
SKY-H-PCH_BGA837
REV = 1.3 11 OF 12
@ RH130 1 @ 2 4.7K_0402_5% BBS_BIT0

Boot BIOS Strap Bit (internal PD)

HIGH LPC
LOW(DEFAULT) SPI

+3VALW

RH92 1 @ 2 4.7K_0402_5% NRB_BIT

NO REBOOT mode (internal PD)

HIGH ENABLE
LOW(DEFAULT) DISABLE

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (5/8) GPIO, CPU, MISC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 20 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

+1VALW +1V_PCH
@
PJP1302
1 2

PAD-OPEN 43x39

@ UH2H SKY-S-PCH_BGA837
+1V_MPHY PJP1303

2.75835A +1VALW 1 2 +1V_PCH_PRIM AA23

@ PJP70 AA26 VCCPRIM_1P0_AA23
1 2 PAD-OPEN 43x39 AA28 VCCPRIM_1P0_AA26 AL22
1 2 VCCPRIM_1P0_AA28 VCCPRIM_1P0_AL22 +1V_PCH 0.0908A

CORE
AC23
AC26 VCCPRIM_1P0_AC23 BA24
JUMP_43X39 VCCPRIM_1P0_AC26 VCCDSW_3P3_BA24 +3V_PCH_DSW 0.403A
AC28
BA31

VCCGPIO
D
AE23 VCCPRIM_1P0_AC28 D
VCCPGPPA
AE26 VCCPRIM_1P0_AE23 BC42
Y23 VCCPRIM_1P0_AE26 VCCPGPPBH_BC42 BD40
Y25 VCCPRIM_1P0_Y23 VCCPGPPBH_BD40 AJ41
BA29 VCCPRIM_1P0_Y25 VCCPGPPEF_AJ41 AL41
0.0454A +1V_VCCDSW DCPDSW_1P0 VCCPGPPEF_AL41 AD41
N17 VCCPGPPG AN5
0.0348A +1V_PCH VCCCLK1 VCCPRIM_3P3_AN5 +3VALW 0.92089A
R19
+3VALW +3V_PCH_DSW U20 VCCCLK3
V17 VCCCLK4 AD15
VCCCLK2 VCCPRIM_1P0_AD15 +1V_PCH 0.0061A
R17 AD13
VCCCLK6 VCCATS +3VS 0.0066A
1 @ 2 BA20
K2 VCCRTCPRIM_3P3 +3VALW 0.0002A
RH137 0_0603_5% Pilot_05 +1V_PCH_CLK5 VCCCLK5_K2 BA22
0.0046A K3 VCCRTC +RTCVCC 0.0002A
VCCCLK5_K3 BA26
DCPRTC +DCPRTC
+1V_PCH_PRIM +1V_VCCDSW U21
3.53A +1V_MPHY VCCMPHY_1P0_U21 AJ20 +1V_PCH_PRIM

MPHY
U23 VCCPRIM_1P0_AJ20 2.75835A
VCCMPHY_1P0_U23 AJ21
U25 VCCPRIM_1P0_AJ21
VCCMPHY_1P0_U25 AJ23
1 @ 2 U26 VCCPRIM_1P0_AJ23
VCCMPHY_1P0_U26 AJ25
RH196 0_0402_5% V26 VCCPRIM_1P0_AJ25
A43 VCCMPHY_1P0_V26
0.0248A +1V_MPHY_MPHYPLL VCCMPHYPLL_1P0_A43
B43 BE41 +3V_PCH_SPI RH493 1 @ 2 0_0603_5% 0.0121A
VCCMPHYPLL_1P0_B43 VCCSPI_BE41 +3VALW
C44 BE43
+1VALW +1V_MPHY_MPHYPLL C45 VCCPCIE3PLL_1P0_C44 VCCSPI_BE43 BE42
VCCPCIE3PLL_1P0_C45 VCCSPI_BE42 Pilot_05
+1V_MPHY V28 BC44 +3VALW
0.095A VCCAPLLEBB_1P0 VCCPGPPCD_BC44 0.0395A
AC17 BA45

USB
1 @ 2 0.533A +1V_PCH VCCPRIM_1P0_AC17 VCCPGPPCD_BA45
AJ5 BC45
RH124 0_0603_5% +1V_PCH_USBPLL VCCUSB2PLL_1P0_AJ5 VCCPGPPCD_BC45
AL5 BB45
AN19 VCCUSB2PLL_1P0_AL5 VCCPGPPCD_BB45
+1V_PCH_AZPLL VCCHDAPLL_1P0
+1V_PCH_USBPLL BD3 +3VALW
+1VALW BA15 VCCPRIM_3P3_BD3 0.0811A
0.075A +3V_PCH_AZIO VCCHDA BE3
W15 VCCPRIM_3P3_BE3 BE4
+3V_PCH_DSW VCCDSW_3P3_W15 VCCPRIM_3P3_BE4

1 @ 2
SKY-H-PCH_BGA837
RH123 0_0603_5% Pilot_05 REV = 1.3 8 OF 12
@
C C

+1VALW +1V_PCH_AZPLL

1 2 +1V_PCH_AZPLL +1V_VCCDSW +3V_PCH_AZIO +DCPRTC +3VS

LH2 BLM15PX221SN1D_2P
Close to AN19 Close to BA29 Close to BA15 Close to BA26 Close to AD13

1U_0402_6.3V6K

1U_0402_6.3V6K
0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
1 1 1 1 1

CH203

CH176

CH200

CH70

CH188
+3VALW +3V_PCH_AZIO
2 2 2 2 2
1 2
LH1 BLM15PX221SN1D_2P

+1VALW +1V_PCH_CLK5

1 @ 2
RH122 0_0603_5% Pilot_05 +3VALW +3V_PCH_DSW +3VALW +3VALW +3VALW

Close to AD41 Close to W15 Close to AN5 Close to BC42,BD40 Close to AJ41,AL41
+1V_MPHY_MPHYPLL +1V_MPHY +1V_PCH_USBPLL

0.1U_0402_10V7K

1U_0402_6.3V6K

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K
+1V_PCH_CLK5 1 1 1 1 1

CH82
CH190

CH189

CH192

CH191
Close to K2,K3 Close to A43,B43 Close to U21,U23 Close to AJ5,AL5 @ @ @ @ @
2 2 2 2 2

B B
1U_0402_6.3V6K

1U_0402_6.3V6K

10U_0402_6.3V6M

10U_0402_6.3V6M

1U_0402_6.3V6K
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

1 1 1 1 1 1 1 1 1 1 1
CH179

CH180

CH185

CH184

CH183
CH177

CH178

CH181

CH182

CH201

CH202

@ @ @ @ @
2 2 2 2 2 2 2 2 2 2 2

+RTCVCC +3VALW

Close to BA22 Close to BA20

1U_0402_6.3V6K

0.1U_0402_10V6K

1U_0402_6.3V6K

0.1U_0402_10V6K

1 1 1 1
CH80

CH173

CH187

CH186

2 2 2 2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PCH (6/8) PWR
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 21 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

UH2LSKY-S-PCH_BGA837
UH2I
SKY-S-PCH_BGA837
C42 AB11
AC18 AR5 VSS VSS
VSS VSS D10 AB7
AN4 AR7 VSS VSS
VSS VSS D12 AB14
AN10 U15 VSS VSS
VSS VSS D15 AB31
BE14 AL4 VSS VSS
VSS VSS D16 AB32
BE18 AE29 VSS VSS
VSS VSS D17 AB38
BE23 AE4 VSS VSS
D VSS VSS D19 AB4 D
BE28 AE42 VSS VSS
VSS VSS D21 AB5
BE32 AF18 VSS VSS
VSS VSS D24 AC1
BE37 AF20 VSS VSS
VSS VSS D25 AC20
BE40 AF21 VSS VSS
VSS VSS D27 AC21
BE9 AF23 VSS VSS
VSS VSS D29 AC25
C10 AF25 VSS VSS
VSS VSS D30 AC29
C2 AF26 VSS VSS
VSS VSS D31 AC45
C28 AF28 VSS VSS
VSS VSS D33 AB8
C37 AF29 VSS VSS
VSS VSS D35 AD11
J7 AG11 VSS VSS
VSS VSS D36 AD14
K10 AG13 VSS VSS
VSS VSS E13 AB15
K27 AG31 VSS VSS
VSS VSS E15 AD32
K33 AG32 VSS VSS
VSS VSS E31 AD33 SKY-S-PCH_BGA837
K36 AG33 VSS VSS UH2J
VSS VSS E33 AD36
K4 AG38 VSS VSS
VSS VSS F44 AD4
K42 AG4 VSS VSS
VSS VSS F8 AD8
K43 AH1 VSS VSS
VSS VSS G42 AE18
L12 AH17 VSS VSS BD2 AR22
VSS VSS G9 AE20 VSS_BD2 RSVD_AR22
L13 AH18 VSS VSS BD45 W13
VSS VSS H17 AE21 VSS_BD45 RSVD_W13
L15 AH20 VSS VSS BD44 U13
VSS VSS H19 AE25 VSS_BD44 RSVD_U13
L4 AH21 VSS VSS BE44
VSS VSS H22 AE28 VSS_BE44 P31
L41 AH23 VSS VSS D45 RSVD_P31
VSS VSS H24 AL10 VSS_D45 N31
L8 AH25 VSS VSS A42 RSVD_N31
VSS VSS H27 AL11 VSS_A42
M35 AH26 VSS VSS B45 P27
VSS VSS H29 AL13 VSS_B45 RSVD_P27
M42 AH28 VSS VSS B44 R27
VSS VSS H3 AL17 VSS_B44 RSVD_R27
N10 AH29 VSS VSS A4 N29
VSS VSS H35 AL19 VSS_A4 RSVD_N29
N15 AH45 VSS VSS A3 P29
VSS VSS J10 AL24 VSS_A3 RSVD_P29
N19 AJ10 VSS VSS B2 AN29
VSS VSS J11 AL29 VSS_B2 RSVD_AN29
N22 AJ14 VSS VSS A2 R24
VSS VSS J3 AL32 VSS_A2 RSVD_R24
N24 AJ15 VSS VSS B1 P24
VSS VSS J39 AL33 VSS_B1 RSVD_P24
N35 AJ17 VSS VSS BB1
VSS VSS J5 AL38 VSS_BB1 AT3
N36 AJ18 VSS VSS BC1 PREQ# XDP_PREQ# [9]
C VSS VSS T42 AM15 VSS_BC1 AT4 C
N4 AJ26 VSS VSS A44 PRDY# XDP_PRDY# [9]
VSS VSS U10 AM17 VSS_A44 AY5
N41 AJ28 VSS VSS CPU_TRST# CPU_XDP_TRST# [6,9]
VSS VSS U11 AM19 C1 AL2
N5 AJ29 VSS VSS RSVD_C1 PCH_TRIGOUT PCH_TRIGGER [9]
VSS VSS U14 AM22 D1 AK1
P17 AJ31 VSS VSS RSVD_D1 PCH_TRIGIN CPU_TRIGGER [9]
VSS VSS U17 AM24
P19 AJ32 VSS VSS
VSS VSS U18 AM27
P22 AJ36 VSS VSS
VSS VSS U28 AM29
P45 AK4 VSS VSS
VSS VSS U29 AM45
R10 AK42 VSS VSS
VSS VSS U31 AN11 SKY-H-PCH_BGA837
R14 AU7 VSS VSS REV = 1.3 10 OF 12
VSS VSS U32 AN22
R22 AV17 VSS VSS @
VSS VSS U33 AN27
R29 AV24 VSS VSS
VSS VSS U38 AN31
R33 AV27 VSS VSS
VSS VSS U4 AN39
R38 AV31 VSS VSS
VSS VSS U8 AN7
R5 AV33 VSS VSS
VSS VSS V18 AN8
T1 AV6 VSS VSS
VSS VSS V20 AP11
T2 AW13 VSS VSS
VSS VSS V21 AP4
T4 AW19 VSS VSS
VSS VSS V23 AR33
Y18 AW29 VSS VSS
VSS VSS V25 AR34
Y20 AW37 VSS VSS
VSS VSS V29 AR42
Y21 AW9 VSS VSS
VSS VSS V3 AR9
Y26 AY38 VSS VSS
VSS VSS V45 AT10
Y28 AY45 VSS VSS
VSS VSS W14 AT15
Y29 B25 VSS VSS
VSS VSS W31 AT36
A18 B3 VSS VSS
VSS VSS W32 AT9
A25 B37 VSS VSS
VSS VSS W33 AU1
A32 B40 VSS VSS
VSS VSS W38 AU35
A37 B6 VSS VSS
VSS VSS W4 AU36
AA17 BA1 VSS VSS
VSS VSS W8 AU39
AA18 BB11 VSS VSS
VSS VSS Y17 AU45
AA20 BB16 VSS VSS
VSS VSS C4
AA21 BB21 VSS
AA25 VSS VSS BB25
B AA29 VSS VSS BB30 B
AA4 VSS VSS BB34
AA42 VSS VSS BC2
AB10 VSS VSS BD43
VSS VSS SKY-H-PCH_BGA837
12 OF 12 REV = 1.3
SKY-H-PCH_BGA837 @
REV = 1.3 9 OF 12
@

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title
PCH (8/8) VSS

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 22 of 70
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 WWW.AliFixit.COM
5 4 3 2 1

PEG_HTX_C_GRX_P[0..15]
[7] PEG_HTX_C_GRX_P[0..15]
UV1A @ DV13
PEG_HTX_C_GRX_N[0..15] 1VS_GFX_PG 2
[7] PEG_HTX_C_GRX_N[0..15] [60] 1VS_GFX_PG
PEG_HTX_C_GRX_P0 AN12 Part 1 of 7
PEG_GTX_C_HRX_P[0..15] PEG_HTX_C_GRX_N0 AM12 PEX_RX0 P6 1
[7] PEG_GTX_C_HRX_P[0..15] PEG_HTX_C_GRX_P1 AN14 PEX_RX0_N GPIO0 M3 GPU_GC6_FB_EN NVVDD_PWM_VID [67] FBVDD_EN [31,61]
PEX_RX1 GPIO1 GPU_GC6_FB_EN [20]
PEG_GTX_C_HRX_N[0..15] PEG_HTX_C_GRX_N1 AM14 L6 GC6_EVENT#_D GPU_GC6_FB_EN 3
[7] PEG_GTX_C_HRX_N[0..15] PEX_RX1_N GPIO2

1
100K_0402_5%
PEG_HTX_C_GRX_P2 AP14 P5
PEX_RX2 GPIO3 NVVDDS_PWM_VID [68]

RV209
PEG_HTX_C_GRX_N2 AP15 P7 1V8_MAIN_EN BAT54CW-7-F_SOT323-3 +1.8V_GFX_AON
PEX_RX2_N GPIO4 1V8_MAIN_EN [31]
PEG_HTX_C_GRX_P3 AN15 L7 FRM_LCK
PEG_HTX_C_GRX_N3 AM15 PEX_RX3 GPIO5 M7 GPU_PSI
AN17 PEX_RX3_N GPIO6 N8 GPU_PSI [67,68]
PEG_HTX_C_GRX_P4 GC6_EVENT#_D RV42 1 2 10K_0402_5%

2
PEG_HTX_C_GRX_N4 AM17 PEX_RX4 GPIO7 L3 GPU_PSI @ RV574 1 2 10K_0402_5%
AP17 PEX_RX4_N GPIO8 M2 MEM_VDD_CTL [61]
PEG_HTX_C_GRX_P5 THERMAL_ALERT# THERMAL_ALERT# RV526 1 2 10K_0402_5%
D PEG_HTX_C_GRX_N5 AP18 PEX_RX5 GPIO9 L1 MEM_VREF GPU_LEVEL RV60 1 2 100K_0402_5% D
AN18 PEX_RX5_N GPIO10 M5 MEM_VREF [28,29]
PEG_HTX_C_GRX_P6 RV610 1 @ 2 0_0402_5% HPD_IFPA RV575 1 2 10K_0402_5%
PEG_HTX_C_GRX_N6 AM18 PEX_RX6 GPIO11 N3 GPU_LEVEL HPD_IFPB RV576 1 2 10K_0402_5%

GPIO
PEG_HTX_C_GRX_P7 AN20 PEX_RX6_N GPIO12 M4 SYS_PEX_RST_MON# RV532 1 2 10K_0402_5%
PEG_HTX_C_GRX_N7 AM20 PEX_RX7 GPIO13 N4 HPD_IFPA HPD_IFPC +3VS HPD_IFPD RV577 1 2 10K_0402_5%
PEG_HTX_C_GRX_P8 AP20 PEX_RX7_N GPIO14 P2 HPD_IFPB HPD_IFPE RV578 1 2 10K_0402_5%
PEG_HTX_C_GRX_N8 AP21 PEX_RX8 GPIO15 R8 SYS_PEX_RST_MON# QV89 UV22 HPD_IFPF RV579 1 2 10K_0402_5%
PEX_RX8_N GPIO16

5
PEG_GTX_C_HRX_P0 CV531 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P0 PEG_HTX_C_GRX_P9 AN21 M6 HPD_IFPD L2N7002WT1G_SC-70-3 HPD_IFPC RV580 1 2 10K_0402_5%
PEX_RX9 GPIO17

1
PEG_GTX_C_HRX_N0 CV532 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N0 PEG_HTX_C_GRX_N9 AM21 R1 HPD_IFPE D 1 1V8_MAIN_EN RV55 1 2 10K_0402_5%

P
PEG_HTX_C_GRX_P10 AN23 PEX_RX9_N GPIO18 P3 2 4 B GPU_HPD_RT [35] GPU_PEX_RST_HOLD# RV41 1 2 10K_0402_5%
PEG_GTX_C_HRX_P1 CV533 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P1 PEG_HTX_C_GRX_N10 AM23 PEX_RX10 GPIO19 P4 G O 2 DGPU_PEX_RST# FRM_LCK RV581 1 2 10K_0402_5%
PEX_RX10_N GPIO20 A

G
PEG_GTX_C_HRX_N1 CV534 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N1 PEG_HTX_C_GRX_P11 AP23 P1 S

3
PEX_RX11 GPIO21

1
PEG_HTX_C_GRX_N11 AP24 P8 TC7SZ08FU_SSOP5

3
PEG_GTX_C_HRX_P2 CV535 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P2 PEG_HTX_C_GRX_P12 AN24 PEX_RX11_N GPIO22 T8 GPU_PEX_RST_HOLD# RV582
PEG_GTX_C_HRX_N2 CV536 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N2 PEG_HTX_C_GRX_N12 AM24 PEX_RX12 GPIO23 L2 HPD_IFPF 100K_0402_5%
PEG_HTX_C_GRX_P13 AN26 PEX_RX12_N GPIO24 R4
PEG_GTX_C_HRX_P3 CV537 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P3 PEG_HTX_C_GRX_N13 AM26 PEX_RX13 GPIO25 R5 GPU_GC6_FB_EN RV37 1 2 10K_0402_5%

2
PEG_GTX_C_HRX_N3 CV538 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N3 PEG_HTX_C_GRX_P14 AP26 PEX_RX13_N GPIO26 U3 HPD_IFPC MEM_VREF RV27 1 2 100K_0402_5%
PEG_HTX_C_GRX_N14 AP27 PEX_RX14 GPIO27
PEG_GTX_C_HRX_P4 CV539 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P4 PEG_HTX_C_GRX_P15 AN27 PEX_RX14_N
PEG_GTX_C_HRX_N4 CV540 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N4 PEG_HTX_C_GRX_N15 AM27 PEX_RX15
PEX_RX15_N
PEG_GTX_C_HRX_P5 CV541 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P5
PEG_GTX_C_HRX_N5 CV542 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N5 PEG_GTX_HRX_P0 AK14 DGPU_PEX_RST#
PEG_GTX_HRX_N0 AJ14 PEX_TX0 AK9 +1.8V_GFX_AON
PEG_GTX_C_HRX_P6 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P6 PEG_GTX_HRX_P1 AH14 PEX_TX0_N RES AL10
CV543
PEX_TX1 RES Pilot_05
PEG_GTX_C_HRX_N6 CV544 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N6 PEG_GTX_HRX_N1 AG14 AL9 VGA_SMB_CK2 RV191 1 2 1.8K_0402_5%
PEG_GTX_HRX_P2 AK15 PEX_TX1_N RES RV614 1 @ 2 0_0402_5% VGA_SMB_DA2 RV192 1 2 1.8K_0402_5%
PEX_TX2 [23,24] THERMATRIP_GPU#

1
PEG_GTX_C_HRX_P7 CV545 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P7 PEG_GTX_HRX_N2 AJ15 AM9

RES
PEG_GTX_C_HRX_N7 CV546 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N7 PEG_GTX_HRX_P3 AL16 PEX_TX2_N RES AN9 RV609 I2CB_SCL RV512 1 2 1.8K_0402_5%

PCI EXPRESS
PEG_GTX_HRX_N3 AK16 PEX_TX3 RES I2CB_SDA RV513 1 2 1.8K_0402_5%
PEX_TX3_N 10K_0402_5%

2
PEG_GTX_C_HRX_P8 CV547 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P8 PEG_GTX_HRX_P4 AK17 AG10
C PEG_GTX_C_HRX_N8 CV548 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N8 PEG_GTX_HRX_N4 AJ17 PEX_TX4 RES AP9 VGA_EDID_CLK RV514 1 2 1.8K_0402_5% C

2
PEG_GTX_HRX_P5 AH17 PEX_TX4_N RES AP8 1 6 VGA_EDID_DATA RV515 1 2 1.8K_0402_5%
PEG_GTX_C_HRX_P9 CV550 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P9 PEG_GTX_HRX_N5 AG17 PEX_TX5 RES
PEG_GTX_C_HRX_N9 CV551 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N9 PEG_GTX_HRX_P6 AK18 PEX_TX5_N QV88A
PEG_GTX_HRX_N6 AJ18 PEX_TX6 DMN63D8LDW-7 2N SOT363-6
PEX_TX6_N

5
PEG_GTX_C_HRX_P10 CV552 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P10 PEG_GTX_HRX_P7 AL19
PEG_GTX_C_HRX_N10 CV557 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N10 PEG_GTX_HRX_N7 AK19 PEX_TX7
PEG_GTX_HRX_P8 AK20 PEX_TX7_N RV615 1 @ 2 0_0402_5%4 3
PEX_TX8 [23,24] THERMATRIP_GPU# CMP_VOUT0 [48,56]
PEG_GTX_C_HRX_P11 CV558 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P11 PEG_GTX_HRX_N8 AJ20
PEG_GTX_C_HRX_N11 CV559 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N11 PEG_GTX_HRX_P9 AH20 PEX_TX8_N R7 I2CB_SCL RV616 1 @ 2 0_0402_5%
PEG_GTX_HRX_N9 AG20 PEX_TX9 I2CB_SCL R6 I2CB_SDA QV88B
PEG_GTX_C_HRX_P12 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P12 PEG_GTX_HRX_P10 AK21 PEX_TX9_N I2CB_SDA
CV560
PEX_TX10 Pilot_05 DMN63D8LDW-7 2N SOT363-6
PEG_GTX_C_HRX_N12 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N12 PEG_GTX_HRX_N10 AJ21 R2 VGA_EDID_CLK

I2C
CV561
PEG_GTX_HRX_P11 AL22 PEX_TX10_N I2CC_SCL R3 VGA_EDID_DATA
PEG_GTX_C_HRX_P13 CV562 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P13 PEG_GTX_HRX_N11 AK22 PEX_TX11 I2CC_SDA
PEG_GTX_C_HRX_N13 CV563 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N13 PEG_GTX_HRX_P12 AK23 PEX_TX11_N T4 VGA_SMB_CK2
PEG_GTX_HRX_N12 AJ23 PEX_TX12 I2CS_SCL T3 VGA_SMB_DA2 DV9
PEG_GTX_C_HRX_P14 CV564 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P14 PEG_GTX_HRX_P13 AH23 PEX_TX12_N I2CS_SDA GC6_EVENT#_D 2 1 GPU_EVENT#
PEX_TX13 GPU_EVENT# [20]
PEG_GTX_C_HRX_N14 CV565 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N14 PEG_GTX_HRX_N13 AG23
PEG_GTX_HRX_P14 AK24 PEX_TX13_N RB751S40T1G_SOD523-2
PEG_GTX_C_HRX_P15 CV566 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_P15 PEG_GTX_HRX_N14 AJ24 PEX_TX14 GPU_PWR_LEVEL
PEG_GTX_C_HRX_N15 CV567 2 1 0.22U_0201_6.3V6M PEG_GTX_HRX_N15 PEG_GTX_HRX_P15 AL25 PEX_TX14_N DV11
PEG_GTX_HRX_N15 AK25 PEX_TX15 H26 W=40mils +GPCPLL_AVDD GPU_LEVEL 2 1 Low Low Performace
PEX_TX15_N GPCPLL_AVDD GPU_PWR_LEVEL [48]
AD8 W=40mils +XS_PLLVDD RB751S40T1G_SOD523-2 High High Performace
AJ11 XS_PLLVDD
NC
SP_PLLVDD
AE8 W=40mils +SP_PLLVDD
+1.8V_PLLVDD +1.8V_PLLVDD +1.8V_PLLVDD
AL13
[17]
[17]
CLK_PEG_N16P
CLK_PEG_N16P#
AK13 PEX_REFCLK
PEX_REFCLK_N VID_PLLVDD
AD7 W=40mils +VID_PLLVDD Under RV583 Under RV584 Under RV585
CLK_REQ AK12 +GPCPLL_AVDD 1 @ 2 +XS_PLLVDD 1 @ 2 +SP_PLLVDD 1 @ 2
PEX_CLKREQ_N

CLK

0.1U_0402_10V7K

0.1U_0402_10V7K

0.1U_0402_10V7K
AJ26 H3 XTALIN 0_0402_5% 0_0402_5% 0_0402_5%
B AK26 NC XTAL_IN H2 XTAL_OUT B
NC XTAL_OUT 1 1 1

CV72

CV52
+3VALW Pilot_05 Pilot_05 Pilot_05 Pilot_05

CV833
DGPU_PEX_RST# 1 @ 2 DGPU_PEX_RST#_R AJ12 J4 XTALOUT
RV58 RV40 1 2 0_0402_5% PEX_TERMP AP29 PEX_RST_N XTAL_OUTBUFF H1 XTALSSIN 1 2
PEX_TERMP XTAL_SSIN

1
1 2 RV50 2.49K_0402_1% 10K_0402_5% RV49 2 2 2
1
CV212 RV51
10K_0402_5% 0.1U_0402_10V7K 10K_0402_5%
@
2 N17P-GT_BGA908

2
5

UV14
@

1 RV587 +1.8V_PLLVDD +1.8V_PLLVDD +1.8V_GFX_RUN

Under
G VCC

[20] DGPU_HOLD_RST# B 4 1 2 SYS_PEX_RST_MON# RV586 LV7

[17,43,44,47,48] PCH_PLTRST#_EC
2
A
Y +VID_PLLVDD 1 @ 2 Near 1 2
0_0402_5% ALL_GPWRGD RV572 1 @ 2 0_0402_5% Pilot_05 1 2

10U_0603_6.3V6M

47U_0805_6.3V6M
0.1U_0402_10V7K
MC74VHC1G08DFT2G_SC70-5 @ RV52 10M_0402_5% 0_0402_5% BLM15AX300SN1D
3

CV51

CV50
DGPU_PEX_RST# RV571 1 @ 2 0_0402_5% 1 1 1

CV53
RV208 YV1 Pilot_05
@ 0_0402_5% 27MHZ_10PF_7V27000050
30 ohm
2

XTALIN 1 3XTAL_OUT 2 2 2
Pilot_05
(ESR=0.03) Bead
2

1 3
+1.8V_GFX_AON VGA_SMB_CK2 1 6 GND GND
GPU_THM_SMBCLK [18,42,48]
CV70 CV71
5

QV1A 10P_0402_50V8J 2 4 10P_0402_50V8J

1
10K_0402_5%

DMN63D8LDW-7 2N SOT363-6
RV39

+1.8V_GFX_AON VGA_SMB_DA2 4 3 +1.8V_GFX_AON

GPU_THM_SMBDAT [18,42,48]
@

@ UV18 QV1B UV19

2
5

5
DMN63D8LDW-7 2N SOT363-6
SYS_PEX_RST_MON# 1 1VS_GFX_PG 1
P

P
B 4 DGPU_PEX_RST# B 4 ALL_GPWRGD
A GPU_PEX_RST_HOLD# 2 O ALL_GPWRGD 2 O A
A [18,61] DGPU_PWROK A 1
G

G
@ +1.8V_GFX_AON
1

2
100K_0402_5%

TC7SZ08FU_SSOP5 TC7SZ08FU_SSOP5 CV54

3

3
RV573

RV56 0.01U_0402_16V7K
10K_0402_5% 2
2

RV57
2

2 1

10K_0402_5%
GC6 2.0 function Security Classification Compal Secret Data Compal Electronics, Inc.
G

Issued Date 2013/09/09 Deciphered Date 2014/09/09 Title

1

1 3 CLK_REQ
[17] VGA_CLK_REQ# N17P_PCIE/DAC/GPIO
D

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size
R&D Document Number Rev
0.1(X00)
QV3
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
BSS138W 1N SOT-323-3 Date: Tuesday, November 08, 2016 Sheet 23 of 70
5 4 3 2 1

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UV1D @

Part 4 of 7
AM6
AN6 IFPA_L3
AP3 IFPA_L3_N AC6
D
AN3 IFPA_L2 NC AJ28 D
AN5 IFPA_L2_N NC AJ4
AM5 IFPA_L1 NC AJ5
AL6 IFPA_L1_N NC AL11
AK6 IFPA_L0 NC C15
IFPA_L0_N NC

NC
AJ6 D19
AH6 IFPA_AUX_SCL NC D20
IFPA_AUX_SDA_N NC D23
NC D26
AJ9 NC
AH9 IFPB_L3
AP6 IFPB_L3_N V32
AP5 IFPB_L2 NC
AM7 IFPB_L2_N
IFPB_L1
trace width: 16mils
AL7
AN8 IFPB_L1_N
IFPB_L0
differential voltage sensing.
AM8
AK8 IFPB_L0_N
IFPB_AUX_SCL
differential signal routing.
AL8
IFPB_AUX_SDA_N L4
VDD_SENSE VCCSENSE_VGA [67]
AK1
[35] IFPC_TX2_P IFPC_L0
AJ1
[35] IFPC_TX2_N IFPC_L0_N
AJ3 L5
[35] IFPC_TX1_P IFPC_L1 GND_SENSE VSSSENSE_VGA [67]
AJ2
[35] IFPC_TX1_N IFPC_L1_N
AH3

TMDS
[35] IFPC_TX0_P IFPC_L2
AH4
[35] IFPC_TX0_N IFPC_L2_N
AG5
[35] IFPC_CLK_P IFPC_L3
AG4
[35] IFPC_CLK_N IFPC_L3_N
C
TEST C

AM1 AK11 TESTMODE

AM2 IFPD_L0 NVJTAG_SEL
IFPD_L0_N

1
AM3 AM10 GPU_JTAG_TCK PAD~D T98 @
AM4 IFPD_L1 JTAG_TCK AM11 GPU_JTAG_TDI PAD~D T99 @
AL3 IFPD_L1_N JTAG_TDI AP12 GPU_JTAG_TDO PAD~D T100 @ RV62
AL4 IFPD_L2 JTAG_TDO AP11 GPU_JTAG_TMS PAD~D T101 @ 10K_0402_5%
AK4 IFPD_L2_N JTAG_TMS AN11 GPU_JTAG_TRST# 1 2

2
AK5 IFPD_L3 JTAG_TRST_N
IFPD_L3_N RV63
10K_0402_5%
AD2
AD3 IFPE_L0
AD1 IFPE_L0_N
AC1 IFPE_L1 SERIAL
AC2 IFPE_L1_N H6 ROM_CS PAD~D T97 @
AC3 IFPE_L2 ROM_CS_N H4 ROM_SCLK
IFPE_L2_N ROM_SCLK ROM_SCLK [30]
AC4 H5 ROM_SI
IFPE_L3 ROM_SI ROM_SI [30]
AC5 H7 ROM_SO
IFPE_L3_N ROM_SO ROM_SO [30]
+1.8V_GFX_AON +3VS
+1.8V_GFX_AON +1.8V_GFX_AON AE3
AE4 IFPF_L0
IFPF_L0_N

2
AF4 @
AF5 IFPF_L1 RV34 RV613
AD4 IFPF_L1_N GENERAL 10K_0402_5% 10K_0402_5%
IFPF_L2
1

AD5 E1
RV588 RV589 AG1 IFPF_L2_N BUFRST_N

1
10K_0402_5% 10K_0402_5% AF1 IFPF_L3 M1
B IFPF_L3_N OVERT THERMATRIP_GPU# [23] B
2

QV90A
2

6 1 IFPC_I2C_CLK AG3
[35,36] DDC_CLK_HDMI IFPC_AUX_SCL
IFPC_I2C_DAT AG2
IFPC_AUX_SDA_N
5

QV90B DMN61D9UDW-7 2N SOT363-6 J2 STRAP0

STRAP0 STRAP0 [30]
SB00001GW00 J7 STRAP1
STRAP1 STRAP1 [30]
3 4 AK3 J6 STRAP2
[35,36] DDC_DAT_HDMI IFPD_AUX_SCL STRAP2 STRAP2 [30]
AK2 J5 STRAP3
IFPD_AUX_SDA_N STRAP3 STRAP3 [30]
DMN61D9UDW-7 2N SOT363-6 J3 STRAP4
STRAP4 STRAP4 [30]
SB00001GW00 J1 STRAP5
STRAP5 STRAP5 [30]
AB3
AB4 IFPE_AUX_SCL
[35] IFPC_I2C_CLK IFPE_AUX_SDA_N K3
THERMDP K4
[35] IFPC_I2C_DAT THERMDN
AF3
AF2 IFPF_AUX_SCL
IFPF_AUX_SDA_N

N17P-GT_BGA908

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/09/09 Deciphered Date 2014/09/09 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P_eDP/HDMI/mDP

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.1(X00)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 24 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

+1VS_GFX
Under GPU Near GPU 3A

10U_0603_6.3V6M

22U_0603_6.3V6M
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
1 1 1 1 1 1 2 1

CV87

CV88

CV89

CV90

CV91

CV92

CV93
UV1E @

CV96
+1.35VS_VGA Part 5 of 7
11A Near GPU 2 2 2 2 2 2 1 2
AA27 AG19
AA30 FBVDDQ_0 PEX_DVDD_0 AG21
FBVDDQ_1 PEX_DVDD_1

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
AB27 AG22
D AB33 FBVDDQ_2 PEX_DVDD_2 AG24 D
1 1 1 1 1 2 2 FBVDDQ_3 PEX_DVDD_3

CV79

CV80
AC27 AH21
FBVDDQ_4 PEX_DVDD_4

CV83

CV834

CV85

CV84

CV86
AD27 AH25
AE27 FBVDDQ_5 PEX_DVDD_5 +1.8V_GFX_RUN
2 2 2 2 2 1 1 AF27 FBVDDQ_6
FBVDDQ_7
Under GPU Near GPU 1A
AG27 AG13
B13 FBVDDQ_8 PEX_HVDD_0 AG15
FBVDDQ_9 PEX_HVDD_1

10U_0603_6.3V6M

10U_0603_6.3V6M

22U_0603_6.3V6M
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
B19 AG16
FBVDDQ_11 PEX_HVDD_2

CV95
E13 AG18 1 1 1 1 1 1 2 2 1
FBVDDQ_12 PEX_HVDD_3

CV835

CV836

CV837

CV838

CV839

CV840

CV94
E19 AG25
FBVDDQ_14 PEX_HVDD_4

CV97
H10 AH15
H11 FBVDDQ_15 PEX_HVDD_5 AH18
H12 FBVDDQ_16 PEX_HVDD_6 AH26 2 2 2 2 2 2 1 1 2
+1.35VS_VGA H13 FBVDDQ_17 PEX_HVDD_7 AH27
Under GPU(below 150mils) H14 FBVDDQ_18
FBVDDQ_19
PEX_HVDD_8
PEX_HVDD_9
AJ27
H18 AK27
H19 FBVDDQ_22 PEX_HVDD_10 AL27
FBVDDQ_23 PEX_HVDD_11
10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
H20 AM28

POWER
H21 FBVDDQ_24 PEX_HVDD_12 AN28
2 2 1 1 1 1 1 1 FBVDDQ_25 PEX_HVDD_13
CV841

CV842

CV100

CV101

CV102

CV103

CV112

CV113
H22
H23 FBVDDQ_26 +1.8V_GFX_RUN

1 1 2 2 2 2 2 2
H24 FBVDDQ_27
FBVDDQ_28
Near GPU RV590
H8 AH12 +PEX_PLL_HVDD 1 @ 2
H9 FBVDDQ_29 PEX_PLL_HVDD +1.8V_GFX_AON
FBVDDQ_30

0.1U_0402_10V7K
L27 0_0402_5% Pilot_05
M27 FBVDDQ_31
FBVDDQ_32 1 Under GPU Near GPU

CV114
N27 AG12
P27 FBVDDQ_33 NC
FBVDDQ_34

0.1U_0402_10V7K

0.1U_0402_10V7K

1U_0402_6.3V6K

4.7U_0603_6.3V6K
R27
T27 FBVDDQ_35 2
FBVDDQ_36 1 1 1 1
+1.35VS_VGA

CV843

CV202

CV214

CV213
T30 AG26
Under GPU(below 150mils) T33 FBVDDQ_37
FBVDDQ_38
NC
+1.8V_GFX_AON
Y27
FBVDDQ_43 2 2 2 2
+1.8V_GFX_RUN
10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
J8
C 1V8_AON K8 C
2 2 1 1 1 1 1 1 1V8_AON Under GPU Near GPU
CV844

CV845

CV211

CV210

CV209

CV206

CV207

CV208
L8
B16 VDD18 M8
E16 FBVDDQ VDD18
1 1 2 2 2 2 2 2 FBVDDQ

0.1U_0402_10V7K

0.1U_0402_10V7K

1U_0402_6.3V6K

4.7U_0603_6.3V6K
H15
H16 FBVDDQ @ PAD~D
FBVDDQ 1 1 1 1

CV117

CV118

CV119

CV120
V27 AH8 TV107
W27 FBVDDQ IFPAB_PLLVDD AJ8
W30 FBVDDQ IFPAB_RSET
W33 FBVDDQ
FBVDDQ
330mA 2 2 2 2
+1.8V_PLLVDD
AF7 +IFP_PLLVDD
IFPCD_PLLVDD AF8
IFPCD_RSET Under RV592

1
@ PAD~D +IFP_PLLVDD 1 @ 2
AB8 TV106 RV591
IFPEF_PLVDD

0.1U_0402_10V7K
AD6 1K_0402_1% 0_0402_5% Pilot_05
[61] FBVDDQ_SENSE
W=10mils F1
FBVDDQ_SENSE
IFPEF_RSET
1

CV846
+1.35VS_VGA F2 AG8 IFP_IOVDDA
PROBE_FB_GND IFP_IOVDD AG9 +1VS_GFX 2
IFP_IOVDD Under GPU Near GPU
1 2 J27
FB_CAL_PD_VDDQ IFP_IOVDD
AF6 305mA
RV77 40.2_0402_1% AG6
CALIBRATION PIN GDDR5 IFP_IOVDD

0.1U_0402_10V7K

0.1U_0402_10V7K

1U_0402_6.3V6K

4.7U_0603_6.3V6K
1 2 H27 AC7 IFP_IOVDDB
FB_CAL_x_PD_VDDQ 40.2 ohm RV78 40.2_0402_1% FB_CAL_PU_GND IFP_IOVDD AC8
1 1 1 1
IFP_IOVDD

CV847

CV850

CV848

CV849
FB_CAL_x_PU_GND 40.2 ohm 1 2 H25
RV79 60.4_0402_1% FB_CAL_TERM_GND AG7 2 2 2 2
FB_CAL_xTERM_GND 60.4 ohm NC AN2
NC
Place near balls
B N17P-GT_BGA908 B

+1VS_GFX

@ RV199
Under GPU Near GPU 0_0603_5%
IFP_IOVDDA 1 2

0.1U_0402_10V7K

0.1U_0402_10V7K

1U_0402_6.3V6K

4.7U_0603_6.3V6K
1 1 1 1

CV909

CV910

CV911

CV912
2 2 2 2
@ @ @ @

@ RV200
Under GPU Near GPU 0_0603_5%
IFP_IOVDDB 1 2
0.1U_0402_10V7K

0.1U_0402_10V7K

1U_0402_6.3V6K

4.7U_0603_6.3V6K
1 1 1 1
CV913

CV914

CV915

CV916
2 2 2 2
@ @ @ @
A A

Reserve

Security Classification
2013/09/09
Compal Secret Data
2014/09/09 Title
Compal Electronics, Inc.
Issued Date

WWW.ALISALER.COM
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P_Power
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
0.1(X00)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 25 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

UV1F @

Part 6 of 7
A2 D2
AA17 GND_0 GND_100 D31
AA18 GND_1 GND_101 D33
AA20 GND_2 GND_102 E10
AA22 GND_3 GND_103 E22
AB12 GND_4 GND_104 E25
AB14 GND_5 GND_105 E5
+GPU_CORE AB16 GND_6 GND_106 E7
47A +GPU_CORE UV1G @ AB19 GND_7
GND_8
GND_107
GND_108
F28
AB2 F7
AB21 GND_9 GND_109 G10
AA14 Part 7 of 7 V17 A33 GND_10 GND_110 G13
AA21 VDD_1 VDD_56 V20 AB23 GND_11 GND_111 G16
D
AB13 VDD_4 VDD_58 V22 AB28 GND_12 GND_112 G19 D
AB15 VDD_6 VDD_59 W12 AB30 GND_13 GND_113 G2
AB17 VDD_7 VDD_60 W16 AB32 GND_14 GND_114 G22
AB18 VDD_8 VDD_62 W19 AB5 GND_15 GND_115 G25
AB20 VDD_9 VDD_63 W23 AB7 GND_16 GND_116 G28
AB22 VDD_10 VDD_65 Y13 AC13 GND_17 GND_117 G3
AC12 VDD_11 VDD_66 Y15 AC15 GND_18 GND_118 G30
AC16 VDD_12 VDD_67 Y17 AC17 GND_19 GND_119 G32
AC19 VDD_14 VDD_68 Y18 AC18 GND_20 GND_120 G33
AC23 VDD_15 VDD_69 Y20 AA13 GND_21 GND_121 G5
M12 VDD_17 VDD_70 Y22 AC20 GND_22 GND_122 G7
M16 VDD_18 VDD_71 AC22 GND_23 GND_123 K2
M19 VDD_20 AE2 GND_24 GND_124 K28
M23 VDD_21 AE28 GND_25 GND_125 K30
N13 VDD_23
VDD_24 VDDS_SENSE
U1 W=10mils VDDS_SENSE_VGA [68]
AE30 GND_26
GND_27
GND_126
GND_127
K32
N15 U2 AE32 K33
N17 VDD_25 GNDS_SENSE GNDS_SENSE_VGA [68] AE33 GND_28 GND_128 K5
N18 VDD_26 +GPU_CORE AE5 GND_29 GND_129 K7
N20 VDD_27 AE7 GND_30 GND_130 M13
N22 VDD_28 U4 AH10 GND_31 GND_131 M15

POWER
P14 VDD_29 XVDD_4 U5 AA15 GND_32 GND_132 M17
P21 VDD_31 XVDD_5 U6 AH13 GND_33 GND_133 M18
R13 VDD_34 XVDD_6 U7 AH16 GND_34 GND_134 M20
R15 VDD_36 XVDD_7 U8 AH19 GND_35 GND_135 M22
R17 VDD_37 XVDD_8 AH2 GND_36 GND_136 N12
R18 VDD_38 AH22 GND_37 GND_137 N14
R20 VDD_39 V1 AH24 GND_38 GND_138 N16
R22 VDD_40 XVDD_9 V2 AH28 GND_39 GND_139 N19
T12 VDD_41 XVDD_10 V3 AH29 GND_40 GND_140 N2
T16 VDD_42 XVDD_11 V4 AH30 GND_41 GND_141 N21
T19 VDD_44 XVDD_12 V5 AH32 GND_42 GND_142 N23
T23 VDD_45 XVDD_13 V6 AH33 GND_43 GND_143 N28

GND
U13 VDD_47 XVDD_14 V7 AH5 GND_44 GND_144 N30
U15 VDD_48 XVDD_15 V8 AH7 GND_45 GND_145 N32
U18 VDD_49 XVDD_16 AJ7 GND_46 GND_146 N33
U20 VDD_51 AK10 GND_47 GND_147 N5
U22 VDD_52 W2 AK7 GND_48 GND_148 N7
V13 VDD_53 XVDD_17 W3 AL12 GND_49 GND_149 P13
C C
V15 VDD_54 XVDD_18 W4 AL14 GND_50 GND_150 P15
VDD_55 XVDD_19 W5 AL15 GND_51 GND_151 P17
19A +GPU_CORE_VDDS XVDD_20
XVDD_21
W7 AL17 GND_52
GND_53
GND_152
GND_153
P18
W8 AL18 P20
XVDD_22 AL2 GND_54 GND_154 P22
AA12 AL20 GND_55 GND_155 R12
AA16 VDDS Y1 AL21 GND_56 GND_156 R14
AA19 VDDS NC Y2 AL23 GND_57 GND_157 R16
AA23 VDDS NC Y3 AL24 GND_58 GND_158 R19
AC14 VDDS NC Y4 AL26 GND_59 GND_159 R21
AC21 VDDS XVDD_23 Y5 AL28 GND_60 GND_160 R23
M14 VDDS XVDD_24 Y6 AL30 GND_61 GND_161 T13
M21 VDDS XVDD_25 Y7 AL32 GND_62 GND_162 T15
P12 VDDS XVDD_26 Y8 AL33 GND_63 GND_163 T17
P16 VDDS XVDD_27 AL5 GND_64 GND_164 T18
P19 VDDS AM13 GND_65 GND_165 T2
P23 VDDS AA1 AM16 GND_66 GND_166 T20
T14 VDDS NC AA2 AM19 GND_67 GND_167 T22
T21 VDDS NC AA3 AM22 GND_68 GND_168 AG11
U17 VDDS NC AA4 AM25 GND_69 GND_169 T28
V18 VDDS NC AA5 AN1 GND_70 GND_170 T32
W14 VDDS NC AA6 AN10 GND_71 GND_171 T5
W21 VDDS NC AA7 AN13 GND_72 GND_172 T7
VDDS NC AA8 AN16 GND_73 GND_173 U12
NC AN19 GND_74 GND_174 U14
AN22 GND_75 GND_175 U16
AN25 GND_76 GND_176 U19
N17P-GT_BGA908 AN30 GND_77 GND_177 U21
AN34 GND_78 GND_178 U23
AN4 GND_79 GND_179 V12
AN7 GND_80 GND_180 V14
AP2 GND_81 GND_181 V16
AP33 GND_82 GND_182 V19
B1 GND_83 GND_183 V21
B10 GND_84 GND_184 V23
B22 GND_85 GND_185 W13
B25 GND_86 GND_186 W15
B
B28 GND_87 GND_187 W17 B
B31 GND_88 GND_188 W18
B34 GND_89 GND_189 W20
B4 GND_90 GND_190 W22
B7 GND_91 GND_191 W28
C10 GND_92 GND_192 Y12
C13 GND_93 GND_193 Y14
C19 GND_94 GND_194 Y16
C22 GND_95 GND_195 Y19
C25 GND_96 GND_196 Y21
C28 GND_97 GND_197 Y23
C7 GND_98 GND_198 AH11
GND_99 GND_199 C16
GND_OPT W32
GND_OPT

N17P-GT_BGA908

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/09/09 Deciphered Date 2014/09/09 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P_VGA CORE/GND
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 26 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

FBA_D[0..63]
[28] FBA_D[0..63] FBC_D[0..63]
[29] FBC_D[0..63]

UV1B @ PU for X32 mode PU for X32 mode

UV1C @
Part 2 of 7
FBA_D0 L28 U30 FBA_CS#_L Part 3 of 7
FBA_D1 M29 FBA_D0 FBA_CMD0 T31 FBA_MA3_BA3_L FBA_CS#_L [28] FBC_D0 G9 D13 FBC_CS#_L
FBA_D2 L29 FBA_D1 FBA_CMD1 U29 FBA_MA2_BA0_L FBA_MA3_BA3_L [28] FBC_D1 E9 FBB_D0 FBB_CMD0 E14 FBC_MA3_BA3_L FBC_CS#_L [29]
FBA_D3 M28 FBA_D2 FBA_CMD2 R34 FBA_MA4_BA2_L FBA_MA2_BA0_L [28] FBC_D2 G8 FBB_D1 FBB_CMD1 F14 FBC_MA2_BA0_L FBC_MA3_BA3_L [29]
FBA_D4 N31 FBA_D3 FBA_CMD3 R33 FBA_MA5_BA1_L FBA_MA4_BA2_L [28] FBC_D3 F9 FBB_D2 FBB_CMD2 A12 FBC_MA4_BA2_L FBC_MA2_BA0_L [29]
D FBA_D5 P29 FBA_D4 FBA_CMD4 U32 FBA_WE#_L FBA_MA5_BA1_L [28] +1.35VS_VGA FBC_D4 F11 FBB_D3 FBB_CMD3 B12 FBC_MA5_BA1_L FBC_MA4_BA2_L [29] D
FBA_D6 R29 FBA_D5 FBA_CMD5 U33 FBA_MA7_MA8_L FBA_WE#_L [28] FBC_D5 G11 FBB_D4 FBB_CMD4 C14 FBC_WE#_L FBC_MA5_BA1_L [29] +1.35VS_VGA
FBA_D7 P28 FBA_D6 FBA_CMD6 U28 FBA_MA6_MA11_L FBA_MA7_MA8_L [28] FBC_D6 F12 FBB_D5 FBB_CMD5 B14 FBC_MA7_MA8_L FBC_WE#_L [29]
FBA_D7 FBA_CMD7 FBA_MA6_MA11_L [28] FBB_D6 FBB_CMD6 FBC_MA7_MA8_L [29]

1
FBA_D8 J28 V28 FBA_ABI#_L FBC_D7 G12 G15 FBC_MA6_MA11_L
FBA_D8 FBA_CMD8 FBA_ABI#_L [28] FBB_D7 FBB_CMD7 FBC_MA6_MA11_L [29]

1
FBA_D9 H29 V29 FBA_MA12_RFU_L RV95 FBC_D8 G6 F15 FBC_ABI#_L
FBA_D10 J29 FBA_D9 FBA_CMD9 V30 FBA_MA0_MA10_L FBA_MA12_RFU_L [28] FBC_D9 F5 FBB_D8 FBB_CMD8 E15 FBC_MA12_RFU_L FBC_ABI#_L [29]
10K_0402_5% RV96
FBA_D11 H28 FBA_D10 FBA_CMD10 U34 FBA_MA1_MA9_L FBA_MA0_MA10_L [28] FBC_D10 E6 FBB_D9 FBB_CMD9 D15 FBC_MA0_MA10_L FBC_MA12_RFU_L [29]
FBA_D11 FBA_CMD11 FBA_MA1_MA9_L [28] FBB_D10 FBB_CMD10 FBC_MA0_MA10_L [29] 10K_0402_5%
FBA_D12 G29 U31 FBA_RAS#_L FBC_D11 F6 A14 FBC_MA1_MA9_L

2
FBA_D13 E31 FBA_D12 FBA_CMD12 V34 FBA_RST#_L FBA_RAS#_L [28] FBC_D12 F4 FBB_D11 FBB_CMD11 D14 FBC_RAS#_L FBC_MA1_MA9_L [29]

2
FBA_D14 E32 FBA_D13 FBA_CMD13 V33 FBA_CKE_L FBA_RST#_L [28] FBC_D13 G4 FBB_D12 FBB_CMD12 A15 FBC_RST#_L FBC_RAS#_L [29]
FBA_D15 F30 FBA_D14 FBA_CMD14 Y32 FBA_CAS#_L FBA_CKE_L [28] FBC_D14 E2 FBB_D13 FBB_CMD13 B15 FBC_CKE_L FBC_RST#_L [29]
FBA_D16 C34 FBA_D15 FBA_CMD15 AA31 FBA_CS#_H FBA_CAS#_L [28] FBC_D15 F3 FBB_D14 FBB_CMD14 C17 FBC_CAS#_L FBC_CKE_L [29]
FBA_D17 D32 FBA_D16 FBA_CMD16 AA29 FBA_MA3_BA3_H FBA_CS#_H [28] FBC_D16 C2 FBB_D15 FBB_CMD15 D18 FBC_CS#_H FBC_CAS#_L [29]
FBA_D18 B33 FBA_D17 FBA_CMD17 AA28 FBA_MA2_BA0_H FBA_MA3_BA3_H [28] FBC_D17 D4 FBB_D16 FBB_CMD16 E18 FBC_MA3_BA3_H FBC_CS#_H [29]
FBA_D19 C33 FBA_D18 FBA_CMD18 AC34 FBA_MA4_BA2_H FBA_MA2_BA0_H [28] FBC_D18 D3 FBB_D17 FBB_CMD17 F18 FBC_MA2_BA0_H FBC_MA3_BA3_H [29]
FBA_D20 F33 FBA_D19 FBA_CMD19 AC33 FBA_MA5_BA1_H FBA_MA4_BA2_H [28] FBC_D19 C1 FBB_D18 FBB_CMD18 A20 FBC_MA4_BA2_H FBC_MA2_BA0_H [29]
FBA_D21 F32 FBA_D20 FBA_CMD20 AA32 FBA_WE#_H FBA_MA5_BA1_H [28] +1.35VS_VGA FBC_D20 B3 FBB_D19 FBB_CMD19 B20 FBC_MA5_BA1_H FBC_MA4_BA2_H [29]
FBA_D22 H33 FBA_D21 FBA_CMD21 AA33 FBA_MA7_MA8_H FBA_WE#_H [28] FBC_D21 C4 FBB_D20 FBB_CMD20 C18 FBC_WE#_H FBC_MA5_BA1_H [29] +1.35VS_VGA
FBA_D23 H32 FBA_D22 FBA_CMD22 Y28 FBA_MA6_MA11_H FBA_MA7_MA8_H [28] FBC_D22 B5 FBB_D21 FBB_CMD21 B18 FBC_MA7_MA8_H FBC_WE#_H [29]
FBA_D23 FBA_CMD23 FBA_MA6_MA11_H [28] FBB_D22 FBB_CMD22 FBC_MA7_MA8_H [29]

1
FBA_D24 P34 Y29 FBA_ABI#_H FBC_D23 C5 G18 FBC_MA6_MA11_H
FBA_D24 FBA_CMD24 FBA_ABI#_H [28] FBB_D23 FBB_CMD23 FBC_MA6_MA11_H [29]

1
FBA_D25 P32 W31 FBA_MA12_RFU_H RV98 FBC_D24 A11 G17 FBC_ABI#_H
FBA_D26 P31 FBA_D25 FBA_CMD25 Y30 FBA_MA0_MA10_H FBA_MA12_RFU_H [28] FBC_D25 C11 FBB_D24 FBB_CMD24 F17 FBC_MA12_RFU_H FBC_ABI#_H [29]
10K_0402_5% RV99
FBA_D27 P33 FBA_D26 FBA_CMD26 AA34 FBA_MA1_MA9_H FBA_MA0_MA10_H [28] FBC_D26 D11 FBB_D25 FBB_CMD25 D16 FBC_MA0_MA10_H FBC_MA12_RFU_H [29]
FBA_D27 FBA_CMD27 FBA_MA1_MA9_H [28] FBB_D26 FBB_CMD26 FBC_MA0_MA10_H [29] 10K_0402_5%
FBA_D28 L31 Y31 FBA_RAS#_H FBC_D27 B11 A18 FBC_MA1_MA9_H

MEMORY INTERFACE B
2
FBA_D29 L34 FBA_D28 FBA_CMD28 Y34 FBA_RST#_H FBA_RAS#_H [28] FBC_D28 D8 FBB_D27 FBB_CMD27 D17 FBC_RAS#_H FBC_MA1_MA9_H [29]

2
FBA_D30 L32 FBA_D29 FBA_CMD29 Y33 FBA_CKE_H FBA_RST#_H [28] FBC_D29 A8 FBB_D28 FBB_CMD28 A17 FBC_RST#_H FBC_RAS#_H [29]
FBA_D31 L33 FBA_D30 FBA_CMD30 V31 FBA_CAS#_H FBA_CKE_H [28] FBC_D30 C8 FBB_D29 FBB_CMD29 B17 FBC_CKE_H FBC_RST#_H [29]
FBA_D32 AG28 FBA_D31 FBA_CMD31 R28 FBA_CAS#_H [28] FBC_D31 B8 FBB_D30 FBB_CMD30 E17 FBC_CAS#_H FBC_CKE_H [29]
FBA_D33 AF29 FBA_D32 FBA_CMD32 AC28 FBC_D32 F24 FBB_D31 FBB_CMD31 G14 FBC_CAS#_H [29]

MEMORY INTERFACE
FBA_D34 AG29 FBA_D33 FBA_CMD33 R32 @ RV602 1 2 60.4_0402_1% FBC_D33 G23 FBB_D32 FBB_CMD32 G20
FBA_D34 FBA_CMD34 +1.35VS_VGA FBB_D33 FBB_CMD33
FBA_D35 AF28 AC32 @ RV603 1 2 60.4_0402_1% FBC_D34 E24 C12 @ RV604 1 2 60.4_0402_1%
FBA_D35 FBA_CMD35 FBB_D34 FBB_CMD34 +1.35VS_VGA
FBA_D36 AD30 FBC_D35 G24 C20 @ RV605 1 2 60.4_0402_1%
C FBA_D37 AD29 FBA_D36 FBC_D36 D21 FBB_D35 FBB_CMD35 C
FBA_D38 AC29 FBA_D37 FBC_D37 E21 FBB_D36
FBA_D39 AD28 FBA_D38 FBC_D38 G21 FBB_D37
FBA_D40 AJ29 FBA_D39 FBC_D39 F21 FBB_D38
FBA_D41 AK29 FBA_D40 FBC_D40 G27 FBB_D39
FBA_D42 AJ30 FBA_D41 FBC_D41 D27 FBB_D40
FBA_D43 AK28 FBA_D42 FBC_D42 G26 FBB_D41
FBA_D44 AM29 FBA_D43 FBC_D43 E27 FBB_D42
FBA_D45 AM31 FBA_D44 R30 FBA_CLK0 FBC_D44 E29 FBB_D43
FBA_D46 AN29 FBA_D45 FBA_CLK0 R31 FBA_CLK0# FBA_CLK0 [28] FBC_D45 F29 FBB_D44 D12 FBC_CLK0
FBA_D47 AM30 FBA_D46 FBA_CLK0_N AB31 FBA_CLK1 FBA_CLK0# [28] FBC_D46 E30 FBB_D45 FBB_CLK0 E12 FBC_CLK0# FBC_CLK0 [29]
FBA_D48 AN31 FBA_D47 FBA_CLK1 AC31 FBA_CLK1# FBA_CLK1 [28] FBC_D47 D30 FBB_D46 FBB_CLK0_N E20 FBC_CLK1 FBC_CLK0# [29]
FBA_D49 AN32 FBA_D48 A FBA_CLK1_N FBA_CLK1# [28] FBC_D48 A32 FBB_D47 FBB_CLK1 F20 FBC_CLK1# FBC_CLK1 [29]
FBA_D50 AP30 FBA_D49 FBC_D49 C31 FBB_D48 FBB_CLK1_N FBC_CLK1# [29]
FBA_D51 AP32 FBA_D50 FBC_D50 C32 FBB_D49
FBA_D52 AM33 FBA_D51 K31 FBA_WCK0 FBC_D51 B32 FBB_D50
FBA_D53 AL31 FBA_D52 FBA_WCK01 L30 FBA_WCK0_N FBA_WCK0 [28] FBC_D52 D29 FBB_D51 F8 FBC_WCK0
FBA_D54 AK33 FBA_D53 FBA_WCK01_N H34 FBA_WCK1 FBA_WCK0_N [28] FBC_D53 A29 FBB_D52 FBB_WCK01 E8 FBC_WCK0_N FBC_WCK0 [29]
FBA_D55 AK32 FBA_D54 FBA_WCK23 J34 FBA_WCK1_N FBA_WCK1 [28] FBC_D54 C29 FBB_D53 FBB_WCK01_N A5 FBC_WCK1 FBC_WCK0_N [29]
FBA_D56 AD34 FBA_D55 FBA_WCK23_N AG30 FBA_WCK2 FBA_WCK1_N [28] FBC_D55 B29 FBB_D54 FBB_WCK23 A6 FBC_WCK1_N FBC_WCK1 [29]
FBA_D57 AD32 FBA_D56 FBA_WCK45 AG31 FBA_WCK2_N FBA_WCK2 [28] FBC_D56 B21 FBB_D55 FBB_WCK23_N D24 FBC_WCK2 FBC_WCK1_N [29]
FBA_D58 AC30 FBA_D57 FBA_WCK45_N AJ34 FBA_WCK3 FBA_WCK2_N [28] FBC_D57 C23 FBB_D56 FBB_WCK45 D25 FBC_WCK2_N FBC_WCK2 [29]
FBA_D59 AD33 FBA_D58 FBA_WCK67 AK34 FBA_WCK3_N FBA_WCK3 [28] FBC_D58 A21 FBB_D57 FBB_WCK45_N B27 FBC_WCK3 FBC_WCK2_N [29]
FBA_D60 AF31 FBA_D59 FBA_WCK67_N FBA_WCK3_N [28] FBC_D59 C21 FBB_D58 FBB_WCK67 C27 FBC_WCK3_N FBC_WCK3 [29]
FBA_D61 AG34 FBA_D60 FBC_D60 B24 FBB_D59 FBB_WCK67_N FBC_WCK3_N [29]
FBA_D62 AG32 FBA_D61 FBC_D61 C24 FBB_D60
FBA_D63 AG33 FBA_D62 J30 FBC_D62 B26 FBB_D61
FBA_D63 FBA_WCKB01 J31 FBC_D63 C26 FBB_D62 D6
FBA_DBI0# P30 FBA_WCKB01_N J32 FBB_D63 FBB_WCKB01 D7
[28] FBA_DBI0# FBA_DQM0 FBA_WCKB23 FBB_WCKB01_N
FBA_DBI1# F31 J33 FBC_DBI0# E11 C6
[28] FBA_DBI1# FBA_DQM1 FBA_WCKB23_N [29] FBC_DBI0# FBB_DQM0 FBB_WCKB23
FBA_DBI2# F34 AH31 FBC_DBI1# E3 B6
[28] FBA_DBI2# FBA_DQM2 FBA_WCKB45 [29] FBC_DBI1# FBB_DQM1 FBB_WCKB23_N
FBA_DBI3# M32 AJ31 FBC_DBI2# A3 F26
B
[28] FBA_DBI3# FBA_DQM3 FBA_WCKB45_N [29] FBC_DBI2# FBB_DQM2 FBB_WCKB45
FBA_DBI4# AD31 AJ32 FBC_DBI3# C9 E26 B
[28] FBA_DBI4# FBA_DQM4 FBA_WCKB67 [29] FBC_DBI3# FBB_DQM3 FBB_WCKB45_N
FBA_DBI5# AL29 AJ33 FBC_DBI4# F23 A26
[28] FBA_DBI5# FBA_DQM5 FBA_WCKB67_N [29] FBC_DBI4# FBB_DQM4 FBB_WCKB67
FBA_DBI6# AM32 FBC_DBI5# F27 A27
[28] FBA_DBI6# FBA_DQM6 [29] FBC_DBI5# FBB_DQM5 FBB_WCKB67_N
FBA_DBI7# AF34 FBC_DBI6# C30
[28] FBA_DBI7# FBA_DQM7 [29] FBC_DBI6# FBB_DQM6
FBC_DBI7# A24
[29] FBC_DBI7# FBB_DQM7
FBA_EDC0 M31
FBA_EDC1 G31 FBA_DQS_WP0 FBC_EDC0 D10
[28] FBA_EDC[7..0] FBA_EDC2 E33 FBA_DQS_WP1
FBA_DQS_WP2
+FB_PLLAVDD
50mA FBC_EDC1 D5 FBB_DQS_WP0
FBB_DQS_WP1
FBA_EDC3 M33 CV152 0.1U_0402_10V7K FBC_EDC2 C3
FBA_EDC4 AE31 FBA_DQS_WP3 K27 1 2 [29] FBC_EDC[7..0] FBC_EDC3 B9 FBB_DQS_WP2
FBA_EDC5 AK30 FBA_DQS_WP4 FB_REFPLL_AVDD +FB_PLLAVDD FBC_EDC4 E23 FBB_DQS_WP3 H17
FBA_DQS_WP5 +1.8V_GFX_RUN FBB_DQS_WP4 FBB_PLL_AVDD +FB_PLLAVDD

0.1U_0402_10V7K
FBA_EDC6 AN33 FBC_EDC5 E28
FBA_DQS_WP6 Place close to ball FBB_DQS_WP5

CV153
FBA_EDC7 AF33 LV13 FBC_EDC6 B30 1
FBA_DQS_WP7
FBA_PLL_AVDD
U27 1 2 FBC_EDC7 A23 FBB_DQS_WP6
FBB_DQS_WP7
120mA
22U_0603_6.3V6M
0.1U_0402_10V7K

M30
FBA_DQS_RN0 120mA 300mA
CV154

CV156

H30 1 1 BLM15AX300SN1D D9
E34 FBA_DQS_RN1 E4 FBB_DQS_RN0 2
M34 FBA_DQS_RN2 H31 B2 FBB_DQS_RN1
AF30 FBA_DQS_RN3 FB_VREF A9 FBB_DQS_RN2
AK31 FBA_DQS_RN4 2 2 D22 FBB_DQS_RN3
AM34 FBA_DQS_RN5 D28 FBB_DQS_RN4
AF32 FBA_DQS_RN6
FBA_DQS_RN7
A30 FBB_DQS_RN5
FBB_DQS_RN6
Place close to ball
B23
FBB_DQS_RN7
Place close to ball Place close to BGA
N17P-GT_BGA908
N17P-GT_BGA908

FBA_RST#_L FBC_RST#_L
FBA_RST#_H FBC_RST#_H
1

1
A A
RV107 RV108 RV110 RV111
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/09/09 Deciphered Date 2014/09/09 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P_MEM Interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF Size
R&D Document Number Rev
0.1(X00)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 27 of 70
5 4 3 2 1

WWW.ALISALER.COM
 WWW.AliFixit.COM
5 4 3 2 1

Memory Partition A - Lower 32 bits MF=0 MF=1

UV6 UV7

FBA_D[0..63] MF=0 MF=1 MF=1 MF=0 MF=0 MF=1 MF=1 MF=0

[27] FBA_D[0..63]
FBA_EDC[7..0] A4 FBA_D0 A4 FBA_D56
[27] FBA_EDC[7..0] DQ24 DQ0 DQ24 DQ0
FBA_EDC0 C2 A2 FBA_D1 FBA_EDC7 C2 A2 FBA_D57
FBA_EDC1 C13 EDC0 EDC3 DQ25 DQ1 B4 FBA_D2 FBA_EDC6 C13 EDC0 EDC3 DQ25 DQ1 B4 FBA_D58
FBA_EDC2 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D3 FBA_EDC5 R13 EDC1 EDC2 DQ26 DQ2 B2 FBA_D59
FBA_EDC3 R2 EDC2 EDC1 DQ27 DQ3 E4 FBA_D4 FBA_EDC4 R2 EDC2 EDC1 DQ27 DQ3 E4 FBA_D60
EDC3 EDC0 DQ28 DQ4 BYTE0 EDC3 EDC0 DQ28 DQ4 BYTE7
E2 FBA_D5 E2 FBA_D61
DQ29 DQ5 F4 FBA_D6 DQ29 DQ5 F4 FBA_D62
FBA_DBI0# D2 DQ30 DQ6 F2 FBA_D7 FBA_DBI7# D2 DQ30 DQ6 F2 FBA_D63
[27] FBA_DBI0# DBI0# DBI3# DQ31 DQ7 [27] FBA_DBI7# DBI0# DBI3# DQ31 DQ7
FBA_DBI1# D13 A11 FBA_D8 FBA_DBI6# D13 A11 FBA_D48
[27] FBA_DBI1# P13 DBI1# DBI2# DQ16 DQ8 A13 [27] FBA_DBI6# P13 DBI1# DBI2# DQ16 DQ8 A13
FBA_DBI2# FBA_D9 FBA_DBI5# FBA_D49
[27] FBA_DBI2# DBI2# DBI1# DQ17 DQ9 [27] FBA_DBI5# DBI2# DBI1# DQ17 DQ9
FBA_DBI3# P2 B11 FBA_D10 FBA_DBI4# P2 B11 FBA_D50
D [27] FBA_DBI3# DBI3# DBI0# DQ18 DQ10 [27] FBA_DBI4# DBI3# DBI0# DQ18 DQ10 D
B13 FBA_D11 BYTE1 B13 FBA_D51
FBA_CLK0 J12 DQ19 DQ11 E11 FBA_D12 FBA_CLK1 J12 DQ19 DQ11 E11 FBA_D52
[27] FBA_CLK0 CK DQ20 DQ12 [27] FBA_CLK1 CK DQ20 DQ12 BYTE6
FBA_CLK0# J11 E13 FBA_D13 FBA_CLK1# J11 E13 FBA_D53
[27] FBA_CLK0# J3 CK# DQ21 DQ13 F11 [27] FBA_CLK1# J3 CK# DQ21 DQ13 F11
FBA_CKE_L FBA_D14 FBA_CKE_H FBA_D54
[27] FBA_CKE_L CKE# DQ22 DQ14 [27] FBA_CKE_H CKE# DQ22 DQ14
F13 FBA_D15 F13 FBA_D55
DQ23 DQ15 U11 FBA_D16 DQ23 DQ15 U11 FBA_D40
FBA_MA2_BA0_L H11 DQ8 DQ16 U13 FBA_D17 FBA_MA4_BA2_H H11 DQ8 DQ16 U13 FBA_D41
[27] FBA_MA2_BA0_L BA0/A2 BA2/A4 DQ9 DQ17 [27] FBA_MA4_BA2_H BA0/A2 BA2/A4 DQ9 DQ17
FBA_MA5_BA1_L K10 T11 FBA_D18 FBA_MA3_BA3_H K10 T11 FBA_D42
[27] FBA_MA5_BA1_L K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 [27] FBA_MA3_BA3_H K11 BA1/A5 BA3/A3 DQ10 DQ18 T13
FBA_MA4_BA2_L FBA_D19 BYTE2 FBA_MA2_BA0_H FBA_D43
[27] FBA_MA4_BA2_L BA2/A4 BA0/A2 DQ11 DQ19 [27] FBA_MA2_BA0_H BA2/A4 BA0/A2 DQ11 DQ19
FBA_MA3_BA3_L H10 N11 FBA_D20 FBA_MA5_BA1_H H10 N11 FBA_D44 BYTE5
[27] FBA_MA3_BA3_L BA3/A3 BA1/A5 DQ12 DQ20 [27] FBA_MA5_BA1_H BA3/A3 BA1/A5 DQ12 DQ20
N13 FBA_D21 N13 FBA_D45
DQ13 DQ21 M11 FBA_D22 DQ13 DQ21 M11 FBA_D46
FBA_MA7_MA8_L K4 DQ14 DQ22 M13 FBA_D23 FBA_MA0_MA10_H K4 DQ14 DQ22 M13 FBA_D47
[27] FBA_MA7_MA8_L H5 A8/A7 A10/A0 DQ15 DQ23 U4 [27] FBA_MA0_MA10_H H5 A8/A7 A10/A0 DQ15 DQ23 U4
FBA_MA1_MA9_L FBA_D24 FBA_MA6_MA11_H FBA_D32
[27] FBA_MA1_MA9_L A9/A1 A11/A6 DQ0 DQ24 [27] FBA_MA6_MA11_H A9/A1 A11/A6 DQ0 DQ24
FBA_MA0_MA10_L H4 U2 FBA_D25 FBA_MA7_MA8_H H4 U2 FBA_D33
[27] FBA_MA0_MA10_L A10/A0 A8/A7 DQ1 DQ25 [27] FBA_MA7_MA8_H A10/A0 A8/A7 DQ1 DQ25
FBA_MA6_MA11_L K5 T4 FBA_D26 FBA_MA1_MA9_H K5 T4 FBA_D34
[27] FBA_MA6_MA11_L J5 A11/A6 A9/A1 DQ2 DQ26 T2 [27] FBA_MA1_MA9_H J5 A11/A6 A9/A1 DQ2 DQ26 T2
FBA_MA12_RFU_L FBA_D27 BYTE3 FBA_MA12_RFU_H FBA_D35 BYTE4
[27] FBA_MA12_RFU_L A12/RFU/NC DQ3 DQ27 [27] FBA_MA12_RFU_H A12/RFU/NC DQ3 DQ27
N4 FBA_D28 N4 FBA_D36
A5 DQ4 DQ28 N2 FBA_D29 A5 DQ4 DQ28 N2 FBA_D37
U5 VPP/NC DQ5 DQ29 M4 FBA_D30 +1.35VS_VGA U5 VPP/NC DQ5 DQ29 M4 FBA_D38
2 RV116 1 VPP/NC DQ6 DQ30 M2 FBA_D31 2 RV117 1 VPP/NC DQ6 DQ30 M2 FBA_D39
1K_0402_1% DQ7 DQ31 1K_0402_1% DQ7 DQ31
J1 +1.35VS_VGA J1 +1.35VS_VGA
J10 MF J10 MF
2 RV120 1 J13 SEN B1 2 RV121 1 J13 SEN B1
121_0402_1% ZQ VDDQ D1 121_0402_1% ZQ VDDQ D1
VDDQ F1 VDDQ F1
FBA_ABI#_L J4 VDDQ M1 FBA_ABI#_H J4 VDDQ M1
[27] FBA_ABI#_L G3 ABI# VDDQ P1 [27] FBA_ABI#_H G3 ABI# VDDQ P1
FBA_RAS#_L FBA_CAS#_H
[27] FBA_RAS#_L RAS# CAS# VDDQ [27] FBA_CAS#_H RAS# CAS# VDDQ
FBA_CS#_L G12 T1 FBA_WE#_H G12 T1
[27] FBA_CS#_L CS# WE# VDDQ [27] FBA_WE#_H CS# WE# VDDQ
FBA_CLK0 FBA_CAS#_L L3 G2 FBA_RAS#_H L3 G2
[27] FBA_CAS#_L L12 CAS# RAS# VDDQ L2 [27] FBA_RAS#_H L12 CAS# RAS# VDDQ L2
FBA_WE#_L FBA_CS#_H
[27] FBA_WE#_L WE# CS# VDDQ [27] FBA_CS#_H WE# CS# VDDQ
FBA_CLK0# B3 B3
VDDQ D3 VDDQ D3
VDDQ F3 VDDQ F3
1

FBA_WCK0_N D5 VDDQ H3 FBA_WCK3_N D5 VDDQ H3

[27] FBA_WCK0_N D4 WCK01# WCK23# VDDQ K3 [27] FBA_WCK3_N D4 WCK01# WCK23# VDDQ K3
RV594 RV595 FBA_WCK0 FBA_WCK3
[27] FBA_WCK0 WCK01 WCK23 VDDQ [27] FBA_WCK3 WCK01 WCK23 VDDQ
C 40.2_0402_1% 40.2_0402_1% M3 M3 C
FBA_WCK1_N P5 VDDQ P3 FBA_WCK2_N P5 VDDQ P3
[27] FBA_WCK1_N WCK23# WCK01# VDDQ [27] FBA_WCK2_N WCK23# WCK01# VDDQ
FBA_WCK1 P4 T3 FBA_WCK2 P4 T3
[27] FBA_WCK1 [27] FBA_WCK2
2

WCK23 WCK01 VDDQ E5 WCK23 WCK01 VDDQ E5

VDDQ N5 VDDQ N5
A10 VDDQ E10 A10 VDDQ E10
U10 VREFD VDDQ N10 U10 VREFD VDDQ N10
1 VREFD VDDQ VREFD VDDQ
+FBA_VREFC0 J14 B12 +FBA_VREFC0 J14 B12
CV903 VREFC VDDQ D12 VREFC VDDQ D12
VDDQ F12 VDDQ F12
0.01U_0402_16V7K VDDQ VDDQ
2 H12 H12

820P_0402_25V7
FBA_RST#_L J2 VDDQ K12 FBA_RST#_H J2 VDDQ K12
[27] FBA_RST#_L RESET# VDDQ 1 [27] FBA_RST#_H RESET# VDDQ
M12 M12
VDDQ P12 VDDQ P12

CV200
VDDQ T12 VDDQ T12
+1.35VS_VGA VDDQ G13 2 VDDQ G13
MEM_VREF levels H1 VDDQ L13 H1 VDDQ L13
K1 VSS VDDQ B14 K1 VSS VDDQ B14
70% of rail Termination Enable
1

B5 VSS VDDQ D14 B5 VSS VDDQ D14

RV125 G5 VSS VDDQ F14 G5 VSS VDDQ F14
50% of rail Termination Disable 549_0402_1% L5 VSS VDDQ M14 L5 VSS VDDQ M14
T5 VSS VDDQ P14 T5 VSS VDDQ P14
RV126 VSS VDDQ VSS VDDQ
B10 T14 B10 T14
2

1 2 +FBA_VREFC0 D10 VSS VDDQ D10 VSS VDDQ

931_0402_1% G10 VSS G10 VSS
W=16mils L10 VSS A1 FBA_CLK1 L10 VSS A1
820P_0402_25V7
1

P10 VSS VSSQ C1 P10 VSS VSSQ C1

CV158

1 VSS VSSQ VSS VSSQ

RV127 T10 E1 FBA_CLK1# T10 E1
1.33K_0402_1% H14 VSS VSSQ N1 H14 VSS VSSQ N1
K14 VSS VSSQ R1 K14 VSS VSSQ R1
VSS VSSQ VSS VSSQ

1
2 +1.35VS_VGA U1 +1.35VS_VGA U1
2

VSSQ H2 RV596 RV597 VSSQ H2

G1 VSSQ K2 40.2_0402_1% 40.2_0402_1% G1 VSSQ K2
L1 VDD VSSQ A3 L1 VDD VSSQ A3
G4 VDD VSSQ C3 G4 VDD VSSQ C3

2
L4 VDD VSSQ E3 L4 VDD VSSQ E3
C5 VDD VSSQ N3 C5 VDD VSSQ N3
R5 VDD VSSQ R3 R5 VDD VSSQ R3
B
C10 VDD VSSQ U3 C10 VDD VSSQ U3 B
VDD VSSQ 1 VDD VSSQ
R10 C4 R10 C4
D11 VDD VSSQ R4 CV904 D11 VDD VSSQ R4
G11 VDD VSSQ F5 G11 VDD VSSQ F5
VDD VSSQ 0.01U_0402_16V7K VDD VSSQ
L11 M5 2 L11 M5
P11 VDD VSSQ F10 P11 VDD VSSQ F10
G14 VDD VSSQ M10 G14 VDD VSSQ M10
L14 VDD VSSQ C11 L14 VDD VSSQ C11
VDD VSSQ R11 VDD VSSQ R11
VSSQ A12 VSSQ A12
VSSQ C12 +1.35VS_VGA VSSQ C12
Under DRAM
1

D VSSQ E12 VSSQ E12

2 VSSQ N12 VSSQ N12
[23,29] MEM_VREF VSSQ R12 VSSQ R12
G
QV20 170-BALL VSSQ U12 170-BALL VSSQ U12
S

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
3

BSS138W 1N SOT-323-3 VSSQ H13 VSSQ H13

VSSQ 1 1 1 1 1 1 1 1 VSSQ
SGRAM GDDR5 K13 SGRAM GDDR5 K13

CV851

CV852

CV853

CV854

CV855

CV856

CV857

CV858
VSSQ A14 VSSQ A14
VSSQ C14 VSSQ C14
VSSQ E14 2 2 2 2 2 2 2 2 VSSQ E14
VSSQ N14 VSSQ N14
VSSQ R14 VSSQ R14
VSSQ U14 VSSQ U14
VSSQ VSSQ
@ H5GC4H24MFR-T2C @ H5GC4H24MFR-T2C
+1.35VS_VGA
Around DRAM Close to DRAM +1.35VS_VGA
Around DRAM Close to DRAM
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
CV863

CV859

CV860

CV861

CV862

CV373

CV160

CV161

CV162

CV163

CV164

CV165

CV166

CV167

CV375

CV374

CV376

CV378

CV377

CV379

CV380

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CV868

CV865

CV864

CV867

CV866

CV381

CV168

CV169

CV170

CV171

CV172

CV173

CV174

CV175

CV384

CV383

CV382

CV387

CV386

CV385

CV388
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

A A

+1.35VS_VGA
Under DRAM
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 1 1 1 1 1
CV869

CV870

CV871

CV872

CV873

CV874

CV875

CV876

2 2 2 2 2 2 2 2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/09/09 Deciphered Date 2014/09/09 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P_GDDR5_A
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 28 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

Memory Partition A - Lower 32 bits UV8 MF=0 UV9 MF=1

MF=0 MF=1 MF=1 MF=0
FBC_D[0..63] MF=0 MF=1 MF=1 MF=0
[27] FBC_D[0..63] A4 FBC_D56
FBC_EDC[7..0] A4 FBC_D0 FBC_EDC7 C2 DQ24 DQ0 A2 FBC_D57
[27] FBC_EDC[7..0] DQ24 DQ0 EDC0 EDC3 DQ25 DQ1
FBC_EDC0 C2 A2 FBC_D1 FBC_EDC6 C13 B4 FBC_D58
FBC_EDC1 C13 EDC0 EDC3 DQ25 DQ1 B4 FBC_D2 FBC_EDC5 R13 EDC1 EDC2 DQ26 DQ2 B2 FBC_D59
FBC_EDC2 R13 EDC1 EDC2 DQ26 DQ2 B2 FBC_D3 FBC_EDC4 R2 EDC2 EDC1 DQ27 DQ3 E4 FBC_D60
EDC2 EDC1 DQ27 DQ3 BYTE0 EDC3 EDC0 DQ28 DQ4 BYTE7
FBC_EDC3 R2 E4 FBC_D4 E2 FBC_D61
EDC3 EDC0 DQ28 DQ4 E2 FBC_D5 DQ29 DQ5 F4 FBC_D62
DQ29 DQ5 F4 FBC_D6 FBC_DBI7# D2 DQ30 DQ6 F2 FBC_D63
D2 DQ30 DQ6 F2 [27] FBC_DBI7# D13 DBI0# DBI3# DQ31 DQ7 A11
FBC_DBI0# FBC_D7 FBC_DBI6# FBC_D48
[27] FBC_DBI0# DBI0# DBI3# DQ31 DQ7 [27] FBC_DBI6# DBI1# DBI2# DQ16 DQ8
FBC_DBI1# D13 A11 FBC_D8 FBC_DBI5# P13 A13 FBC_D49
[27] FBC_DBI1# P13 DBI1# DBI2# DQ16 DQ8 A13 [27] FBC_DBI5# P2 DBI2# DBI1# DQ17 DQ9 B11
FBC_DBI2# FBC_D9 FBC_DBI4# FBC_D50
[27] FBC_DBI2# DBI2# DBI1# DQ17 DQ9 [27] FBC_DBI4# DBI3# DBI0# DQ18 DQ10
FBC_DBI3# P2 B11 FBC_D10 B13 FBC_D51
D [27] FBC_DBI3# DBI3# DBI0# DQ18 DQ10 DQ19 DQ11 D
B13 FBC_D11 BYTE1 FBC_CLK1 J12 E11 FBC_D52 BYTE6
J12 DQ19 DQ11 E11 [27] FBC_CLK1 J11 CK DQ20 DQ12 E13
FBC_CLK0 FBC_D12 FBC_CLK1# FBC_D53
[27] FBC_CLK0 CK DQ20 DQ12 [27] FBC_CLK1# CK# DQ21 DQ13
FBC_CLK0# J11 E13 FBC_D13 FBC_CKE_H J3 F11 FBC_D54
[27] FBC_CLK0# J3 CK# DQ21 DQ13 F11 [27] FBC_CKE_H CKE# DQ22 DQ14 F13
FBC_CKE_L FBC_D14 FBC_D55
[27] FBC_CKE_L CKE# DQ22 DQ14 DQ23 DQ15
F13 FBC_D15 U11 FBC_D40
DQ23 DQ15 U11 FBC_D16 FBC_MA4_BA2_H H11 DQ8 DQ16 U13 FBC_D41
H11 DQ8 DQ16 U13 [27] FBC_MA4_BA2_H K10 BA0/A2 BA2/A4 DQ9 DQ17 T11
FBC_MA2_BA0_L FBC_D17 FBC_MA3_BA3_H FBC_D42
[27] FBC_MA2_BA0_L BA0/A2 BA2/A4 DQ9 DQ17 [27] FBC_MA3_BA3_H BA1/A5 BA3/A3 DQ10 DQ18
FBC_MA5_BA1_L K10 T11 FBC_D18 FBC_MA2_BA0_H K11 T13 FBC_D43
[27] FBC_MA5_BA1_L K11 BA1/A5 BA3/A3 DQ10 DQ18 T13 [27] FBC_MA2_BA0_H H10 BA2/A4 BA0/A2 DQ11 DQ19 N11
FBC_MA4_BA2_L FBC_D19 FBC_MA5_BA1_H FBC_D44 BYTE5
[27] FBC_MA4_BA2_L BA2/A4 BA0/A2 DQ11 DQ19 [27] FBC_MA5_BA1_H BA3/A3 BA1/A5 DQ12 DQ20
FBC_MA3_BA3_L H10 N11 FBC_D20 BYTE2 N13 FBC_D45
[27] FBC_MA3_BA3_L BA3/A3 BA1/A5 DQ12 DQ20 DQ13 DQ21
N13 FBC_D21 M11 FBC_D46
DQ13 DQ21 M11 FBC_D22 FBC_MA0_MA10_H K4 DQ14 DQ22 M13 FBC_D47
DQ14 DQ22 [27] FBC_MA0_MA10_H A8/A7 A10/A0 DQ15 DQ23
FBC_CLK0 FBC_MA7_MA8_L K4 M13 FBC_D23 FBC_MA6_MA11_H H5 U4 FBC_D32
[27] FBC_MA7_MA8_L H5 A8/A7 A10/A0 DQ15 DQ23 U4 [27] FBC_MA6_MA11_H H4 A9/A1 A11/A6 DQ0 DQ24 U2
FBC_MA1_MA9_L FBC_D24 FBC_MA7_MA8_H FBC_D33
[27] FBC_MA1_MA9_L A9/A1 A11/A6 DQ0 DQ24 [27] FBC_MA7_MA8_H A10/A0 A8/A7 DQ1 DQ25
FBC_CLK0# FBC_MA0_MA10_L H4 U2 FBC_D25 FBC_MA1_MA9_H K5 T4 FBC_D34
[27] FBC_MA0_MA10_L A10/A0 A8/A7 DQ1 DQ25 [27] FBC_MA1_MA9_H A11/A6 A9/A1 DQ2 DQ26
FBC_MA6_MA11_L K5 T4 FBC_D26 FBC_MA12_RFU_H J5 T2 FBC_D35 BYTE4
[27] FBC_MA6_MA11_L J5 A11/A6 A9/A1 DQ2 DQ26 T2 [27] FBC_MA12_RFU_H A12/RFU/NC DQ3 DQ27 N4
FBC_MA12_RFU_L FBC_D27 BYTE3 FBC_D36
[27] FBC_MA12_RFU_L A12/RFU/NC DQ3 DQ27 DQ4 DQ28
1

N4 FBC_D28 A5 N2 FBC_D37
RV598 RV599 A5 DQ4 DQ28 N2 FBC_D29 +1.35VS_VGA U5 VPP/NC DQ5 DQ29 M4 FBC_D38
40.2_0402_1% 40.2_0402_1% U5 VPP/NC DQ5 DQ29 M4 FBC_D30 2 RV131 1 VPP/NC DQ6 DQ30 M2 FBC_D39
2 RV132 1 VPP/NC DQ6 DQ30 M2 FBC_D31 1K_0402_1% DQ7 DQ31
1K_0402_1% DQ7 DQ31 J1 +1.35VS_VGA
2

J1 +1.35VS_VGA J10 MF
J10 MF 2 RV135 1 J13 SEN B1
2 RV136 1 J13 SEN B1 121_0402_1% ZQ VDDQ D1
121_0402_1% ZQ VDDQ D1 VDDQ F1
1 VDDQ VDDQ
F1 FBC_ABI#_H J4 M1
VDDQ [27] FBC_ABI#_H ABI# VDDQ
CV905 FBC_ABI#_L J4 M1 FBC_CAS#_H G3 P1
[27] FBC_ABI#_L G3 ABI# VDDQ P1 [27] FBC_CAS#_H G12 RAS# CAS# VDDQ T1
0.01U_0402_16V7K FBC_RAS#_L FBC_WE#_H
2 [27] FBC_RAS#_L RAS# CAS# VDDQ [27] FBC_WE#_H CS# WE# VDDQ
FBC_CS#_L G12 T1 FBC_RAS#_H L3 G2
[27] FBC_CS#_L CS# WE# VDDQ [27] FBC_RAS#_H CAS# RAS# VDDQ
FBC_CAS#_L L3 G2 FBC_CS#_H L12 L2
[27] FBC_CAS#_L L12 CAS# RAS# VDDQ L2 [27] FBC_CS#_H WE# CS# VDDQ B3
FBC_WE#_L
[27] FBC_WE#_L WE# CS# VDDQ VDDQ
B3 D3
VDDQ D3 VDDQ F3
VDDQ F3 FBC_WCK3_N D5 VDDQ H3
VDDQ [27] FBC_WCK3_N WCK01# WCK23# VDDQ
FBC_WCK0_N D5 H3 FBC_WCK3 D4 K3
[27] FBC_WCK0_N D4 WCK01# WCK23# VDDQ K3 [27] FBC_WCK3 WCK01 WCK23 VDDQ M3
FBC_WCK0
[27] FBC_WCK0 WCK01 WCK23 VDDQ VDDQ
C M3 FBC_WCK2_N P5 P3 C
P5 VDDQ P3 [27] FBC_WCK2_N P4 WCK23# WCK01# VDDQ T3
FBC_WCK1_N FBC_WCK2
[27] FBC_WCK1_N WCK23# WCK01# VDDQ [27] FBC_WCK2 WCK23 WCK01 VDDQ
FBC_WCK1 P4 T3 E5
[27] FBC_WCK1 WCK23 WCK01 VDDQ VDDQ
E5 N5
VDDQ N5 A10 VDDQ E10
A10 VDDQ E10 U10 VREFD VDDQ N10
U10 VREFD VDDQ N10 +FBC_VREFC1 J14 VREFD VDDQ B12
+FBC_VREFC1 J14 VREFD VDDQ B12 VREFC VDDQ D12
VREFC VDDQ D12 VDDQ F12

820P_0402_25V7
VDDQ F12 VDDQ H12
VDDQ 1 VDDQ
H12 FBC_RST#_H J2 K12
J2 VDDQ K12 [27] FBC_RST#_H RESET# VDDQ M12
FBC_RST#_L

CV199
[27] FBC_RST#_L RESET# VDDQ VDDQ
M12 P12
VDDQ P12 2 VDDQ T12
VDDQ T12 VDDQ G13
VDDQ G13 H1 VDDQ L13
H1 VDDQ L13 K1 VSS VDDQ B14
+1.35VS_VGA K1 VSS VDDQ B14 B5 VSS VDDQ D14
MEM_VREF levels B5 VSS VDDQ D14 G5 VSS VDDQ F14
G5 VSS VDDQ F14 L5 VSS VDDQ M14
70% of rail Termination Enable VSS VDDQ VSS VDDQ
1

L5 M14 T5 P14
RV140 T5 VSS VDDQ P14 B10 VSS VDDQ T14
50% of rail Termination Disable 549_0402_1% B10 VSS VDDQ T14 D10 VSS VDDQ
D10 VSS VDDQ G10 VSS
RV141 G10 VSS L10 VSS A1
2

1 2 +FBC_VREFC1 L10 VSS A1 FBC_CLK1 P10 VSS VSSQ C1

931_0402_1% P10 VSS VSSQ C1 T10 VSS VSSQ E1
W=16mils T10 VSS VSSQ E1 FBC_CLK1# H14 VSS VSSQ N1
820P_0402_25V7
1

H14 VSS VSSQ N1 K14 VSS VSSQ R1

CV177

1 VSS VSSQ VSS VSSQ

RV142 K14 R1 +1.35VS_VGA U1
VSS VSSQ VSSQ

1
1.33K_0402_1% +1.35VS_VGA U1 H2
VSSQ H2 RV600 RV601 G1 VSSQ K2
2 G1 VSSQ K2 40.2_0402_1% 40.2_0402_1% L1 VDD VSSQ A3
2

L1 VDD VSSQ A3 G4 VDD VSSQ C3

G4 VDD VSSQ C3 L4 VDD VSSQ E3

2
L4 VDD VSSQ E3 C5 VDD VSSQ N3
C5 VDD VSSQ N3 R5 VDD VSSQ R3
R5 VDD VSSQ R3 C10 VDD VSSQ U3
B
C10 VDD VSSQ U3 R10 VDD VSSQ C4 B
VDD VSSQ 1 VDD VSSQ
R10 C4 D11 R4
D11 VDD VSSQ R4 CV906 G11 VDD VSSQ F5
G11 VDD VSSQ F5 L11 VDD VSSQ M5
VDD VSSQ 0.01U_0402_16V7K VDD VSSQ
L11 M5 2 P11 F10
P11 VDD VSSQ F10 G14 VDD VSSQ M10
G14 VDD VSSQ M10 L14 VDD VSSQ C11
L14 VDD VSSQ C11 VDD VSSQ R11
VDD VSSQ R11 VSSQ A12
VSSQ A12 VSSQ C12
VSSQ C12 +1.35VS_VGA VSSQ E12
VSSQ
VSSQ
E12 Under DRAM VSSQ
VSSQ
N12
N12 R12
VSSQ R12 170-BALL VSSQ U12
VSSQ VSSQ
1

D 170-BALL U12 H13

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
2 VSSQ H13 SGRAM GDDR5 VSSQ K13
[23,28] MEM_VREF VSSQ 1 1 1 1 1 1 1 1 VSSQ
SGRAM GDDR5 K13 A14

CV877

CV878

CV879

CV880

CV881

CV882

CV883

CV884
G
QV21 VSSQ A14 VSSQ C14
S
3

BSS138W 1N SOT-323-3 VSSQ C14 VSSQ E14

VSSQ E14 2 2 2 2 2 2 2 2 VSSQ N14
VSSQ N14 VSSQ R14
VSSQ R14 VSSQ U14
VSSQ U14 VSSQ
VSSQ @ H5GC4H24MFR-T2C
@ H5GC4H24MFR-T2C
+1.35VS_VGA
Around DRAM Close to DRAM +1.35VS_VGA
Around DRAM Close to DRAM
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
CV889

CV886

CV885

CV888

CV887

CV182

CV183

CV389

CV179

CV180

CV181

CV184

CV185

CV186

CV392

CV390

CV391

CV395

CV393

CV394

CV396

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
CV894

CV891

CV890

CV893

CV892

CV187

CV397

CV188

CV189

CV190

CV191

CV192

CV193

CV194

CV399

CV400

CV398

CV402

CV403

CV401

CV404
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2

A A

+1.35VS_VGA
Under DRAM
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1 1 1 1 1 1 1 1
CV895

CV896

CV897

CV898

CV899

CV900

CV901

CV902

2 2 2 2 2 2 2 2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/09/09 Deciphered Date 2014/09/09 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P_GDDR5_B
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 29 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

SMB_ALT_ADDR
Low Single GPU
High Dual GPU
+1.8V_GFX_AON
DEVID_SEL
Low Original Device ID

2
RV157 RV158 RV159
100K_0402_5% 100K_0402_5% 100K_0402_5% High Re-brand Device ID

VGA_DEVICE

1
D D
ROM_SI
[24] ROM_SI
ROM_SO Low 3D Device
[24] ROM_SO
ROM_SCLK
[24] ROM_SCLK High VGA Device

2
RV160 RV161 RV162 PCIE_CFG
100K_0402_5% 100K_0402_5% 100K_0402_5%
@ @ @ Low Normal signal swing
High Reduce the signal amplitude
1

1
+1.8V_GFX_AON
2

2
RV146 RV147 RV148 RV149 RV150 RV593
100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5%
@ @ @ @ @
1

1
[24] STRAP0 STRAP0
[24] STRAP1 STRAP1
[24] STRAP2 STRAP2
[24] STRAP3 STRAP3
[24] STRAP4 STRAP4
[24] STRAP5 STRAP5
2

2
C RV152 RV153 RV154 RV155 RV156 RV66 C
100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5%
@ @ @ @
1

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/09/09 Deciphered Date 2014/09/09 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
N17P_MISC
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 30 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

+1.8V_GFX_RUN Discharge
+1.8V_GFX_AON
+3VALW +1.35VS_VGA +5VALW

1
1

1
RZ11

1
RZ12 RZ8 100_0402_5%
+1.8V_GFX_AON Pilot_05 +1.8V_GFX_RUN 100K_0402_5% 10_0402_1% RV534
100K_0402_5%

2
2

DMN63D8LDW-7 2N SOT363-6
UZ17 RZ69

2
0_0805_5%

3
1 8 1V8_GFX_RUN 1 @ 2
2 VIN VOUT 7 QZ12B
VIN VOUT QZ6B QZ6A
1

6
D D
1V8_RUN_EN 3 6 CZ95 1 2 CZ98 DMN63D8LDW-7 2N SOT363-6 DMN63D8LDW-7 2N SOT363-6 DGPU_PWR_EN# 1 @ 2 DGPU_PWR_EN#_R 5
EN CT @ 0.1U_0402_10V6K
+5VALW 4 5 2200P_0402_25V7K QZ12A RV399

4
6
VBIAS GND 9 2 5 2 DMN63D8LDW-7 2N SOT363-6 0_0402_5%

0.1U_0402_10V7K
GND [23,61] FBVDD_EN
1
APE8937GN2_DFN8_2X2 Pilot_05

CV499
4

1
1 2
[20,31,62] DGPU_PWR_EN
CV573
0.1U_0402_10V7K RZ106 2

1
0_0402_5%
2 1 @ 2 Pilot_05
@

@ DV14
1V8_MAIN_EN 2
[23,31] 1V8_MAIN_EN
1 1V8_RUN_EN

3
[31,67] GPU_CORE_PG
BAT54CW-7-F_SOT323-3
+3VALW +GPU_CORE_VDDS +1VS_GFX

1
+3VALW +GPU_CORE +3VALW +1.8V_GFX_RUN

1
RZ103
100K_0402_5% RZ9 RZ73

1
10_0402_1% 10_0402_1%
RZ104 RZ10 RZ105 RZ100
NVVDDS Enable

2
100K_0402_5% 10_0402_1% 100K_0402_5% 100_0402_5%

2
DMN63D8LDW-7 2N SOT363-6
+3VS

L2N7002WT1G_SC-70-3
3

DMN63D8LDW-7 2N SOT363-6

DMN63D8LDW-7 2N SOT363-6
QZ8A

0.1U_0402_10V7K
6
DMN63D8LDW-7 2N SOT363-6 1 QZ8B QZ11 QZ7A QZ10A
1

3
D DMN63D8LDW-7 2N SOT363-6 DMN63D8LDW-7 2N SOT363-6

CV920

0.1U_0402_10V7K

0.1U_0402_10V7K
C RZ108 5 2 1 QZ7B 1 QZ10B C
100K_0402_5% +3VS NVVDDS_EN 2

CV921

CV922
G
2 S NVVDD_EN 2 5 1V8_RUN_EN 2 5

3
2

1
1V8_EN_LS3V3 2 2

4
1

@
RZ109
100K_0402_5% @ @
6

QV92A
2

DMN63D8LDW-7 2N SOT363-6
2
1

QV92B
DMN63D8LDW-7 2N SOT363-6
GPU Power Up Sequence GPU GC6 Entry Sequence GPU GC6 Exit Sequence
5 1V8_MAIN_EN
4

+1.8V_GFX_AON FB_CKE Normal Self-Refresh Self-Refresh Normal

1V8_MAIN_EN
PXE_Link Active XXX XXX Detect Train
+3VS
CV917 +1.8V_GFX_RUN
0.1U_0402_25V6
1 2 DGPU_PEX_RST#
+GPU_CORE
UV21 Pilot_05
RV606 GPU_GC6_FB_EN
5

TC7SZ08FU_SSOP5 0_0402_5%
B
1 1 2 1V8_EN_LS3V3
+GPU_CORE_VDDS B
@
P

NVVDDS_EN 4 B
[60,68] NVVDDS_EN O 2
GPU_CORE_PG [31,67]
1

A
+1VS_GFX 1V8_MAIN_EN 40us < T1 < 4ms
1

CV918 RV607
3

@ 1M_0402_5%
0.01UF_0402_25V7K
2

+1.35V_GPU
2

ALL_GPWRGD
Enable 1.2V
Disable 0.55V T1 < 4ms

The ramp time for any rail must be more than 40us and less than 2ms. GPU_EVENT# 1us < T0

The entire entry/exit sequence must complete within 200 ms.

UV23
+1.8V_GFX_AON
GPU Power Down Sequence
NVVDD Enable
5

TC7SZ08FU_SSOP5
@ 1
P

B DGPU_PWR_EN [20,31,62]
4 +GPU_CORE_VDDS
O 2
A
G
3

+GPU_CORE
A A
RV608
0_0402_5%
1 @ 2 all other power rails
[67] NVVDD_EN 1V8_MAIN_EN [23,31]

Pilot_05
1

CV919 Enable 1.2V

@ 0.01UF_0402_25V7K
Disable 0.55V
Security Classification Compal Secret Data Compal Electronics, Inc.
2

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
GPU DC/DC interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 31 of 70
5 4 3 2 1
 WWW.AliFixit.COM
A B C D E

B+ Discharge

+5VALW to +5VS
+3VALW to +3VS RZ13 1495mA
UZ1 0_1206_5%
+5VALW +5VALW 1 14 5VS 1 2 +5VS
1
2 VIN1 VOUT1 13 @
1
VIN1 VOUT1

[18,33,34,39,48,49,57] SIO_SLP_S3# SIO_SLP_S3# 3 12 CZ4 1 2 0.01U_0402_16V7K

ON1 CT1

+5VALW 4 11
VBIAS GND B+
SIO_SLP_S3# 5 10 CZ6 1 2 0.01U_0402_16V7K B+
ON2 CT2

2
+3VALW 6 9 3VS 1 2
+3VALW VIN2 VOUT2 +3VS
7 8 R2

1
VIN2 VOUT2 PAD-OPEN 43x39 2041mA R1 4.7K_0805_5%
15 PJP15
GPAD @ 1M_0402_5%

1
EM5209VF_DFN14_3X2
Pilot_05

2
QZ13A

6
QZ13B DMN63D8LDW-7 2N SOT363-6
DMN63D8LDW-7 2N SOT363-6

2
Close UZ1 Close UZ1

3
R3

1
+5VALW +3VALW +5VS +3VS 1M_0402_5%

1
1 2 5 R5
10U_0603_6.3V6M [55] VCC_CHG

10U_0603_6.3V6M

1M_0402_5%
1 1 1 1

4
1
CZ8

CZ9
R4
@ CZ11 @ CZ12

2
1M_0402_5%
1U_0603_10V6K 1U_0603_10V6K
2 2 2 2

2
2 2

eDP & Camera Load Switch +VCCST Load Switch

+3VALW Pilot_05 +EDPVDD +EDPVDD

UZ8 @ PJP35 +1VALW +VCCST

5 1 EDPVDD 1 2 1
IN OUT 1 2 CZ41 UZ15
2 0.1U_0402_10V6K 1
3 GND JUMP_43X39 2 VIN1 RZ66
3
ENVDD 4 3 2 VIN2 0_0603_5%
EN OC +5VALW 7 6 VCCST 1 2
VIN thermal VOUT @
1 Pilot_05
SY6288C20AAC_SOT23-5 3 CZ28
VBIAS 0.1U_0402_10V6K
1

1U_0402_6.3V6K

0.1U_0402_25V6
1
4 5

CZ96

@ CZ97
ON GND 2

2
DV3 2 TPS22961DNYR_WSON8

2
4.4mohm/6A
[48] LCD_VCC_TEST_EN TR=12.5us@Vin=1.05V
1 ENVDD ENVDD RZ40 1 2 100K_0402_5%
[18,33,48,49,69] SIO_SLP_S4#
3
[16] ENVDD_PCH
BAT54CW-7-F_SOT323-3~D

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SYS DC/DC Interface
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 32 of 70
A B C D E
 WWW.AliFixit.COM
5 4 3 2 1

+1.2V_DDR Enable +VCCIO Enable

DZ1 DZ2
1 2 1 2

RB751S40T1G_SOD523-2 RB751S40T1G_SOD523-2
D D

[18,32,48,49,69] SIO_SLP_S4# RZ102 1 2 [18,32,33,34,39,48,49,57] SIO_SLP_S3# RZ107 1 2

1.2V_VDDQ_EN [57] VCCIO_EN [59]
130K_0402_5% 150K_0402_5%

1 1
CZ102 CZ108
0.1U_0402_10V6K 0.1U_0402_10V6K
2 2

+VCCSTG

+VCCSTG Load Switch

1
+1VALW
RZ48
C UZ9 @ 0_0603_5% C
1
2 VIN1
Pilot_05

2
VIN2
+5VALW 7 6 VCCSTG
+3VALW VIN thermal VOUT
3 +VCCSTG
VBIAS
1
5

1
1U_0402_6.3V6K

0.1U_0402_10V7K
@ CZ86
UZ21 4 5
ON GND

CZ88
1
VCC

[18,48] IMVP_VR_ON 1 CZ47

2
IN1 4 2 TPS22961DNYR_WSON8 0.1U_0402_10V6K
OUT VR_ON [18,63]
2 4.4mohm/6A
GND

[18,32,33,34,39,48,49,57] SIO_SLP_S3#
1

IN2 2
RZ71 TR=12.5us@Vin=1.05V
100K_0402_5%
3

MC74VHC1G08DFT2G_SC70-5
2

SIO_SLP_S3#
[18,32,33,34,39,48,49,57] SIO_SLP_S3#

B B

+VCCPLL_OC Load Switch

+1.2V_DDR
+1.2V_VCCPLL_OC
+5VALW UZ16 RZ67
0_0603_5%
1 8 1.2V_VCCPLL_OC 1 2
2 VIN VOUT 7 @
VIN VOUT Pilot_05
SIO_SLP_S3# 3 6 CZ57 1 2 +1.2V_VCCPLL_OC
EN CT @
4 5 2200P_0402_25V7K
VBIAS GND 9
GND 1
CZ49
APE8937GN2_DFN8_2X2 0.1U_0402_10V6K
2

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE-KB9012/ KC3810
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 33 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

LCD backlight PWR CTRL eDP & TS Conn.

B+ +INV_PWR_SRC

60mil +3VS

QV11

5
UZ23 +EDPVDD
SI3457BDV-T1-E3_TSOP6~D RV566 1 @ 2 0_0402_5% DISPOFF#
60mil

VCC
[48] PANEL_BKEN_EC
DISPOFF# 1

D
IN1

1
6 4 LCD_TST_R
60mil

S
OUT

10U_0603_6.3V6M
4 5 Pilot_05 LCD_TST 2

GND
2 RV536 IN2

1
1 100K_0402_5% 1 1

CV577
G
@

3
1
RV535 1 MC74VHC1G08DFT2G_SC70-5 RV567 CV576

3
CV578 1M_0402_5% @ 100K_0402_5% 8.2P_0402_50V8D @
D 2 2 D
1U_0603_25V6 CV579

2
0.1U_0402_25V6 DV2

2
2 2
[7,16] BIA_PWM_PCH
1 INV_PWM

1
LCD_TST 3
[48] LCD_TST
RV570
100K_0402_5% BAT54CW-7-F_SOT323-3~D RV537
100K_0402_5%

2
JEDP1

1
D
2 QV2 1
[18,32,33,39,48,49,57] SIO_SLP_S3# +INV_PWR_SRC GND
G L2N7002WT1G_SC-70-3 W=60mils 2
3 BATT_WHITE_LED
S

3
4 BATT_YELLOW_LED
LCD_TST 1 @ 2 LCD_TST_R 5 BREATH_WHITE_LED
RV538 0_0402_5% 6 VR_SRC
7 VR_SRC
8 VR_SRC
Pilot_05 NC
USB20_P9_R 9
USB20_N9_R 10 DISP_ON/OFF#
11 PWM
1 2 12 CONNTST_GND
[17] TOUCH_SCREEN_PD# VR_GND
DI1 RB751S40T1G_SOD523-2 13
14 VR_GND
CV581 1 2 0.1U_0402_10V6K EDP_TXN0_C RV539 1 @ 2 0_0402_5% EDP_TXN0_R 15 VR_GND
[7] EDP_TXN0
CCD +DMIC Conn. +5VS_TS INV_PWM
DISPOFF#
16
17
LCD_B_CLK+
LCD_B_CLK-
GND
[7] EDP_TXP0 CV580 1 2 0.1U_0402_10V6K EDP_TXP0_C RV540 1 @ 2 0_0402_5% EDP_TXP0_R EDP_HPD 18
+3VS_CAM 19 LVDS_B2+
20 LVDS_B2-
+EDPVDD LVDS_B1+
W=60mils 21
22 LVDS_B1-
23 LVDS_B0+
1 1 1 LVDS_B0-
@ 24
CV582 CV583 CV584 EDP_AUXP_R 25 GND
0.1U_0402_10V6K 8.2P_0402_50V8D EDP_AUXN_R 26 LVDS_A_CLK+
10U_0603_6.3V6M LVDS_A_CLK-
2 2 2 CV586 1 2 0.1U_0402_10V6K EDP_TXN1_C RV541 1 @ 2 0_0402_5% EDP_TXN1_R 27
[7] EDP_TXN1 GND
EDP_TXP0_R 28
EDP_TXN0_R 29 LVDS_A2+
CV585 1 2 0.1U_0402_10V6K EDP_TXP1_C RV542 1 @ 2 0_0402_5% EDP_TXP1_R 30 LVDS_A2-
[7] EDP_TXP1 LVDS_A1+
EDP_TXP1_R 31
EDP_TXN1_R 32 LVDS_A1-
33 LVDS_A0+
EDP_TXP2_R 34 LVDS_A0-
EDP_TXN2_R 35 EDID_DATA 46
36 EDID_CLK MGND6 45
C QZ9 EDP_TXP3_R 37 BIST MGND5 44 C
+3VS DMG2301U-7_SOT23-3 +3VS_CAM +3VS_CAM EDP_TXN3_R 38 V_EDID MGND4 43
EMC@ LCD_VDD MGND3
RZ37 [7] EDP_TXN2 CV588 1 2 0.1U_0402_10V6K EDP_TXN2_C RV543 1 @ 2 0_0402_5% EDP_TXN2_R 39 42
MCM1012B900F06BP_4P 0_0603_5% 40 LCD_VDD MGND2 41
CONNTST MGND1

D
USB20_P12 4 3 USB20_P12_R 3 1 1 2 1
[19] USB20_P12
@ Pilot_05 [7] EDP_TXP2 CV587 1 2 0.1U_0402_10V6K EDP_TXP2_C RV544 1 @ 2 0_0402_5% EDP_TXP2_R
1 CZ44 ACES_59003-04006-001
USB20_N12 1 2 USB20_N12_R CZ43 CONN@

G
[19] USB20_N12 1U_0402_6.3V6K

2
0.1U_0402_10V6K 2
LV22
2

3.3V_CAM_EN#
3.3V_CAM_EN# [18,53]

[16] EDP_HPD EDP_HPD

+3VS CV590 1 2 0.1U_0402_10V6K EDP_TXN3_C RV546 1 @ 2 0_0402_5% EDP_TXN3_R
[7] EDP_TXN3

1
Pilot_06
3.3V_CAM_EN# RZ38 1 @ 2 100K_0402_5% [7] EDP_TXP3 CV589 1 2 0.1U_0402_10V6K EDP_TXP3_C RV548 1 @ 2 0_0402_5% EDP_TXP3_R RV551
100K_0402_5%

2
+3VALW

IR_CAM_DET# RZ96 1 2 100K_0402_5%

DMIC_CLK_CAM RZ41 1 2 33_0402_5%

DMIC_CLK [37]
DMIC_DATA_CAM RZ42 1 2 33_0402_5% DMIC_DAT [37] [7] EDP_AUXP CV592 1 2 0.1U_0402_10V6K EDP_AUXP_C RV549 1 @ 2 0_0402_5% EDP_AUXP_R
+3VS_CAM B+_CAM
1 1 JCAM1
EC5205
6.8P_0402_50V8C

EC5206
6.8P_0402_50V8C

14 [7] EDP_AUXN CV591 1 2 0.1U_0402_10V6K EDP_AUXN_C RV552 1 @ 2 0_0402_5% EDP_AUXN_R

@ @ 13 14
12 13
2 2 11 12
10 11
[16] CAM_CBL_DET# 10 Pilot_05,06
9
[20] IR_CAM_DET# 8 9 15
Layout Note: Reduce the stubs. 8 G1
USB20_P12_R 7 16
USB20_N12_R 6 7 G2
5 6
DMIC_DATA_CAM 4 5
USB20_P12_R DMIC_CLK_CAM 3 4
2 3
USB20_N12_R 1 2
1
ACES_87212-14G0
B B
2

DV12
PESD5V0U2BT_SOT23-3
1

EMC@

Touch Screen +5VS +5VS_TS

RZ26
0_0603_5%
1 2
@ Pilot_05

EMC@
MCM1012B900F06BP_4P
[19] USB20_P9 4 3 USB20_P9_R USB20_P9_R

A 1 2 USB20_N9_R USB20_N9_R A
[19] USB20_N9
LI1
2

3
DI3 @
AZ5125-02S.R7G_SOT23-3

Pilot_05
1

Security Classification Compal Secret Data Compal Electronics, Inc.

WWW.ALISALER.COM
Issued Date 2011/08/25 2012/07/25 Title
Deciphered Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP /TS conn.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 34 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

A00.01
+1.2V_VCCPLL_OC
A00.01 +1.2V_RTM +3V_RTM +3VS
+1.2V_RTM
RM599
RM598 0_0603_5%
0_0603_5% 1 2
1 2 @
D 1 CM823 1 CM837 @
D

0.1U_0402_10V6K
2 0.01U_0402_16V7K 2

+3V_RTM

Close Pin 11
1 CM840 1 CM841

0.1U_0402_10V6K

0.01U_0402_16V7K
2 2
+1.2V_RTM

1 CM838 1 CM839 1 CM229 +1.2V_RTM +3V_RTM

Close Pin 24
0.1U_0402_10V6K

0.1U_0402_10V6K

0.01U_0402_16V7K

2 2 2
UM1
30 1 +3V_RTM
6 VDD12 VDD33 24
11 VDD12 VDD33
43 VDDA12
46 VDDRX12 23
Close Pin 6,30 TMDS_T_TX2P [36]
15 VDDRX12 OUT_D2p 22
VDDTX12 OUT_D2n TMDS_T_TX2N [36] 1 CM842
18

0.1U_0402_10V6K
37 VDDTX12 20 TMDS_T_TXCP
POWERSWITCH OUT_D1p 19 TMDS_T_TX1P [36]
OUT_D1n TMDS_T_TX1N [36] 1 2
CV827 1 2 0.1U_0402_10V6K IFPC_TX2_CP 38 @
[24] IFPC_TX2_P IN_D2p
CV828 1 2 0.1U_0402_10V6K IFPC_TX2_CN 39 17 CM843
[24] IFPC_TX2_N IN_D2n OUT_D0p 16 TMDS_T_TX0P [36]
OUT_D0n TMDS_T_TX0N [36] 0.1U_0402_10V6K
C CV829 1 2 0.1U_0402_10V6K IFPC_TX1_CP 41 TMDS_T_TXCN 2 C
+1.2V_RTM [24] IFPC_TX1_P IN_D1p
CV830 1 2 0.1U_0402_10V6K IFPC_TX1_CN 42 14 TMDS_T_TXCP
[24] IFPC_TX1_N IN_D1n OUT_CKp TMDS_T_TXCP [36]
13 TMDS_T_TXCN
OUT_CKn TMDS_T_TXCN [36]
CV832 1 2 0.1U_0402_10V6K IFPC_TX0_CP 44 Close Pin 1
[24] IFPC_TX0_P IN_D0p
CV831 1 2 0.1U_0402_10V6K IFPC_TX0_CN 45 33 IFPC_I2C_DAT_R RM2 1 @ 2 0_0402_5%
[24] IFPC_TX0_N IN_D0n SDA_SRC/AUXN IFPC_I2C_DAT [24]
CM228 1 CM141 1 CM4 1 CM3 34 IFPC_I2C_CLK_R RM3 1 @ 2 0_0402_5%
SCL_SRC/AUXP IFPC_I2C_CLK [24]
1 CV826 1 2 0.1U_0402_10V6K IFPC_CLK_CP 47 8 DDC_DAT_HDMI
0.1U_0402_10V6K

0.1U_0402_10V6K

0.01U_0402_16V7K
4.7U_0603_6.3V6K

[24] IFPC_CLK_P IN_CKp SDA_SNK DDC_DAT_HDMI [24,36]

CV825 1 2 0.1U_0402_10V6K IFPC_CLK_CN 48 7 DDC_CLK_HDMI
[24] IFPC_CLK_N IN_CKn SCL_SNK DDC_CLK_HDMI [24,36]
2 2 2
2 RTM_DCIN_ENB 3 40 RM600 1 2 1K_0402_5%
5 DCIN_EN HPD_SRC 21 GPU_HPD_RT [23]
RTM_EQ
EQ HPD_SNK HDMI_HPLUG [36] +3V_RTM
RTM_I2C_ADDR 31
I2C_ADDR
10
25 RSV1 32 RTM_HDMI_ID IFPC_I2C_DAT_R RM582 1 @ 2 47K_0402_5%
Close Pin 43,46
26 NC HDMI_ID 9 RM1 1 @ 2 0_0402_5% IFPC_I2C_CLK_R RM583 1 @ 2 47K_0402_5%
RSV2 HDMI_CEC HDMI_CEC [36]
12
CEC_EN
36 29 +VDISPLAY_VCC
1 RTM_PDB 4 REXT CSCL 28
RTM_RST# 35 PDB CSDA DDC_DAT_HDMI 1 2 2K_0402_1%
RM578
RESETB

1U_0402_6.3V6K
RM517 RTM_PRE 27 DDC_CLK_HDMI RM581 1 2 2K_0402_1%
PRE
4.99K_0402_1%

1 2 49
TESTMODEB EPAD

CM24
+1.2V_RTM
2

S IC PS8409QFN48GTR2-A1 QFN 48P REPEATER

2
Pilot_02
1 CM11 1 CM10 1 CM12
0.1U_0402_10V6K

0.1U_0402_10V6K

0.01U_0402_16V7K

2 2 2

B B

Close Pin 15,18

+3V_RTM

@ RM595 1 2 10K_0402_5% RTM_DCIN_ENB

@ RM594 1 2 10K_0402_5% RTM_EQ
@ RM593 1 2 10K_0402_5% RTM_I2C_ADDR
@ RM592 1 2 10K_0402_5% RTM_PRE
@ RM591 1 2 10K_0402_5% RTM_HDMI_ID

RM590 1 2 10K_0402_5% RTM_RST#

RM584 1 2 4.7K_0402_5% RTM_DCIN_ENB

@ RM585 1 2 10K_0402_5% RTM_EQ
A @ RM586 1 2 10K_0402_5% RTM_I2C_ADDR A
@ RM587 1 2 10K_0402_5% RTM_PRE
@ RM588 1 2 10K_0402_5% RTM_HDMI_ID
@ RM589 1 2 10K_0402_5% RTM_PDB

Title

WWW.ALISALER.COM
Retimer

Size Document Number Rev

C LA-D991P 0.1(X00)

Date: Tuesday, November 08, 2016 Sheet 35 of 70

5 4 3 2 1
 5 4 3 2
WWW.AliFixit.COM 1

Place close to JHDMI1 Place between ESD and CM-Choke

RV621 1 EMC@ 2 0_0402_5%

TMDS_L_TXCP

1
D LV24 @ D
TMDS_T_TXCP 1 2 TMDS_L_TXCP RV554
[35] TMDS_T_TXCP
150_0402_5% @

TMDS_T_TXCN 4 3 TMDS_L_TXCN
[35] TMDS_T_TXCN

2
TMDS_L_TXCN
HCM1012GH900BP_4P

RV622 1 EMC@ 2 0_0402_5%

RV623 1 EMC@ 2 0_0402_5%

TMDS_L_TX0N

1
LV25 @
TMDS_T_TX0P 1 2 TMDS_L_TX0P RV557
[35] TMDS_T_TX0P
150_0402_5% @

TMDS_T_TX0N 4 3 TMDS_L_TX0N
[35] TMDS_T_TX0N

2
TMDS_L_TX0P
HCM1012GH900BP_4P

RV624 1 EMC@ 2 0_0402_5%

RV625 1 EMC@ 2 0_0402_5%

TMDS_L_TX1N

1
LV26 @
TMDS_T_TX1P 1 2 TMDS_L_TX1P RV562
[35] TMDS_T_TX1P
150_0402_5% @

TMDS_T_TX1N 4 3 TMDS_L_TX1N
[35] TMDS_T_TX1N

2
TMDS_L_TX1P
C HCM1012GH900BP_4P C

RV626 1 EMC@ 2 0_0402_5%

RV627 1 EMC@ 2 0_0402_5%

TMDS_L_TX2N

1
LV27 @
TMDS_T_TX2P 1 2 TMDS_L_TX2P RV565
[35] TMDS_T_TX2P
150_0402_5% @

TMDS_T_TX2N 4 3 TMDS_L_TX2N
[35] TMDS_T_TX2N

2
TMDS_L_TX2P
HCM1012GH900BP_4P
Pilot_08
RV628 1 EMC@ 2 0_0402_5%

Pilot_07

@ DV4 @ DV5
TMDS_L_TX1N 1 1 10 9 TMDS_L_TX1N TMDS_L_TX0P 1 1 10 9 TMDS_L_TX0P

TMDS_L_TX1P 2 2 9 8 TMDS_L_TX1P TMDS_L_TX0N 2 2 9 8 TMDS_L_TX0N

TMDS_L_TX2N 4 4 7 7 TMDS_L_TX2N TMDS_L_TXCP 4 4 7 7 TMDS_L_TXCP

TMDS_L_TX2P 5 5 6 6 TMDS_L_TX2P TMDS_L_TXCN 5 5 6 6 TMDS_L_TXCN

B 3 3 3 3 B

8 8

HDMI conn AZ1045-04F_DFN2510P10E-10-9 AZ1045-04F_DFN2510P10E-10-9

+VDISPLAY_VCC

+5VS UV17
W=40mils JHDMI1
[35] HDMI_HPLUG HDMI_HPLUG 19
3 +VDISPLAY_VCC 18 HP_DET
OUT +5V
0.1U_0402_10V6K

10U_0603_6.3V6M

1 1 17 +3VS
DDC/CEC_GND
CV597

1 DDC_DAT_HDMI 16 SB000008E10
IN [24,35] DDC_DAT_HDMI SDA
CV598

DDC_CLK_HDMI 15 QV93
[24,35] DDC_CLK_HDMI SCL
2 HDMI_Reserved 14 S TR METR3904W-G NPN SOT323-3
GND Reserved

1
2 2 HDMI_CEC 13 C
[35] HDMI_CEC CEC
TMDS_L_TXCN 12 20 2 1 2 HDMI_HPLUG
11 CK- GND 21 B
AP2330W-7_SC59-3 TMDS_L_TXCP 10 CK_shield GND 22 E RV611

3
TMDS_L_TX0N 9 CK+ GND 23 150K_0402_5%
D0- GND [20] HDMI_HPD_PCH 1
8
TMDS_L_TX0P 7 D0_shield CV923
D0+

1
TMDS_L_TX1N 6 0.1U_0402_16V7K
5 D1- RV612 2
TMDS_L_TX1P 4 D1_shield 100K_0402_5%
For EMI Reserve D1+
TMDS_L_TX2N 3
2 D2-

2
@ CV599 1 2 0.1U_0402_25V6 HDMI_HPLUG TMDS_L_TX2P 1 D2_shield
A D2+ A
@ CV600 1 2 0.1U_0402_25V6 HDMI_Reserved ACON_HMR2E-AK120D
CONN@
@ CV601 1 2 0.1U_0402_25V6 HDMI_CEC

close to JHDMI
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-D991P 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Wednesday, November 09, 2016 Sheet 36 of 70

WWW.ALISALER.COM
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

Main Func = Audio

+1.8V_AVDD
Pilot_05 +1.8V_DVDD

+1.8V_AVDD RA1 1 @ 2 0_0402_5%

1
CA1 1 1 CA2
CA3 +3VS
+3VS To +1.8V_DVDD
0.1U_0402_10V6K
4.7U_0603_6.3V6K

0.1U_0402_10V6K
2
2 2

1U_0402_6.3V6K
D D
1

CA4
1
UA1 RA2 2
AUD_AGND Close pin36 RA3 1 10K_0402_5%
0_0603_5% VIN
1 2 +1.8VS 5 Close pin40
+1.8V_DVDD

2
VOUT 2
Pilot_05 @
GND

1U_0402_6.3V6K
+3VS RA5 +3V_DVDD Pilot_05 1 4
NC

CA7
0_0402_5% 3
1 2 EN
4.7U_0603_6.3V6K

@ 2
2
1 1 CA9 G9090-180T11U_SOT23-5
25mA CA10 +5V_AVDD +5V_PVDD
0.1U_0402_10V6K
CA8

0.68U_0603_16V6K RA8
1 0_0603_5%
2 2 1 2
Close pin9

CA18
@
1.5A CA17 1 1 moat Pilot_05

0.1U_0402_10V6K
+5VS +5V_PVDD [38] LINE1_VREFO_R MIC2_VREFO [38]
Layout Note:

4.7U_0603_6.3V6K
RA7 AUD_AGND
[38] LINE1_VREFO_L 2 2
0_0805_5% Place close to Pin 26
1 2
5V_PVDD trace width > 40mil. moat Pilot_05

2.2U_0402_6.3V6M
@
[38] AUD_HP1_JACK_L
RA10 1 CA11 1 CA12 1 CA13 1 CA14
0_0805_5% RA9 1 @ 2 0_0402_5%
0.1U_0402_10V6K

0.1U_0402_10V6K
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

[38] AUD_HP1_JACK_R

1
4.7U_0603_6.3V6K
1 2 RA12 1 @ 2 0_0402_5%
1 2

CA16
@ RA11 RA13 @ 0_0402_5%
2 2 2 2 CA15 RA14 1 @ 2 0_0402_5%
100K_0402_5%
Pilot_05 1U_0402_6.3V6K RA15 1 @ 2 0_0402_5%
1 2 1 1 AUD_AGND

2
CA19
AUD_AGND
2 2
2
CA20
Layout Note: Layout Note: 1U_0402_6.3V6K
+5V_AVDD
C Close pin41 Close pin46 1 AUD_AGND C
1 @ 2
RA72
+1.8V_DVDD RA16 0_0805_5%
1 2 1 2
LINE2_L [39]

36

35

34

33

32

31

30

29

28

27

26

25

1
HDA1 CA21
1U_0402_6.3V6K 1.2K_0201_1% RA71

CPVEE

HPOUT-L/PORT-I-L

LINE1-VREFO-L

MIC2-VREFO

LDO1-CAP

AVDD1

AVSS1
CPVDD

CBN

HPOUT-R/PORT-I-R

LINE1-VREFO-R

VREF
1K_0402_1%

Layout Note:

2
37 24 AUD_AGND
CBP LINE2_L
Tied at point only under
38 23 AUD_AGND Codec or near the Codec
AUD_AGND AVSS2 LINE2_R
CA22 1 2 10U_0603_6.3V6M LDO2_CAP 39 22
AUD_AGND LDO2-CAP LINE1_L LINE1_L [38] moat +3VALW +RTCVCC
CA63 1 2 10U_0603_6.3V6M +1.8V_AVDD 40 21
AUD_AGND AVDD2 LINE1_R LINE1_R [38]
RA17 1 @ 2 0_0402_5%
41 20 RA18 1 @ 2 0_0402_5%
+5V_PVDD PVDD1 5/3D3VSTB
Pilot_05
42 19 CA23 1 2 10U_0603_6.3V6M
[38] AUD_SPK_L+ SPK-OUT-L+ MIC-CAP AUD_AGND
Layout Note: 43 18
Speaker trace width >40mil @ 2W4ohm speaker power
[38] AUD_SPK_L- SPK-OUT-L- MIC2_R/SLEEVE SLEEVE [38] Layout Note:
44 17 Width>40mil, to improve Headpohone Crosstalk noise
[38] AUD_SPK_R- SPK-OUT-R- MIC2_L/RING2 RING2 [38]
45 16 1 2 0_0402_5% AUD_PC_BEEP
Change it to sharp will be better.
RA19 @
[38] AUD_SPK_R+ SPK-OUT-R+ MONO-OUT Add 2 vias (>0.5A) when trace layer change.
46 15 Pilot_05
+5V_PVDD PVDD2 SPDIFO/FRONT_JD/JD3/GPIO3

GPIO0/DMIC-DATA

GPIO1/DMIC-CLK
47 14
[39,48] EC_MUTE# PDB MIC2/LINE2_JD/JD2 +3V_DVDD

EAPD/DC DET
1 2 48

SDATA-OUT
@ 13 AUD_SENSE_A 1 2 AUD_SENSE
+3V_DVDD SPDIF-OUT/GPIO2 HP/LINE1_JD/JD1 AUD_SENSE [38] RA24

LDO3-CAP

SDATA-IN
RA23 100K_0402_5% RA22

DVDD-IO

I2C_SCL
I2C_SDA
49 200K_0402_5% AUD_SENSE_A 2 1
GND Layout Note:

DVDD

SYNC
BCLK
Place close to Pin 13 1 100K_0402_5%

ALC3246-CG-GP moat CA24

EAPD# 4

10

11

12
0.1U_0402_10V6K
+3V_DVDD 2
B B
AUD_AGND
moat

4.7U_0603_6.3V6K

CA27
+3V_DVDD
DMIC_DATA_R

CA28
1 1 CA26
CA25

0.1U_0402_10V6K
1 1 1
CA62 2 2
@ 10P_0402_25V8J
2 2 2

0.1U_0402_10V6K
4.7U_0603_6.3V6K
Pilot_05
RA27 1 @ 2 0_0402_5% DMIC_DATA_R
[34] DMIC_DAT
D1
RA28 1 2 22_0402_5% DMIC_CLK_R 3
[34] DMIC_CLK [18] SPKR
Pilot_05 CA29
1 RA29 1 2
@ CODEC_SDOUT_R 1 AUD_PC_BEEP_C 1 2 1 2AUD_PC_BEEP
[18] HDA_SDOUT_AUDIO
@ 0_0402_5% RA30 1K_0402_5%
CA30 RA31 1 @ 2 CODEC_BITCLK_R
[48] BEEP
2 0.1U_0402_10V6K
[18] HDA_BITCLK_AUDIO
22P_0402_50V8J 0_0402_5%

1
2 RA32 1 2 HDA_CODEC_SDIN0 BAT54C-7-F_SOT23-3
[18] HDA_SDIN0_AUDIO
33_0402_5% RA33
Close pin3 HDA_SYNC_AUDIO 10K_0402_5%
[18] HDA_SYNC_AUDIO

2
+3V_DVDD

RA70
2 1 EAPD#
EAPD# [39]

100K_0402_5%
DMIC_DAT
HDA_BITCLK_AUDIO DMIC_DAT DMIC_CLK DMIC_CLK
A Azalia I/F EMI A
2

RA35 EMC@
4.7_0402_5% @ 10_0201_5% @ 10_0201_5% HDA_SDOUT_AUDIO
2

RA36 RA37 HDA_BITCLK_AUDIO

2 2
1

.1U_0402_16V7K

.1U_0402_16V7K

TVNST52302AB0_SOT523-3
1 1 1
CA31

CA32

CA34 CA35 DA1

@

CA33 EMC@ 0.01U_0201_16V7 0.01U_0201_16V7

33P_0402_50V8J 1 1 EMC@
1

2 @ @ 2 2
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2015/07/15 Deciphered Date 2016/07/31 Title
CODEC ALC3234/3246

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 37 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

Main Func = Audio

Layout Note: Speaker

Speaker trace width >40mil @ 2W4ohm speaker power

JSPK1
D LA23 1 2 BLM15PX181SN1D_2P AUD_SPK_R+_C 1 D
[37] AUD_SPK_R+ 1
LA24 1 2 BLM15PX181SN1D_2P AUD_SPK_R-_C 2
[37] AUD_SPK_R- 2
LA25 1 2 BLM15PX181SN1D_2P AUD_SPK_L+_C 3
[37] AUD_SPK_L+ 3
LA26 1 2 BLM15PX181SN1D_2P AUD_SPK_L-_C 4 CONN Pin Net name
[37] AUD_SPK_L- 4
5 7
[39] SW F_BSNR 5 G1
6 8 Pin1 SPK_R+
[39] SW F_BSNL 6 G2
ACES_50224-00601-001 Pin2 SPK_R-

3
CONN@
Pin3 SPK_L+

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

1000P_0402_50V7K

AZ5125-02S.R7G_SOT23-3

AZ5125-02S.R7G_SOT23-3
1 1 1 1

CA36

CA37

CA38

CA39
Pin4 SPK_L-
DA2 DA3
2 2 2 2

EMC@ EMC@

1
C C

RA43
RA42
Universal Jack (Moved to I/O Board)
1 2
[37] MIC2_VREFO
1 2
2.2K_0402_5% JHP1
2.2K_0402_5% LA19 1 2 BLM15AX700SN1D_2P RING2_R 3
[37] RING2
RA44 1 2 10_0402_1% AUD_HP1_JACK_L1 LA20 1 2 BLM15AX700SN1D_2P AUD_PORTA_L_R_B 1
[37] AUD_HP1_JACK_L
1 2 LINE1-L_C RA48 1 2 1K_0402_5%
[37] LINE1_L
CA64 10U_0603_6.3V6M~D RA46 1 2 4.7K_0402_5% 5
[37] LINE1_VREFO_L
JACK_PLUG 6
RA49 1 2 10_0402_1% AUD_HP1_JACK_R1 LA21 1 2 BLM15AX700SN1D_2P AUD_PORTA_R_R_B 2
[37] AUD_HP1_JACK_R
1 2 LINE1-L_R RA51 1 2 1K_0402_5% LA22 1 2 BLM15AX700SN1D_2P SLEEVE_R 4
[37] LINE1_R
CA65 10U_0603_6.3V6M~D RA53 1 2 4.7K_0402_5% 7
[37] LINE1_VREFO_R

AZ5123-01F-R7GR_DFN1006P2X2
1

2
RA54

CA40 100P_0402_50V8J

CA41 100P_0402_50V8J

RA55

CA42 100P_0402_50V8J
1 1 1 SINGA_2SJ3108-007111F
[37] SLEEVE

2
CA43 100P_0402_50V8J

CA60

CA61
1 CONN@

AZ5125-02S.R7G_SOT23-3

AZ5125-02S.R7G_SOT23-3
@ @ 1 1
2 2 2

10K_0402_5%

10K_0402_5%
moat

2
2

680P_0402_50V7K

680P_0402_50V7K
EMC@ EMC@ AUD_AGND
2 2 DA6

1
EMC@
Layout Note: DA5 DA4

1
Close to HDA27 EMC@ EMC@
B B

AUD_AGND AUD_AGND

JACK_PLUG 10 mils RA56 1 @ 2 0_0402_5% 10 mils

AUD_SENSE [37]

A Pilot_05 A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2015/07/15 Deciphered Date 2016/07/31 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SPKR/JACK
Size Document Number Rev

WWW.ALISALER.COM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 38 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

Subwoofer AMP

B+ B+_AMP

60mil
QA2
D SI3457BDV-T1-E3_TSOP6~D D

D
6
60mil

S
4 5
2
1

G
[38] SWF_BSNR SWF_BSNL [38]
1
RA80 1

3
CA66 1M_0402_5%
1U_0603_25V6 CA67
2

0.1U_0402_25V6

2
2 CA44 CA45
1 2 1 2

1
680P_0402_50V7K 680P_0402_50V7K

1
RA79
100K_0402_5% LA1 LA2
4.7UH +-20% DFE252012F 4.7UH +-20% DFE252012F
2
1

2
[18,32,33,34,48,49,57] SIO_SLP_S3# 2 QA1 RA57 CA46 CA47 RA58
G L2N7002WT1G_SC-70-3 1 2 1 2 1 2 1 2
S
3

10_0402_5% 330P_0402_50V7K 330P_0402_50V7K 10_0402_5%

Close IC Close IC Close IC Close IC

CA48 CA49 CA50 CA51
1 2 1 2 1 2 1 2
Close IC
0.22U_0603_50V7K 0.22U_0603_50V7K 0.22U_0603_50V7K 0.22U_0603_50V7K
B+_AMP +5VS +AMP
C Close IC C

1 @ 2 +AMP

1000P_0402_50V7K
RA75 0_0805_5%

10U_0603_25V6M
0.1U_0402_25V6
1 @ 2

24

23

22

21

20

19

18

17
1 1 1
RA76 0_0805_5%

CA54
10U_0603_25V6M
0.1U_0402_25V6
1000P_0402_50V7K

CA55

CA56
1 1 1

BSNL

OUTNL
GND

OUTNR

BSNR

GND

GND

GND
Pilot_05

CA52
2 2 2

CA57

CA53
2 2 2 25
OUTPR 16
OUTPL
26
BSPR 15
BSPL
27 UA2
PVCC 14
PVCC AM Avoidance Setting
+5VS 28 GVDD
PVCC 13
PVCC
ALC1302

1
RA74 1 2 100K_0402_5% SDZ_MUTE# 29
D2 SDZ 12 RA60
2 AVCC @
[37,48] EC_MUTE# 0_0402_5%
30
1 SDZ_MUTE# FAULTZ 11

2
Sync
3 31
[37] EAPD# INPR 10
AM0

1
BAT54A-7-F_SOT23-3 32
1U_0402_6.3V6K INNR 9 RA61

1
AM1

1U_0402_6.3V6K

10K_0402_5%
@

PBTL/BTL
1 0_0402_5%

Gain/SLV
CD91

1 33
EPAD

GVDD

MUTE
CD92

RA62
Plimit

INNL

INPL
GND

2
BTL/PBTL Setting

1
2

10K_0402_5%

2
B 2 B
[37] LINE2_L

RA63

1
10K_0402_5%
2
1

RA64
RA73
665_0402_1%

2
GVDD Gain/SLV Setting

1U_0402_6.3V6K
2

1
0_0402_5%
CD93
RA65

RA66
AUD_AGND @ 45.3K_0402_1% @
2

Layout Note:

2
Pin 31/ 32 need to differential connect to codec pin 24

CD94

CD95
Close IC Mode Gain RA65(ohm) RA67(ohm)
and close coedc AGND 1 1

1
0_0402_5%
20dB NC 0

RA67
1U_0402_6.3V6K

1U_0402_6.3V6K
2 2
26dB 75K 15K

2
Master
32dB 65K 25K
36dB 55K 35K
20dB 45K 45K
26dB 35K 55K
Slave
A
32dB 25K 65K A

36dB 0 NC

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/07/04 Deciphered Date 2013/10/28 Title
P3-SMART AMP

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 39 of 70

5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

Connector for Keyboard

JKB1
30 32
[20] KB_DET# 29 30 GND 31
KSI7
KSI6 28 29 GND
D
KSI4 27 28 D
[48] KSI[0..7] 27
KSI2 26
KSI5 25 26
KSI1 24 25
[48] KSO[0..16] 24
KSI3 23
KSI0 22 23
KSO5 21 22
KSO4 20 21
KSO7 19 20
KSO6 18 19
KSO8 17 18
KSO3 16 17
KSO1 15 16
KSO2 14 15
KSO0 13 14
KSO12 12 13
KSO16 11 12
KSO15 10 11
+3VS +3VS KSO13 9 10
+5VS KSO14 8 9
+5VS QE4 KSO9 7 8

2
DMG2301U-7_SOT23-3 KSO11 6 7
6

2
RE120 RE2 KSO10 5
5

D
100K_0402_5% RE1 3 1 1 2 CAP_LED 4
100K_0402_5% 3 4

2
3

G
240_0402_1% 2

1
1 2

G
1

2
3 1 1
[48] CAPS_LED#

D
ACES_50699-03041-P01_30P
CONN@
L2N7002WT1G_SC-70-3
QE3 1
@ CE1
0.1U_0402_10V7K~D
2

C C

Connector for Keyboard Backlight +5VS_KBL

1
CE4
1U_0402_6.3V6K
2

B
Fuse for Backlight B
+5VS_KBL
+5VS +5VS_KBL JBL1
20mil
1
RE3 1 2 47K_0402_5% 2 1
[16] KB_BL_DET 2
2 1 3
F1 KB_LED_PWM# 4 3
4

2
0.5A_13.2V_NANOSMDC050F-13.2-2
1 1 RE4 5
CE5 6 GND1
100K_0402_1% GND2
1U_0402_6.3V6K CE6
10U_0603_6.3V6M~D E-T_6913K-Y04N-00L
1

2 2
CONN@
LED Maximum Current is 273mA
1

D
KB_LED_PWM 2 QE5
[48] KB_LED_PWM G L2N7002WT1G_SC-70-3
Current limited 20mA S
3

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P03-KB Controller
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 40 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

RTC Battery non- Charge Function

+3VALW

Touch pad

2
Pilot_05 +3VS_TP
RZ32 RTC Battery +RTCBATT
100K_0402_5%
UE4 RE93
1 3VS_TP 1 @ 2 0_0603_5% JRTC

1
OUT

2
D 5 +RTCBATT 1 D
IN +RTCBATT 1
2 +CHGRTC RC11 2
4 GND 2
[48] TP_PW_EN# EN 1 1K_0402_5%
3 2 @ 1 3
OCB CE2 4 GND

1
SY6288D20AAC_SOT23-5 100K_0402_5% 0.1U_0402_10V6K GND
RZ33 2
ACES_50273-0020N-001
CONN@
W=20mils

2
W=20mils DC2
BAT54CW-7-F_SOT323-3~D

+3VS PJP1304

1
+3VS_TP 2 1
+CHGRTC 2 1 +3VLP
+RTCVCC JUMP_43X39
1 @
RE7 CC27

2
QE19A 1 2 2.4K_0402_5% W=20mils 1U_0402_6.3V6K

1 6 I2C1_SDA_TP_C 2
[20] I2C1_SDA_TP
2N7002EDW 2N SOT-363-6

RE9
5

1 2 2.4K_0402_5%

4 3 I2C1_SCK_TP_C
[20] I2C1_SCK_TP
QE19B
C 2N7002EDW 2N SOT-363-6 C

+3VS_TP +3VS_TP
PWM FAN
DE4
1

I2C1_SDA_TP_C 1 6 DAT_TP_SIO
RE87 V I/O V I/O
100K_0402_5% 2 5
Ground V BUS +3VS_TP +3VS +3VS +5VS
2

I2C1_SCK_TP_C 3 4 CLK_TP_SIO
G

V I/O V I/O
1 3 PTP_INT#_R IP4223CZ6_SO6-6
[17,48] PTP_INT#

1
D

EMC@
+3VS +5VS +5VS
@ RE121 @ RE100
QE13 10K_0402_5% 10K_0402_5%

2
L2N7002WT1G_SC-70-3

G
2

2
1
1
3 1
+3VS_TP RE82 [48] FAN1_PWM

D
+3VS_TP RE81 10K_0402_5%
100K_0402_5% Pilot_05 L2N7002LT1G_SOT23-3 JFAN1

2
JTP Q12 1

2
1
1

RE104 1 @ 2 0_0603_5% 5VS_FAN1 2

RE123 8 2 1 3 2
I2C1_SDA_TP_C 7 8 10 [48] FAN1_TACH 4 3
100K_0402_5% DE7 RB751S40T1G_SOD523-2
I2C1_SCK_TP_C 6 7 G2 9 4
6 G1 1
5 CE99 5
2

PTP_INT#_R 4 5 6 GND1
4 0.01U_0402_16V7K GND2
B 3 B
[48] PTP_DIS# 2 3 2
DAT_TP_SIO E-T_3806K-F04N-03R
[48] DAT_TP_SIO 2
CLK_TP_SIO 1 CONN@
[48] CLK_TP_SIO 1
1 1 ACES_51524-0080N-001
22P_0402_50V8J
CE80

22P_0402_50V8J
CT79

@ @ CONN@
1 1
+3VS
CE9 CE10 2 2 +3VS +5VS
22P_0402_50V8J 22P_0402_50V8J
2 2
@ @

1
+3VS +5VS +5VS @ RE122
10K_0402_5% @ RE101

2
G
10K_0402_5%

2
1
3 1
[48] FAN2_PWM

D
RE84
RE83 10K_0402_5% L2N7002LT1G_SOT23-3
100K_0402_5% Pilot_05 Q13 JFAN2

2
2 1
RE105 1 @ 2 0_0603_5% 5VS_FAN2 2 1
2 1 3 2
[48] FAN2_TACH 4 3
DE9 RB751S40T1G_SOD523-2
4
1
CE100 5
6 GND1
0.01U_0402_16V7K GND2
2 E-T_3806K-F04N-03R
A
CONN@ A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title
FAN/TP/KB/PWR SW

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom LA-D991P 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 41 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

CPU TOP side

Main Func : Fan/Thermal
+3VALW

1
RT1
7.87K_0402_1%

2
D D
[48] VCIN0_PH

1
1
CT80
HT1 0.01U_0402_16V7K
100K +-1% 0402 B25/50 4250K
2

2
Fintek thermal sensor
placed TOP near between GPU & CPU
+3VS

1
+3VS
CT81
0.1U_0201_10V6K

1
2
RT3
10K_0402_5%
C BOTTOM DIMM REMOTE1+ Close UT1 UT1 @ C

2
1
1

C CT83 1 10 THM_SML1_CLK
QT1 2 2200P_0402_25V7K CT82 VCC SCL
MMBT3904W H_SOT323-3 B @ 2200P_0402_25V7K REMOTE1+ 2 9 THM_SML1_DATA
2

E 2 DP1 SDA
3

REMOTE1- REMOTE1- 3 8
DN1 ALERT#
REMOTE2+ REMOTE2+ 4 7 MAINPW ON
BOTTOM SSD DP2 THERM#
1 REMOTE2- 5 6
DN2 GND
1

C CT84
QT3 2 2200P_0402_25V7K CT85
MMBT3904W H_SOT323-3 B @ 2200P_0402_25V7K
2

E 2 F75303M_MSOP10
3

REMOTE2-
+3VS
+3VS
Address 1001_101xb
REMOTE1,2 (+/-) : 2nd source

1
1
Trace width/space:10/10 mil SA000029210-->EMC1403-2-AIZL-TR RT4
10K_0402_5%
RT5
10K_0402_5% QT2A
Trace length:<8"

2
2N7002EDW 2N SOT-363-6

2
2
THM_SML1_DATA 1 6 GPU_THM_SMBDAT [18,23,48]
B B

5
THM_SML1_CLK 4 3 GPU_THM_SMBCLK [18,23,48]

QT2B
2N7002EDW 2N SOT-363-6

RT6 1 @ 2 0_0402_5%

RT7 1 @ 2 0_0402_5%

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2014/04/01 Deciphered Date 2015/04/30 Title

Thermal Sensor

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 42 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

M.2 Slot-A Key-A (WLAN + BT)

WLAN_WIGIG60GHZ_DIS#_R 2 1
W LAN_WIGIG60GHZ_DIS# [20]
DN1
RB751S40T1G_SOD523-2
+3VS +3VS_WLAN
RM22 BT_RADIO_DIS#_R 2 1
BT_RADIO_DIS# [20]
0_0603_5%
1 @ 2 DN2
D D
RB751S40T1G_SOD523-2

Pilot_05

+3VS_WLAN
CONCR_213AAAA32FA
JNGFF1
1 2
USB20_P4_R 3 1 2 4
3 4

.1U_0402_16V7K
USB20_N4_R 5 6
7 5 6
7

22U_0603_6.3V6M
1 1

CN2
CN1
8
9 8 10 2 2
11 9 10 12
13 11 12 14
15 13 14 16
15 16 LPC_LAD2 [19,48]
17 18
[19,48] LPC_LFRAME# 19 17 18 20 LPC_LAD0 [19,48]
[19,48] LPC_LAD3 19 20 LPC_LAD1 [19,48]
21 22
23 21 22 24 CLK_PCI_LPDEBUG [19,48] Close to JNGFF
25 23 24 26
CN21 1 2 0.1U_0402_10V7K PCIE_PTX_WLANRX_RE_P6 27 25 26 28
[19] PCIE_PTX_WLANRX_P6 27 28
[19] PCIE_PTX_WLANRX_N6 CN20 1 2 0.1U_0402_10V7K PCIE_PTX_WLANRX_RE_N6 29 30 E51_TX2
31 29 30 32
33 31 32 34
[19] PCIE_PRX_WLANTX_P6 33 34
[19] PCIE_PRX_WLANTX_N6 35 36 E51_TX1
37 35 36 38
39 37 38 40
[17] CLK_PCIE_WLAN 39 40
C [17] CLK_PCIE_WLAN# 41 42 SUSCLK_R RN1 1 @ 2 0_0402_5% SUSCLK [18,44,48] C
43 41 42 44
43 44 PCH_PLTRST#_EC [17,23,44,47,48]
[17] WLAN_CLK_REQ# 45 46 BT_RADIO_DIS#_R
PCIE_WAKE# 47 45 46 48 WLAN_WIGIG60GHZ_DIS#_R
[18,47,48] PCIE_WAKE# 47 48
49 50
51 49 50 52
53 51 52 54
55 53 54 56
57 55 56 58
59 57 58 60 +3VS_WLAN
61 59 60 62
63 61 62 64
65 63 64 66
65 66

22U_0603_6.3V6M

.1U_0402_16V7K
67
67

Reserve for EMI 1 1

CN6

CN7
69 68
GND GND

2 2
+3VS_WLAN +3VS_WLAN CONN@

1 1
@ CN8 @ CN9
.1U_0402_16V7K 1000P_0402_50V7K
2 2 Close to JNGFF

EMC@
MCM1012B900F06BP_4P
[19] USB20_P4 4 3 USB20_P4_R
B B

[19] USB20_N4 1 2 USB20_N4_R

LN1

Reserve for NGFF Debug Card

+3VALW +3VS_WLAN

RN2 1 @ 2 0_0402_5%

RN3 1 @ 2 0_0402_5% E51_TX1

[48] HOST_DEBUG_TX
A A
RN5 1 @ 2 0_0402_5% E51_TX2

Pilot_05
1

RN4
@ 100K_0402_5%
2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NGFF
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C LA-D991P 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 43 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

M.2 Slot-C Key-M (SSD)

+3.3VDX_SSD

D RF Reserved. D

JNGFF2
EMC@ EMC@

4.7U_0603_6.3V6K
CD36

0.1U_0402_10V6K

0.01U_0402_16V7K

15P_0402_50V8J
CD41
1 2 1 1 1 1 1
1 2

CD38

CD39

47P_0402_50V8J
CD40
+3VS +3.3VDX_SSD 3 4
5 3 4 6
[16] PCIE_PRX_SSDTX_N12 5 6
7 8
[16] PCIE_PRX_SSDTX_P12 7 8 2 2 2 2 2
9 10 SSD_LED# SSD_LED# [49]
@ PJP36 CD37 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_N12_C 11 9 10 12
[16] PCIE_PTX_SSDRX_N12 11 12
1 2 [16] PCIE_PTX_SSDRX_P12 CD42 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_P12_C 13 14
1 2 15 13 14 16
17 15 16 18
JUMP_43X39 [16] PCIE_PRX_SSDTX_N11 17 18
[16] PCIE_PRX_SSDTX_P11 19 20
21 19 20 22
PCIe SSD CD43 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_N11_C 23 21 22 24
Pilot_05 [16] PCIE_PTX_SSDRX_N11 23 24
CD44 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_P11_C 25 26
[16] PCIE_PTX_SSDRX_P11 25 26
27 28
29 27 28 30
[16] PCIE_PRX_SSDTX_N10 29 30
31 32
[16] PCIE_PRX_SSDTX_P10 31 32
33 34
CD45 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_N10_C 35 33 34 36 RD7 2 @ 1 10K_0402_5%
[16] PCIE_PTX_SSDRX_N10 35 36 +3.3VDX_SSD
CD46 1 2 0.22U_0402_10V6K PCIE_PTX_SSDRX_P10_C 37 38 RD59 1 @ 2 0_0402_5%
[16] PCIE_PTX_SSDRX_P10 37 38 mSATA_DEVSLP [19]
39 40
41 39 40 42
[16] SATA_PRX_SSDTX_P0A 41 42 Pilot_05
[16] SATA_PRX_SSDTX_N0A 43 44
45 43 44 46
SATA SSD CD53 1 2 0.22U_0402_10V6K SATA_PTX_SSDRX_N0A_C 47 45 46 48
[16] SATA_PTX_SSDRX_N0A 47 48
[16] SATA_PTX_SSDRX_P0A CD51 1 2 0.22U_0402_10V6K SATA_PTX_SSDRX_P0A_C 49 50 PCH_PLTRST#_EC [17,23,43,47,48]
51 49 50 52
51 52 SSD_CLK_REQ# [17]
[17] CLK_PCIE_SSD# 53 54 SSD_PCIE_WAKE# RD8 1 2 10K_0402_5% +3.3VDX_SSD
55 53 54 56
[17] CLK_PCIE_SSD 55 56
57 58
57 58
Pilot_05
RD58 1 @ 2 0_0402_5%
[16] mCARD_PCIE#_SATA
67 68 RD9 1 @ 2 0_0402_5%
67 68 SUSCLK [18,43,48]
RD10 1 @ 2 10K_0402_5% 69 70
69 70 +3.3VDX_SSD
71 72
73 71 72 74
C C
75 73 74
75

76 77
GND GND

LOTES_APCI0096-P002A
CONN@

HDD CONN

+5VS +5VS_HDD

1 @ 2

0_0805_5%
RZ34
B B

Pilot_05

JHDD1

12
SATA_PTX_DRX_P1B CS28 1 2 0.01U_0402_16V7K SATA_PTX_DRX_P1B_RC 11 12 14
[16] SATA_PTX_DRX_P1B 11GND
SATA_PTX_DRX_N1B CS27 1 2 0.01U_0402_16V7K SATA_PTX_DRX_N1B_RC 10 13
[16] SATA_PTX_DRX_N1B 10GND
9
SATA_PRX_DTX_N1B CS25 1 2 0.01U_0402_16V7K SATA_PRX_DTX_N1B_RC 8 9
[16] SATA_PRX_DTX_N1B 8
SATA_PRX_DTX_P1B CS26 1 2 0.01U_0402_16V7K SATA_PRX_DTX_P1B_RC 7
[16] SATA_PRX_DTX_P1B 7
6
RD62 1 @ 2 0_0402_5% HDD_DEVSLP_R 5 6
[19] HDD_DEVSLP 5
4
3 4
+5VS_HDD 3
2
1 2
1
ACES_50554-01201-001
CONN@

Place near HDD CONN (JHDD1)

+5VS_HDD

A A
1 1 1 1
CS13
CS12 0.1U_0402_10V6K CS14 CS15
1000P_0402_50V7K 1U_0402_6.3V6K 10U_0603_6.3V6M
2 2 2 2

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SSD
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C LA-D991P 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 44 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

USB Powershare
Device Control Pins CTL1 = 0 : Enable Power Share DCP mode in Suspend mode
Flow Line
Condition Suspend mode
CTL1 CTL2 CTL3 ILIM_SEL
CTL1 = 1 : Disable Power Share in Suspend mode (For Support USB wake)
0 1 1 X DCP AUTO
D D
ILIM_SEL = 0 : SDP mode (0.9A by ILIM_LO setting)
1 1 1 0 SDP
S0 mode
1 1 1 1 CDP ILIM_SEL = 1 : CDP mode (STATUS# trigger by ILIM_HI =2.2A)

+3VALW
USB3.0 / USB2.0 Port1
RI30 1 2 100K_0402_5% ILIM_SEL_R

RI9 1 2 100K_0402_5% USB_R_CTL

RI10 1 2 100K_0402_5% USB_PWR_SHR_EN_R#

+5VALW
RI51 1 2 1M_0402_5% USB_POWERSHARE_VBUS_EN
+5V_CHGUSB_2

C US1 C
0.1U_0402_10V6K 2 1 CI23 1 12
IN OUT
2
[19] USB20_N2 DM_OUT
3
[19] USB20_P2 DP_OUT 10 USBP2_D+
DP_IN USBP2_D+ [46]
13 11 USBP2_D-
[19] USB_OC1# FAULT# DM_IN USBP2_D- [46]
ILIM_SEL_R 4
ILIM_SEL
USB_POWERSHARE_VBUS_EN 5 15 ILIM_LO1 1 2
[48] USB_POWERSHARE_VBUS_EN EN ILIM_LO 16 ILIM_HI1 RI491 2 22.1K_0402_1%
ILIM_HI RI45 22.1K_0402_1%
USB_PWR_SHR_EN_R# 6
[48] USB_PWR_SHR_EN_R# CTL1
7 9
USB_R_CTL 8 CTL2 NC 14
CTL3 GND 17
GNDP
TPS2544RTER_WQFN16_3X3

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title
USB Powershare

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 45 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

+5V_CHGUSB_1
Pilot_05
+5VALW US2
1
D 5 OUT D
IN 2
4 GND
1 [48,49] USB_EN# EN
CI24 Active Low 3
1U_0402_6.3V6K OCB USB_OC0# [19]
SY6288D20AAC_SOT23-5
2

USB3.0 / USB2.0 Port1

LI2
USB20_N1 1 2 USBP1_R_D-
C [19] USB20_N1 C

USB20_P1 4 3 USBP1_R_D+
[19] USB20_P1
MCM1012B900F06BP_4P
DI9 EMC@ +5V_CHGUSB_1
EMC@
USB3RN1_D- 1 1 10 9 USB3RN1_D- JUSB1
1
2 2 VBUS
USB3RP1_D+ 9 8 USB3RP1_D+ USBP1_R_D- 2
D-

47U_0805_6.3V6M

10U_0603_6.3V6M
USBP1_R_D+ 3
D+

0.1U_0402_10V6K
USB3TN1_D- 4 4 7 7 USB3TN1_D- 4
CI20 1 2 0.1U_0402_10V6K USB3T_P1 RI37 1 @ 2 0_0402_5% USB3TP1_D+ USB3RN1_D- 5 GND
[19] USB3TP1 1 1 1 StdA-SSRX-

CI18

CI19
USB3TP1_D+ 5 5 6 6 USB3TP1_D+ USB3RP1_D+ 6 10
StdA-SSRX+ GND

CI17
7 11
CI16 1 2 0.1U_0402_10V6K USB3T_N1 RI38 1 @ 2 0_0402_5% USB3TN1_D- 3 3 USB3TN1_D- 8 GND-DRAIN GND 12
[19] USB3TN1 StdA-SSTX- GND

3
2 2 2 USB3TP1_D+ 9 13
StdA-SSTX+ GND

DI10 EMC@
AZ5125-02S.R7G_SOT23-3
8
LOTES_AUSB0015-P002A
CONN@
AZ1045-04F_DFN2510P10E-10-9

[19] USB3RP1 RI39 1 @ 2 0_0402_5% USB3RP1_D+ Place close to JUSB1

1
RI40 1 @ 2 0_0402_5% USB3RN1_D-
[19] USB3RN1

Pilot_05,06
B B

LI5
USB3.0 / USB2.0 Port2 (Power share)
USBP2_D- 1 2 USBP2_R_D-
[45] USBP2_D-

USBP2_D+ 4 3 USBP2_R_D+
[45] USBP2_D+
MCM1012B900F06BP_4P +5V_CHGUSB_2
DI7 EMC@ JUSB2
EMC@
USB3RN2_D- 1 1 10 9 USB3RN2_D- 1
USBP2_R_D- 2 VBUS
D-

47U_0805_6.3V6M

10U_0603_6.3V6M
USB3RP2_D+ 2 2 9 8 USB3RP2_D+ USBP2_R_D+ 3
D+

0.1U_0402_10V6K
4
4 4 GND
USB3TN2_D- 7 7 USB3TN2_D- 1 1 1 USB3RN2_D- 5
StdA-SSRX-

CI12

CI13
CI10 1 2 0.1U_0402_10V6K USB3T_P2 RI41 1 @ 2 0_0402_5% USB3TP2_D+ USB3RP2_D+ 6 10
[19] USB3TP2 StdA-SSRX+ GND

CI11
USB3TP2_D+ 5 5 6 6 USB3TP2_D+ 7 11
USB3TN2_D- 8 GND-DRAIN GND 12
StdA-SSTX- GND

3
CI9 1 2 0.1U_0402_10V6K USB3T_N2 RI42 1 @ 2 0_0402_5% USB3TN2_D- 3 3 2 2 2 USB3TP2_D+ 9 13
[19] USB3TN2 StdA-SSTX+ GND

DI8 EMC@
AZ5125-02S.R7G_SOT23-3
8 LOTES_AUSB0015-P002A
CONN@
AZ1045-04F_DFN2510P10E-10-9

Place close to JUSB2

1
A RI43 1 @ 2 0_0402_5% USB3RP2_D+ A
[19] USB3RP2

RI44 1 @ 2 0_0402_5% USB3RN2_D-

[19] USB3RN2

Pilot_05,06 Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title
USB conn.

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 46 of 70
5 4 3 2 1
 WWW.AliFixit.COM
1 2 3 4 5

W=40mils
+3VALW
+LAN_IO rising time : >1ms and <100ms
W=40mils +LAN_IO
CL39 W=40mils
1U_0402_6.3V6K UL2 1.5A
2 1 5 1
IN OUT

0.1U_0402_10V6K

0.1U_0402_10V6K
2 +3VALW 1 1 1 1

4.7U_0402_6.3V6M

4.7U_0402_6.3V6M
GND @ @
A A
4 3 RL41 1 2 100K_0402_5% CL15 CL19 CL43 CL44
[48] LAN_EN EN OC
2 2 2 2

2
SY6288C20AAC_SOT23-5
RL27
100K_0402_5%

These caps close to Pin 11,32

1
W=20mils +LAN_VDD

+LAN_IO +LAN_VDD
These caps close to Pin 17,18/ 13,14

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
UL1 1 1 1

1U_0402_6.3V6K
0.1U_0402_10V6K

0.1U_0402_10V6K
CL30 1 2 0.1U_0402_10V6K PCIE_PRX_LANTX_P3_C 17 1 MDI0+ 1 1 1 CL20 CL22 CL32
[19] PCIE_PRX_LANTX_P5 HSOP MDIP0
CL31 1 2 0.1U_0402_10V6K PCIE_PRX_LANTX_N3_C 18 4 MDI1+
[19] PCIE_PRX_LANTX_N5 HSON MDIP1 2 2 2
2 MDI0- CL21 CL34 CL35
MDIN0 5 MDI1-
CL47 1 2 0.1U_0402_10V6K PCIE_PTX_LANRX_P5_C 13 MDIN1 2 2 2
[19] PCIE_PTX_LANRX_P5 HSIP
CL48 1 2 0.1U_0402_10V6K PCIE_PTX_LANRX_N5_C 14
[19] PCIE_PTX_LANRX_N5 HSIN 8 +LAN_VDD
AVDD10 30
19 AVDD10 32
[17,23,43,44,48] PCH_PLTRST#_EC PERSTB AVDD33 +LAN_IO
23
RL1 1 @ 2 0_0402_5% ISOLATEB 20 DVDD33
[18,47] LAN_DISABLE#_R ISOLATEB 15
[18,43,48] PCIE_WAKE#
RL2 1
RL42 1
@ 2 0_0402_5%
2 1K_0402_5%
LAN_WAKE#_R 21
LANWAKEB
REFCLK_P
REFCLK_N
16
CLK_PCIE_LAN
CLK_PCIE_LAN#
[17]
[17] These caps close to Pin 23 These caps close to Pin 22 These caps close to Pin 3,8,30
+LAN_IO
B @ 26 12 LAN_CLKREQ# B
GPO CLKREQB LAN_CLKREQ# [17]
RL43 1 @ 2 0_0402_5% 28 XTLO
[18,47] LAN_DISABLE#_R CKXTAL1 29 XTLI
3 CKXTAL2
+LAN_VDD AVDD10
Pilot_05 MDI2+ 6 27 @ T944PAD~D
MDI2- 7 MDIP2 LED0 25 @ T95 PAD~D
MDI3+ 9 MDIN2 LED1 CL36
MDI3- 10 MDIP3 31 RL31 2 1 2.49K_0402_1% XTLI 1 2
11 MDIN3 RSET
+LAN_IO AVDD33
22 33 YL2 10P_0402_25V8J
+3VS +LAN_VDD DVDD10 GND
+LAN_VDD 24 2 1
REGOUT GND0 XTAL0
1 1 RTL8111H-CG_QFN32_4X4 4 3
1

CL24 GND1 XTAL1

RL33 0.1U_0402_10V6K CL42 @ 25MHZ_10PF_7V25000014 CL37
1K_0402_5% 0.1U_0402_10V7K XTLO 1 2
2 2
10P_0402_25V8J
2

ISOLATEB
1

RL30
15K_0402_1%
2

JLAN
TL2
+V_DAC 1 24 MCT0
C TCT1 MCT1 C
MDI3- 2 23 MDO3-
TD1+ MX1+ MDO3- 8
MDI3+ 3 22 MDO3+ PR4-

+V_DAC 4
TD1- MX1-
21 MCT1
Place close to TCT pin MDO3+ 7
PR4+
TCT2 MCT2 MDO1- 6
MDI2- 5 20 MDO2- RL19 1 2 75_0402_5% PR2-
TD2 MX2+ RL20 1 2 75_0402_5% MDO2- 5
MDI2+ 6 19 MDO2+ RL39 1 2 75_0402_5% PR3-
TD2- MX2- RL40 1 2 75_0402_5% MDO2+ 4
+V_DAC 7 18 MCT2 PR3+
TCT3 MCT3 MDO1+ 3
MDI1- 8 17 MDO1- PR2+
TD3+ MX3+ MDO0- 2
MDI1+ 9 16 MDO1+ PR1- 10
TD3- MX3- 1 SHLD2
EMC@ MDO0+ 1 9
+V_DAC 10 15 MCT3 CL33 PR1+ SHLD1
TCT4 MCT4 10P_1206_2KV8J
MDI0- 11 14 MDO0- 2
TD4+ MX4+
1
CL41 MDI0+ 12 13 MDO0+
0.01U_0402_16V7K TD4- MX4- SANTA_130452-0E1
2 CONN@
MHPC_NS892407

D D

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2013/08/01 Deciphered Date 2014/07/31 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
LAN RTL8111GUS-CG
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 47 of 70
1 2 3 4 5
 WWW.AliFixit.COM
5 4 3 2 1

RPE2 10K_0804_8P4R_5% +3VALW +3VALW_EC

RE12 +3VALW_EC RE13 For +3VALW_EC
+3VALW +3VS
5 4 KSI0 0_0603_5% RE125 For 10K_0402_1%
6 3 KSI1 1 2 SKU ID Select
SKU ID SKL Board ID Select
13.7K_0402_1% Board ID

1
0.1U_0402_10V6K
7 2 KSI2 1 @ EVT 10K 17.8K_0402_1%

CE85

10U_0603_6.3V6M

0.1U_0402_10V6K

1000P_0402_50V7K
EMC@

1000P_0402_50V7K
EMC@

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K
8 1 KSI3 1 1 2 2 1 1 1 1 1 RE125 DVT1 13.7K 22.1K_0402_1% RE13

CE62

CE65

CE66

CE67

CE68

CE69
SKL 14'' 10K 10K_0402_1% Ra @ 10K_0402_1% DVT2 17.8K 27K_0402_1% Ra 27K_0402_1%~D

CE89
RPE3 10K_0804_8P4R_5% Pilot_05 SKL 15'' 13.7K 13.7K_0402_1% Pilot 22.1K 32.4K_0402_1%
2 KBL 14'' 17.8K 17.8K_0402_1% 37.4K_0402_1%

2
5 4 KSI4 2 2 1 1 2 2 2 2 2 KBL15'' 22.1K 22.1K_0402_1% SKU_ID 49.9K_0402_1% BOARD_ID Pilot_04

CE63

CE64
6 3 KSI5 57.6K_0402_1%

0.1U_0402_10V6K

0.1U_0402_10V6K
7 2 KSI6 UE6 @ 1 64.9K_0402_1% 1

2
CE104

CE98
8 1 KSI7 4 2 H_PROCHOT_EC 73.2K_0402_1%
[9,54,55,63] H_PROCHOT# Y A 82.5K_0402_1%

NC
Rb Rb

2
Pilot_05 @ RE124 93.1K_0402_1% RE14
1 8 KSO0 SN74LVC1G06DCKR_SC70-5 RE27 2 100K_0402_1% 100K_0402_1% 2 100K_0402_1%
1 RE13 For

3
2 7 KSO1 100K_0402_5% KBL Board ID Select 107K_0402_1%

1
3 6 KSO2 CE86 RE16 +3VALW_EC RE15 120K_0402_1%
D D
4 5 KSO3 47P_0402_50V8J 0_0603_5% 0_0603_5% EVT 13.7K 137K_0402_1%

1
2 1 2 +RTCVCC_VBAT 1 2 DVT1 17.8K 154K_0402_1%
RPE4 +RTCVCC @ @ DVT2 22.1K 200K_0402_1%
1
100K_0804_8P4R_5% EC_AGND Pilot 27K 232K_0402_1% EC_AGND
1 8 KSO4 CE73 Pilot_05
2 7 KSO5 0.1U_0402_10V6K
3 6 KSO6 2

122

103
4 5 KSO7

43
82

19
65
5
UE1 CE71
RPE5 54 1 2 +3VALW_EC

VTR
VTR
VTR
VTR
VTR
VTR
VBAT
100K_0804_8P4R_5% VTR_33_18
1 8 KSO10 0.1U_0402_10V6K PECI_EC PBAT_CHG_SMBDAT 1 2
2 7 2 PECI_EC [9,16]
KSO11 KSO0 RE43 4.7K_0402_5%
GPIO027/KSO00/PVT_IO1

1
3 6 KSO12 KSO1 14 8 PBAT_CHG_SMBDAT PBAT_CHG_SMBCLK 1 2
4 5 15 GPIO015/KSO01/PVT_nCS GPIO007/SMB01_DATA/SMB01_DATA18 9 PBAT_CHG_SMBDAT [53,55]
KSO13 KSO2 PBAT_CHG_SMBCLK RE44 4.7K_0402_5%
16 GPIO016/KSO02/PVT_SCLK GPIO010/SMB01_CLK/SMB01_CLK18 11 PBAT_CHG_SMBCLK [53,55]
KSO3 GPU_THM_SMBDAT GPU_THM_SMBDAT 1 2
37 GPIO017/KSO03/PVT_IO0 GPIO012/SMB02_DATA/SMB02_DATA18 12 GPU_THM_SMBDAT [18,23,42]
RPE6 KSO4 GPU_THM_SMBCLK DE8 RE45 2.2K_0402_5%
38 GPIO045/BCM_nINT1/KSO04 GPIO013/SMB02_CLK/SMB02_CLK18 89 GPU_THM_SMBCLK [18,23,42]
100K_0804_8P4R_5% KSO5 AZ5125-01H.R7G_SOD523-2 GPU_THM_SMBCLK 1 2
1 8 39 GPIO046/BCM_DAT1/KSO05 GPIO130/SMB03_DATA/SMB03_DATA18 91 SYS_PWROK [18]
KSO8 [40] KSI[0..7] KSO6 L_BKLT_EN_EC @ RE46 2.2K_0402_5%
2 7 50 GPIO047/BCM_CLK1/KSO06 GPIO131/SMB03_CLK/SMB03_CLK18 96 L_BKLT_EN_EC [16] 1 2
KSO15 KSO7 LID_CLOSE# PTP_INT#_EC
3 6 KSO14 KSO8 46 GPIO025/KSO07/PVT_IO2 GPIO141/SMB04_DATA/SMB04_DATA18 97 RE53 100K_0402_5%

2
4 5 [40] KSO[0..16] 68 GPIO055/PWM2/KSO08/PVT_IO3 GPIO142/SMB04_CLK/SMB04_CLK18 PBAT_PRES# [53,54,55] 1 2
KSO16 KSO9 BREATH_LED#_EC
KSO10 72 GPIO102/KSO09/CR_STRAP 40 FAN1_TACH RE119 100K_0402_5%
GPIO106/KSO10 GPIO050/TACH0 FAN1_TACH [41] 1
RPE7 KSO11 74 41 FAN2_TACH FAN2_TACH [41]
100K_0804_8P4R_5% KSO12 75 GPIO110/KSO11 GPIO051/TACH1 CE76
2 1 KSO9 KSO13 76 GPIO111/KSO12 44
RE30 100K_0402_5% KSO14 77 GPIO112/PS2_CLK1A/KSO13 MEC1404 GPIO053/PWM0 45 KB_LED_PWM [40] 2
100P_0402_50V8J
2 1 86 GPIO113/PS2_DAT1A/KSO14 GPIO054/PWM1 BEEP [37]
USB_EN# KSO15 RE116
RE29 100K_0402_5% KSO16 92 GPIO125/KSO15 47 FAN1_PWM 0_0402_5% IMVP_VR_ON 1 @ 2
2 1 93 GPIO132/KSO16 GPIO056/PWM3 34 FAN1_PWM [41] 1 2
BAT1_LED# FAN2_PWM VREF_CPU +1VALW RE23 10K_0402_5%
[40] CAPS_LED# GPIO140/KSO17 GPIO030/BCM_nINT0/PWM4 35 FAN2_PWM [41] 1 2
RE39 100K_0402_5% @ ME_FWP_EC @
2 1 98 GPIO031/BCM_DAT0/PWM5 36 EC_WAKE# [18]
BAT2_LED# KSI0 1 RE21 1K_0402_5%
99 GPIO143/KSI0/nDTR GPIO032/BCM_CLK0/PWM6 4 PS_ID [53] 2 1
RE113 100K_0402_5% KSI1 Pilot_05 L_BKLT_EN_EC
6 GPIO144/KSI1/nDCD GPIO002/PWM7 PCIE_WAKE# [18,43,47]
KSI2 CE77 RE114 100K_0402_5%
KSI3 7 GPIO005/SMB00_DATA/SMB00_DATA18/KSI2 1 BAT1_LED# 0.1U_0402_10V6K
104 GPIO006/SMB00_CLK/SMB00_CLK18/KSI3 GPIO157/LED0/TST_CLK_OUT 106 BAT1_LED# [49] 2
KSI4 BAT2_LED#
105 GPIO147/KSI4/nDSR GPIO156/LED1 70 BAT2_LED# [49]
C KSI5 BREATH_LED#_EC C
107 GPIO150/KSI5/nRI GPIO104/LED2 BREATH_LED#_EC [49]
KSI6 +3VALW
KSI7 108 GPIO151/KSI6/nRTS 80 ME_FWP_EC
GPIO152/KSI7/nCTS GPIO116/TFDP_DATA/UART_RX 81 ME_FWP_EC [18]
HOST_DEBUG_TX
GPIO117/TFDP_CLK/UART_TX HOST_DEBUG_TX [43]

1
100K_0402_5%
78
+3VS_TP [41] CLK_TP_SIO 79 GPIO114/PS2_CLK0 90 PTP_DIS#_R RE57 1 @ 2 0_0402_5% PTP_DIS# Pilot_05
[41] DAT_TP_SIO GPIO115/PS2_DAT0 GPIO035/SB-TSI_CLK PTP_DIS# [41]

RE25
52 94 PECI_MEC1404 RE17 1 2 43_0402_1% PECI_EC
[18] SIO_PWRBTN# 88 GPIO026/PS2_CLK1B GPIO033/PECI_DAT/SB_TSI_DAT
PCH_RSMRST#
[18] PCH_RSMRST# GPIO127/PS2_DAT1B
RE24 1 2 4.7K_0402_5% CLK_TP_SIO 95 VREF_CPU RE68

2
RE55 1 2 4.7K_0402_5% DAT_TP_SIO LPC_LAD0 59 VREF_CPU 0_0402_5%
[19,43] LPC_LAD0 60 GPIO040/LAD0 101 1 2
LPC_LAD1 ICSP_CLK LID_CLOSE#
[19,43] LPC_LAD1 61 GPIO041/LAD1 GPIO145/ICSP_CLOCK 102 LID_CL_SIO# [49]
LPC_LAD2 ICSP_DAT @
[19,43] LPC_LAD2 GPIO042/LAD2 GPIO146/ICSP_DATA

0.047U_0402_16V4Z
LPC_LAD3 62 87 ICSP_CLR
[19,43] LPC_LAD3 58 GPIO043/LAD3 ICSP_MCLR
CE78 RE10 LPC_LFRAME# Pilot_05 Pilot_05
[19,43] LPC_LFRAME# GPIO044/nLFRAME

CE8
4.7P_0402_50V8C 10_0402_5% PCH_PLTRST#_EC 56 119 EC_MUTE#_R RE58 1 @ 2 0_0402_5% EC_MUTE#
1 2 1 2 EMC@ [17,23,43,44,47] PCH_PLTRST#_EC 57 GPIO064/nLRESET BGPO/GPIO004 120 EC_MUTE# [37,39] 1 2 +3VLP @
63 GPIO034/PCI_CLK SYSPWR_PRES/GPIO003 121 RE20 1K_0402_5%
[19] CLK_PCI_LPC_MEC

2
[18] CLKRUN# 55 GPIO067/nCLKRUN VCI_OUT/GPIO036 126 ALWON [56]
EMC@ USBCHG_DET# RE52 1 2 100K_0402_5%
+RTCVCC
[19] IRQ_SERIRQ 10 GPIO063/SER_IRQ nVCI_IN1/GPIO162 127 POWER_SW_IN#
[17] SIO_EXT_SMI# GPIO011/nSMI/nEMI_INT nVCI_IN0/GPIO163

1
100K_0402_5%
49 128
[41] TP_PW_EN# 53 GPIO060/KBRST VCI_OVRD_IN/GPIO164 ACAV_IN [18,54,55]
[19] SIO_RCIN# GPIO061/nLPCPD +3VALW_EC

RE22
66 23 SIO_SLP_S3#
[20] SIO_EXT_SCI# GPIO100/nEC_SCI GPIO160/DAC_0 24 SIO_SLP_S3# [18,32,33,34,39,49,57]
+RTCVCC
1 2 15_0402_1% 32 GPIO161/DAC_1 22 DGPU_PWRGD_EC [17]
RE40 EC_SPI_CLK

2
[17] EC_SPI_CLK_R GPIO126/SHD_SCLK DAC_VREF

0.1U_0402_10V6K
RE41 1 2 15_0402_1% EC_SPI_SI 28 1
[17] EC_SPI_SI_R GPIO133/SHD_IO0

1
CE79

100K_0402_5%
RE42 1 2 15_0402_1% EC_SPI_SO 29 85 CMP_VOUT0
[17] EC_SPI_SO_R GPIO134/SHD_IO1 GPIO124/CMP_VOUT0 CMP_VOUT0 [23,56]

RE31
30 20 CMP_VIN0 1 @ 2
[49] SATA_LED_EN 31 GPIO135/SHD_IO2 GPIO020/CMP_VIN0 25 VCIN0_PH [42]
VCREF0 RE73 0_0402_5%
RE59 1 @ 2 0_0402_5% EC_SPI_CS# 27 GPIO136/SHD_IO3 GPIO165/CMP_VREF0 2
[17] EC_SPI_CS#_R GPIO123/SHD_nCS Pilot_05
83 H_PROCHOT_EC

2
67 GPIO120/CMP_VOUT1 21
Pilot_05 [18,32,33,49,69] SIO_SLP_S4# GPIO101/SPI_CLK GPIO021/CMP_VIN1 GPU_PWR_LEVEL [23] +3VALW
69 26 POWER_SW_IN# 1 2
71 GPIO103/SPI_IO0 GPIO166/CMP_VREF1/UART_CLK LCD_TST [34] POWER_SW#_MB [49]
RE47 10K_0402_5%
[45] USB_POWERSHARE_VBUS_EN GPIO105/SPI_IO1

1U_0402_6.3V6K
42 118 CMP_STRAP0 RE28 1 2 10K_0402_5%
[18] ME_SUS_PWR_ACK GPIO052/SPI_IO2 GPIO024/CMP_STRAP0 +3VALW

1
PTP_INT#_EC 33 117
GPIO062/SPI_IO3 GPIO023/ADC6/A20M PANEL_BKEN_EC [34]

CE12
3 116 RE34
[47] LAN_EN GPIO001/SPI_nCS/32KHZ_OUT GPIO022/ADC5 109 SIO_EXT_WAKE# [20]
10K_0402_1%

2
13 GPIO153/ADC4 110 USB_PWR_SHR_EN_R# [45]
B I_ADP_R B
1 2 0_0402_5% [46,49] USB_EN# 48 nRESET_IN/GPIO014 GPIO154/ADC3 111
[18,56] ALL_SYS_PWRGD RE62 @ RUNPWROK BOARD_ID

2
GPIO057/VCC_PWRGD GPIO155/ADC2
VSS_VBAT

73 113 VCREF0
[18,33] IMVP_VR_ON GPIO107/nRESET_OUT VR_CAP GPIO122/ADC1 114 LCD_VCC_TEST_EN [32]
Pilot_05 SKU_ID
GPIO121/ADC0

1
0.1U_0402_10V6K
AVSS

[18,43,44] SUSCLK RE106 1 @ 2 0_0402_5% MEC_XTAL2 125 115 1

VSS
VSS
VSS
VSS
VSS

XTAL2 ADC_VREF +3VALW_EC

CE91
MEC_XTAL1 RE66 2 1 0_0402_5% MEC_XTAL1_R 123 RE35
@ XTAL1
10K_0402_1%
+3VALW

0.1U_0402_10V6K
MEC1404-NU-TR_VTQFP128_14X14
124

84
51
17
64
100

EC_AGND 112

18

2
1

2
CE81

1
@ T4931

RE61
32 KHz Clock Pilot_05 2
RE38
100K_0402_5%
0_0402_5% Y1@ RE67 CE103
1 2 PTP_INT#_EC MEC_XTAL1 1 2 MEC_XTAL2 0_0603_5% VR_CAP 1 2 EC_AGND
[17,41] PTP_INT#

2
@ 1 2
32.768KHZ_9PF_X1A000141000200 @ 1U_0603_25V6 CMP_VIN0 1 @ 2 CMP_VOUT0
Pilot_05 1 20ppm / 9pF 1 RE33 100K_0402_5%
ESR <50kohm (MAX)
CE102 CE101
Close UE1 ESR <100m ohms
@ 10P_0402_25V8J @ 10P_0402_25V8J
2 2 EC_AGND
Close UE1

PCH_PLTRST#_EC 1 2
CE72 0.047U_0402_10V7K~D
EMC@

+3VALW_EC Debug Connector I_ADP_R

1
RE36 300_0402_5%
1 2
I_ADP [54,55]
SIO_SLP_S3#
CE74
1 2
0.1U_0402_10V6K
@
CE87 2200P_0402_25V7K
2

+3VALW_EC IMVP_VR_ON 1 2
RE60 2 CE82 1000P_0402_50V7K
EC_AGND

49.9_0402_1% @
1

+3VS
10K_0402_5%

10K_0402_5%

10K_0402_5%

100K_0402_5%

Pilot_05 ACAV_IN 2 1
1

@ RE65

JDEG1 @ JLPDE1 CE84 100P_0402_50V8J

RE63

RE64

RE118

A
1 1 A
1 2 JTAG_TDI RE109 1 @ 2 0_0402_5% ICSP_CLK 1 2 EC_AGND
2 3 JTAG_TMS 1 2 ICSP_CLR 2 3 LPC_LAD0
Close to UE1 each pin
RE110 @ 0_0402_5%
2

3 4 JTAG_CLK RE111 1 @ 2 0_0402_5% T3 PAD~D@ 3 4 LPC_LAD1

4 5 JTAG_TDO RE112 1 @ 2 0_0402_5% ICSP_DAT 4 5 LPC_LAD2
5 6 MSCLK 5 6 LPC_LAD3
6 7 MSDATA 6 7 LPC_LFRAME#
7 8 HOST_DEBUG_TX 7 8 PCH_PLTRST#_EC
8 9 8 9
9 10 9 10
10 10 CLK_PCI_LPDEBUG [19,43]

11 11
Security Classification Compal Secret Data Compal Electronics, Inc.

WWW.ALISALER.COM
GND1 GND1 Issued Date 2015/07/15 Deciphered Date 2016/07/31 Title
12 12
GND2 GND2
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC MEC1404
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
ACES_50506-01041-P01 ACES_50506-01041-P01 0.1(X00)
CONN@ CONN@
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 48 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

LED Board Connector I/O & APS & UART CONN

I/O CONN

UART CONN
+5VALW - Trace width : 20mil +5VALW
CZ107 1 CZ104
1

1U_0402_6.3V6K
+5VALW +5VALW

47U_0805_6.3V6M
2 2 JIO1

1
1
D
RH504 2 1 D

JUART 3 2
100K_0402_5% 3
+5VALW 1 4
2 1 5 4
[20] UART2_TXD

2
JLED 3 2 6 5
4 6 [20] UART2_RXD 4 3 7 6
LED1 3 4 G2 5 4 USB20_P7 8 7
3 G1 [19] USB20_P7 8
LED2 2 5 [19] USB20_N7 USB20_N7 9

3
1 2 6 GND 10 9
QE20B 1 GND 11 10
[19] USB20_P3

6
E-T_6915K-Q04N-00L CVILU_CI1804M1VRA-NH 12 11
[19] USB20_N3 12
5 QE20A CONN@ CONN@ 13
[48] BAT1_LED# 13
14
2 15 14
[19] USB3TP3

4
16 15
[19] USB3TN3 16
2N7002EDW 2N SOT-363-6 17

1
2N7002EDW 2N SOT-363-6 +5VALW 18 17
19 18
[19] USB3RP3 19
20
[19] USB3RN3 20

1
21
RH505 22 21
USB_EN# 23 22
100K_0402_5% [46,48] USB_EN# 23

3
[19] USB_OC2# USB_OC2# 24
QE23B LID_CL_SIO# 25 24
[48] LID_CL_SIO#

2
26 25
+3VS 5 APS CONN 27 26
JAPS 28 27
+3VALW 28
+3VALW 1 29 31

6
2 1 30 29 GND 32
[18,32,33,34,39,48,57] SIO_SLP_S3# 2 +3VS 30 GND
QE23A +3VALW 3
1

LED1 2N7002EDW 2N SOT-363-6 4 3 ACES_88194-3041

2 [18] SIO_SLP_S5# 5 4
RE108 BAT2_LED# [48] CONN@
[18,32,33,48,69] SIO_SLP_S4# 5

0.1U_0402_10V6K

0.1U_0402_10V6K
10K_0402_5% 6 1 1
[18] SIO_SLP_A# 6

CZ105

CZ106
7
+3VALW

1
2N7002EDW 2N SOT-363-6 8 7
2

3
9 8
[18] PCH_RTCRST# 10 9 2 2
QE21B
11 10
C [48,49] POWER_SW#_MB C
5 12 11
[48] SATA_LED_EN 12
[18] SYS_RESET# 13
14 13
4

15 14
[18] SIO_SLP_S0# 15
6

2N7002EDW 2N SOT-363-6 16
QE21A 17 16
18 17
2 19 18
[16] PCH_SATA_LED# GND
20
1 @ 2 GND
[44] SSD_LED#
1

2N7002EDW 2N SOT-363-6 CONN@

RH502 ACES_50506-01841-P01
0_0402_5%

Pilot_05

Screw Hole
TO PWR BOARD
@ H10 @ H11 @ H12 @ H13 @ H17 @ H19
+5VALW
H_2P8 H_2P8 H_2P8 H_2P5 H_2P8 H_2P8
+5VALW
CPU x 4 GPU x 2

1
BREATH_LED
@ H1 @ H2 @ H5 @ H6
JPW H_3P7 H_3P7 H_3P2 H_3P2
1

1
RH506 1 @ H20 @ H23
BREATH_LED 2
100K_0402_5% 3 2 H_3P3 H_2P5
3

[48,49] POWER_SW#_MB 3 @ H3 @ H4
4

1
QE24B 4 H_3P7 H_3P7
2

B B
5

1
5 GND
6
GND
ACES_51601-0040M-P01
4

2N7002EDW 2N SOT-363-6 CONN@

6

QE24A NGFF x 2 @ H40 @ H56

H_2P1N H_2P5
[48] BREATH_LED#_EC 2

1
1

2N7002EDW 2N SOT-363-6
@ H55 @ H57
H_2P4X2P1N H_3P0

1
Power Button & LED (Reserve)
FD1 FD2 FD3 FD4
@ FIDUCAL @ FIDUCIAL @ FIDUCAL @ FIDUCIAL

+5VALW
1

1
SW5 Debug@
4 3 RW4
LED4
A A
BREATH_LED 1 2 1 2
300_0402_5%
HT-F196BP5_WHITE
2 1 POWER_SW#_MB [48,49] RW3
Debug@ LED3
SKRBAAE010_4P BREATH_LED 1 2 1 2
Debug@ 300_0402_5%
HT-F196BP5_WHITE

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
TPM/BTB conn.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 49 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

MODEL NAME : BBV00/ BBV10

PCB NO : LA-D993P Bom Structure

D D

PCB CPU PCH GPU

ZZZ R1@ UH1 I7@ UH2 R1@ UV1 14G0@

PCB 1QT LA-D993P REV0 M/B KBL KBL-H_SR32Q PCH-SR30W N17P-G0-A1

UH1 I5@ UV1 15G1@

KBL-H_SR32S N17P-G1-A1

Pilot_01

C C

PRST
Samsung 4G X7668431L52 : S4G@
RV152
Micron 4G X7668431L53 : M4G@
RV146
Hynix 4G X7668431L51 : H4G@
RV152

UV6 UV9 S4G@ UV6 UV9 M4G@ UV6 UV8 H4G@

100K_0402_5% 100K_0402_5% 100K_0402_5%

SD028100380 SD028100380 SD028100380

K4G80325FB-HC28 K4G80325FB-HC28 MT51J256M32HF-70:A MT51J256M32HF-70:A H5GC8H24MJR-R0C H5GC8H24MJR-R0C

S4G@ S4G@ RV153 M4G@ M4G@ RV153 H4G@ H4G@ RV147

UV8
UV7 S4G@ UV7 UV8 M4G@ UV7 UV9 H4G@

100K_0402_5% 100K_0402_5% 100K_0402_5%

SD028100380 SD028100380 SD028100380
K4G80325FB-HC28
S4G@ K4G80325FB-HC28 MT51J256M32HF-70:A MT51J256M32HF-70:A H5GC8H24MJR-R0C H5GC8H24MJR-R0C
S4G@ M4G@ M4G@ H4G@ H4G@
RV154 RV154 RV154
B B

S4G@ M4G@ H4G@

100K_0402_5% 100K_0402_5% 100K_0402_5%

SD028100380 SD028100380 SD028100380

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

WWW.ALISALER.COM
Issued Date 2013/04/10 Deciphered Date 2014/05/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NOTE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
0.1(X00)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 50 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

Version Change List ( P. I. R. List ) Page 2

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

WWW.ALISALER.COM
Issued Date 2013/04/10 Deciphered Date 2014/05/01 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NOTE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
0.1(X00)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D991P
Date: Tuesday, November 08, 2016 Sheet 51 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

+5VALW
VIN CHARGER B+ +3VALW TDC:4.8A
DC IN BQ24780 +5VALW TDC:7.7A +3VALW
Page 53 Page 55
TPS51285B (Module) Page 56

+1.2V_DDR
Battery +1.2V TDC:5.1A
56Whr 4S1P for 14'
D 74Whr 3S2P for 15' +0.6VS TDC:0.7A +0.6VS D

SY8210 Page 57

+1VALW TDC:4A +1VALW

SY8286 (Module)
Page 58

VCCIO_0.95V TDC: 3.85A +VCCIO

SY8286 (Module)
Page 59

+1.0VS_GFX TDC: 0.8A +1.0VS_GFX

SY8286 (Module)
Page 60

C
+1.35VS_VGA TDC: 11A +1.35VS_VGA C

APW8828 (Module)
Page 61

+1.8V_GFX_AON TDC: 1.6A +1.8V_GFX_AON

SY8286 (Module)
Page 62

+VCC_CORE TDC: 50A +VCC_CORE

ISL95829 (Module)
Page 64

+VCC_GT TDC: 25A +VCCGT

ISL95829 (Module)
Page 65

B B

+VCC_SA TDC: 10A +VCCSA

ISL95829 (Module)
Page 65

N17P-GX GDDR5_50W +GPU_CORE

GPU_CORE TDC: 45A
RT8816A Page 67

N17P-GX GDDR5_50W +GPU_CORE_VDDS

GPU_CORE_VDDS TDC: 13A
RT8816A Page 68

+2.5V_MEM
A
+2.5V_MEM TDC:0.63A A

RT9059GSP_SO8 (LDO)
Page 69

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Power Block Diagram
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.1(X00)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
Date: Tuesday, November 08, 2016 Sheet 52 of 70
5 4 3 2 1
 WWW.AliFixit.COM
A B C D

CONN@
EMC@ PL100 VIN
ACES_50290-00701-001 HCB2012KF-121T50_0805
+DC_IN 1 2
7

@EMC@ PC100

@EMC@ PC101
0.1U_0402_25V6

0.1U_0402_25V6
1 2
6

@EMC@ PC102

EMC@ PC103

EMC@ PC104

EMC@ PC105

EMC@ PC106

EMC@ PC107
EMC@ PL101

1000P_0402_50V7K

1000P_0402_50V7K
100P_0402_50V8J

100P_0402_50V8J

15P_0402_50V8J
0.1U_0402_25V6
PR114 HCB2012KF-121T50_0805
5

1
33_0402_5%

2
PSID 1 2
4 EMC@ PL102

2
HCB2012KF-121T50_0805
1
3 1 2
1

2
-DC_IN 1 2
1 EMC@ PL103
JADP10 HCB2012KF-121T50_0805

AZ5125-01H.R7G_SOD523-2
HCB2012KF-121T50_0805

HCB2012KF-121T50_0805

EMC@ PD100
+3VALW

0.1U_0402_25V6
1

EMC@ PC108
@EMC@ PL104

@EMC@ PL105

1
@ PR100
0_0402_5%
2

1
1 2
Pilot.02
2

2
PQ100 PR101
FDV301N-G_SOT23-3 2.2K_0402_1%
EMC@
PL106 @ PR102

2
BLM15AG102SN1D_2P 0_0402_5%
1 2 1 3 1 2

S
D
PS_ID [48]

place near connector +5VALW

G
2
PR104

1
10K_0402_1%
PR103 PSID-2 1 2
100K_0402_1%

1
2 C 2

PSID-1 2 PQ101
B MMBT3904W H_SOT323-3
E

3
1
PR105
15K_0402_1%

2
Rds= 12.8mo(typ) 17(max)mo
VBATT EMC@ PL107
Battery connector For Camera LS .1.885mW@3W backlight
HCB2012KF-121T50_0805 PQ102
1 2 AON7409_DFN8-5
1
2
1 2 3 5 B+_CAM
B+
EMC@ PL108
0.01UF_0402_25V7K

0.22U_0603_25V7K
100P_0402_50V8J

100P_0402_50V8J
1000P_0402_50V7K

HCB2012KF-121T50_0805
1

1
PC110

PC111

PC112

0.1U_0402_25V6
4
1
EMC@ PC109

PC113

EMC@ PC114

1
PR106
TVNST52302AB0_SOT523-3

TVNST52302AB0_SOT523-3
2

1M_0402_5%

2
1

1
EMC@ PD101

EMC@ PD102

2
EMC@

EMC@

EMC@

3
VSB_N_001 3

Vgs(th)_max_2.7V
2

1
PR107
680K_0402_1%
PR108

2
100_0402_1% +3VS
1 2 PBAT_CHG_SMBCLK [48,55]

6VSB_N_003
PR109

1
100_0402_1%
JBAT10 1 2 PBAT_CHG_SMBDAT [48,55] PR110
1 BATT++ 100K_0402_1%
1 2
2 3

2
3 4 CLK_SMB PQ103A
4 5 DAT_SMB PBAT_PRES# [48,54,55] VSB_N_002 2 2N7002EDW _SOT363-6
5 6 BATT_PRS#
6 7 PR112
PR111 footprint

1
7 8

3
100_0402_1% 10K_0402_1% 2N7002DW -7-F_SOT363-6
8 9 1 2 1 2 @ PR113
9 10 +3VALW
12 0_0402_5% PQ103B
13 G 10 11 1 2 5 2N7002EDW _SOT363-6
G 11 [18,34] 3.3V_CAM_EN#

2N7002DW-7-F_SOT363-6
ACES_50288-01171-001
Pilot.02

footprint
4
1
CONN@
PR115
1M_0402_1%
SMART Battery:
01.BAT1+

2
4 4

02.BAT2+ Battery
03.BAT3+
04.CLK_SMB 56Whr 4S1P for 14'
05.DAT_SMB 74Whr 3S2P for 15'
06.BATT_PRS
07.SYS_PRS Security Classification Compal Secret Data Compal Electronics, Inc.
08.Battery Voltage 2011/08/25 2012/07/25 Title
Issued Date Deciphered Date

WWW.ALISALER.COM
09.GND1
10.GND2 PWR_DCIN / BATT CONN
11.GND3 Smart Adapter circuit (39.1) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
0.1(X00)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
Date: Tuesday, November 08, 2016 Sheet 53 of 70
A B C D
 WWW.AliFixit.COM
5 4 3 2 1

When CMPIN> Vref(2.3V/1.3V)

CMPOUT=floating

[48,55] I_ADP

AC 90W AC130W

1
PR200
10K_0402_1%
Pilot.02
PR201 11.5K 6.49K

2
D @ PR216 D
+3VALW
CMPIN 0_0402_5%
[55] CMPIN 1 2 H_PROCHOT# [9,48,54,55,63]

1
PR201 GPU40@
GPU50@ PR201 PR202
6.49K_0402_1% SD034115280 10K_0402_5%
11.5K_0402_1%

6
2

2
PC200
0.1U_0402_25V6 PQ200A
1 2 2 2N7002EDW_SOT363-6
Pilot.02

2N7002EDW_SOT363-6
3
ACIN=ACOK footprint

1
2N7002DW-7-F_SOT363-6
PR203 2N7002DW-7-F_SOT363-6

2
@ PR215 1M_0402_1%

PQ200B

footprint
REGN_CHG REGN=6V 0_0402_5% VIN 1 2 5 PR204
1 2 H_PROCHOT# [9,48,54,55,63] 100K_0402_1%

1
1
1
PR213
PR205 1M_0402_1%
10K_0402_1%

2
PR206
2

1
160K_0402_1% D
1 2 2 PQ201
[55] CMPOUT
G L2N7002WT1G 1N SC-70-3
S

3
1

1
PC202
C PR207 0.022U_0402_25V7K C
12.4K_0402_1%

2
2

Ref ENG0012879 Circuit-2

HW Asserts H_PROCHOT# when ac adapter
ENG0012879 Circuit-1 is being unplugged and keep low for 10ms
Delay Adapter OC H_PROCHOT# 2ms while until SW prochot# is issuded by EC
Hybrid power transition

+3VALW
Pilot.02
VIN

1
@ PR217
ACIN=ACOK @ PR208 0_0402_5%
1 2 H_PROCHOT# [9,48,54,55,63]
B [18,48,55] ACAV_IN 10K_0402_1% B

2
PR210
1

3.3K_0402_1%
PR209 PC203

1
1M_0402_1% 0.1U_0402_25V6 D
1 2 2 PQ202
[48,53,55] PBAT_PRES#
G L2N7002WT1G 1N SC-70-3
2

6 2

3
1

1
100K_0402_1%
PR212
200K_0402_1% footprint PQ203A

PR211
2N7002DW-7-F_SOT363-6 2 2N7002EDW_SOT363-6
2

2N7002EDW_SOT363-6
3

footprint
1

2
2N7002DW-7-F_SOT363-6
1
PQ203B

5
PR214
1M_0402_1%
4
1

PC204
2

0.1U_0402_25V6

Ref ENG0012879 Circuit-4

2

HW Asserts H_PROCHOT# when battery

is being unplugged and keep low for 10ms
A
Erp lot 6 circuit until SW prochot# is issuded by EC A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/08/25 Deciphered Date 2012/07/25 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_PROCHOT#
Size Document Number Rev
Rest of support elements (37.1) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
0.1(X00)

Date: Tuesday, November 08, 2016 Sheet 54 of 70

5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

PQ300
L2N7002WT1G 1N SC-70-3

1
D
2
VIN S
G

Adapter 19.5V

3
1 2 1 2
PQ301
AON6426_DFN5X6-8-5 PR300 PR301
130W for 15'
1
2
3M_0402_5% 1M_0402_1% 90W for 14'
5 3

D D
PR303 Iada=0~6.67A(130W)
4

4.7_0402_5%
1 2 Iada=0~4.62A(90W)
Rds= 4.2mo(typ) 5(max)mo
Rds= 4.2mo(typ) 5(max)mo 0.33W@74Whr 1.2C
1 2 0.23W@130W
ADP_I = 40*Iadapter*Rsense
0.444W@130W adapter
PC303
2200P_0402_50V7K
PQ302
AON6426_DFN5X6-8-5 PR302
B+ PQ303
AON6426_DFN5X6-8-5
PQ306 1 0.01_1206_1% 1
AON6426_DFN5X6-8-5 2 2
1 3 5 1 4 5 3 PQ703_S
2
5 3 2 3
[32] VCC_CHG
0.1U_0402_25V6
EMC@ PL300 Icont=74/19.5=3.79A

4
HCB2012KF-121T50_0805 PC302
Ipk=3.79*1.2=4.55A
1

PD300 1 2 0.022U_0603_25V7K

CSSN_1
CSSP_1
PC301
4

BAT54CW-7-F SOT-323 EMC@ PL301 1 2

PR325 HCB2012KF-121T50_0805
Pilot.02
2

4.7_0402_5% 2 1 2 CHG_B+
VBATT

1
1 2

1
1 @ PJP300 PR306 PR307

EMC@ PC305

EMC@ PC306
2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6

1
@ PR304 @ PR305 PC304 JUMP_43X79

PC307

PC308
10K_0402_1% 10_0402_1%

1
1 2 0_0402_5% 0_0402_5% 3 0.047U_0402_25V7K 1 2
@ PC324 VIN 1 2 1 2

2
1000P_0402_50V7K

2
1
PC312

BATDRV_CHG
PC309 PC310 PC311 2.2U_0603_16V6K

2.2_0603_5%
10_1206_1%
1

BATSRC_CHG
0.1U_0603_25V7K 0.1U_0402_25V6 0.01UF_0402_25V7K

PR311
PR310

2
4.12K_0603_1%

4.12K_0603_1%
1

1 2 1 2 1 2
+3VALW
PR309
PR308

2
2
2

5
REGN_CHG
1 2

BTST_CHG
C C

DH_CHG

DL_CHG
PQ304

LX_CHG

1
PC313 AON6428L_DFN8-5
1U_0603_25V6K
PR312
20K_0402_1% DH_CHG 4 10 x 11.2 x 4mm

28

27

26

25

24

23

22
23m ohm

2
PU300
DC=8A/ISAT=14A

BTST
PHASE

HIDRV

LODRV
VCC

REGN

GND
PR314

3
2
1
REGN_CHG 29 PL302 0.01_1206_1%
CSSP_2

CSSN_2

PWPD PR313 5.6UH_PCMB104T-5R6MS_8A_20% 0.606W@74Whr 1.2C

8.2K_0402_1% LX_CHG 1 2 1 4 VBATT
1 21 1 2
ACN ILIM 2 3

10U_0805_25V5K~D

10U_0805_25V5K~D

10U_0805_25V5K~D
1
5
2 20 EMC@

CSON_1
CSOP_1
ACP SRP

1
PQ305 PR315

PC314

PC316

PC317
AON7518_DFN8-5 4.7_1206_5%
100K_0402_1%
1

CMSRC_CHG 3 19

2
CMSRC SRN SNUB_CHG
PR316

DL_CHG 4

1
ACDRV_CHG 4 18 BATDRV_CHG EMC@
ACDRV BATDRV PC315
2

BQ24780SRUYR_QFN28_4X4 680P_0402_50V7K

2
[18,48,54] ACAV_IN
5 footprint 17 BATSRC_CHG

3
2
1
ACOK BATSRC
VIN BQ24780RUYR_WQFN28_4X4-S
120K_0402_5%
1

ACDET_CHG 6 16 TB_STAT#_CHG
@ PR319 ACDET TB_STAT#
PR318

H/S 0.686W 3*3

0_0402_5% PC318 PC319 PC320
1 2 7 15 L/S 0.638W 5*6 0.1U_0402_25V6 0.1U_0402_25V6 0.1U_0402_25V6
324K_0402_1%

[48,54] I_ADP IADP BATPRES#

1

1
1 2 1 2 1 2

PROCHOT#

10K_0402_1%
2

PR317

PR320
Pilot.02

CMPOUT

1
100P_0402_50V8J

0_0402_5%
IDCHG

CMPIN
PMON

@ PR321
B B

SDA

SCL
1

PR322
PC321
2

2
10_0402_1%
1 2
2

2
8

10

11

12

13

14
VIN_Max:19.5V ACDET=2.71V
+3VALW PR324
Pilot.02
52.3K_0402_1%

VIN_Min:17.5V ACDET=2.43V
0.01UF_0402_25V7K
1

10_0402_1%
1

CHG_SMBDAT

CHG_SMBCLK
1 2 1 2
PR323

PC323

PC322
2

100P_0402_50V8J
Battery
2

PBAT_PRES# [48,53,54]
EC no need I_BATT
Delete PR325 & signal
20160330 56Whr 4S1P for 14'
0_0402_5%

0_0402_5%

0_0402_5%

74Whr 3S2P for 15'

[63] P_SYS
1

@ PR329
0_0402_5%
@ PR326

@ PR327

@ PR328
2

[9,48,54,63] H_PROCHOT#

[48,53] PBAT_CHG_SMBDAT CMPOUT [54]

Pilot.02

[48,53] PBAT_CHG_SMBCLK CMPIN [54]

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Title
Issued Date 2013/11/05 Deciphered Date 2015/11/05
PWR_CHARGER(BQ24780S)
Charger controller(40.1), Support component(40.2)

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 55 of 70
5 4 3 2 1
 WWW.AliFixit.COM
A B C D E

+3VLP

1
@ PR400
0_0402_5%

2
Pilot.02

1
PC400
1 4.7U_0603_6.3V6M 1

2
@ PC401 @ PC402
100P_0402_50V8J 100P_0402_50V8J
B+ (3.3*8.1+10.5*5)/9=8.8 1 2 1 2

EMC@ PL400 PR401 PR402

HCB2012KF-121T50_0805 68.1K_0402_1% 154K_0402_1%
1 2 1 2 1 2

EMC@ PL401 PR403 PR404

HCB2012KF-121T50_0805 100K_0402_1% 100K_0402_1%
1 2 B++ 1 2 FB_3V FB_5V 1 2
B++
@ PJP400
JUMP_43X118

2200P_0402_50V7K
1 2 PR405 PR406

10U_0805_25V6K
0.1U_0402_25V6
1 2

PC408

EMC@ PC406
22K_0402_1% 4.75K_0402_1%

1
1 2 1 2

PC409
2200P_0402_50V7K
100U_25V_M

10U_0805_25V6K
0.1U_0402_25V6
15P_0402_50V8J

2
5
PC405

EMC@
1

+
PC410

PC403

PC404

PC407

AON7408L_DFN8-5
Pilot.02
2

2 @ PR407
Pilot.02

1
4
EMC@

EMC@

EMC@

0_0402_5%

PQ400
3V/5VALW_EN 1 2 21

CS2

VFB2

VREG3

VFB1

CS1
TP @ PR409
@ PR408 0_0402_5%
0_0402_5% 6 20 1 2 3V/5VALW_EN 400Khz
1
2
3
2
1 2 EN2 PU400 EN1 2
[58] ALW_PWRGD_3V_5V PR411 Idc=9A Isat=18(20%)

2
TPS51285BRUKR_QFN20_3X3 200_0402_1%
1 2 7 19 1 2
Isat=18(30%)

G1

D1
PL402
+3VALWP PR410 PGOOD VCLK PL403
3.3UH_PCMB063T-3R3MS_6.5A_20% 100K_0402_1% 1.5UH_PCMC063T-1R5MN_9A_20% +5VALWP
+3VALWP 1 2 LX_3V 8 footprint 18 LX_5V 7 1 2
SW2 SW1 D2/S1
PR413
TPS51285BRUKR_QFN20_3X3 2.2_0603_5% PC412 ESR=35mo

1
PR414

PR415
1 2 BST1_3V 1 2 BST_3V 9 17 BST_5V 1 2 BST1_5V 1 2

G2
4.7_1206_5%

S2

S2

S2

4.7_1206_5%
I=1.558A
1

VBST2 VBST1
PC411 PR412 0.1U_0402_25V6

150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M

150U_B2_6.3VM_R35M
6

3
5

0.1U_0402_25V6 2.2_0603_5% UG_3V 10 16 UG_5V

150U_B2_6.3VM_R35M

DRVH2 DRVH1
EMC@

EMC@
PQ401

VREG5
1

DRVL2

DRVL1
AON7506_DFN33-8-5

2
AON6992_DFN5X6D-8-7 1 1 1

VO1
2

VIN
+
PC413

SNUB_5V
+ + +

PC414

PC415

@ PC423
SNUB_3V

11

12

13

14

15
2
PQ402

2 2 2

680P_0603_50V7K
PC419
ESR=35mo LG_5V
680P_0603_50V7K
EMC@ PC418

I=1.558A LG_3V
1
2
3

1
1
@ PC417
1

@ PC416 .1U_0402_16V7K

EMC@
.1U_0402_16V7K Pilot.02

2
2

@ PR416
0_0402_5%
B++ 1 2

3 3

4.7U_0603_6.3V6M
0.1U_0402_25V6
1

1
PC420

PC421
2

2
3V/5VALW_EN

PR418
2.2K_0402_5%
1 2
[48] ALWON
PQ403
@ PR419 L2N7002WT1G_SC70-3
0_0402_5%
S

1 2 3 1
[23,48] CMP_VOUT0
@ PJP401 @ PJP402
Pilot.02 PAD-OPEN 4x4m PAD-OPEN 4x4m
1 2 1 2
G

+3VALW +5VALW
2

+5VALWP
1

+3VALWP
PC422 JUMP_43X118 JUMP_43X118
0.1U_0402_25V6
2

[18,48] ALL_SYS_PWRGD
475Khz
Icout=0.5A@19.5V +3VALW +5VALW 400Khz
EN1 and EN2 dont't floating IL=1.79A@19.5V Icout=1.789A@19.5V
ripple=65mV@19.5V TDC 4.8A TDC 7.7A IL=6.19A@19.5V
3V/5VALW_EN
H/S=0.52W L/S=0.66W Peak Current 6.9A Peak Current 11A ripple=114mV@19.5V
OCP current 9A OCP current 14A H/S=0.72W L/S=0.64W
ESR>6mohm

4 4
3

@EMC@
PD401
TVNST52302AB0_SOT523-3
1

Place PD401 close to PU400

Security Classification Compal Secret Data Compal Electronics, Inc.
Title
Issued Date 2013/11/05 Deciphered Date 2015/11/05
PWR_3.3VALWP/5VALWP

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
3V/5V controller(35.1), Support component(35.2) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom
LA-D993P 0.1(X00)

Date: Tuesday, November 08, 2016 Sheet 56 of 70

A B C D E
 5 4 3 2
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@ PR500
100K_0402_5%
1 2
+3VS
B+ EMC@ PL500
HCB2012KF-121T50_0805
@ PR501
100K_0402_5%
1 2 1 2
+3VS EE no need +1.2V_PWROK

10U_0603_25V6M

10U_0603_25V6M

0.1U_0402_25V6

2200P_0402_25V7K
1

1
D PU500 SY8210AQVC_QFN19_4X3 D

PC500

PC501

PC502 EMC@

PC503 EMC@
+3VALW 10 19 1.2V_DDR_OT @EMC@ PR502 @EMC@ PC504
2

2
IN OT 4.7_0805_5% 680P_0402_50V7K
13
BYP PG
18 +1.2V_PWROK
PC505 .1U_0402_16V7K
1 2 1 2
+1.2V_DDRP

1U_0402_6.3V6K
14 12 1 2 PL501
VCC BS 1UH_PCMB053T-1R0MS_7A_20%

1
PC506

2.2U_0402_6.3V6M
PC507
4 11 LX_DDR 1 2
VTTGND LX
+3VALW 5 X 5 X3

330P_0402_50V7K

51.1K_0402_1%
9 16

2
PGND FB

1
1

PC508

PR503
15 8 +1.2V_DDRP PC512
SGND VDDQSNS

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
22U_0603_6.3V6M
R1
1

7 1 2

2
VLDOIN

1
PC509

PC510

PC511

PC513
@ PR504

2
0_0402_5% ILMT_DDR 17 6
ILMT VTT +0.6VSP

2
48.7K_0402_1%
1 5
2

S5 VTTSNS

1
ILMT_DDR

PR505
2 3
S3 VTTREF

22U_0603_6.3V6M

22U_0603_6.3V6M
Pilot.02 R2
1

1
1U_0402_10V6K
PC514

PC515

PC516
@ PR506

EN_1.2V
footprint

2
C C
0_0402_5%

2
SY8210AQVC_QFN19_4X3-S

EN_0.6V
2

The current limit is set to 8A, 12A or 16A when VFB=0.6V

this pin is pull low, floating or pull high
+1.2V_DDR OCP set 8A @ PR507
Vout=0.6V* (1+R1/R2)
0_0402_5%
1 2
Vout=1.2V
[33] 1.2V_VDDQ_EN
0.1U_0402_10V7K

Fsw=600KHz
1

1
1M_0402_1%

@ PC517
PR508

600Khz
Icout=0.542A@19.5V
2

Pilot.02 IL=1.88A@19.5V
2

ripple=6.32mV@19.5V
@ PR509
0_0402_5%
B 1 2 B
[9] SM_PG_CTRL
0.1U_0402_10V7K
1
1M_0402_1%

1
PR510

@ PC518

+1.2V_DDRP +1.2V_DDR +0.6VSP +0.6VS

2

1 2
[18,32,33,34,39,48,49] SIO_SLP_S3#
2

@ PJP500 @ PJP501
@ PR511 JUMP_43X118 JUMP_43X39
0_0402_5% 1 2 1 2
1 2 1 2
Mode S3 S5 VOUT VTT
Normal H H on on
Stadby L H on off +1.2V_DDR +0.6VS
Shutdown L L off off TDC 5.1A TDC 0.7A
Peak Current 7.3A Peak Current 1A
Note: S3 - sleep ; S5 - power off OCP current 8A OCP Current 2A

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2014/10/17 Deciphered Date 2014/12/05 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+1.2V_DDR/0.6VS(SY8210)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
DDR controller(35.3), Support component(35.4) MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
Date: Tuesday, November 08, 2016 Sheet 57 of 70
5 4 3 2 1

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 WWW.AliFixit.COM

5 4 3 2 1

+1VALW
TDC 4A
D Peak Current 5.7A D

OCP current 9A

500Khz
IL=1.9A@19.5V
ripple=7.3mV@19.5V

@ PJ601
JUMP_43X118
7.2*1/.9/9=0.89A 1 2
+1VALWP 1 2 +1VALW
EMC@ PL600 @EMC@ PR600 @EMC@ PC600
HCB2012KF-121T50_0805 4.7_1206_5% 680P_0603_50V7K
1 2 1 2 SNUB_1VALWP 1 2
PU600
Pilot.02
SY8286RAC_QFN20_3X3

B+ 1
1 2
2 +19VB_1VALWP 2
IN PG
9 @ PR601
0_0402_5%
PC605
0.1U_0201_10V6K
10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6

@ PJ600 3 1 BST_1VALWP 1 2 BST_1VALWP_R 1 2 PL601

2200P_0402_50V7K

IN BS
1

JUMP_43X79 1UH_PCMB063T-1R0MS_12A_20%
EMC@ PC601

@EMC@ PC602

PC603

@ PC604

C
4
IN LX
6 LX_1VALWP 1 2
+1VALWP C
2

5 19

14K_0402_1%

330P_0402_50V7K

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
IN LX

1
7 20

PR602

PC606

PC607

PC608

PC609

PC610
GND LX
Pilot.02 8 14 FB_1VALWP
R1

2
GND FB

2
@ PR603 18 17 LDO_1VALWP 3V
0_0402_5% GND VCC
1 2 EN_1VALWP 11 10
EN NC

1
[56] ALW_PWRGD_3V_5V
FB=0.6V

1
ILMT_1VALWP 13 12 PC611
ILMT NC
1

@ PC612 2.2U_0402_6.3V6M

2
PR604 15 16 PR605
1M_0402_1%
0.1U_0402_25V6 +3VALW BYP NC Vout=0.6V* (1+R1/R2) R2 20K_0402_1%
2

+3VALW footprint 21 =0.6*(1+(14/20))

2
PAD
2

SY8286RAC_QFN20_3X3
Vout=1.02V
1

PC613
1U_0402_6.3V6K
1

@ PR606
EN :H>0.8V ; L<0.4V 0_0402_5%
B B
2

EN pin don't floating

If have pull down resistor at HW side,
1

please delete PR604.

@ PR607
0_0402_5%
2

The current limit is set to 6A, 9A or 12A when this pin

is pull low, floating or pull high.

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+1VALW (SY8288)
Size Document Number Rev
PWR.Plane.Regulator(35.25), Support component(35.26) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-D993P 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 58 of 70
5 4 3 2 1

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 WWW.AliFixit.COM

5 4 3 2 1

+VCCIO
TDC 3.85A
D Peak Current 5.5A D

OCP current 6A

500Khz
IL=1.81A@19.5V
ripple=7.0mV@19.5V

Pilot.02 @ PJ701
JUMP_43X118
0.95**5.5/0.9/9=0.654A @ PR712 1 2
0_0402_5% +0.95VSP 1 2 +VCCIO
PL700 EMC@ 1 2 +VCCIO_PG [18] @EMC@ PR700 @EMC@ PC700
HCB2012KF-121T50_0805 4.7_1206_5% 680P_0603_50V7K
1 2 1 2 SNUB_+0.95VSP 1 2
PU700
@ PJ700 SY8286RAC_QFN20_3X3

B+ 1
1 2
2 +19VB_+0.95VSP 2
IN PG
9 VCCIO_PG @ PR701
0_0402_5%
PC701
0.1U_0201_10V6K
10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6

3 1 BST_+0.95VSP 1 2 BST_+0.95VSP_R 1 2 PL701

2200P_0402_50V7K

IN BS
1

JUMP_43X79 1UH_PCMB053T-1R0MS_7A_20%
EMC@ PC702

@EMC@ PC705

PC703

@ PC704

C C
4
IN LX
6 LX_+0.95VSP 1 2
+0.95VSP
2

5 19 Itdc7A Isat=11A

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
IN LX

1
7 20

PC706

PC707

PC708

PC709
GND LX
8 14 FB_+0.95VSP

2
GND FB

1
18 17 LDO_+0.95VSP output voltage=3V

100_0402_1%
GND VCC

PR703
1
11 10

330P_0402_50V7K
[33] VCCIO_EN EN NC PC710

1
ILMT_+0.95VSP 13 12 2.2U_0402_6.3V6M

PC712
@ PR705

2
ILMT NC
1

0_0402_5%
PR704 15 16 1 2
+3VALW

2
1M_0402_1% BYP NC VCCIO_SENSE [11]

1
footprint 21
+3VALW PAD PR706
2

SY8286RAC_QFN20_3X3
R1 36.5K_0402_1%
1

PC713
1U_0402_6.3V6K FB=0.6V

2
1

@ PR707
B 0_0402_5% B

1
EN :H>0.8V ; L<0.4V
PR708
Vout=0.6V* (1+R1/R2)
2

EN pin don't floating =0.6*(1+(36.5/62)) R2 62K_0402_1%

@ PR710
1

If have pull down resistor at HW side, 0_0402_5%

2
@ PR709 1 2 VSSIO_SENSE [11]
please delete PR704. 0_0402_5%
Vout=0.953V

1
Pilot.02

100_0402_1%
PR711
2

Pilot.02

2
The current limit is set to 6A, 9A or 12A when this pin
is pull low, floating or pull high.

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_VCCIO_0.95V(SY8286)
Size Document Number Rev
VCCIO controller(35.5), Support component(35.6) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-D993P 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 59 of 70
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+1.0VS_GFX
TDC 0.8A
Peak Current 1.1A
OCP current 6A
D D

500Khz
PR811 IL=2.0A@19.5V
10K_0402_5% ripple=7.7mV@19.5V
1 2
+3VS
@ PJ801
@ PR801 JUMP_43X118
0_0402_5% 1 2
PG_+1.0VSP 1 2 +1.0VSP 1 2 +1VS_GFX
1VS_GFX_PG [23]

1.05*2.9/0.9/9=0.375A Pilot.02
EMC@ PL800 @EMC@ PR802 @EMC@ PC800
HCB2012KF-121T50_0805 4.7_1206_5% 680P_0603_50V7K
1 2 1 2 SNUB_+1.0VSP 1 2
PU800
Pilot.02
SY8286RAC_QFN20_3X3
B+ 1
1 2
2 +19VB_+1.0VSP 2
IN PG
9 @ PR803
0_0402_5%
PC803
0.1U_0201_10V6K
2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6

@ PJ800 3 1 BST_+1.0VSP 1 2 BST_+1.0VSP_R 1 2 PL801

C IN BS C
1

1
EMC@ PC801

EMC@ PC802

PC804

@ PC805

JUMP_43X79 1UH_PCMB053T-1R0MS_7A_20%
4
IN LX
6 LX_+1.0VSP 1 2
+1.0VSP
2

330P_0402_50V7K

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
5 19 Itdc7A Isat=11A
IN LX

21.5K_0402_1%
1

1
PC806

PR805

PC807

PC808

PC809

PC810
@ PR804 7 20
GND LX
62K_0402_1%
1 2 8 14 FB_+1.0VSP
+1.8V_GFX_AON R1

2
GND FB

2
@ PR806 18 17 LDO_+1.0VSP 3V FB=0.6V
0_0402_5% GND VCC

1
1 2 EN_+1.0VSP 11 10
[31,68] NVVDDS_EN EN NC

31.6K_0402_1%
0.1U_0402_25V6

PC811

1
ILMT_+1.0VSP 13 12 2.2U_0402_6.3V6M
Pilot.02

2
ILMT NC
1

1
1M_0402_1%

PR808
Vout=0.6V* (1+R1/R2) R2
@ PR807

@ PC812

15 16
+3VALW BYP NC
=0.6*(1+(21.5/31.6))
2

footprint 21
+3VALW

2
PAD
Vout=1.008V
2

SY8286RAC_QFN20_3X3
1

EN :H>0.8V ; L<0.4V PC813

1U_0402_6.3V6K
1

@
2

B EN pin don't floating PR809 B

If have pull down resistor at HW side, 0_0402_5%
please delete PR807.
2
1

@ PR810
0_0402_5%
2

Pilot.02
The current limit is set to 6A, 9A or 12A when this pin
is pull low, floating or pull high.

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+1.05VGPU(SY8286)
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DSize Document Number Rev
GPU other power_Regulatorr(43.7), Support component(43.8) DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-D993P 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 60 of 70
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B+

EMC@
PL900
+1.35VS_VGA
HCB2012KF-121T50_0805 TDC 11A
+1.35VS_VGAP_B+ 1 2
D Peak Current 20A D

@EMC@ PC900

EMC@ PC901

PC902

PC903
@ PJP900 OCP current 25A

2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6
PAD-OPEN 3x3m

1
1 2
+3VS

2
1.35*13.8/0.9/9=2.3A +1.35VS_VGAP +1.35VS_VGA

1
@ PJP901
@ PR900 PR901 PC904 PAD-OPEN 4x4m
100K_0402_1% 2.2_0603_5% 0.1U_0603_25V7K 1 2
1 2 1 2 SW_+1.35VS_VGAP
Pull high by EE Side

2
@ PJP902
[18,23] DGPU_PWROK
PU900 PAD-OPEN 4x4m
APW8828QBI-TRG_TDFN10_3X3 7 x 7 x 3 1 2

2
PR902 1 10 BST_+1.35VS_VGAP

AON6992_DFN5X6D-8-7
44.2K_0402_1% PGOOD VBST

G1

D1
+3VS @ PR913 1 2 TRIP_+1.35VS_VGAP 2 9 UG_+1.35VS_VGAP PL901
100K_0402_1% TRIP DRVH 0.82UH_MMD-06CZ-R82M-V1L_13A_20%
1 2 EN_+1.35VS_VGAP 3 8 SW_+1.35VS_VGAP 7 1 2 +1.35VS_VGAP
EN SW D2/S1

10U_0402_6.3V6M
PQ900
FB_+1.35VS_VGAP 4 7

470U_D2_2VM_R9M

470U_D2_2VM_R9M
1 1
C VFB V5IN
+5VALW C

1
1 2

G2

S2

S2

S2
[23,31] FBVDD_EN

PC907
+ +

PC908

PC910
RF_+1.35VS_VGAP 5 6 LG_+1.35VS_VGAP EMC@
TST DRVL
1

@ PR903 PR904
0.1U_0402_16V7K

3
0_0402_5% PR905 11 4.7_1206_5%

2
TP
1

1
2 2
@ PC906

Pull high by EE Side 470K_0402_1%

2
footprint PC905 PR911
Pilot.02 1U_0603_6.3V6M 100_0402_1%
2

1
TPS51212DSCR_SON10_3X3-S EMC@
PC909

2
680P_0402_50V7K

2
Sense=1.503V
PR906 @ PR912 Sense=1.353V
36K_0402_1% 0_0402_5%
+1.8V_GFX_AON 1 2 1 2
FBVDDQ_SENSE [25]

R1 Switching Frequency: 290kHz

Pilot.02
R3 R2
1

PR909 OVP: 120%-130%

B B
100K_0402_5% PR910 PR907 VFB=0.7V
169K_0402_1% 39K_0402_1% TYP MAX
H/S Rds(on) : 6.8mohm 8.6mohm
2

L/S Rds(on) : 2mohm 2.5mohm

1

@ PR908
0_0402_5% D
1 2 2
Ripple=34.3mV
[23] MEM_VDD_CTL G △I=4.33A
Pilot.02 PQ901 S
3

PJC138K 1N SOT-323-3

If MEM_VDD_CTL high :
Pilot.01
R2//R3 = 31.7k ohm
Vout=0.704*(1+(36.1/31.7))=1.506V
If MEM_VDD_CTL low :
Vout=0.704*(1+(36.1/39))=1.355V
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+1.35VDGPU(TPS51212)
Size
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
GPU other power_Regulatorr(43.5), Support component(43.6) MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
Date: Tuesday, November 08, 2016 Sheet 61 of 70
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+1.8V_GFX_AON
D
TDC 1.6A D
Peak Current 2A
Module model information OCP current 6A
@ PR1000
SY8286_V1_single.mdd 10K_0402_5%
1 2
SY8286_V1_dual.mdd +3VALW 500Khz
IL=2.0A@19.5V
ripple=7.7mV@19.5V

1.05*2.9/0.9/9=0.375A
1 2
EMC@ +19VB_+1.8VSP @EMC@ PR1002 @EMC@ PC1000 +1.8VSP 1 2 +1.8V_GFX_AON
PL1000 keep short pad,
HCB2012KF-121T50_0805 snubber is for EMI only. 4.7_1206_5% 680P_0603_50V7K @ PJ1000
1 2 1 2 SNUB_+1.8VSP 1 2 JUMP_43X79
PU1000
Pilot.02
SY8286RAC_QFN20_3X3

B+ 1
1 2
2 2
IN PG
9 @ PR1003
0_0402_5%
PC1001
0.1U_0201_10V6K
@ PJ1001 3 1 BST_+1.8VSP 1 2 BST_+1.8VSP_R 1 2 PL1001
2200P_0402_50V7K

10U_0805_25V6K

10U_0805_25V6K
0.1U_0402_25V6

IN BS
1

1
JUMP_43X79 1UH_PCMB053T-1R0MS_7A_20%
EMC@ PC1003

@EMC@ PC1004

PC1002

@ PC1005

C C
4
IN LX
6 LX_+1.8VSP 1 2
+1.8VSP
2

5 19 Itdc7A Isat=11A

330P_0402_50V7K

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
IN LX

100K_0402_1%
1

1
7 20

PC1006

PR1004

PC1007

PC1008

PC1009

PC1010
GND LX
8 14 FB_+1.8VSP
R1

2
GND FB
3.3V

2
18 17 LDO_+1.8VSP 3V FB=0.6V
Pilot.02 GND VCC

1
1 2 EN_+1.8VSP 11 10
[20,31] DGPU_PWR_EN EN NC PC1011
0.1U_0402_25V6

1
@ PR1011 ILMT_+1.8VSP 13 12 2.2U_0402_6.3V6M

49.9K_0402_1%
2
ILMT NC
1

0_0402_5%
@ PC1012

PR1008
PR1007 15 16
Vout=0.6V* (1+R1/R2) R2
1M_0402_1% +3VALW BYP NC
=0.6*(1+(100/49.9))
2

footprint 21
+3VALW

2
PAD
2

EN :H>0.8V ; L<0.4V SY8286RAC_QFN20_3X3

Vout=1.8V
1

PC1013
1U_0402_6.3V6K
EN pin don't floating
1

If have pull down resistor at HW side, @ PR1009

B please delete PR1007. 0_0402_5% B
2

Pilot.02
1

@ PR1010
0_0402_5%
2

The current limit is set to 6A, 9A or 12A when this pin

is pull low, floating or pull high.

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+1.05VGPU(SY8286)
Size Document Number Rev
GPU other power_Regulatorr(43.7), Support component(43.8) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
LA-D993P 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, November 08, 2016 Sheet 62 of 70
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PROG sets (Base on FNTBD.6 July 25, 2014)

PROG1 Vboot :0V
slew rate :30 mV/uS
PROG2 IMAX VR A :70A
+VCCST +5VS Vcore_B+ PROG3 IMAX VR A :55A
DROOP VR GT :Active
Pilot.02 PROG4 DROOP VR A: Active
PR1100
12.1K_0402_1% DROOP VR SA :Active

1
1 2 VR A and VR GT SWITCHING FREQUENCY:583 (kHz)
D PR1101 @ PR1102 D
1_0402_5% 0_0402_5% PROG5 VR SA IMAX(A):12A

0.1U_0402_10V7K
PC1100 VR SA SWITCHING FREQUENCY :450 (kHz)

PC1101

100_0402_1%
45.3_0402_1%
1

1
4700P_0402_25V7K PC1102

PR1103

2
1 2 1U_0402_16V6K

PR1104
2
1 2

2
PR1105
97.6K_0402_1% PR1106
1 2 10_0402_1% 1 2
[9] VR_SVID_DATA 1 2VR_SVID_DATA_C
PC1103
PH1100 @ PR1107 0.22U_0603_25V7K
PC1104 470K_0402_5%_ TSM0B474J4702RE 0_0402_5% Pilot.02
330P_0402_50V7K 1 2 1 2VR_SVID_ALERT#_C
[9] VR_SVID_ALERT#
1 2 NTC of GT at 100 deg
PR1108
PR1111 49.9_0402_1%
10.2K_0402_1% [9] VR_SVID_CLK 1 2VR_SVID_CLK_C
1 2 1 2
PR1109
PR1110 PC1105 100_0402_1%

16.9K_0402_1%

5.62K_0402_1%
1

1
27.4K_0402_1% 1000P_0402_50V7K 1 2
[9,48,54,55] H_PROCHOT#

165K_0402_1%
1 2

PR1113

PR1114

PR1115
PC1106 PR1112 PR1116
47P_0402_50V8J 1.91K_0402_1% 110K_0402_1%
1 2 1 2
+3VS

2
PC1108 PR1119 @ PR1117 0_0402_5% OCP of SA at 16.5A
1000P_0402_50V7K 2K_0402_1% Pilot.02 1 2 PR1121
1 2 1 2 1 2 1 2 [18] IMVP_VR_PG 1.1K_0402_1%
@ PR1120 0_0402_5% 1 2 ISUMN_SA [65]
PC1107 PR1118 1 2
[18,33] VR_ON
8200P_0402_25V7K 3.6K_0402_1%

1
PC1109 PR1122 [55] P_SYS PC1110 PR1124 PH1101
680P_0402_50V7K 1K_0402_1% PR1123 2200P_0402_50V7K 1K_0402_1% 10K_0402_5%_B25/50 4250K

48
47
46
45
44
43
42
41
40
39
38
37
C C

11K_0402_1%
4700P_0402_16V7K

1
0.033U_0402_16V7K
1 2 1 2 48.7K_0402_1% 1 2 1 2

1
.1U_0402_16V7K
1 2

PC1113

PC1112

PR1126
VCC
VIN
VR_ENABLE
VR_READY

SCLK

SDA
VR_HOT#

ALERT#

PROG1
PROG2
PROG3
PROG4

2
PC1111
1
PR1127 PWM_SA [65]

1
2.94K_0402_1%

2
1 2 PR1125
[12] VCCGT_SENSE FCCM_SA [65]

2
1 36 2.61K_0402_1%
Droop of GT at 2.65mV/A 2 PSYS PU1100 PROG5 35
[12] VSSGT_SENSE IMON_B PWM_C
3 ISL95829AHRTZ-T_TQFN48_6X6 34

2
NTC_B FCCM_C
1

4 33
PC1114 5 COMP_B ISUMN_C 32
FB_B ISUMP_C ISUMP_SA [65]
0.01UF_0402_25V7K 6 31
VSSSA_SENSE [11]
2

7 RTN_B RTN_C 30 1 2 1 2
ISUMP_B FB_C VCCSA_SENSE [11]
8 29
ISUMN_B COMP_C

1
9 28 PR1128 PC1115
10 ISEN1_B IMON_C 27 1K_0402_1% 220P_0402_50V8J PC1116
[65] ISUMP_GT ISEN2_B PWM3_A
11 26 0.01UF_0402_25V7K

2
12 FCCM_B PWM2_A 25 1 2
footprint

2K_0402_1%
4.42K_0402_1%
PWM1_B PWM1_A
1

1
2.61K_0402_1%
PR1130

1
330P_0402_50V7K
ISL95855HRTZTS27_TQFN48_6X6-S PR1129
10K_0402_5%_B25/50 4250K

PR1134
2.67K_0402_1%

PR1133
ISUMN_A
ISUMP_A
PWM2_B

COMP_A

ISEN1_A
ISEN2_A
ISEN3_A
FCCM_A
.1U_0402_16V7K
1

0.068U_0402_16V7K

IMON_A
PR1132 PC1119 49 Droop of SA at 10mV/A

NTC_A

RTN_A
11K_0402_1%

68P_0402_50V8J
EP
1

1
1K_0402_1% 2200P_0402_50V7K

FB_A
PR1131

PC1117

PC1118

PC1120
115K_0402_1%
1 2

1 2
1

1
1 2 1 2

PR1135

PC1121

2
PWM3_VCORE [64]

PC1122
2

470P_0402_50V7K
2200P_0402_50V7K
PH1102

13
14
15
16
17
18
19
20
21
22
23
24
2

2
PWM2_VCORE [64]

PC1123
2

2
1
PR1136 PWM1_VCORE [64]
2

432_0402_1%

2
[65] ISUMN_GT 1 2 FCCM_VCORE [64]
OCP of GT at 66A
.1U_0402_16V7K
1

1 2
PC1124

PC1126 PC1125 0.022U_0402_25V7K

2

0.022U_0402_25V7K [64] ISEN3_VCORE

B ISEN2_GT [65] B
1 2
1 2
ISUMN_VCORE [64]
PC1127 0.022U_0402_25V7K
PC1129 [64] ISEN2_VCORE

1
0.022U_0402_25V7K 1 2
ISEN1_GT [65]

1
1 2 PH1103

.1U_0402_16V7K
PR1137 PC1128 0.022U_0402_25V7K 10K_0402_5%_B25/50 4250K

PC1130

11K_0402_1%
1
.047U_0402_16V7K

0.22U_0402_16V7K
374_0402_1% [64] ISEN1_VCORE
[65] FCCM_GT

1
1 2

PC1131

PR1138

2
PC1132
[65] PWM1_GT
OCP of Vcore at 83.2A

1
[65] PWM2_GT PC1133 PR1139

2
PR1140
1 2 1 2 2.61K_0402_1%

2200P_0402_50V7K 1K_0402_1%

2
ISUMP_VCORE [64]

VSS_SENSE [10]
PR1141
10.2K_0402_1% 1 2 1 2 VCC_SENSE [10]
NTC of CORE at 100 deg 1 2

1
PR1142 PC1134 PC1135
1K_0402_1% 470P_0402_50V7K 0.01UF_0402_25V7K
27.4K_0402_1%
90.9K_0402_1%

2
1

1
330P_0402_50V7K

1 2
470K_0402_5%_ TSM0B474J4702RE
1

1
PR1143

PC1136

PH1104
PR1144

PR1147 PR1146
4.87K_0402_1% PR1145 2.43K_0402_1%
2

2K_0402_1%
2

PC1137 Droop of CORE at 1.8mV/A

68P_0402_50V8J
2

A PC1139 PC1138 A
8200P_0402_25V7K 680P_0402_50V7K
2

Security Classification Compal Secret Data Compal Electronics, Inc.

2011/06/02 2013/10/28 Title
Issued Date Deciphered Date
CPU_Vcore controller(36.1),Drivers(36.2), Support component(36.3) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-VCORE_ISL95829
Size Document Number Rev
Acoustic Noise B+ Bulk CAP(37.2) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
Date: Tuesday, November 08, 2016 Sheet 63 of 70
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PR1400 PC1400
1_0402_5% 1U_0402_6.3V6K
1 2 1 2
+5VS
Pilot.02

10K_0402_1%
@ PR1401 0_0402_5%
B+ Vcore_B+ VCC_core (Base on PDDG rev 0.7)

1
1 2

PR1403
1
[63] PWM1_VCORE PL2 TDC__default):TB

PR1402
1_0402_5%
EMC@ PL1400 @ PR1404 0_0402_5% PU1400
HCB2012KF-121T50_0805 1 2 SIC632CDT1GE3_POWERPAK31_5X5 PL2 TDC_max (40Sec):50A
1 2 [63,64] FCCM_VCORE 1 28 Peak Current 68A
6.6 x 7.6 x 4mm

2
2 PWM CGND 27
0.98m ohm +-5% DC Load line -1.8mV/A

2
EMC@ PL1401 PC1402 3 ZCD_EN# GL 26
HCB2012KF-121T50_0805 0.22U_0603_16V7K 4 VCIN DSBL# 25 DC=28A/ISAT=28A +VCC_CORE
AC Load line -1.8mV/A
1 2 1 2 1 2 5 CGND THWn 24
6 BOOT VDRV 23 PL1402 OCP Current 83.2A
@ PJP1400 PC1401 1 2 7 NC PGND 22 VCC_CORE_PT1 PT1400 TP@ 0.22UH_PCME064T-R22MS0R985_28A_20%
D
JUMP_43X118 1U_0402_6.3V6K PR1405 8 PHASE GL 21 1 2
DCR 0.97mohm +/-5% D
1 2 4.7_0603_1% 9 VIN SW 20
1 2 10 VIN SW 19

1
11 PGND SW 18
12 SW SW 17

EMC@
PR1407 PR1408

PR1406
10_1206_5%
13 SW SW 16
0_0402_5% 0_0402_5%
100U_25V_M

1
14 SW SW 15
PC1403

+ SW SW @ @

10U_0805_25V6K

10U_0805_25V6K

2
2200P_0402_50V7K
0.1U_0402_25V6
SIC632CDT1GE3_POWERPAK31_5X5

1.5P_0402_50V8C
1

1
舖舖舖舖

EMC@ PC1406

EMC@ PC1407
footprint V1N

PC1404

PC1405

EMC@ PC1408
2

100K_0402_1%
1

2.2_0402_1%
EMC@
PC1409

100K_0402_1%

100K_0402_1%
3.65K_0603_1%
47P_0603_50V8J
2

1
1

1
PR1409

PR1413
PR1411

PR1412
PR1410
2

2
2

2
[63] ISEN1_VCORE

[63] ISUMP_VCORE

[63] ISUMN_VCORE
ISEN2_VCORE

PR1414 PC1410 ISEN3_VCORE

1_0402_5% 1U_0402_6.3V6K
1 2 1 2
+5VS
Pilot.02

10K_0402_1%
@ PR1415 0_0402_5%

1
1 2

PR1418
1

[63] PWM2_VCORE
PR1416
1_0402_5%

C @ PR1417 0_0402_5% PU1401 C

1 2 SIC632CDT1GE3_POWERPAK31_5X5
[63,64] FCCM_VCORE 1 28 6.6 x 7.6 x 4mm

2
2 PWM CGND 27
0.98m ohm +-5%
2

PC1412 3 ZCD_EN# GL 26
0.22U_0603_16V7K 4 VCIN DSBL# 25 DC=28A/ISAT=28A
1 2 1 2 5 CGND THWn 24
6 BOOT VDRV 23 PL1403
PC1411 1 2 7 NC PGND 22 VCC_CORE_PT2 PT1401 TP@ 0.22UH_PCME064T-R22MS0R985_28A_20%
1U_0402_6.3V6K PR1419 4.7_0603_1% 8 PHASE GL 21 1 2
9 VIN SW 20
10 VIN SW 19
11 PGND SW 18

1
1

1
EMC@
PR1420
10_1206_5%
12 SW SW 17 PR1421 PR1422
13 SW SW 16
0_0402_5% 0_0402_5%
14 SW SW 15
@ @
SW SW
10U_0603_25V6M

10U_0603_25V6M

2
2

2
2200P_0402_50V7K
0.1U_0402_25V6

SIC632CDT1GE3_POWERPAK31_5X5
1

舖舖舖舖
EMC@ PC1415

EMC@ PC1416

footprint V2N
PC1413

PC1414

EMC@
PC1417

100K_0402_1%
47P_0603_50V8J
1

2.2_0402_1%
3.65K_0603_1%

100K_0402_1%

100K_0402_1%
2

1
1

1
PR1423

PR1427
PR1425

PR1426
PR1424
2

2
2

2
[63] ISEN2_VCORE
ISUMP_VCORE

ISUMN_VCORE

PR1428 PC1418
1_0402_5% 1U_0402_6.3V6K ISEN1_VCORE
1 2 1 2
+5VS
B Pilot.02 B

10K_0402_1%
@ PR1429 0_0402_5% ISEN3_VCORE

1
1 2 PR1432
1

[63] PWM3_VCORE
PR1430
1_0402_5%

@ PR1431 0_0402_5% PU1402

1 2 SIC632CDT1GE3_POWERPAK31_5X5
[63,64] FCCM_VCORE 1 28 6.6 x 7.6 x 4mm
2

2 PWM CGND 27
0.98m ohm +-5%
2

PC1419 3 ZCD_EN# GL 26
0.22U_0603_16V7K 4 VCIN DSBL# 25 DC=28A/ISAT=28A
1 2 1 2 5 CGND THWn 24
6 BOOT VDRV 23 PL1404
PC1420 1 2 7 NC PGND 22 VCC_CORE_PT3 PT1402 TP@ 0.22UH_PCME064T-R22MS0R985_28A_20%
1U_0402_6.3V6K PR1433 8 PHASE GL 21 1 2
4.7_0603_1% 9 VIN SW 20
10 VIN SW 19 1

1
11 PGND SW 18
12 SW SW 17
EMC@

PR1435 PR1436
PR1434
10_1206_5%

13 SW SW 16
0_0402_5% 0_0402_5%
14 SW SW 15
@ @
SW SW
10U_0805_25V6K

10U_0805_25V6K

2
2200P_0402_50V7K
0.1U_0402_25V6

SIC632CDT1GE3_POWERPAK31_5X5
1

舖舖舖舖
EMC@ PC1423

EMC@ PC1424

footprint V3N
PC1421

PC1422

1
EMC@
PC1425
47P_0603_50V8J
2

100K_0402_1%

3.65K_0603_1%
2

2.2_0402_1%

100K_0402_1%

100K_0402_1%
1

1
PR1437

PR1441
PR1438

PR1439

PR1440
2

2
[63] ISEN3_VCORE

ISUMP_VCORE
A A

ISUMN_VCORE

ISEN1_VCORE

ISEN2_VCORE

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

WWW.ALISALER.COM
CPU_Vcore controller(36.1),Drivers(36.2), Support component(36.3), THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-VCORE_VCORE
Size Document Number Rev
CPU_Core output CAP(36.4),Acoustic Noise B+ Bulk CAP(37.2) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
Date: Tuesday, November 08, 2016 Sheet 64 of 70
5 4 3 2 1
 WWW.AliFixit.COM
5 4 3 2 1

PR1500 PC1500
1_0402_5% 1U_0402_6.3V6K
1 2 1 2
+5VS
Pilot.02
@ PR1501 0_0402_5%

10K_0402_1%
1
B+ 1 2

PR1504
1
[63] PWM1_GT
VCCGT (Base on PDDG rev 0.7)

PR1502

1_0402_5%
EMC@ PL1500 @ PR1503 0_0402_5% PU1500
HCB2012KF-121T50_0805
[63,65] FCCM_GT
1 2 SIC632CDT1GE3_POWERPAK31_5X5 6.6 x 7.6 x 4mm PL2 TDC__default):TB
1 2 1 28
0.98m ohm +-5% PL2 TDC_max (40Sec):25A

2
2 PWM CGND 27

2
EMC@ PL1501 PC1502 3 ZCD_EN# GL 26 DC=28A/ISAT=28A +VCCGT
Max Current 55A
HCB2012KF-121T50_0805 0.22U_0603_16V7K 4 VCIN DSBL# 25
1 2 1 2 1 2 5 CGND
BOOT
THWn 24
VDRV
PL1502 DC Load line -2.65mV/A
6 23 0.22UH_PCME064T-R22MS0R985_28A_20%
D
@ PJP1500 PC1501 1 2 7 NC PGND 22 VCC_GT_PT1 PT1500 TP@
AC Load line -2.65mV/A D

JUMP_43X118 1U_0402_6.3V6K PR1505 8 PHASE GL 21 1 2 OCP Current 66.7A

1 2 4.7_0603_1% 9 VIN SW 20
1 2 10 VIN SW 19 DCR 0.97mohm +/-5%
VCCGT_B+ 11 PGND SW 18

1
12 SW SW 17 PR1506 PR1507

PR1508
@EMC@

4.7_1206_5%
13 SW SW 16

1
0_0402_5% 0_0402_5% 6.6 x 7.4 x 4mm
14 SW SW 15
@ @
SW SW 0.98mo/DC=28A/ISAT=28A

10U_0603_25V6M

10U_0603_25V6M

2
SIC632CDT1GE3_POWERPAK31_5X5

2200P_0402_50V7K
0.1U_0402_25V6
1
1

1
EMC@ PC1505

EMC@ PC1506
舖舖舖舖

PC1503

PC1504
footprint

680P_0603_50V7K
2
2

1
PC1507
@EMC@

3.65K_0603_1%

2.2_0402_1%

100K_0402_1%
1

1
1

@ PR1525
PR1511
PR1509
100K_0402_1%

2
PR1510

2
2
[63] ISUMP_GT

[63] ISEN1_GT

[63] ISUMN_GT

PR1512 PC1508 ISEN2_GT

1_0402_5% 1U_0402_6.3V6K
1 2 1 2
+5VS
Pilot.02
@ PR1513 0_0402_5%

10K_0402_1%
1
1 2

PR1516
1
[63] PWM2_GT

1_0402_5%
@ PR1515 0_0402_5% PU1501

PR1514
1 2 SIC632CDT1GE3_POWERPAK31_5X5 6.6 x 7.6 x 4mm
[63,65] FCCM_GT 1 28
0.98m ohm +-5%

2
2 PWM CGND 27

2
PC1510 3 ZCD_EN# GL 26 DC=28A/ISAT=28A
0.22U_0603_16V7K 4 VCIN DSBL# 25
C
1 2 1 2 5 CGND THWn 24 PL1503 C
6 BOOT VDRV 23 0.22UH_PCME064T-R22MS0R985_28A_20%
PC1509 1 2 7 NC PGND 22 VCC_GT_PT2 PT1501 TP@
1U_0402_6.3V6K PR1517 8 PHASE GL 21 1 2
4.7_0603_1% 9 VIN SW 20
10 VIN SW 19
11 PGND SW 18

1
1
4.7_1206_5%
12 SW SW 17

1
PR1519 PR1520

PR1518
@EMC@
13 SW SW 16
0_0402_5% 0_0402_5%
14 SW SW 15
@ @
SW SW
10U_0805_25V6K

10U_0805_25V6K

2
2
SIC632CDT1GE3_POWERPAK31_5X5
2200P_0402_50V7K
0.1U_0402_25V6

2
1

1
EMC@ PC1513

EMC@ PC1514

舖舖舖舖
PC1511

PC1512

footprint

680P_0603_50V7K
1
PC1515
@EMC@

3.65K_0603_1%
2

1
1

2.2_0402_1%
100K_0402_1%

100K_0402_1%
PR1522

PR1523

@ PR1526
PR1521
2

2
2

2
ISUMP_GT

[63] ISEN2_GT

ISUMN_GT

ISEN1_GT

PR1533 PC1523
1_0402_5% 4.7U_0402_6.3V6M
1 2 1 2
+5VS
B
Pilot.02 B
1
1_0402_5%

@ PR1530
PR1531

0_0402_5%
1 2
[63] FCCM_SA
Pilot.02
2

1 2 PU1503 @ PR1532
SIC531CDT1GE3_POWERPAK22_4X3 0_0402_5% 5.49 x 5.18 x 3mm
VCCSA (Base on PDDG rev 0.7)
B+
PC1520 PC1522 1
ZCD_EN#
1 2
PWM_SA [63] 6.25m ohm +-5% PL2 TDC__default):TBD
EMC@ PL1504 4.7U_0402_6.3V6M 0.22U_0603_16V7K 2 13
HCB2012KF-121T50_0805 1 2 3 VCIN CGND 12 DC=12A/ISAT=16A PL2 TDC_max (40Sec):10A
CGND PWM 11 +VCCSA
1 2
1 2
4
5 BOOT VDRV 10 PL1505
Max Current 11A
@ PJP1501 PR1527 6 PHASE
VIN
PGND 9
GL 8
VCC_SA_PT1 PT1503 TP@ 0.47UH_MMD05CZR47M_12A_20% DC Load line -9.1mV/A
JUMP_43X118 1_0603_5% 7 1 4
1 2 PGND VSWH AC Load line -9.1mV/A
1 2 SIC531CDT1GE3_POWERPAK22_4X3-S 2 3 OCP Current 20A

PR1524
@EMC@

4.7_1206_5%
1
footprint
2200P_0402_50V7K

0.1U_0402_25V6

10U_0805_25V6K

10U_0805_25V6K
EMC@ PC1516

EMC@ PC1517

1
1

1
PC1518

PC1519

680P_0603_50V7K
2
2

1
PC1521
@EMC@

1
3.65K_0603_1%
@ PR1529

PR1528
0_0402_5%

2
A A

Pilot.02
[63] ISUMP_SA

[63] ISUMN_SA

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

CPU_Vcore controller(36.1),Drivers(36.2), Support component(36.3), PWR_VCORE_VGT,VSA

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
GFX output CAP(36.5) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
Date: Tuesday, November 08, 2016 Sheet 65 of 70
5 4 3 2 1
 A
B
C
D
1uF*6

1uF*6
47uF*9
+VCCGT
.1uF*15
220uF*1
22uF*15
470uF*2

.1uF*15
22uF*26
470uF*2
+VCC_CORE

5
5

+VCCGT
+VCC_CORE

2 1 2 1 2 1 2 1 2 1 2 1

2
1
2
1

+
+

PC1326 PC1320 PC1366 PC1314 PC1307 PC1221 PC1220 PC1207

.1U_0402_16V7K 1U_0402_6.3V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 470U_D2_2VM_R4.5M 1U_0402_6.3V6K 22U_0603_6.3V6M 470U_D2_2VM_R4.5M
2 1 2 1 2 1 2 1 2 1 2 1

2
1
2
1

+
+

Vcc_SA output CAP(36.6)

PC1327 PC1321 PC1363 PC1348 PC1301 PC1222 PC1261 PC1208
.1U_0402_16V7K 1U_0402_6.3V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 470U_D2_2VM_R4.5M 1U_0402_6.3V6K 22U_0603_6.3V6M 470U_D2_2VM_R4.5M
2 1 2 1 2 1 2 1 2 1 2 1 2 1

PC1328 PC1322 PC1368 PC1350 PC1303 PC1223 PC1263

.1U_0402_16V7K 1U_0402_6.3V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M 1U_0402_6.3V6K 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1 2 1 2 1
2
1
+

PC1329 PC1323 PC1367 PC1349 PC1304 PC1224 PC1274 PC1397

.1U_0402_16V7K 1U_0402_6.3V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M 1U_0402_6.3V6K 22U_0603_6.3V6M 220U_D7_2VM_R6M
2 1 2 1 2 1 2 1 2 1 2 1 2 1

WWW.ALISALER.COM
PC1330 PC1324 PC1370 PC1352 PC1305 PC1225 PC1264
.1U_0402_16V7K 1U_0402_6.3V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M 1U_0402_6.3V6K 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1 2 1 2 1

PC1331 PC1325 PC1369 PC1351 PC1300 PC1226 PC1265

4
4

.1U_0402_16V7K 1U_0402_6.3V6K 22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M 1U_0402_6.3V6K 22U_0603_6.3V6M

2 1 2 1 2 1 2 1 2 1 2 1

PC1332 PC1373 PC1354 PC1306 PC1229 PC1269

.1U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M .1U_0402_16V7K 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1 2 1

Vcc_CORE output CAP(36.4), Vcc_GT output CAP(36.5),

PC1333 PC1372 PC1353 PC1309 PC1230 PC1271
.1U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M .1U_0402_16V7K 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1 2 1

PC1334 PC1376 PC1360 PC1310 PC1231 PC1276

.1U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M .1U_0402_16V7K 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1 2 1

PC1335 PC1374 PC1359 PC1311 PC1232 PC1200

Issued Date
.1U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M .1U_0402_16V7K 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1 2 1

Security Classification
PC1338 PC1377 PC1362 PC1312 PC1233 PC1201
.1U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M .1U_0402_16V7K 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1

PC1339 PC1375 PC1361 PC1239 PC1202

.1U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M .1U_0402_16V7K 22U_0603_6.3V6M
2 1 2 1 2 1 2 1 2 1

PC1340 PC1379 PC1378 PC1240 PC1203

.1U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M .1U_0402_16V7K 22U_0603_6.3V6M
2 1 2 1 2 1

2011/06/02

3
3

PC1341 PC1241 PC1204

.1U_0402_16V7K .1U_0402_16V7K 22U_0603_6.3V6M
2 1 2 1 2 1

PC1342 PC1242 PC1205

.1U_0402_16V7K .1U_0402_16V7K 22U_0603_6.3V6M
2 1

PC1243
.1U_0402_16V7K
2 1

PC1244
.1U_0402_16V7K
2 1
.1uF*2
22uF*9
47uF*3
+VCCSA

Compal Secret Data

Deciphered Date
PC1245
.1U_0402_16V7K
2 1
+VCCSA

PC1246
.1U_0402_16V7K
2 1
2 1 2 1 2 1 2 1
PC1247
PC1384 PC1385 PC1391 PC1388 .1U_0402_16V7K
.1U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M 2 1

2013/10/28
2 1 2 1 2 1 2 1

2
2

PC1248
PC1383 PC1380 PC1396 PC1382 .1U_0402_16V7K

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
.1U_0402_16V7K 22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M
2 1 2 1 2 1

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D PC1389 PC1386 PC1393
22U_0603_6.3V6M 22U_0603_6.3V6M 47U_0805_6.3V6M
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

2 1 2 1

PC1394 PC1390
22U_0603_6.3V6M 22U_0603_6.3V6M
Size
Title

Date:

2 1

PC1395
22U_0603_6.3V6M
Document Number

LA-D993P
Tuesday, November 08, 2016
1
1

Sheet
66
Compal Electronics, Inc.

of
70
PWR_PROCESSOR_DECOUPING
Rev
A
B
C
D

0.1(X00)
WWW.AliFixit.COM
 WWW.AliFixit.COM

5 4 3 2 1

+GPU_CORE (0.95V)
+1.8V_GFX_AON
N17P-GX GDDR5_50W
2Phase DEM 2Phase CCM TDC 45A
Peak Current 106A

1
PSI 1.2V 1.8V
PR1600 Rb OCP current 142A
10K_0402_1% Rb 22.6Kohm 0ohm DCR 0.82mohm +/- 5%
D @ PR1601 Rc 169Kohm NC TYP MAX D

2
0_0402_5%
1 2 H/S Rds(on) : 6.8mohm , 8.6mohm
GPU_PSI [23,68]
L/S Rds(on) : 2.0mohm , 2.5mohm

1
@ PR1602 Pilot.02
169K_0402_1%
PL1600 EMC@
Rc HCB2012KF-121T50_0805

2
DH1_NVVDD +VGA_B+ 1 2

LX1_NVVDD PL1601 EMC@

HCB2012KF-121T50_0805
1 2 B+

2200P_0402_50V7K
@ PR1603

10U_0805_25V6K

10U_0805_25V6K

PC1603

@EMC@ PC1604

@EMC@ PC1605
0.1U_0402_25V6
47P_0402_50V8J
Vmax=1.3V 0_0402_5% PQ1600 1

100U_25V_M
1

1
1 2 AON6992_DFN5X6D-8-7

PC1601

PC1602

PC1606
Vmin=0.3V [23] NVVDD_PWM_VID

1
+
Vboot=0.8V Pilot.02

D1

G1

D1

G1

2
EMC@
2

D2/S1
7
D2/S1
7 +GPU_CORE (place under GPU) +GPU_CORE (place near GPU)
R2
1

PR1606 PQ1601 +GPU_CORE +GPU_CORE

G2

G2
S2

S2

S2

S2

S2

S2
1

PC1600 20.5K_0402_1% NVVDD_EN [31] AON6992_DFN5X6D-8-7

0.1U_0402_25V6
R3

6
PR1607 PR1608
2

4.32K_0402_1% 6.19K_0402_1%
1 2 1 2
PL1602 +GPU_CORE
16.5K_0402_1%

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
1

C C
0.22UH_MMD-10DZ-R22MEX2L_35A_20%
R1
DH1_NVVDD

1
.01U_0402_16V7K

NVVDD_VID

1 2
PR1609

PC1613

PC1609

PC1614

PC1615

PC1616

PC1617

PC1618

PC1619

PC1620

PC1621

PC1610

PC1611

PC1622

PC1623

PC1624

PC1612
PR1610
@ PC1608
1

R4 C 2.2_0603_5%
1

11.5 x 10.3 x 4mm

EMC@ PR1611
10_1206_5%

2
1
PC1625 1 2
REFADJ_NVVDD

BST1_NVVDD

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M

470U_D2_2VM_R4.5M
0.82m ohm +-5%
2

4700P_0402_50V7K 1 1 1
2

DL1_NVVDD DC=35A/ISAT=60A
1

+ + +
309_0402_1%

PC1627

PC1628

@ PC1629
5

1
PR1612

PU1600 PC1626

2
0.22U_0603_25V7K
R5
VID

PSI

EN

UGATE1

BOOT1

2 2 2

47P_0603_50V8J
EMC@ PC1630
2

1
6 20 LX1_NVVDD

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
REFADJ PHASE1

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

1
PC1637

PC1638

PC1639

PC1640

PC1641

PC1642

PC1643
2

1
REFIN_NVVDD 7 19 DL1_NVVDD

PC1635

PC1631

PC1632

PC1633

PC1634

PC1636
REFIN LGATE1 PR1613
2.2_0603_5%

2
2

2
VREF_NVVDD 8 18 1 2 +5VS
VREF RT8816AGQW_WQFN20_3X3 PVCC
1

PR1614 PR1615
20_0402_1% 453K_0402_1% 9 17 DL2_NVVDD PC1644 DH2_NVVDD +VGA_B+
1 2 1 2 TON LGATE2
+VGA_B+ 1U_0402_16V6K
2

LX2_NVVDD
OCSET/SS

10 16 LX2_NVVDD

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
Fsw=370KHz
UGATE2

RGND PHASE2
1

0.1U_0402_25V6

PGOOD
PC1645

BOOT2

1
VSNS

@ PC1647

@ PC1648

@ PC1649

@ PC1650

@ PC1651

@ PC1652

@ PC1653
GND

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
2

2200P_0402_50V7K
PC1646

10U_0805_25V6K

10U_0805_25V6K

PC1655

@EMC@ PC1663

@EMC@ PC1664

2
1

1
0.1U_0402_25V6
47P_0402_50V8J
0.22U_0603_25V7K PQ1602

PC1665

PC1666

PC1656

PC1657

PC1658

PC1659

PC1667

PC1668

PC1660

PC1661
PR1616
2
21

11

12

13

14

15

1
AON6992_DFN5X6D-8-7

PC1654

PC1662
2.2_0603_5% 2

1
DH2_NVVDD

2
B BST2_NVVDD 1 2 B
D1

G1

D1

G1

2
NVVDD_PGOOD

EMC@
PR1617
100_0402_1%
1 2 7 7
D2/S1 D2/S1
@ PR1619 Pilot.02
Pilot.02 @ PR1618 0_0402_5% PQ1603
G2

G2
S2

S2

S2

S2

S2

S2
0_0402_5% 1 2 AON6992_DFN5X6D-8-7

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
GPU_CORE_PG [31]
[24] VSSSENSE_VGA 1 2
3

1
1 2

PC1669

PC1670

PC1671

PC1672

PC1673

PC1674

PC1675
PR1624 +3VS PL1603
1

@ PC1676 10K_0402_5% 0.22UH_MMD-10DZ-R22MEX2L_35A_20%

2
100P_0402_50V8J 1 2
Pilot.02 @ PR1620 PR1621
2

0_0402_5% 100K_0402_1% 11.5 x 10.3 x 4mm

EMC@ PR1622
10_1206_5%
1
1 2 1 2
[24] VCCSENSE_VGA 0.82m ohm +-5%
PR1623 DC=35A/ISAT=60A
100_0402_1% 1 2
+GPU_CORE
1 2 DL2_NVVDD Under:
@ PC1677 2
0.01U_0402_16V7K
1. 4.7uF*16 (SE00000G300)
2. 1uF*10(SE000000K80)
47P_0603_50V8J
EMC@ PC1678
1

Near:
1. 4.7uF*6(SE00000G300)
I_ripple=(19-0.9)*0.9/
2

2. 22uF*7 (SE00000M000)
(370Khz*0.22u*19)=10.53A 3. 10uF*7 (SE000005T80)
4. 470uF 4.5mo *2 (SGA0000420L)
OCP=142A/2=71A per phase
Ivalley=71A-10.53A/2=65.735A
A A
Current Limit threshold setting
Rocset= (Ivalley * Rds(on) /2pcs *12) / 10uA=100K

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

VGA_CORE controller(43.1), Support component(43.2) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-+NVVDD(RT8816A)
Size Document Number Rev
VGA_CORE Drivers (43.3), GPU Core Output CAP (43.9) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
Date: Tuesday, November 08, 2016 Sheet 67 of 70
5 4 3 2 1

WWW.ALISALER.COM
 5 4 3 2
WWW.AliFixit.COM GPU_CORE_VDDS (0.95V)
1

+1.8V_GFX_AON N17P-GX GDDR5_50W

TDC 13A
Ra

1
Peak Current 18A
@ PR1700 1Phase DEM 1Phase CCM
10K_0402_1% Rb OCP current 60A
@ PR1701
PSI 0V 0.8V DCR 0.82mohm +/- 5%

2
0_0402_5% Ra NC 10Kohm TYP MAX
NVVDDS_PSI 1 2
GPU_PSI [23,67]
Rb NC 0ohm
H/S Rds(on) : 6.8mohm , 8.6mohm

1
L/S Rds(on) : 2.0mohm , 2.5mohm
@ PR1702 Rc 0ohm 8.06Kohm
D
0_0402_5%
Pilot.02 D

Rc

2
PL1700 EMC@
HCB2012KF-121T50_0805
DH1_NVVDDS +NVVDDS_B+ 1 2

LX1_NVVDDS PL1701 EMC@

HCB2012KF-121T50_0805
1 2
B+

2200P_0402_50V7K
PC1703

@EMC@ PC1704

@EMC@ PC1705
0.1U_0402_25V6
47P_0402_50V8J
PQ1700

10U_0603_25V6M

10U_0603_25V6M
1

1
AON6992_DFN5X6D-8-7

PC1701

PC1702
2

1
@ PR1703
Vmax=1.3V 0_0402_5%

D1

G1

D1

G1

2
EMC@
1 2
Vmin=0.3V [23] NVVDDS_PWM_VID
Vboot=0.8V Pilot.02 D2/S1
7
D2/S1
7

PQ1701

G2

G2
S2

S2

S2

S2

S2

S2
AON6992_DFN5X6D-8-7
R2
1

6
PR1706
1

PC1700 20.5K_0402_1%
0.1U_0402_25V6
R3 NVVDDS_EN [31,60]
PR1707 PR1708 PL1702 +GPU_CORE_VDDS
2

4.32K_0402_1% 6.19K_0402_1% 0.22UH_MMD-10DZ-R22MEX2L_35A_20%

1 2 1 2 1 2
16.5K_0402_1%
1

DH1_NVVDDS

EMC@ PC1711 EMC@ PR1710

11.5 x 10.3 x 4mm
NVVDDS_VID

R1

47P_0603_50V8J 10_1206_5%
.01U_0402_16V7K

1
C C
@ PC1707
PR1709

PR1711 0.82m ohm +-5%

470U_D2_2VM_R4.5M
1

R4 C 2.2_0603_5% 1
1

DL1_NVVDDS DC=35A/ISAT=60A
PC1709 BST1_NVVDDS 1 2 +

PC1708
REFADJ_NVVDDS
2

4700P_0402_50V7K
2

2
1

1
2
309_0402_1%

1
PU1700 PC1710
PR1712

1
0.22U_0603_25V7K
R5
VID

EN
PSI

UGATE1

BOOT1

2
2

2
6 20 LX1_NVVDDS
REFADJ PHASE1

REFIN_NVVDDS 7 19 DL1_NVVDDS
REFIN LGATE1
PR1713
2.2_0603_5%
VREF_NVVDDS 8 18 1 2 +5VS
VREF RT8816AGQW_WQFN20_3X3 PVCC

1
PR1714 PR1715

+NVVDDS_B+
1
20_0402_1%
2
412K_0402_1%
1 2
9
TON LGATE2
17 PC1712
1U_0402_16V6K
+GPU_CORE_VDDS (place under GPU) +GPU_CORE_VDDS (place near GPU)

2
OCSET/SS

10 16 +GPU_CORE_VDDS +GPU_CORE_VDDS
0.1U_0402_25V6

RGND PHASE2
1

UGATE2
PGOOD
PC1713

BOOT2
VSNS

Fsw=370KHz
GND
2

22U_0603_6.3V6M

22U_0603_6.3V6M

22U_0603_6.3V6M
4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
21

11

12

13

14

15

1
PC1720

PC1721

PC1722
1

1
PC1714

PC1715

PC1716

PC1717

PC1718

PC1719

PC1733

2
2

2
B PR1716 B
100_0402_1%
1 2 Under:
1. 4.7uF*7 (SE00000G300)
Pilot.02 @ PR1717 2. 1uF*5(SE000000K80)
0_0402_5% Near:
[26] GNDS_SENSE_VGA 1 2 1. 22uF*3 (SE00000M000)

10U_0603_6.3V6M

10U_0603_6.3V6M

10U_0603_6.3V6M
2. 10uF*3 (SE000005T80)

1
PC1727

PC1728

PC1729
1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K

1U_0402_6.3V6K
1

@ PC1723 3. 470uF 4.5mo *1 (SGA0000420L)

1
100P_0402_50V8J PR1719 4. 4.7uF*6 (SE00000G300)

PC1724

PC1725

PC1726

PC1730

PC1732
Pilot.02

2
@ PR1720 82.5K_0402_1%
2

0_0402_5% 1 2

2
1 2
[26] VDDS_SENSE_VGA
PR1721 1 2
100_0402_1%
1 2 @ PC1731
+GPU_CORE_VDDS
0.01U_0402_16V7K

I_ripple=(19-0.9)*0.9/

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K

4.7U_0603_6.3V6K
(370Khz*0.22u*19)=10.53A

1
PC1734

PC1735

PC1736

PC1737

PC1738

PC1739
OCP=60A per phase

2
Ivalley=60A-10.53A/2=54.735A

Current Limit threshold setting

Rocset= (Ivalley * Rds(on) *12) / 10uA=82K
A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

VGA_CORE controller(43.1), Support component(43.2) THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR-+NVVDDS(RT8816A)
Size Document Number Rev
VGA_CORE Drivers (43.3), GPU Core Output CAP (43.9) AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
0.1(X00)
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
Date: Tuesday, November 08, 2016 Sheet 68 of 70

WWW.ALISALER.COM
5 4 3 2 1
 WWW.AliFixit.COM
A B C D

2.5V_MEM controller(35.13), Support component(35.14) +2.5V_MEM

TDC 0.63A
Peak Current 0.9A
OCP Current 3.5A
1 1

+3VALW
Pilot.02

1
@ PR1801 PR1800
0_0402_5% 100K_0402_1%
1 2 +2.5VSP_ON
[18,32,33,48,49] SIO_SLP_S4#

0.1U_0402_16V7K

2
EE no need 2.5V_PWROK

1
@ PC1800
2
Delete 2.5V_PWROK 2

Pilot.03
2

9
PU1800
1 8 PR1805

GND
2 PGOOD GND 7 0_0603_1%
3 EN ADJ 6 1 2
+5VALW 4 VIN VOUT 5 +2.5V_MEM
+5VALW VDD NC

22P_0402_50V8J
Rup

1
1

RT9059GSP_SO8
22U_0603_6.3V6M

1
PC1801

PC1802
PR1803

22U_0603_6.3V6M
1U_0402_6.3V6K
2

21.5K_0402_1%

PC1803
2
1

PC1804

2
2

1
3 3

PR1804 Rdown
10K_0402_1%

2
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2015/09/18 Deciphered Date 2016/09/18 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
PWR_+2.5V_MEM
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
Date: Tuesday, November 08, 2016 Sheet 69 of 70
A B C D

WWW.ALISALER.COM
 WWW.AliFixit.COM
5 4 3 2 1

Version Change List ( P. I. R. Page

Page# Title Date
List )
Request Issue 1 Solution Rev.
Owner Description Description

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2011/06/02 Deciphered Date 2013/10/28 Title

WWW.ALISALER.COM
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NOTE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1(X00)
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-D993P
Date: Tuesday, November 08, 2016 Sheet 70 of 70
5 4 3 2 1