Digital Logic Design Lab Fall 2022

Title: Implementation Of 2-Line-To -4-line Decoder & 3-Line-To-8-Line Decoder

Lab Worksheet #11

Name: ______________________ Semester: ________________

Sapid#: ______________________ Section: _________________

INTRODUCTION & BASIC CONCEPTS:

A decoder is a combinational circuit that converts binary information from n-input lines to a
maximum of 2n unique output line. If the n-bit coded information has unused combinations,
the decoder may have fewer than 2n outputs. The decoder presented here are called n-to-m-
line decoders, where m < = 2n, their purpose is to generate the 2n (or fewer) min-terms of n
input variables. The name decoder is also used in conjunction with other code converters such
as BCD-to-seven-segment decoder.
Objectives
The objectives of this experiment:

1. To design a 2 × 4 decoder using basic gates

2. To understand the operation of 2 × 4 decoder.
Equipment Required
IC 74LS08 Cutter
IC 74LS32 Single Core Wire
IC 74LS04 Tweezers
Multi-meter Pair of Pliers

Diagram

4 Outputs
2 inputs 2  4 Decoder

Figure 1. The block diagram of 2  4 Decoder

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Faculty of computing, Riphah International University, I-14, Islamabad
Digital Logic Design Lab Fall 2022

Logical Diagram of 2 X 4 Decoder:

Function table
Complete the table given below carefully by using circuit developed by you.

So S1 Io I1 I2 I3 F
0 0 1 0 0 0
1 0 0 1 0 0
0 1 0 0 1 0
1 1 0 0 0 1

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Faculty of computing, Riphah International University, I-14, Islamabad
Digital Logic Design Lab Fall 2022

Procedure
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Write a Boolean function for output of 2 x 4 Decoder for Each Case

F(So, S1, Io,I1,I2,I3,I4)=
F1___________________________________________________
F2___________________________________________________
F3___________________________________________________
F4___________________________________________________

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Faculty of computing, Riphah International University, I-14, Islamabad
Digital Logic Design Lab Fall 2022

3 x 8 Line Decoder:

8 Outputs
3 inputs 3  8 Decoder

Develop: 3 – To- 8 Line Decoder (using Basic Gates)

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Faculty of computing, Riphah International University, I-14, Islamabad
Digital Logic Design Lab Fall 2022

Function table
Complete the table given below carefully by using circuit developed by you.

Enable Select lines Outputs Output

E S1 S1 S0 I0 I1 I2 I3 I4 I5 I6 I7 F
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

Write a Boolean function for output of 3x8 Line Decoder:

Teaching Fellow
Mr. Umar Sultan
Faculty of Computing,
Riphah International University
Sector I-14, Islamabad.
Email: umer.sultan@riphah.edu.pk

The End
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Faculty of computing, Riphah International University, I-14, Islamabad