Ex. No.

: 11 Design and simulate flip-flops & 4-bit synchronous counter

AIM:
To design and simulate flip-flops and a 4-bit synchronous counter.

SOFTWARE REQUIRED:
Cadence

PROGRAM:
SIMULATION:

SR Flip-Flop:

AREA and POWER REPORT:

D Flip-Flop:

AREA and POWER REPORT:

JK Flip-Flop:

AREA and POWER REPORT:

T Flip-Flop:

AREA and POWER REPORT:

Counter:

AREA and POWER REPORT:

RESULT:

Thus, a 4-bit synchronous counter using flip-flop was designed and simulated using cadence.