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  • Delay

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    kalyan settaluri
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    The clock period (Tclk) is calculated as the hold time + setup time + propagation delay, with the hold and setup time for the entire circuit calculated using the minimum and maximum delays from the Timing report. The propagation delay is calculated by adding the minimum delay of all inputs, as specified in the constraint file. The propagation delay, along with the setup and hold times from the Synthesis report, are used to calculate the clock period assuming the clock frequency is known.

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    The clock period (Tclk) is calculated as the hold time + setup time + propagation delay, with the hold and setup time for the entire circuit calculated using the minimum and maximum delays from the Timing report. The propagation delay is calculated by adding the minimum delay of all inputs, as specified in the constraint file. The propagation delay, along with the setup and hold times from the Synthesis report, are used to calculate the clock period assuming the clock frequency is known.

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    4 views1 page

    Delay

    Uploaded by

    kalyan settaluri
    The clock period (Tclk) is calculated as the hold time + setup time + propagation delay, with the hold and setup time for the entire circuit calculated using the minimum and maximum delays from the Timing report. The propagation delay is calculated by adding the minimum delay of all inputs, as specified in the constraint file. The propagation delay, along with the setup and hold times from the Synthesis report, are used to calculate the clock period assuming the clock frequency is known.

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    © All Rights Reserved
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    of 1

    T clk ( min )=t hold +t setup + t propdelay

    T hold ∧t setup for entire circuit is claculated using the minimum∧maximum delays¿ the Timing report
    T propdelay is calculated with all addition of minimum delay ∈all inputs . Which I have mentioned in the
    constraint file.

    Assume we know the frequency of the clock the propagation delay is calculated using above formulation with setup
    and hold time as mentioned in Synthesis report.

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