Digital Electronics

EENG 204: Lecture 4

LOGIC FAMILIES
Electrical and Electronic Department
Faculty of Engineering and the Built Environment

1 H.07.07.2022
M. Katongera Electrical and Electronic Department
OFFICE CD 37 mkatongera@eng.uz.ac.zw
Faculty of Engineering and the Built Environment

Eng H. Katongera |
Faculty of Engineering and the Built
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 OUTLINE

TTL characteristics
MOS and CMOS devices
Fan-in and fan-out
considerations
2 07.07.2022 ENG H. M. KATONGERA Electrical and Electronic Department
Faculty of Engineering and the Built Environment

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Environment 2
 TTL characteristics
LOGIC FAMILIES

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Faculty of Engineering and the Built Environment

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 TTL CHARACTERISTICS

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Faculty of Engineering and the Built Environment

• TTL caught on quickly, particularly in the “74xx” numbering system

originated by Texas Instruments
• TTL began the era of +5V logic
• Fan-outs of 10 where an output could drive 10 inputs
• TTL offered speeds of 25MHz
• In the high-speed arena, a souped-up TTL (74H series; “High-speed”
TTL) delivered roughly twice the speed, at twice the power
• For low power there was a souped-down TTL (74L series; “Low-
power” TTL) with 1/4 the speed at 1/10 the power of the corresponding
7400 “standard” TTL
• then the 74LS (“Low-power Schottky”), which made the “standard” 74-
series TTL obsolete by delivering slightly improved speed at 1/5 the
power
• 74LS and 74S was nice, but then Fairchild came up with 74F (F for
FAST: “Fairchild Advanced Schottky TTL”), which is up to 50% faster
than 74S at 1/3 the power; it also has other improved properties that
make it extremely nice to design with.
• Texas Instruments, the originators of many 74xx lines, came up with a
pair of advanced Schottky families, 74AS (“Advanced Schottky”) and
74ALS (“Advanced Low-power Schottky”); the former was intended to

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Environment 4
 replace 74S, and the latter was intended to replace 74LS

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Faculty of Engineering and the Build
Environment 4
 MOS and CMOS devices
LOGIC FAMILIES

5 07.07.2022 ENG H. M. KATONGERA Electrical and Electronic Department

Faculty of Engineering and the Built Environment

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Faculty of Engineering and the Build
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 MOS AND CMOS DEVICES

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• The first of the MOSFET logic families was developed, 4000-series

CMOS
• It had zero quiescent power consumption and a wide supply range
(+3V to +12V)
• The outputs swung rail-to-rail, and the inputs drew no current
• CMOS evolved into the improved 4000B series, with wider supply
range (3V to 18 V), better input protection, and higher speed (3.5MHz
at 5V)
• During the 1980s came the remarkable development of CMOS logic
with the speed and output drive of TTL:
• first 74HC (“High-speed CMOS”), with the same speed as
74LS, and, of course, zero quiescent current; then 74AC
(“Advanced CMOS”), with the same speed as 74F or 74AS.
This logic combined the best features of previous TTL and
CMOS, and it essentially replaced bipolar TTL. However two
technologies could not be used together.
• To address this problem, each CMOS family offered a variant
with the lower input threshold.

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 Fan-in and Fan-out
considerations
LOGIC FAMILIES

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Faculty of Engineering and the Built Environment

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 FAN-IN

TTL characteristics
MOS and CMOS devices
Fan-in and fan-out
considerations
8 07.07.2022 ENG H. M. KATONGERA Electrical and Electronic Department
Faculty of Engineering and the Built Environment

• For high- speed technologies, fan- in, the number of inputs to a gate,
is often restricted on gate primitives to no more than four or five
• This is primarily due to electronic considerations related to gate speed

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 FAN-OUT

TTL characteristics
MOS and CMOS devices
Fan-in and fan-out
considerations
9 07.07.2022 ENG H. M. KATONGERA Electrical and Electronic Department
Faculty of Engineering and the Built Environment

• Fan‐out specifies the number of standard loads that the output of a

typical gate can drive without impairing its normal operation
• A standard load is usually defined as the amount of current needed by
an input of another similar gate in the same family.
• The output of a gate has a maximum load that it can drive, called its
maximum fan- out
• For CMOS gates, the loading of a gate output by the integrated circuit
wiring and the inputs of other gates is modelled as a capacitance
hence loading happens on transitions

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 WHAT WE NOW KNOW!!

TTL characteristics
MOS and CMOS devices
Fan-in and fan-out
considerations
10 07.07.2022 ENG H. M. KATONGERA Electrical and Electronic Department
Faculty of Engineering and the Built Environment

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Environment 10