Wistron Corporation Wistron Corporation Wistron Corporation: Cover Page Cover Page Cover Page

5 4 3 2 1
Husk/Petra
UMA/Muxless Schematics Document
D
Ivy Bridge D
Intel PCH
C C
DY :None Installed ANNIE: ONLY FOR ANNIE solution.

PSL: KBC795 PSL circuit for 10mW solution installed.
DIS:DIS installed 10mW: External circuit for 10mW solution installed.
DIS_Muxless :BOTH DIS or Muxless installed 65W: for 65W adaptor installed.
DIS_PX:BOTH DIS or PX installed 90W: for 90W adaptor installed.
DIS_PX_Muxless:DIS or PX or Muxless installed.
Muxless: Muxless installed.(PX4.0)
PX:MUX installed.(PX3.0)
B PX_Muxless:BOTH PX or Muxless installed. B
UMA:UMA installed
UMA_Muxless:BOTH UMA or Muxless installed
UMA_PX_Muxless:UMA or PX or Muxless installed
<Core Design>
A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Cover Page
Size Document Number Rev
A3
Husk/Petra -1
Date: Monday, March 05, 2012 Sheet 1 of 103
5 4 3 2 1
5 4 3 2 1
CHARGER
Husk and Petra Block Diagram INPUTS
BQ24727
OUTPUTS
40
(Optimus/UMA/co-lay)
DCBATOUT BT+
VRAM
SYSTEM DC/DC
RT8223MGQW 41
2GB Project code : 91.4TU01.001 INPUTS OUTPUTS
88,89,90,91
D
PCB P/N : 5V_AUX_S5
3D3V_AUX_S5
D
DCBATOUT 5V_S5
DDR3 Revision : -1 3D3V_S5
900MHz Intel CPU

CPU DC/DC
17W/GT2 DDRIII 1333/1600 Channel A DDRIII Slot 0 ISL95836HRTZ 42~43
1600/1333 14 INPUTS OUTPUTS
PCIe x 8(Gen2_5Gb/s)
Ivy Bridge DCBATOUT VCC_CORE
Nvidia N13M-GS (Muxless)
Sandy Bridge
SYSTEM DC/DC
8 lane/64bit/29x29mm DDRIII 1333/1600 Channel A DDRIII Slot 1 ISL95836HRTZ 44
1600/1333 15 INPUTS OUTPUTS
DCBATOUT VCC_GFXCORE
83.84,85,86,87 4,5,6,7,8,9,10,11,12,13
SYSTEM DC/DC
TPS51218DSCR 45
FDIx4x2 PCIE x 1
INPUTS OUTPUTS
C
(UMA only) Mini-Card and BT DCBATOUT 1D05V_VTT C
DMIx4 USB x 1 802.11a/b/g 65
eDP SYSTEM DC/DC
LCD co-lay Feature Port RT8207LGQW 46
49
LVDS PCIE x 1 LAN (CRT+LAN) INPUTS OUTPUTS
Intel LAN 50 1D5V_S3
HDMI DCBATOUT 0D75V_S0
HDMI 51 PCH:HM70/77 RTL8411 DDR_VREF_S3
26
Panther Point SD/MMC LDO
31 RT9025-25ZSP 47
74
Feature Port(CRT+LAN)50 (RGB CRT) 4 USB 3.0 / 14 USB 2.0/1.1 ports INPUTS OUTPUTS
ETHERNET (10/100/1000Mb)
3D3V_S0 1D8V_S0
High Definition Audio
Left Side:
61
USB2.0 x 2
SATA ports (6) LDO
USB x 2 48
PCIE ports (8)
G978
Left Side:
62
(USB2.0 and USB3.0)co-lay x 1 INPUTS OUTPUTS
USB x 1 LPC I/F
1D05_VTT 0D85V_S0
B ACPI 1.1 B
VGA
USB2.0 x 1 ISL62882CHRTZ 92
INPUTS OUTPUTS
17,18,19,20,21,22,23,24,25,26 DCBATOUT VGA_CORE
CAMERA 49 93
Switches
INPUTS OUTPUTS
AZALIA 3D3V_S0 3D3V_VGA_S0
SPI
26
SATA HDD 56 (SATA3_6Gb/s)
LPC Bus
1D05V_VTT 1D05V_VGA_S0
1D5V_S3 1D5V_VGA_S0
Internal Analog MIC Azalia Flash ROM LPC debug port ODD 56
PCB LAYER
CODEC 8MB 60 71
COMBO L1:Top L4:Signal
ALC271X
KBC L2:VCC L5:GND
/ALC281 SMBus L3:Signal L6:Bottom
29
A
NPCE885 <Core Design> A
27
Wistron Corporation
SPEAKER Title
Touch Int. Thermal
Fan 28 Block Diagram
PAD 69 KB69 NCT 7718W
28 A3
25 Husk/Petra -1
5 4 3 2 1
A B C D E
PCH Strapping Huron River Schematic Checklist Rev.0_7 Processor Strapping Huron River Schematic Checklist Rev.0_7
Name Schematics Notes Pin Name Strap Description Configuration (Default value for each bit is Default
SPKR Reboot option at power-up 1 unless specified otherwise) Value
Default Mode: Internal weak Pull-down.
No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-kΩ CFG[2] PCI-Express Static 1: Normal Operation.
- 10-kΩ weak pull-up resistor. Lane Reversal Lane Numbers Reversed 15 -> 0, 14 -> 1, ... 1
0:
INIT3_3V# Weak internal pull-up. Leave as "No Connect".
Disabled - No Physical Display Port attached to
GNT3#/GPIO55 GNT[3:0]# functionality is not available on Mobile. CFG[4] 1: Embedded DisplayPort.
4 GNT2#/GPIO53 Mobile: Used as GPIO only
Enabled - An external Display Port device is
0 4
GNT1#/GPIO51 Pull-up resistors are not required on these signals. 0: connectd to the EMBEDDED display Port
If pull-ups are used, they should be tied to the Vcc3_3power rail.
CFG[6:5] PCI-Express 11 : x16 - Device 1 functions 1 and 2 disabled
Enable Danbury: Connect to Vcc3_3 with 8.2-k? weak pull-up resistor. Port Bifurcation 10 : x8, x8 - Device 1 function 1 enabled ;
SPI_MOSI function 2 disabled
Straps 11
Disable Danbury:Left floating, no pull-down required. 01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
Enable Danbury: Connect to +NVRAM_VCCQ with 8.2-kohm enabled
weak pull-up resistor [CRB has it pulled up
NV_ALE with 1-kohm no-stuff resistor] CFG[7] PEG DEFER TRAINING 1: PEG Train immediately following xxRESETB de assertion 1
0: PEG Wait for BIOS for training
Disable Danbury:Leave floating (internal pull-down)
NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features. Voltage Rails
HAD_DOCK_EN# High (1) - Security measure defined in the Flash Descriptor will be enabled. POWER PLANE VOLTAGE DESCRIPTION
Platform design should provide appropriate pull-up or pull-down depending on ACTIVE IN
/GPIO[33]
3 the desired settings. If a jumper option is used to tie this signal to GND as 5V_S0
3D3V_S0
5V
3.3V 3
required by the functional strap, the signal should be pulled low through a weak 1D8V_S0 1.8V
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. 1D5V_S0 1.5V
1D05V_VTT 1.05V
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal 0D85V_S0 0.95 - 0.85V
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for 0D75V_S0 0.75V
strapping functions. VCC_CORE 0.35V to 1.5V
VCC_GFXCORE 0.4 to 1.25V S0
1D8V_VGA_S0 1.8V
3D3V_VGA_S0 3.3V CPU Core Rail
HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. 1V_VGA_S0 1V Graphics Core Rail
HDA_SYNC Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no 5V_USBX_S3 5V
GPIO15 1D5V_S3 1.5V S3
confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher DDR_VREF_S3 0.75V
suite with confidentiality
Note : This is an un-muxed signal.
BT+ 6V-14.1V AC Brick Mode only
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low. DCBATOUT 6V-14.1V
Sampled at rising edge of RSMRST#. 5V_S5 5V All S states
CRB has a 1-kohm pull-up on this signal to +3.3VA rail. 5V_AUX_S5 5V
3D3V_S5 3.3V
3D3V_AUX_S5 3.3V
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
GPIO8 using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of 3D3V_LAN_S5 3.3V WOL_EN Legacy WOL
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.
2 Default = Do not connect (floating) 3D3V_AUX_KBC 3.3V DSW, Sx ON for supporting Deep Sleep states 2
High(1) = Enables the internal VccVRM to have a clean supply for
GPIO27 analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter Powered by Li Coin Cell in G3
circuits for analog rails. 3D3V_AUX_S5 3.3V G3, Sx and +V3ALW in Sx
USB Table
Pair Device
SMBus ADDRESSES
PCIE Routing 0 Touch Panel / 3G SIM
1 USB Ext. port 1 (HS) I 2 C / SMBus Addresses
HURON RIVER ORB
2 Fingerprint Device Ref Des Address Hex Bus
LANE1 Mini Card2(WWAN)
3 BLUETOOTH EC SMBus 1 BAT_SCL/BAT_SDA
LANE2 Mini Card1(WLAN) SATA Table 4 Mini Card2 (WWAN) Battery BAT_SCL/BAT_SDA
CHARGER BAT_SCL/BAT_SDA
LANE3 Card Reader 5 CARD READER

SATA EC SMBus 2
6 X SML1_CLK/SML1_DATA
PCH SML1_CLK/SML1_DATA
LANE4 Onboard LAN Pair Device eDP
7 X SML1_CLK/SML1_DATA
1 <Core Design>
1
0 HDD1 8 USB Ext. port 4 / E-SATA /USB CHARGER
LANE5 USB3.0
1 HDD2 9 USB Ext. port 2 PCH SMBus
PCH_SMBDATA/PCH_SMBCLK
Wistron Corporation
SO-DIMMA (SPD) 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
LANE6 Intel GBE LAN 2 N/A 10 EDP CAMERA SO-DIMMB (SPD) PCH_SMBDATA/PCH_SMBCLK Taipei Hsien 221, Taiwan, R.O.C.
Digital Pot PCH_SMBDATA/PCH_SMBCLK
G-Sensor PCH_SMBDATA/PCH_SMBCLK Title
LANE7 Dock 3 N/A 11 Mini Card1 (WLAN) MINI PCH_SMBDATA/PCH_SMBCLK
4 ODD 12 CAMERA PCH_SMBDATA/PCH_SMBCLK Table of Content
LANE8 New Card 5 ESATA 13 New Card A3
-1
Husk/Petra
Monday, March 05, 2012
Date: Sheet 3 of 103
5 4 3 2 1
SSID = CPU
1D05V_VTT_CPU
CPU1A 1 OF 9
G3 PEG_IRCOMP_R R401 1 2
PEG_ICOMPI 24D9R2F-L-GP
19 DMI_TXN[3:0] PEG_ICOMPO G1
DMI_TXN0 M2 G4
DMI_RX#0 PEG_RCOMPO
D DMI_TXN1
DMI_TXN2
P6
P1
DMI_RX#1 D
DMI_RX#2 PEG_RXN[0..15] 83
DMI_TXN3 P10 H22 PEG_RXN15
DMI_RX#3 PEG_RX#0 PEG_RXN14
19 DMI_TXP[3:0] PEG_RX#1 J21
DMI_TXP0 N3 B22 PEG_RXN13
DMI_TXP1 DMI_RX0 PEG_RX#2 PEG_RXN12
P7 DMI_RX1 PEG_RX#3 D21
DMI
DMI_TXP2 P3 A19 PEG_RXN11
DMI_TXP3 DMI_RX2 PEG_RX#4 PEG_RXN10
P11 DMI_RX3 PEG_RX#5 D17
B14 PEG_RXN9
19 DMI_RXN[3:0] DMI_RXN0 PEG_RX#6 PEG_RXN8
K1 DMI_TX#0 PEG_RX#7 D13
DMI_RXN1 M8 A11 PEG_RXN7
DMI_RXN2 DMI_TX#1 PEG_RX#8 PEG_RXN6
N4 DMI_TX#2 PEG_RX#9 B10
DMI_RXN3 R2 G8 PEG_RXN5
DMI_TX#3 PEG_RX#10 PEG_RXN4
19 DMI_RXP[3:0] PEG_RX#11 A8
DMI_RXP0 K3 B6 PEG_RXN3
DMI_RXP1 DMI_TX0 PEG_RX#12 PEG_RXN2
M7 DMI_TX1 PEG_RX#13 H8
DMI_RXP2 P4 E5 PEG_RXN1
DMI_RXP3 DMI_TX2 PEG_RX#14 PEG_RXN0
T3 DMI_TX3 PEG_RX#15 K7
PEG_RXP[0..15] 83
K22 PEG_RXP15
PEG_RX0 PEG_RXP14
PEG_RX1 K19
C21 PEG_RXP13
19 FDI_TXN[7:0] FDI_TXN0 PEG_RX2 PEG_RXP12
U7 FDI0_TX#0 PEG_RX3 D19
FDI_TXN1 W11 C19 PEG_RXP11
FDI_TXN2 FDI0_TX#1 PEG_RX4 PEG_RXP10
W1 FDI0_TX#2 PEG_RX5 D16
FDI_TXN3 AA6 C13 PEG_RXP9
W6 FDI1_TX#0 PEG_RX7 D12
FDI_TXN5 V4 C11 PEG_RXP7
PCI EXPRESS -- GRAPHICS

Y2 FDI1_TX#2 PEG_RX9 C9
C FDI_TXN7 AC9 FDI1_TX#3 PEG_RX10 F8 PEG_RXP5
C
Intel(R) FDI
C8 PEG_RXP4
PEG_RX11 PEG_RXP3
19 FDI_TXP[7:0] PEG_RX12 C5
FDI_TXP0 U6 H6 PEG_RXP2
FDI_TXP1 FDI0_TX0 PEG_RX13 PEG_RXP1
W10 FDI0_TX1 PEG_RX14 F6
FDI_TXP2 W3 K6 PEG_RXP0
FDI_TXP3 FDI0_TX2 PEG_RX15 PEG_TXN[0..15] 83
AA7 FDI0_TX3
FDI_TXP4 W7 G22 PEG_C_TXN15 C401 1 2 DY Do Not Stuff PEG_TXN15
FDI_TXP5 FDI1_TX0 PEG_TX#0 PEG_C_TXN14 C402 Do Not Stuff PEG_TXN14
T4 FDI1_TX1 PEG_TX#1 C23 1 2 DY
FDI_TXP6 AA3 D23 PEG_C_TXN13 C403 1 2 DY Do Not Stuff PEG_TXN13
FDI_TXP7 FDI1_TX2 PEG_TX#2 PEG_C_TXN12 C404 Do Not Stuff PEG_TXN12
AC8 FDI1_TX3 PEG_TX#3 F21 1 2 DY
H19 PEG_C_TXN11 C405 1 2 DY Do Not Stuff PEG_TXN11
PEG_TX#4 PEG_C_TXN10 C406 Do Not Stuff PEG_TXN10
19 FDI_FSYNC0 AA11 FDI0_FSYNC PEG_TX#5 C17 1 2 DY
AC12 K15 PEG_C_TXN9 C407 1 2 DY Do Not Stuff PEG_TXN9
19 FDI_FSYNC1 FDI1_FSYNC PEG_TX#6
F17 PEG_C_TXN8 C408 1 2 DY Do Not Stuff PEG_TXN8
PEG_TX#7 PEG_C_TXN7 C409 SCD22U10V2KX-1GP PEG_TXN7
19 FDI_INT U11 FDI_INT PEG_TX#8 F14 1 2 Muxless
A15 PEG_C_TXN6 C410 1 2 Muxless SCD22U10V2KX-1GP PEG_TXN6
19 FDI_LSYNC0 AA10 FDI0_LSYNC PEG_TX#10 J14 1 2 Muxless
AG8 H13 PEG_C_TXN4 C412 1 2 Muxless SCD22U10V2KX-1GP PEG_TXN4
19 FDI_LSYNC1 FDI1_LSYNC PEG_TX#11
M10 PEG_C_TXN3 C413 1 2 Muxless SCD22U10V2KX-1GP PEG_TXN3
PEG_TX#13 F10 1 2 Muxless
D9 PEG_C_TXN1 C415 1 2 Muxless SCD22U10V2KX-1GP PEG_TXN1
PEG_TX#15 J4 1 2 Muxless
DP_HPD# 1D05V_VTT_CPU 1 R402 2 24D9R2F-L-GP DP_COMP AF3 EDP_COMPIO PEG_C_TXP15 C417 Do Not Stuff PEG_TXP15 PEG_TXP[0..15] 83
AD2 EDP_ICOMPO PEG_TX0 F22 1 2 DY
AG11 A23 PEG_C_TXP14 C418 1 2 DY Do Not Stuff PEG_TXP14
49 DP_HPD# EDP_HPD# PEG_TX1
D24 PEG_C_TXP13 C419 1 2 DY Do Not Stuff PEG_TXP13
PEG_TX2
1
E21 PEG_C_TXP12 C420 1 2 DY Do Not Stuff PEG_TXP12

R403 PEG_TX3 PEG_C_TXP11 C421 Do Not Stuff PEG_TXP11
49 DP_AUXN_CPU AG4 EDP_AUX# PEG_TX4 G19 1 2 DY
Do Not Stuff AF4 B18 PEG_C_TXP10 C422 1 2 DY Do Not Stuff PEG_TXP10
B DY
49 DP_AUXP_CPU EDP_AUX
eDP
PEG_TX5
PEG_TX6 K17 PEG_C_TXP9 C423 1 2 DY Do Not Stuff PEG_TXP9 B
G17 PEG_C_TXP8 C424 1 2 DY Do Not Stuff PEG_TXP8
2
PEG_TX7 PEG_C_TXP7 C425 SCD22U10V2KX-1GP PEG_TXP7

49 DP_TXN0_CPU AC3 EDP_TX#0 PEG_TX8 E14 1 2 Muxless
AC4 C15 PEG_C_TXP6 C426 1 2 Muxless SCD22U10V2KX-1GP PEG_TXP6
49 DP_TXN1_CPU EDP_TX#1 PEG_TX9
AE11 K13 PEG_C_TXP5 C427 1 2 Muxless SCD22U10V2KX-1GP PEG_TXP5
EDP_TX#2 PEG_TX10 PEG_C_TXP4 C428 SCD22U10V2KX-1GP PEG_TXP4
AE7 EDP_TX#3 PEG_TX11 G13 1 2 Muxless
K10 PEG_C_TXP3 C429 1 2 Muxless SCD22U10V2KX-1GP PEG_TXP3
PEG_TX12 PEG_C_TXP2 C430 SCD22U10V2KX-1GP PEG_TXP2
49 DP_TXP0_CPU AC1 EDP_TX0 PEG_TX13 G10 1 2 Muxless
AA4 D8 PEG_C_TXP1 C431 1 2 Muxless SCD22U10V2KX-1GP PEG_TXP1
49 DP_TXP1_CPU EDP_TX1 PEG_TX14
AE10 K4 PEG_C_TXP0 C432 1 2 Muxless SCD22U10V2KX-1GP PEG_TXP0
EDP_TX2 PEG_TX15
AE6 EDP_TX3
IVY-BRIDGE-GP-NF
71.00IVY.A0U
<Core Design>
A A
Wistron Corporation
Title
CPU (PCIE/DMI/FDI)
A3
Husk/Petra -1
5 4 3 2 1
SSID = CPU CPU1B 2 OF 9
BCLK J3 CLK_EXP_P 20
BCLK# H2 CLK_EXP_N 20
MISC
CLOCKS
22 H_SNB_IVB# F49 PROC_SELECT#
DPLL_REF_CLK AG3 CLK_DP_P 20
D C57
DPLL_REF_CLK# AG1 CLK_DP_N 20 D
1D05V_VTT_CPU PROC_DETECT#
1 2 H_PROCHOT#
1
R501 C502 C49

62R2J-GP SC47P50V2JN-3GP CATERR#
THERMAL
2
1 R502 2
A48 AT30 4K99R2F-L-GP
22,27 H_PECI PECI SM_DRAMRST# SM_DRAMRST# 37
BF44 SM_RCOMP_0 R506 1 2 140R2F-GP

SM_RCOMP0
DDR3
MISC
27,42 H_PROCHOT# 1 R513 2 H_PROCHOT#_R C45 PROCHOT# SM_RCOMP1 BE43 SM_RCOMP_1 R507 1 2 25D5R2F-GP
56R2J-L1-GP BG43 SM_RCOMP_2 R508 1 2 200R2F-L-GP
SM_RCOMP2
Signal Routing Guideline:
22,36 H_THERMTRIP# D45 THERMTRIP# SM_RCOMP keep routing length less than 500 mils.
C C
PRDY# N53
PREQ# N55
TCK L56
TMS L55
PWR MANAGEMENT
J58 XDP_TRST# 1D05V_VTT_CPU
TRST#
JTAG & BPM

C48 M60 RN501
19 H_PM_SYNC PM_SYNC TDI
L59 XDP_TDO SRN51J-GP
R503 2 TDO XDP_TDO
1 2 3
10KR2J-L-GP XDP_TRST# 1 4
22,36,97 H_CPUPW RGD B46 UNCOREPWRGOOD
K58 XDP_DBRESET#
DBR#
37 VDDPW RGOOD BE45 SM_DRAMPWROK BPM#0 G58

BPM#1 E55
BPM#2 E59
G55
B BPM#3
BPM#4 G59 B
BUF_CPU_RST# D44 H60
RESET# BPM#5
BPM#6 J59
BPM#7 J61
3D3V_S0
RN503
SRN1K5J-1-GP IVY-BRIDGE-GP-NF
XDP_DBRESET# 1 8
2 7
3 6 71.00IVY.A0U
<Core Design>
18,27,31,36,65,71,83,97 PLT_RST# 4 5 BUF_CPU_RST#
Wistron Corporation
A Taipei Hsien 221, Taiwan, R.O.C.
A
Title
CPU (THERMAL/CLOCK/PM )
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1C 3 OF 9
CPU1D 4 OF 9
14 M_A_DQ[63:0]
M_A_DQ0 AG6 SA_DQ0 15 M_B_DQ[63:0]
D M_A_DQ1 AJ6 AU36 M_B_DQ0 AL4 D
M_A_DQ2 SA_DQ1 SA_CK0 M_A_DIM0_CLK_DDR0 14 M_B_DQ1 SB_DQ0
AP11 SA_DQ2 SA_CK#0 AV36 M_A_DIM0_CLK_DDR#0 14 AL1 SB_DQ1 SB_CK0 BA34 M_B_DIM0_CLK_DDR0 15
M_A_DQ3 AL6 AY26 M_B_DQ2 AN3 AY34
M_A_DQ4 SA_DQ3 SA_CKE0 M_A_DIM0_CKE0 14 M_B_DQ3 SB_DQ2 SB_CK#0 M_B_DIM0_CLK_DDR#0 15
AJ10 SA_DQ4 AR4 SB_DQ3 SB_CKE0 AR22 M_B_DIM0_CKE0 15
M_A_DQ5 AJ8 M_B_DQ4 AK4
M_A_DQ6 SA_DQ5 M_B_DQ5 SB_DQ4
AL8 SA_DQ6 AK3 SB_DQ5
M_A_DQ7 AL7 M_B_DQ6 AN4
AR11 SA_DQ8 AR1 SB_DQ7
M_A_DQ9 AP6 AT40 M_B_DQ8 AU4
M_A_DQ10 SA_DQ9 SA_CK1 M_A_DIM0_CLK_DDR1 14 M_B_DQ9 SB_DQ8
AU6 SA_DQ10 SA_CK#1 AU40 M_A_DIM0_CLK_DDR#1 14 AT2 SB_DQ9 SB_CK1 BA36 M_B_DIM0_CLK_DDR1 15
M_A_DQ11 AV9 BB26 M_B_DQ10 AV4 BB36
M_A_DQ12 SA_DQ11 SA_CKE1 M_A_DIM0_CKE1 14 M_B_DQ11 SB_DQ10 SB_CK#1 M_B_DIM0_CLK_DDR#1 15
AR6 SA_DQ12 BA4 SB_DQ11 SB_CKE1 BF27 M_B_DIM0_CKE1 15
M_A_DQ13 AP8 M_B_DQ12 AU3
AT13 SA_DQ14 AR3 SB_DQ13
M_A_DQ15 AU13 M_B_DQ14 AY2
BC7 SA_DQ16 BA3 SB_DQ15
M_A_DQ17 BB7 BB40 M_B_DQ16 BE9
M_A_DQ18 SA_DQ17 SA_CS#0 M_A_DIM0_CS#0 14 M_B_DQ17 SB_DQ16
BA13 SA_DQ18 SA_CS#1 BC41 M_A_DIM0_CS#1 14 BD9 SB_DQ17 SB_CS#0 BE41 M_B_DIM0_CS#0 15
M_A_DQ19 BB11 M_B_DQ18 BD13 BE47
M_A_DQ20 SA_DQ19 M_B_DQ19 SB_DQ18 SB_CS#1 M_B_DIM0_CS#1 15
BA7 SA_DQ20 BF12 SB_DQ19
M_A_DQ21 BA9 M_B_DQ20 BF8
BB9 SA_DQ22 BD10 SB_DQ21
M_A_DQ23 AY13 M_B_DQ22 BD14
AV14 SA_DQ24 SA_ODT0 AY40 M_A_DIM0_ODT0 14 BE13 SB_DQ23
M_A_DQ25 AR14 BA41 M_B_DQ24 BF16 AT43
M_A_DQ26 SA_DQ25 SA_ODT1 M_A_DIM0_ODT1 14 M_B_DQ25 SB_DQ24 SB_ODT0 M_B_DIM0_ODT0 15
AY17 SA_DQ26 BE17 SB_DQ25 SB_ODT1 BG47 M_B_DIM0_ODT1 15
M_A_DQ27 AR19 M_B_DQ26 BE18
BA14 SA_DQ28 BE21 SB_DQ27
M_A_DQ29 AU14 M_B_DQ28 BE14
C M_A_DQ30 SA_DQ29 M_B_DQ29 SB_DQ28 C
BB14 SA_DQ30 M_A_DQS#[7:0] 14 BG14 SB_DQ29
M_A_DQ31 BB17 AL11 M_A_DQS#0 M_B_DQ30 BG18 M_B_DQS#[7:0] 15
M_A_DQ32 SA_DQ31 SA_DQS#0 M_A_DQS#1 M_B_DQ31 SB_DQ30 M_B_DQS#0
BA45 SA_DQ32 SA_DQS#1 AR8 BF19 SB_DQ31 SB_DQS#0 AL3
M_A_DQ33 AR43 AV11 M_A_DQS#2 M_B_DQ32 BD50 AV3 M_B_DQS#1
M_A_DQ34 SA_DQ33 SA_DQS#2 M_A_DQS#3 M_B_DQ33 SB_DQ32 SB_DQS#1 M_B_DQS#2
AW48 SA_DQ34 SA_DQS#3 AT17 BF48 SB_DQ33 SB_DQS#2 BG11
M_A_DQ35 BC48 AV45 M_A_DQS#4 M_B_DQ34 BD53 BD17 M_B_DQS#3
M_A_DQ36 SA_DQ35 SA_DQS#4 M_A_DQS#5 M_B_DQ35 SB_DQ34 SB_DQS#3 M_B_DQS#4
BC45 SA_DQ36 SA_DQS#5 AY51 BF52 SB_DQ35 SB_DQS#4 BG51
M_A_DQ37 AR45 AT55 M_A_DQS#6 M_B_DQ36 BD49 BA59 M_B_DQS#5
SA_DQ37 SA_DQS#6 SB_DQ36 SB_DQS#5
DDR SYSTEM MEMORY A
M_A_DQ38 AT48 AK55 M_A_DQS#7 M_B_DQ37 BE49 AT60 M_B_DQS#6

SA_DQ38 SA_DQS#7 SB_DQ37 SB_DQS#6
DDR SYSTEM MEMORY B

M_A_DQ39 AY48 M_B_DQ38 BD54 AK59 M_B_DQS#7
M_A_DQ40 SA_DQ39 M_B_DQ39 SB_DQ38 SB_DQS#7
BA49 SA_DQ40 BE53 SB_DQ39
M_A_DQ41 AV49 M_B_DQ40 BF56
BB51 SA_DQ42 BE57 SB_DQ41
M_A_DQ43 AY53 M_B_DQ42 BC59
BB49 SA_DQ44 M_A_DQS[7:0] 14 AY60 SB_DQ43
M_A_DQ45 AU49 AJ11 M_A_DQS0 M_B_DQ44 BE54
M_A_DQ46 SA_DQ45 SA_DQS0 M_A_DQS1 M_B_DQ45 SB_DQ44
BA53 SA_DQ46 SA_DQS1 AR10 BG54 SB_DQ45 M_B_DQS[7:0] 15
M_A_DQ47 BB55 AY11 M_A_DQS2 M_B_DQ46 BA58 AM2 M_B_DQS0
M_A_DQ48 SA_DQ47 SA_DQS2 M_A_DQS3 M_B_DQ47 SB_DQ46 SB_DQS0 M_B_DQS1
BA55 SA_DQ48 SA_DQS3 AU17 AW59 SB_DQ47 SB_DQS1 AV1
M_A_DQ49 AV56 AW45 M_A_DQS4 M_B_DQ48 AW58 BE11 M_B_DQS2
AP50 SA_DQ50 SA_DQS5 AV51 AU58 SB_DQ49 SB_DQS3 BD18
M_A_DQ51 AP53 AT56 M_A_DQS6 M_B_DQ50 AN61 BE51 M_B_DQS4
AV54 SA_DQ52 SA_DQS7 AK54 AN59 SB_DQ51 SB_DQS5 BA61
M_A_DQ53 AT54 M_B_DQ52 AU59 AR59 M_B_DQS6
M_A_DQ54 SA_DQ53 M_B_DQ53 SB_DQ52 SB_DQS6 M_B_DQS7
AP56 SA_DQ54 AU61 SB_DQ53 SB_DQS7 AK61
M_A_DQ55 AP52 M_B_DQ54 AN58
AN57 SA_DQ56 AR58 SB_DQ55
M_A_DQ57 AN53 M_B_DQ56 AK58
AG56 SA_DQ58 AL58 SB_DQ57
B M_A_DQ59 M_B_DQ58 B
AG53 SA_DQ59 AG58 SB_DQ58
M_A_DQ60 AN55 M_B_DQ59 AG59
M_A_DQ61 SA_DQ60 M_A_A0 M_A_A[15:0] 14 M_B_DQ60 SB_DQ59
AN52 SA_DQ61 SA_MA0 BG35 AM60 SB_DQ60 M_B_A[15:0] 15
M_A_DQ62 AG55 BB34 M_A_A1 M_B_DQ61 AL59 BF32 M_B_A0
M_A_DQ63 SA_DQ62 SA_MA1 M_A_A2 M_B_DQ62 SB_DQ61 SB_MA0 M_B_A1
AK56 SA_DQ63 SA_MA2 BE35 AF61 SB_DQ62 SB_MA1 BE33
BD35 M_A_A3 M_B_DQ63 AH60 BD33 M_B_A2
SA_MA3 M_A_A4 SB_DQ63 SB_MA2 M_B_A3
SA_MA4 AT34 SB_MA3 AU30
AU34 M_A_A5 BD30 M_B_A4
SA_MA5 M_A_A6 SB_MA4 M_B_A5
SA_MA6 BB32 SB_MA5 AV30
BD37 AT32 M_A_A7 BG30 M_B_A6
14 M_A_BS0 SA_BS0 SA_MA7 M_A_A8 SB_MA6 M_B_A7
14 M_A_BS1 BF36 SA_BS1 SA_MA8 AY32 15 M_B_BS0 BG39 SB_BS0 SB_MA7 BD29
BA28 AV32 M_A_A9 BD42 BE30 M_B_A8
14 M_A_BS2 SA_BS2 SA_MA9 M_A_A10 15 M_B_BS1 SB_BS1 SB_MA8 M_B_A9
SA_MA10 BE37 15 M_B_BS2 AT22 SB_BS2 SB_MA9 BE28
BA30 M_A_A11 BD43 M_B_A10
SA_MA11 M_A_A12 SB_MA10 M_B_A11
SA_MA12 BC30 SB_MA11 AT28
BE39 AW41 M_A_A13 AV28 M_B_A12
14 M_A_CAS# SA_CAS# SA_MA13 M_A_A14 SB_MA12 M_B_A13
14 M_A_RAS# BD39 SA_RAS# SA_MA14 AY28 15 M_B_CAS# AV43 SB_CAS# SB_MA13 BD46
AT41 AU26 M_A_A15 BF40 AT26 M_B_A14
14 M_A_W E# SA_WE# SA_MA15 15 M_B_RAS# SB_RAS# SB_MA14 M_B_A15
15 M_B_W E# BD45 SB_WE# SB_MA15 AU22
IVY-BRIDGE-GP-NF
IVY-BRIDGE-GP-NF
71.00IVY.A0U
71.00IVY.A0U
A <Core Design> A
Wistron Corporation
Title
CPU (DDR)
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU CPU1E 5 OF 9
PEG Static Lane Reversal Do Not Stuff TP701 1 CFG0_TP B50 CFG0 BCLK_ITP N59
Do Not Stuff TP702 1 CFG1_TP C51 N58
CFG1 BCLK_ITP#
1: Normal Operation; Lane # CFG2 B54 CFG2
CFG2 definition matches socket pin map definition Do Not Stuff TP703 1 CFG3_TP D53 CFG3
CFG4 A51 N42
0:Lane Reversed CFG5 CFG4 RSVD30
C53 CFG5 RSVD31 L42
CFG6 C55 L45
CFG7 CFG6 RSVD32
D H49 CFG7 RSVD33 L47 D
A55 CFG8
CFG2 H51 CFG9
K49 CFG10 RSVD34 M13
1 K53 CFG11 RSVD35 M14
R702 F53 U14
1KR2J-L2-GP CFG12 RSVD36
G53 CFG13 RSVD37 W14
Muxless L51 CFG14 RSVD38 P13
F51
2
CFG15
D52 CFG16
L53 CFG17 RSVD39 AT49
RSVD40 K24
H43
RESERVED
VCC_VAL_SENSE
K43 VSS_VAL_SENSE RSVD41 AH2
RSVD42 AG13
Enabl EDP function RSVD43 AM14
H45 VAXG_VAL_SENSE RSVD44 AM15
1:Disable K45 VSSAXG_VAL_SENSE
CFG4
0:Enable N50
RSVD45
F48 VCC_DIE_SENSE
G48 RSVD47
H48 RSVD6
K48 RSVD7
DC_TEST_A4 A4
DC_TEST_C4 C4
CFG4 BA19 D3
C RSVD8 DC_TEST_D3 C
AV19 RSVD9 DC_TEST_D1 D1
1
AT21 RSVD10 DC_TEST_A58 A58

BB21 RSVD11 DC_TEST_A59 A59
R703 BB19 C59
1KR2J-L2-GP RSVD12 DC_TEST_C59
AY21 RSVD13 DC_TEST_A61 A61
EDP BA22 C61
2
RSVD14 DC_TEST_C61
AY22 RSVD15 DC_TEST_D61 D61
AU19 RSVD16 DC_TEST_BD61 BD61
AU21 RSVD17 DC_TEST_BE61 BE61
BD21 RSVD18 DC_TEST_BE59 BE59
BD22 RSVD19 DC_TEST_BG61 BG61
BG22 RSVD22 DC_TEST_BG4 BG4
BE22 RSVD23 DC_TEST_BG3 BG3
PCIE Port Bifurcation Straps BG26 RSVD24 DC_TEST_BE3 BE3
BE26 RSVD25 DC_TEST_BG1 BG1
BF23 RSVD26 DC_TEST_BE1 BE1
CFG[6:5] 11: x16 - Device 1 functions 1 and 2 disabled BE24 RSVD27 DC_TEST_BD1 BD1
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled

01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
IVY-BRIDGE-GP-NF
71.00IVY.A0U
B CFG5 CFG6 B
1
R704 R705
Do Not Stuff Do Not Stuff
DY DY
2
PEG DEFER TRAINING
1: PEG Train immediately following xxRESETB de assertion

CFG7
0: PEG Wait for BIOS for training
CFG7
1
R706
Do Not Stuff
A DY <Core Design> A
2
Wistron Corporation
Title
CPU (RESERVED)
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU
CPU1F POWER 6 OF 9
Iccmax:8.5A
ICC_TDC:8.5A 1D05V_VTT_CPU
ULV:17W
VCC_CORE AF46
VCC_CORE Iccmax:33A VCCIO1
VCCIO3 AG48
C805
Do Not Stuff
C810
SC10U6D3V5KX-1GP
C838
Do Not Stuff
C839
Do Not Stuff
C840
SC10U6D3V5KX-1GP
C829
Do Not Stuff
C830
SC10U6D3V5KX-1GP
C843
SC10U6D3V5KX-1GP
C844
Do Not Stuff
C845
SC10U6D3V5KX-1GP
AG50
ICC_TDC:25A VCCIO4
1
D D
A26 VCC1 VCCIO5 AG51
A29 VCC2 VCCIO6 AJ17
A31 AJ21
2
VCC3 VCCIO7
A34 VCC4 VCCIO8 AJ25 DY DY DY DY DY
C801
SC2D2U6D3V2KX-GP
C802
SC2D2U6D3V2KX-GP
C803
Do Not Stuff
C804
SC2D2U6D3V2KX-GP
C808
SC2D2U6D3V2KX-GP
C811
SC2D2U6D3V2KX-GP
1
1
A39 VCC7 VCCIO11 AK50
A42 AK51
2
2
VCC8 VCCIO12
DY C26 VCC9 VCCIO13 AL14
C27 VCC10 VCCIO14 AL15
D27 VCC16 VCCIO20 AL48
D32 VCC17 VCCIO21 AM16
C815
SC2D2U6D3V2KX-GP
C816
SC2D2U6D3V2KX-GP
C817
Do Not Stuff
C818
Do Not Stuff
C819
Do Not Stuff
C820
Do Not Stuff
D39 AM43
PEG IO AND DDR IO

VCC20 VCCIO24
1
1
D42 AM47 1D05V_VTT 1D05V_VTT_CPU
VCC21 VCCIO25
E26 VCC22 VCCIO26 AN20
E28 AN42 PG801
2
2 VCC23 VCCIO27
DY DY DY DY E32 VCC24 VCCIO28 AN45 1 2
E34 VCC25 VCCIO29 AN48
E37 Do Not Stuff
VCC26
E38 PG802
VCC27
CORE SUPPLY
F25 VCC28 1 2
F26 VCC29
F28 Do Not Stuff
VCC30 1D05V_VTT_CPU
F32 PG803
VCC31
F34 VCC32 1 2
F37 VCC33 VCCIO30 AA14
F38 AA15 Do Not Stuff
C VCC34 VCCIO31 C
C825
SC10U6D3V5KX-1GP
C826
SC10U6D3V5KX-1GP
C827
Do Not Stuff
C828
SC10U6D3V5KX-1GP
C831
SC10U6D3V5KX-1GP
F42 AB17 PG804

VCC35 VCCIO32
1
1
C806
SC1U6D3V2KX-L-1-GP
C807
SC1U6D3V2KX-L-1-GP
C809
SC1U6D3V2KX-L-1-GP
C812
SC1U6D3V2KX-L-1-GP
C813
SC1U6D3V2KX-L-1-GP
C814
SC1U6D3V2KX-L-1-GP
C821
Do Not Stuff
C822
Do Not Stuff
C823
SC1U6D3V2KX-L-1-GP
C824
SC1U6D3V2KX-L-1-GP
G42 VCC36 VCCIO33 AB20 1 2
H25 VCC37 VCCIO34 AC13
H26 AD16 Do Not Stuff
2
2
VCC38 VCCIO35
DY H28 VCC39 VCCIO36 AD18 DY DY PG805
H29 VCC40 VCCIO37 AD21 1 2
H32 VCC41 VCCIO38 AE14
H34 AE15 Do Not Stuff
VCC42 VCCIO39
H35 AF16 PG806
VCC43 VCCIO40
H37 VCC44 VCCIO41 AF18 1 2
H38 VCC45 VCCIO42 AF20
H40 AG15 Do Not Stuff
VCC46 VCCIO43
J25 VCC47 VCCIO44 AG16
C835
Do Not Stuff
C832
SC10U6D3V5KX-1GP
C833
SC10U6D3V5KX-1GP
C834
SC10U6D3V5KX-1GP
C836
SC10U6D3V5KX-1GP

1
J32 VCC51 VCCIO48 AJ14

J34 VCC52 VCCIO49 AJ15
J35
2
VCC53
DY J37 VCC54
J38 VCC55
J40 VCC56
J42 3D3V_S5
VCC57
K26 VCC58 VCCIO50 W16
K27 VCC59 VCCIO51 W17
1
K29 VCC60
K32 VCC61
K34 R810
VCC62 100KR2J-4-GP
K35 VCC63
K37
2
VCC64
K39 VCC66
K42 BC22 H_VCCP_SEL_L
VCC67 VCCIO_SEL
L25 VCC68
B
L28 VCC69 B
L33 VCC70
L36 VCC71
L40 1D05V_VTT_CPU
VCC72
N26 VCC73 +V1.05S_VCCPQE 1 R808 1D05V_VTT_CPU 1D05V_VTT_CPU
QUIET
N30 RAILS AM25 2
VCC74 VCCPQE1 Do Not Stuff
N34 VCC75 VCCPQE2 AN22
1
N38 C853
VCC76 SC1U6D3V2KX-L-1-GP
1
2
R804 R805
130R2F-1-GP 75R3J-L-GP
R803
2
A44 H_CPU_SVIDALRT# 1 43R2J-GP2
VIDALERT# VR_SVID_ALERT# 42
B43 H_CPU_SVIDCLK
VIDSCLK H_CPU_SVIDCLK 42 Place near processor
SVID
C44 H_CPU_SVIDDAT
VIDSOUT H_CPU_SVIDDAT 42
VCC_CORE
1
R801
100R2F-L1-GP-U
2
F43
SENSE LINES
VCC_SENSE VCCSENSE 42
VSS_SENSE G43 Place near processor
VSSSENSE 42
1
1 R806 2 1D05V_VTT_CPU
Do Not Stuff R802
DY 100R2F-L1-GP-U
VCCIO_SENSE AN16
VCCIO_SENSE 45
AN17
2
VSS_SENSE_VCCIO VSSIO_SENSE 45
A A
2
<Core Design>
R807
Do Not Stuff
IVY-BRIDGE-GP-NF
DY Wistron Corporation
1
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

71.00IVY.A0U Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (VCC_CORE)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU
Routing Guideline:
VCC_GFXCORE Iccmax:18A(GT1)
CPU1G POWER 7 OF 9
Power from DDR_VREF_S3 and +V_SM_VREF_CNT
should have 10 mils trace width.
ICC_TDC:12A(GT1)
SM_VREF AY43 +V_SM_VREF_CNT 37
AA46
VREF
VAXG1
AB47 VAXG2
AB50 BE7 M_VREF_DQ_DIMM0_C M_VREF_DQ_DIMM0_C 37
VAXG3 SA_DIMM_VREFDQ
C902
SC10U6D3V5KX-1GP
C903
SC10U6D3V5KX-1GP
C904
Do Not Stuff
C905
SC10U6D3V5KX-1GP
C908
SC10U6D3V5KX-1GP
C919
SC10U6D3V5KX-1GP
C920
SC10U6D3V5KX-1GP
C921
Do Not Stuff
M_VREF_DQ_DIMM1_C
1 AB51 VAXG4 SB_DIMM_VREFDQ BG7 M_VREF_DQ_DIMM1_C 37 BE7 and BG7 is NC ball in HR
1
D AB52 VAXG5 D
3
4
AB53 VAXG6
AB55
2
2
VAXG7 RN902
DY DY AB56 VAXG8
AB58 Do Not Stuff
VAXG9
AB59 VAXG10 DY
AC61
2
1
VAXG11
AD47 VAXG12
AD48 VAXG13
AD50 VAXG14
AD51 AJ28 1D5V_S0
VAXG15 VDDQ1 Iccmax:5A
- 1.5V RAILS
AD52 VAXG16 VDDQ2 AJ33
1
1
C907
SC1U6D3V2KX-L-1-GP
C909
SC1U6D3V2KX-L-1-GP
C914
SC1U6D3V2KX-L-1-GP
C916
SC1U6D3V2KX-L-1-GP
C910
SC10U6D3V5KX-1GP
C911
SC10U6D3V5KX-1GP
C912
Do Not Stuff
C913
SC10U6D3V5KX-1GP
C924
Do Not Stuff
C925
SC1U6D3V2KX-L-1-GP
C918
SC1U6D3V2KX-L-1-GP
C917
SC1U6D3V2KX-L-1-GP
C926
Do Not Stuff
AD56 VAXG19 VDDQ5 AL30
1
AD58 VAXG20 VDDQ6 AL34
AD59 AL38
2
VAXG21 VDDQ7
AE46 AL42
2
VAXG22 VDDQ8
N45 VAXG23 VDDQ9 AM33 DY DY DY
P47 VAXG24 VDDQ10 AM36
P48 VAXG25 VDDQ11 AM40
P50 VAXG26 VDDQ12 AN30
P53 AR26
DDR3
VAXG29 VDDQ15
P55 AR28
GRAPHICS
VAXG30 VDDQ16
P56 VAXG31 VDDQ17 AR30
P61 VAXG32 VDDQ18 AR32
T48 VAXG33 VDDQ19 AR34
T61 VAXG36 VDDQ22 AV41
U46 VAXG37 VDDQ23 AW26
V47 VAXG38 VDDQ24 BA40
V48 VAXG39 VDDQ25 BB28
C V50 VAXG40 VDDQ26 BG33 C
V51 VAXG41
V52 VAXG42
V53 VAXG43
V55 VAXG44
V56 VAXG45
V58 VAXG46
V59 VAXG47
W50 VAXG48
W51 VAXG49
W52 VAXG50
W53 VAXG51
W55 VAXG52
VCC_GFXCORE W56 VAXG53
W61 VAXG54 PROCESSOR DDR 1.5V QUIET RAIL (BGA only)
Y48 VAXG55
Y61 VAXG56 +V1.5S_VCCD_Q should be short to +V1.5S_VCCDDQ on board
1
R906
100R2F-L1-GP-U
R906,R907 close to CPU 1D5V_S0
2
QUIET RAILS
VCC_AXG_SENSE AM28 +1.5S_VCCD_Q 1 R909 2
SENSE
LINES
VSS_AXG_SENSE VCCDQ1 Do Not Stuff
42 VCC_AXG_SENSE F45 VAXG_SENSE VCCDQ2 AN26
42 VSS_AXG_SENSE G45 VSSAXG_SENSE
1
1 2
R907
100R2F-L1-GP-U C923
1D8V_S0 SC1U6D3V2KX-L-1-GP
ICC_MAX:1.2A
1.8V RAIL
2
BB3 VCCPLL1
BC1 VCCPLL2
BC4 VCCPLL3
1
C922
B SC1U10V2KX-1GP B
0D85V_S0
2
VDDQ_SENSE BC43 TP_VDDQ_SENSE 1 TP901 Do Not Stuff

VSS_SENSE_VDDQ BA43 TP_VDDQ_VSS 1 TP902 Do Not Stuff
SENSE LINES
1
L17 VCCSA1
L21 R902
0D85V_S0 VCCSA2
N16 VCCSA3 100R2F-L1-GP-U
N20 R902 need be close to pin U10.
ICC_MAX:6A N22
VCCSA4
SA RAIL
2
VCCSA5 1D05V_VTT_CPU 1D05V_VTT_CPU
P17 VCCSA6
P20 U10 VCCSA_SENSE
VCCSA7 VCCSA_SENSE
R16 VCCSA8
1
C915 R18 VCCSA9
2
SC10U6D3V5KX-1GP R21 VCCSA10 R908 R912
U15
VCCSA VID
2
VCCSA11 Do Not Stuff Do Not Stuff

V16 VCCSA12
V17 D48 VCCSA_VID0 DY DY
VCCSA13 VCCSA_VID0
lines
V18 D49 VCCSA_VID1
1
VCCSA14 VCCSA_VID1 VCCSA_VID0
V21 VCCSA15 VCCSA_VID0 48
W20 VCCSA_VID1 VCCSA_VID1 48
VCCSA16
2
R913 R914
10KR2J-L-GP 10KR2J-L-GP
IVY-BRIDGE-GP-NF
1
71.00IVY.A0U
A A
<Core Design>
Wistron Corporation
Title
CPU (VCC_GFXCORE)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = CPU CPU1H 8 OF 9
CPU1I 9 OF 9
A13 VSS1 VSS91 AM38

A17 VSS2 VSS92 AM4
A21 VSS3 VSS93 AM42 BG17 VSS181 VSS250 M4
A33 VSS6 VSS96 AM58 BG28 VSS184 VSS253 N1
D A37 VSS7 VSS97 AN1 BG37 VSS185 VSS254 N17 D
A40 VSS8 VSS98 AN21 BG41 VSS186 VSS255 N21
AA1 VSS13 VSS103 AN40 C29 VSS191 VSS260 N40
AA51 VSS16 VSS106 AN50 D10 VSS194 VSS263 N48
AA52 VSS17 VSS107 AN54 D14 VSS195 VSS264 N51
AA53 VSS18 VSS108 AP10 D18 VSS196 VSS265 N52
AA8 VSS21 VSS111 AP7 D29 VSS199 VSS268 P14
AB16 VSS22 VSS112 AR13 D35 VSS200 VSS269 P16
AB48 AR41 D43 P58
AB61
AC10
VSS25
VSS26
VSS27
VSS115
VSS116
VSS117
AR48
AR61
D46
D50
VSS203
VSS204
VSS205
VSS VSS272
VSS273
VSS274
P59
P9
AC14 VSS28 VSS118 AR7 D54 VSS206 VSS275 R17
AC46 VSS29 VSS119 AT14 D58 VSS207 VSS276 R20
AC6 VSS30 VSS120 AT19 D6 VSS208 VSS277 R4
AD17 VSS31 VSS121 AT36 E25 VSS209 VSS278 R46
AD20 VSS32 VSS122 AT4 E29 VSS210 VSS279 T1
AD4 AT45 E3 T47
AD61
AE13
VSS33
VSS34
VSS35
VSS VSS123
VSS124
VSS125
AT52
AT58
E35
E40
VSS211
VSS212
VSS213
VSS280
VSS281
VSS282
T50
T51
C AE8 AU1 F13 T52 C
VSS36 VSS126 VSS214 VSS283
AF1 VSS37 VSS127 AU11 F15 VSS215 VSS284 T53
AF47 VSS40 VSS130 AU51 F35 VSS218 VSS287 U13
AF48 VSS41 VSS131 AU7 F40 VSS219 VSS288 U8
AF50 VSS42 VSS132 AV17 F55 VSS220 VSS289 V20
AF51 VSS43 VSS133 AV21 G51 VSS221 VSS290 V61
AF52 VSS44 VSS134 AV22 G6 VSS222 VSS291 W13
AF53 VSS45 VSS135 AV34 G61 VSS223 VSS292 W15
AF55 VSS46 VSS136 AV40 H10 VSS224 VSS293 W18
AF59 VSS49 VSS139 AW13 H21 VSS227 VSS296 W8
AG10 VSS50 VSS140 AW43 H4 VSS228 VSS297 Y4
AG47 VSS53 VSS143 AY14 J1 VSS231 VSS300 Y59
AG52 VSS54 VSS144 AY19 J49 VSS232
AG61 VSS55 VSS145 AY30 J55 VSS233
AG7 VSS56 VSS146 AY36 K11 VSS234
AH4 AY4 K21
：
VSS57 VSS147 VSS235
AH58 VSS58 VSS148 AY41 K51 VSS236
A5,A57,BC61,BG5
AJ13 AY45 K8 A5
BG57,C3,E1,E61
VSS59 VSS149 VSS237 VSS_NCTF_1#A5
NCTF TEST PIN

AJ16 VSS60 VSS150 AY49 L16 VSS238 VSS_NCTF_2#A57 A57
AJ20 VSS61 VSS151 AY55 L20 VSS239 VSS_NCTF_3#BC61 BC61
AJ22 VSS62 VSS152 AY58 L22 VSS240 VSS_NCTF_8#BG5 BG5
AJ26 VSS63 VSS153 AY9 L26 VSS241 VSS_NCTF_9#BG57 BG57
AJ30 VSS64 VSS154 BA1 L30 VSS242 VSS_NCTF_10#C3 C3
B B
AJ34 VSS65 VSS155 BA11 L34 VSS243 VSS_NCTF_13#E1 E1
AJ38 VSS66 VSS156 BA17 L38 VSS244 VSS_NCTF_14#E61 E61
NCTF
AJ42 VSS67 VSS157 BA21 L43 VSS245
AJ45 VSS68 VSS158 BA26 L48 VSS246
AJ48 VSS69 VSS159 BA32 L61 VSS247 VSS_NCTF_4 BD3
AJ7 VSS70 VSS160 BA48 M11 VSS248 VSS_NCTF_5 BD59
AK1 VSS71 VSS161 BA51 M15 VSS249 VSS_NCTF_6 BE4
AK52 VSS72 VSS162 BB53 VSS_NCTF_7 BE58
AL10 VSS73 VSS163 BC13 VSS_NCTF_11 C58
AL13 VSS74 VSS164 BC5 VSS_NCTF_12 D59
AL17 VSS75 VSS165 BC57
AL21 VSS76 VSS166 BD12
AL28 BD19 IVY-BRIDGE-GP-NF
VSS78 VSS168
AL36 BD27
AL40
VSS80 VSS170
BD32
71.00IVY.A0U
VSS81 VSS171
AM13 VSS85 VSS175 BD48
AM30 VSS89 VSS179 BE5
AM34 VSS90 VSS180 BG13
A <Core Design> A
IVY-BRIDGE-GP-NF
Wistron Corporation
71.00IVY.A0U Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (VSS)
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
XDP
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
Wistron Corporation A
Title
Reserved
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
<Core Design>
A
Title
Reserved
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = MEMORY M_A_A0 98

A0 NP1
NP1
M_A_A1 97 NP2
M_A_A2 A1 NP2
M_A_A[15:0] 6 96
M_A_A3 A2
95 A3 RAS# 110 M_A_RAS# 6
M_A_A4 92 113 M_A_WE# 6
M_A_A5 A4 WE#
91 115 M_A_CAS# 6
M_A_A6 A5 CAS#
90 A6
M_A_A7 86 114 M_A_DIM0_CS#0 6
M_A_A8 A7 CS0#
89 A8 CS1# 121 M_A_DIM0_CS#1 6
M_A_A9 85
M_A_A10 A9
107 73 M_A_DIM0_CKE0 6
M_A_A11 A10/AP CKE0
84 A11 CKE1 74 M_A_DIM0_CKE1 6
M_A_A12 83
M_A_A13 A12
119 101 M_A_DIM0_CLK_DDR0 6
D M_A_A14 A13 CK0 D
80 A14 CK0# 103 M_A_DIM0_CLK_DDR#0 6
M_A_A15 78
A15
79 102 M_A_DIM0_CLK_DDR1 6
6 M_A_BS2 A16/BA2 CK1
6 M_A_BS0
109
BA0
CK1# 104 M_A_DIM0_CLK_DDR#1 6
Thermal EVENT
6 M_A_BS1 108 BA1 DM0 11
6 M_A_DQ[63:0] DM1 28
M_A_DQ0 5 46
M_A_DQ1 DQ0 DM2
7 63
M_A_DQ2 DQ1 DM3
15 136
M_A_DQ3 DQ2 DM4 3D3V_S0
17 153
M_A_DQ4 DQ3 DM5 R1403
4 DQ4 DM6 170
M_A_DQ5 6 187 TS#_DIMM0_1 1 2
M_A_DQ6 DQ5 DM7
16
M_A_DQ7 DQ6 10KR2J-L-GP
18 200 PCH_SMBDATA 15,20,69
M_A_DQ8 DQ7 SDA
21 202 PCH_SMBCLK 15,20,69
M_A_DQ9 DQ8 SCL
23
M_A_DQ10 DQ9 3D3V_S0
33 198 TS#_DIMM0_1 15
M_A_DQ11 DQ10 EVENT#
35 DQ11
M_A_DQ12 22 199
M_A_DQ13 DQ12 VDDSPD
24 DQ13
M_A_DQ14 34 197
DQ14 SA0
1
M_A_DQ15 36 201 C1401
M_A_DQ16 DQ15 SA1 SCD1U10V2KX-L1-GP
39 DQ16
M_A_DQ17 41 77
2
M_A_DQ18 DQ17 NC#1
51 122
M_A_DQ19 DQ18 NC#2 1D5V_S3
53 DQ19 NC#/TEST 125
M_A_DQ20 40
M_A_DQ21 DQ20
42 DQ21 VDD1 75
M_A_DQ22 50 76
M_A_DQ23 DQ22 VDD2
52 81
M_A_DQ24 DQ23 VDD3
57 DQ24 VDD4 82
M_A_DQ25 59 87 1D5V_S3
M_A_DQ26 DQ25 VDD5
67 DQ26 VDD6 88
C M_A_DQ27 C
69 93
M_A_DQ28 DQ27 VDD7
56 94
M_A_DQ29 DQ28 VDD8
58 99
DQ29 VDD9
C1403
SC10U6D3V5KX-1GP
C1404
SC10U6D3V5KX-1GP
C1405
Do Not Stuff
C1406
SC10U6D3V5KX-1GP
C1407
SC10U6D3V5KX-1GP
C1416
SCD1U10V2KX-L1-GP
C1417
SCD1U10V2KX-L1-GP
M_A_DQ30 68 100
DQ30 VDD10
1
M_A_DQ31 70 105
M_A_DQ32 DQ31 VDD11
129
DQ32 VDD12
106 DY
M_A_DQ33 131 111
2
M_A_DQ34 DQ33 VDD13
141 112
M_A_DQ35 DQ34 VDD14
143 117
M_A_DQ36 DQ35 VDD15
130 118
M_A_DQ37 DQ36 VDD16
132 DQ37 VDD17 123
M_A_DQ38 140 124
M_A_DQ39 DQ38 VDD18
142
M_A_DQ40 DQ39
147 2
M_A_DQ41 DQ40 VSS
149 3
M_A_DQ42 DQ41 VSS
157 8
M_A_DQ43 DQ42 VSS 0D75V_S0
159 9
M_A_DQ44 DQ43 VSS
146 13
M_A_DQ45 DQ44 VSS
148 DQ45 VSS 14
M_A_DQ46 158 19
M_A_DQ47 DQ46 VSS
160 20
DQ47 VSS
C1419
SC1U6D3V2KX-L-1-GP
C1421
SC1U6D3V2KX-L-1-GP
M_A_DQ48 163 25
DQ48 VSS
1
M_A_DQ49 165 26
M_A_DQ50 DQ49 VSS
175 31
M_A_DQ51 DQ50 VSS
177 32
2
M_A_DQ52 DQ51 VSS
164 DQ52 VSS 37
M_A_DQ53 166 38
M_A_DQ54 DQ53 VSS
174 43
M_A_DQ55 DQ54 VSS
176 DQ55 VSS 44
M_A_DQ56 181 48
M_A_DQ57 DQ56 VSS
183 49
M_A_DQ58 DQ57 VSS
191 54
M_A_DQ59 DQ58 VSS
193 55
M_A_DQ60 DQ59 VSS
180 60
B
M_A_DQ61 DQ60 VSS B
182 61
M_A_DQ62 DQ61 VSS
192 DQ62 VSS 65
M_A_DQ63 194 66
DQ63 VSS
71
M_A_DQS#0 VSS
10 DQS0# VSS 72
M_A_DQS#1 27 127
M_A_DQS#2 DQS1# VSS DDR_VREF_S3 M_VREF_DQ_DIMM0
45 DQS2# VSS 128
M_A_DQS#3 62 133
M_A_DQS#4 DQS3# VSS
135 134
M_A_DQS#5 DQS4# VSS
152 DQS5# VSS 138
M_A_DQS#[7:0] 6 M_A_DQS#6 169 139 2 R1404 1 2 R1405 1
M_A_DQS#7 DQS6# VSS Do Not Stuff 0R3J-4-GP DDR_WR_VREF01_B4 37
186 144
DQS7# VSS
M_A_DQS[7:0] 6 VSS 145 SNB IVB
M_A_DQS0 12 150
DQS0 VSS
1
1
M_A_DQS1 29 151 C1411 C1413
M_A_DQS2 DQS1 VSS SCD1U10V2KX-L1-GP SCD1U10V2KX-L1-GP
47 155
M_A_DQS3 DQS2 VSS
64 156
2
2
M_A_DQS4 DQS3 VSS
137 DQS4 VSS 161
M_A_DQS5 154 162
M_A_DQS6 DQS5 VSS
171 DQS6 VSS 167
M_A_DQS7 188 168
DQS7 VSS
172
VSS
116 173
6 M_A_DIM0_ODT0 ODT0 VSS
6 M_A_DIM0_ODT1
120
ODT1 VSS
178 Tracew should be at least 20 mils wide
179
VSS
DDR_VREF_S3 126 184
VREF_CA VSS
M_VREF_DQ_DIMM0 1 VREF_DQ VSS 185
VSS 189
30 190
15,37 DDR3_DRAMRST# RESET# VSS
VSS 195
196
VSS
0D75V_S0 203 VTT1 VSS 205
204 206
VTT2 VSS
A A
DM1 <Core Design>

DDR3-204P-122-GP
62.10017.Z51
2nd = 62.10017.M51
3rd = 62.10024.G21
Wistron Corporation
Title
DDR3-SODIMM1
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = MEMORY
M_B_A0 98 NP1
M_B_A1 A0 NP1
97 NP2
M_B_A2 A1 NP2
M_B_A[15:0] 6 96 A2
M_B_A3 95 110 M_B_RAS# 6
M_B_A4 A3 RAS#
92 113 M_B_WE# 6
M_B_A5 A4 WE#
91 A5 CAS# 115 M_B_CAS# 6
M_B_A6 90
M_B_A7 A6
86 A7 CS0# 114 M_B_DIM0_CS#0 6
M_B_A8 89 121 M_B_DIM0_CS#1 6
M_B_A9 A8 CS1#
85
M_B_A10 A9
107 A10/AP CKE0 73 M_B_DIM0_CKE0 6
M_B_A11 84 74 M_B_DIM0_CKE1 6
M_B_A12 A11 CKE1
83
D M_B_A13 A12 D
119 A13 CK0 101 M_B_DIM0_CLK_DDR0 6
M_B_A14 80 103 M_B_DIM0_CLK_DDR#0 6
M_B_A15 A14 CK0#
78
A15
6 M_B_BS2 79 A16/BA2 CK1 102 M_B_DIM0_CLK_DDR1 6
104 M_B_DIM0_CLK_DDR#1 6
CK1#
6 M_B_BS0 109 BA0
6 M_B_BS1 108 BA1 DM0 11
6 M_B_DQ[63:0] DM1 28
M_B_DQ0 5 46
M_B_DQ1 DQ0 DM2
7 63
M_B_DQ2 DQ1 DM3
15 136
M_B_DQ3 DQ2 DM4
17 DQ3 DM5 153
M_B_DQ4 4 170
M_B_DQ5 DQ4 DM6
6 187
M_B_DQ6 DQ5 DM7
16
M_B_DQ7 DQ6
18 200 PCH_SMBDATA 14,20,69
M_B_DQ8 DQ7 SDA
21 202 PCH_SMBCLK 14,20,69
M_B_DQ9 DQ8 SCL
23
M_B_DQ10 DQ9 3D3V_S0
33 DQ10 EVENT# 198 TS#_DIMM0_1 14
M_B_DQ11 35
M_B_DQ12 DQ11
22 DQ12 VDDSPD 199
M_B_DQ13 24 DQ13
1
M_B_DQ14 34 197
M_B_DQ15 DQ14 SA0 SA1_DIM1
36 DQ15 SA1 201 2 R1501 1 C1501
M_B_DQ16 39 10KR2J-L-GP SCD1U10V2KX-L1-GP
2
M_B_DQ17 DQ16
41 77
M_B_DQ18 DQ17 NC#1
51 DQ18 NC#2 122
M_B_DQ19 53 125 1D5V_S3
M_B_DQ20 DQ19 NC#/TEST
40 DQ20
M_B_DQ21 42 75
M_B_DQ22 DQ21 VDD1
50 76
M_B_DQ23 DQ22 VDD2
52 DQ23 VDD3 81
M_B_DQ24 57 82
M_B_DQ25 DQ24 VDD4
59 DQ25 VDD5 87
C M_B_DQ26 67 88 1D5V_S3 C
M_B_DQ27 DQ26 VDD6
69 93
M_B_DQ28 DQ27 VDD7
56 94
M_B_DQ29 DQ28 VDD8
58 99
DQ29 VDD9
C1503
Do Not Stuff
C1504
Do Not Stuff
C1505
SC10U6D3V5KX-1GP
C1506
SC10U6D3V5KX-1GP
C1507
SC10U6D3V5KX-1GP
C1509
SC10U6D3V5KX-1GP
C1513
SCD1U10V2KX-L1-GP
C1514
SCD1U10V2KX-L1-GP
M_B_DQ30 68 100
DQ30 VDD10
1
M_B_DQ31 70 105
M_B_DQ32 DQ31 VDD11
129 106
M_B_DQ33 DQ32 VDD12
131 111 DY
2
M_B_DQ34 DQ33 VDD13
141
DQ34 VDD14
112 DY
M_B_DQ35 143 117
M_B_DQ36 DQ35 VDD15
130 DQ36 VDD16 118
M_B_DQ37 132 123
M_B_DQ38 DQ37 VDD17
140 124
M_B_DQ39 DQ38 VDD18
142
M_B_DQ40 DQ39
147 2
M_B_DQ41 DQ40 VSS
149 3
M_B_DQ42 DQ41 VSS
157 8
M_B_DQ43 DQ42 VSS 0D75V_S0
159 9
M_B_DQ44 DQ43 VSS
146 DQ44 VSS 13
M_B_DQ45 148 14
M_B_DQ46 DQ45 VSS
158 19
M_B_DQ47 DQ46 VSS
160 DQ47 VSS 20
C1519
SC1U6D3V2KX-L-1-GP
C1521
SC1U6D3V2KX-L-1-GP
M_B_DQ48 163 25
DQ48 VSS
1
M_B_DQ49 165 26
M_B_DQ50 DQ49 VSS
175 31
M_B_DQ51 DQ50 VSS
177 32
2
M_B_DQ52 DQ51 VSS
164 DQ52 VSS 37
M_B_DQ53 166 38
M_B_DQ54 DQ53 VSS
174 DQ54 VSS 43
M_B_DQ55 176 44
M_B_DQ56 DQ55 VSS
181 48
M_B_DQ57 DQ56 VSS
183 49
M_B_DQ58 DQ57 VSS
191 54
M_B_DQ59 DQ58 VSS
193 55
B
M_B_DQ60 DQ59 VSS B
180 60
M_B_DQ61 DQ60 VSS
182 DQ61 VSS 61
M_B_DQ62 192 65
M_B_DQ63 DQ62 VSS
194 66
DQ63 VSS
VSS 71
M_B_DQS#0 10 72
M_B_DQS#1 DQS0# VSS DDR_VREF_S3 M_VREF_DQ_DIMM1
27 DQS1# VSS 127
M_B_DQS#2 45 128
M_B_DQS#3 DQS2# VSS
62 133
M_B_DQS#4 DQS3# VSS
135 DQS4# VSS 134 2 R1502 1 2 R1503 1 DDR_WR_VREF01_D1 37
M_B_DQS#5 152 138 Do Not Stuff 0R3J-4-GP
M_B_DQS#6 DQS5# VSS
169
DQS6# VSS
139 SNB IVB
M_B_DQS#7 186 144
DQS7# VSS
1
1
145 C1515 C1517
M_B_DQS0 VSS SCD1U10V2KX-L1-GP SCD1U10V2KX-L1-GP
12 150
M_B_DQS1 DQS0 VSS
M_B_DQS#[7:0] 6 29 151
2
2
M_B_DQS2 DQS1 VSS
47 DQS2 VSS 155
M_B_DQS[7:0] 6 M_B_DQS3 64 156
M_B_DQS4 DQS3 VSS
137 161
M_B_DQS5 DQS4 VSS
154 DQS5 VSS 162
M_B_DQS6 171 167
M_B_DQS7 DQS6 VSS
188 168
DQS7 VSS
172
VSS
116 173
6 M_B_DIM0_ODT0 ODT0 VSS
120 178
6 M_B_DIM0_ODT1 ODT1 VSS
179
VSS
DDR_VREF_S3 126 VREF_CA VSS 184
M_VREF_DQ_DIMM1 1 VREF_DQ VSS 185
189
VSS
14,37 DDR3_DRAMRST# 30 RESET# VSS 190
195
VSS
VSS 196
0D75V_S0 203 205
VTT1 VSS
A
204 VTT2 VSS 206 A
<Core Design>
DM2
DDR3-204P-122-GP
62.10017.Z51
2nd = 62.10017.M51
Wistron Corporation
3rd = 62.10024.G21 Taipei Hsien 221, Taiwan, R.O.C.
Title
DDR3-SODIMM2
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C (Blanking) C
B B
<Core Design>
A
Title
DDR3-SODIMM2
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
3D3V_S0
RN1701
SRN2K2J-1-GP
2 3 L_CTRL_DATA
1 4 L_CTRL_CLK PCH1D 4 OF 10 3D3V_S0
27 L_BKLT_EN J47 L_BKLTEN SDVO_TVCLKINN AP43
49 LVDS_VDD_EN M45 L_VDD_EN SDVO_TVCLKINP AP45
49 L_BKLT_CTRL P45 L_BKLTCTL SDVO_STALLN AM42
4
3
RN1702 AM40
SRN100KJ-6-GP SDVO_STALLP RN1706
49 LVDS_DDC_CLK_R T40 L_DDC_CLK
1 4 L_BKLT_EN 49 LVDS_DDC_DATA_R K47 AP39 SRN2K2J-1-GP
LVDS_VDD_EN L_DDC_DATA SDVO_INTN
2 3 SDVO_INTP AP40
L_CTRL_CLK T45
L_CTRL_DATA L_CTRL_CLK
P39
1
2
L_CTRL_DATA
LVDS_IBG AF37 P38
LVD_IBG SDVO_CTRLCLK PCH_HDMI_CLK 51
RN1704 AF36 M39
LVD_VBG SDVO_CTRLDATA PCH_HDMI_DATA 51
Place near PCH SRN0J-6-GP
1
3D3V_S0 2 3 LVDS_VREFH AE48
R1701 LVDS_VREFL LVD_VREFH
1 4 AE47 LVD_VREFL DDPB_AUXN AT49
2K37R2F-GP AT47
DDPB_AUXP
DDPB_HPD AT40 HDMI_PCH_DET 51
1
2
49 LVDSA_CLK# AK39
2
LVDSA_CLK#
LVDS
RN1703 49 LVDSA_CLK AK40 AV42 DDBP_DATA2# C1701 1 2 SCD1U10V2KX-L1-GP HDMI_DATA2_R# 51
LVDSA_CLK DDPB_0N DDBP_DATA2 C1702 SCD1U10V2KX-L1-GP
SRN2K2J-1-GP DDPB_0P AV40 1 2 HDMI_DATA2_R 51
49 LVDSA_DATA0# AN48 AV45 DDBP_DATA1# C1703 1 2 SCD1U10V2KX-L1-GP HDMI_DATA1_R# 51
C LVDSA_DATA#0 DDPB_1N DDBP_DATA1 C1704 SCD1U10V2KX-L1-GP C
49 LVDSA_DATA1# AM47 LVDSA_DATA#1 DDPB_1P AV46 1 2 HDMI_DATA1_R 51
Digital Display Interface

49 LVDSA_DATA2# AK47 AU48 DDBP_DATA0# C1705 1 2 SCD1U10V2KX-L1-GP HDMI_DATA0_R# 51
4
3
LVDSA_DATA#2 DDPB_2N DDBP_DATA0 C1706 SCD1U10V2KX-L1-GP

AJ48 LVDSA_DATA#3 DDPB_2P AU47 1 2 HDMI_DATA0_R 51
AV47 DDBP_CLK# C1707 1 2 SCD1U10V2KX-L1-GP HDMI_CLK_R# 51
LVDS_DDC_CLK_R DDPB_3N DDBP_CLK C1708 SCD1U10V2KX-L1-GP
49 LVDSA_DATA0 AN47 LVDSA_DATA0 DDPB_3P AV49 1 2 HDMI_CLK_R 51
LVDS_DDC_DATA_R 49 LVDSA_DATA1 AM49 LVDSA_DATA1
49 LVDSA_DATA2 AK49 LVDSA_DATA2
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
DDPC_CTRLDATA P42
AF40 LVDSB_CLK#
AF39 LVDSB_CLK DDPC_AUXN AP47
DDPC_AUXP AP49
AH45 LVDSB_DATA#0 DDPC_HPD AT38
AH47 LVDSB_DATA#1
AF49 LVDSB_DATA#2 DDPC_0N AY47
AF45 LVDSB_DATA#3 DDPC_0P AY49
DDPC_1N AY43
AH43 LVDSB_DATA0 DDPC_1P AY45
AH49 LVDSB_DATA1 DDPC_2N BA47
AF47 LVDSB_DATA2 DDPC_2P BA48
AF43 LVDSB_DATA3 DDPC_3N BB47
DDPC_3P BB49
CRT_BLUE 50 CRT_BLUE N48 M43

CRT_GREEN CRT_BLUE DDPD_CTRLCLK
50 CRT_GREEN P49 CRT_GREEN DDPD_CTRLDATA M36
CRT_RED 50 CRT_RED T49 CRT_RED
B B
DDPD_AUXN AT45
CRT
50 CRT_DDC_CLK T39 CRT_DDC_CLK DDPD_AUXP AT43
50 CRT_DDC_DATA M40 CRT_DDC_DATA DDPD_HPD BH41
5
6
7
8
DDPD_0N BB43
RN1705 50 CRT_HSYNC M47 BB45
SRN150F-1-GP CRT_HSYNC DDPD_0P
50 CRT_VSYNC M49 CRT_VSYNC DDPD_1N BF44
DDPD_1P BE44
DDPD_2N BF42
DAC_IREF_R T43 BE42
4
3
2
1
DAC_IREF DDPD_2P
T42 CRT_IRTN DDPD_3N BJ42
1
DDPD_3P BG42
R1702
1KR2D-1-GP PANTHER-GP-NF
71.PANTH.00U
2
A <Core Design> A
Wistron Corporation
Title
PCH (LVDS/CRT/DDI)
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1E 5 OF 10
AY7
RSVD1
AV7
RSVD2
BG26 AU3
TP1 RSVD3
BJ26 TP2 RSVD4 BG4
BH25 TP3
BJ16 TP4 RSVD5 AT10
RN1801 BG16 BC8
SRN8K2J-2-GP-U TP5 RSVD6
D AH38 TP6 D
TP_IN# 1 10 3D3V_S0 AH37 AU2
INT_PIRQF# INT_PIRQE# TP7 RSVD7
2 9 AK43 AT4
INT_PIRQB# INT_PIRQA# TP8 RSVD8
3 8 AK45 AT3
INT_PIRQD# INT_PIRQC# TP9 RSVD9
4 7 C18 AT1
INT_PIRQG# TP10 RSVD10
3D3V_S0 5 6 N30 TP11 RSVD11 AY3
H3 TP12 RSVD12 AT5
AH12 TP13 RSVD13 AV3
AM4 AV1
TP14 RSVD14
AM5 TP15 RSVD15 BB1
Y13 BA3
TP16 RSVD16
K24 TP17 RSVD17 BB5
L24 TP18 RSVD18 BB3
AB46 BB7
TP19 RSVD19
AB45 TP20 RSVD20 BE8
RSVD
BD4
RSVD21
BF6
RSVD22
B21 AV5
TP21 RSVD23
M20 AV10
TP22 RSVD24
AY16 TP23
BG46 AT8
TP24 RSVD25
RSVD26 AY5
BA2
RSVD27
BE28
USB3RN1
62 USB30_RN2 BC30 AT12
USB3RN2 RSVD28
BE32 BF3
USB3RN3 RSVD29
BJ32
C USB3RN4 C
BC28
USB3RP1
62 USB30_RP2 BE30
USB3RP2
BF32
BG32
AV26
USB3RP3
USB3RP4
USB3TN1
USBP0N
USBP0P
C24
A24
USB_PN0
USB_PP0
61
61
USB Table
62 USB30_TN2 BB26 USB3TN2 USBP1N C25 USB_PN1 62
RN1803 AU28 USB3TN3 USBP1P B25 USB_PP1 62 Pair Device
DGPU_HOLD_RST# 2 3 AY30 C26
DGPU_PWR_EN# USB3TN4 USBP2N
1 4 AU26
USB3TP1 USBP2P
A26 0 USB2.0 Ext. port 1
62 USB30_TP2 AY26 K28 USB_PN3 49
USB3TP2 USBP3N
SRN10KJ-L-GP AV28
USB3TP3 USBP3P
H28 USB_PP3 49 1 USB3.0/USB2.0 Ext. port 2
AW30 E28
USB3TP4 USBP4N
USBP4P
D28 2
C28
USBP5N
USBP5P
A28 3 CCD
USBP6N C29
USBP6P B29 4
BOOT BIOS Strap INT_PIRQA# K40 N28
INT_PIRQB# PIRQA# USBP7N
K38
PIRQB# USBP7P
M28 5
PCI
GNT1#/GPIO51 SATA1GP/GPIO19 BOOT BIOS Location INT_PIRQC# H38 L30
INT_PIRQD# PIRQC# USBP8N
G38
PIRQD# USBP8P
K30 6 may not be available
0 0 LPC USBP9N G30 USB_PN9 61
83 DGPU_HOLD_RST# C46 REQ1#/GPIO50 USBP9P E30 USB_PP9 61 7 may not be available
USB
0 1 Reserved Do Not Stuff TP1806 1 DGPU_SELECT# C44 C30
REQ2#/GPIO52 USBP10N
27,93 DGPU_PWR_EN# E40
REQ3#/GPIO54 USBP10P
A30 8
1 0 Reserved USBP11N L32 USB_PN11 65
D47 GNT1#/GPIO51 USBP11P K32 USB_PP11 65 9 USB2.0 Ext. port 3
1 1 SPI(Default) Do Not Stuff TP1804 1 DGPU_PWM_SELECT# E42 G32
GNT2#/GPIO53 USBP12N
B
F46
GNT3#/GPIO55 USBP12P
E32 10 B
C32
USBP13N
USBP13P
A32 11 Mini Card1 (WLAN+BT)
INT_PIRQE# G42
INT_PIRQF# PIRQE#/GPIO2
56 SATA_ODD_DA# 1 R1813 2 G40 12
Do Not Stuff INT_PIRQG# PIRQF#/GPIO3 USB_RBIAS
C42 C33 1 2
PIRQG#/GPIO4 USBRBIAS# R1811
69 TP_IN# D44
PIRQH#/GPIO5 13
22D6R2F-L1-GP
USBRBIAS B33
K10
PME# 3D3V_S5
5,27,31,36,65,71,83,97 PLT_RST# C6 PLTRST# OC0#/GPIO59 A14
K20
OC1#/GPIO40
2
B17
R1804 CLK_PCI_LPC_R OC2#/GPIO41
71 CLK_PCI_LPC 1 2 22R2J-2-GP H49 C16 R1820
R1805 CLK_PCI_FB_R CLKOUT_PCI0 OC3#/GPIO42 10KR2J-L-GP
20 CLK_PCI_FB 1 2 22R2J-2-GP H43 CLKOUT_PCI1 OC4#/GPIO43 L16
27 CLK_PCI_KBC R1806 1 2 22R2J-2-GP CLK_PCI_KBC_R J48 A16
CLKOUT_PCI2 OC5#/GPIO9
K42 D14
1
CLKOUT_PCI3 OC6#/GPIO10 OC_PWR
H40 C14
CLKOUT_PCI4 OC7#/GPIO14
PANTHER-GP-NF
71.PANTH.00U
CLK_PCI_LPC
A <Core Design> A
1
EC1801
DY Do Not Stuff
Wistron Corporation
2

Title
PCH (PCI/USB/NVRAM)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH 4
4
DMI_RXN[3:0]
DMI_RXP[3:0] FDI_TXN[7:0] 4
FDI_TXP[7:0] 4
4 DMI_TXN[3:0]
4 DMI_TXP[3:0]
PCH1C 3 OF 10
4 DMI_RXN0 BC24 DMI0RXN FDI_RXN0 BJ14 FDI_TXN0 4

4 DMI_RXN1 BE20 DMI1RXN FDI_RXN1 AY14 FDI_TXN1 4
D 4 DMI_RXN2 BG18 DMI2RXN FDI_RXN2 BE14 FDI_TXN2 4 D
4 DMI_RXN3 BG20 DMI3RXN FDI_RXN3 BH13 FDI_TXN3 4
Signal Routing Guideline: FDI_RXN4 BC12 FDI_TXN4 4
DMI_ZCOMP keep W=4 mils and 4 DMI_RXP0 BE24 DMI0RXP FDI_RXN5 BJ12 FDI_TXN5 4
4 DMI_RXP1 BC20 BG10 FDI_TXN6 4
routing length less than 500 BJ18
DMI1RXP FDI_RXN6
BG9
4 DMI_RXP2 DMI2RXP FDI_RXN7 FDI_TXN7 4
mils. 4 DMI_RXP3 BJ20 DMI3RXP
DMI_IRCOMP keep W=4 mils and FDI_RXP0 BG14 FDI_TXP0 4
routing length less than 500 4 DMI_TXN0 AW24 DMI0TXN FDI_RXP1 BB14 FDI_TXP1 4
4 DMI_TXN1 AW20 BF14 FDI_TXP2 4
mils. BB18
DMI1TXN FDI_RXP2
BG13
4 DMI_TXN2 DMI2TXN FDI_RXP3 FDI_TXP3 4
4 DMI_TXN3 AV18 DMI3TXN FDI_RXP4 BE12 FDI_TXP4 4
DMI
FDI
FDI_RXP5 BG12 FDI_TXP5 4
4 DMI_TXP0 AY24 DMI0TXP FDI_RXP6 BJ10 FDI_TXP6 4
4 DMI_TXP1 AY20 DMI1TXP FDI_RXP7 BH9 FDI_TXP7 4
4 DMI_TXP2 AY18 DMI2TXP
4 DMI_TXP3 AU18 DMI3TXP
FDI_INT AW16 FDI_INT 4
1D05V_VTT BJ24 AV12
DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 4
R1901 1 2 49D9R2F-GP DMI_COMP_R BG25 BC10 FDI_FSYNC1 4
DMI_IRCOMP FDI_FSYNC1
R1902 1 2 750R2F-GP RBIAS_CPY BH21 AV14 FDI_LSYNC0 4
DMI2RBIAS FDI_LSYNC0
FDI_LSYNC1 BB10 FDI_LSYNC1 4
C A18 DSW ODVREN C

DSWVRMEN R1910
1 Do Not Stuff
2 PM_RSMRST#
System Power Management

SUS_PW R_ACK# C12 E22 PCH_DPW ROK 1 R1911 2 RTC_AUX_S5 DSWODVREN - On Die DSW VR Enable
SUSACK# DPWROK Do Not Stuff
DY
1 R1926 2 SYS_PW ROK DY HIGH Enabled (DEFAULT)
Do Not Stuff 3D3V_S0 1 R1905 2 SYS_RESET# K3 B9 PCIE_W AKE#
10KR2J-L-GP SYS_RESET# WAKE#
LOW Disabled
1 R1904 2 PW ROK 36 SYS_PW ROK P12 SYS_PWROK CLKRUN#/GPIO32 N3 PM_CLKRUN# 27
100KR2J-4-GP
2 1 PW ROK L22 G8 RTC_AUX_S5

27 S0_PW R_GOOD PWROK SUS_STAT#/GPIO61
R1924
Do Not Stuff
L10 N14 PCH_SUSCLK_KBC 27 R1917 1 2 330KR2J-L1-GP
APWROK SUSCLK/GPIO62
37 PM_DRAM_PW RGD B13 D10 DSW ODVREN R1918 1 DY 2 Do Not Stuff

DRAMPWROK SLP_S5#/GPIO63
PM_RSMRST# C21 H4 PM_SLP_S4# 27,46

RSMRST# SLP_S4#
SUS_PW R_ACK_R K16 F4 PM_SLP_S3# 27,29,36,37,47

SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3#
27,97 PM_PW RBTN# E20 PWRBTN# SLP_A# G10

3D3V_S0
B B
27 AC_PRESENT H20 G16 SLLP_SUS#_TP 1 TP1904 Do Not Stuff

ACPRESENT/GPIO31 SLP_SUS# PM_CLKRUN# 1 R1919 2
8K2R2J-3-GP
BATLOW # E10 AP14
BATLOW#/GPIO72 PMSYNCH H_PM_SYNC 5
PM_RI# A10 K14

RI# SLP_LAN#/GPIO29
PANTHER-GP-NF
S0_PWR_GOOD after PM_SLP_S3# delay 200 ms
71.PANTH.00U
3D3V_S5
RN1901
SRN10KJ-6-GP
8 1 BATLOW #
7 2 PM_RI#
6 3 AC_PRESENT
5 4 SUS_PW R_ACK_R 3D3V_AUX_S5
2 R1909 1
100KR2J-4-GP
2
2 R1921 1 PCIE_W AKE#

10KR2J-L-GP R1916
10KR2J-L-GP
A <Core Design> A
2 R1922 1 SUS_PW R_ACK#
10KR2J-L-GP 4 3 PM_RSMRST# 1 R1912 2 RSMRST#_KBC 27
1
1KR2J-L2-GP
3V_5V_POK_# 5 2 3V_5V_POK 41
Wistron Corporation
6 1 Q1901 Taipei Hsien 221, Taiwan, R.O.C.
2N7002KDW -GP
84.2N702.A3F Title
2 R1908 1 PM_RSMRST# 2nd = 84.DM601.03F
100KR2J-4-GP PCH (DM I/FDI/PM)
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH 3D3V_S5
SMB_CLK 4 1 RN2003
PCH1B 2 OF 10 SMB_DATA 3 2 SRN2K2J-1-GP
BG34 SML0_DATA 3 2 RN2004

PERN1 SML0_CLK
BJ34 E12 EC_SWI# 27 4 1 SRN2K2J-1-GP
PERP1 SMBALERT#/GPIO11
AV32
PETN1 SMB_CLK SML1_CLK
AU32 H14 2 3 RN2005
PETP1 SMBCLK SML1_DATA 1 4 SRN2K2J-1-GP
BE34 C9 SMB_DATA
PERN2 SMBDATA PCH_GPIO74
BF34 PERP2 1 4 RN2006
BB32 2 3 SRN10KJ-L-GP
PETN2
AY32
PETP2
SMBUS
D SML0ALERT#/GPIO60 A12 D
DRAMRST_CNTRL_PCH 37 R2009
31 PCIE_RXN3 BG36 PERN3
BJ36 C8 SML0_CLK DRAMRST_CNTRL_PCH 1 2
31 PCIE_RXP3 PERP3 SML0CLK
C2011 2 SCD1U10V2KX-L1-GP PCIE_TXN3_C 1KR2J-L2-GP
31 PCIE_TXN3 C2012
1
1 2 SCD1U10V2KX-L1-GP PCIE_TXP3_C
AV34
AU34
PETN3 LAN G12 SML0_DATA
31 PCIE_TXP3 PETP3 SML0DATA
65 PCIE_RXN4 BF36 PERN4

65 PCIE_RXP4 BE36 PERP4
C2005 2 SCD1U10V2KX-L1-GP PCIE_TXN4_C PCH_GPIO74
65 PCIE_TXN4 C2006
1
1 2 SCD1U10V2KX-L1-GP PCIE_TXP4_C
AY34
BB34
PETN4 WLAN SML1ALERT#/PCHHOT#/GPIO74 C13
3D3V_S0 RN2007
65 PCIE_TXP4 PETP4 SRN2K2J-1-GP
SML1CLK/GPIO58 E14 SML1_CLK 27,28,49,86
PCI-E*
BG37 PERN5 1 4
BH37 M16 SML1_DATA 27,28,49,86 2 3
PERP5 SML1DATA/GPIO75
AY36
PETN5
BB36 PETP5
BJ38 PERN6
BG38 PERP6
Controller
AU36 PETN6 CL_CLK1 M7
AV36
PETP6 SMB_DATA 6 1 PCH_SMBDATA 14,15,69
Link
BG40 PERN7 CL_DATA1 T11
BJ40 3D3V_S0 5 2
PERP7
AY40
PETN7 Q2001
BB40 PETP7 CL_RST1# P10 4 3
2
2N7002KDW-GP
BE38 R2014 84.2N702.A3F
PERN8 10KR2J-L-GP
BC38 PERP8 2nd = 84.DM601.03F
AW38 PETN8 PCH_SMBCLK 14,15,69
AY38
1
PETP8 SMB_CLK
PEG_A_CLKRQ#/GPIO47 M10 PEG_CLKREQ# 83
Y40
CLKOUT_PCIE0N
Y39 CLKOUT_PCIE0P
AB37 CLK_PCIE_VGA# 83
PCIE_CLK_REQ0# CLKOUT_PEG_A_N
J2 AB38
CLOCKS
PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P CLK_PCIE_VGA 83
AB49 AV22 CLK_EXP_N 5

CLKOUT_PCIE1N CLKOUT_DMI_N
C AB47 CLKOUT_PCIE1P CLKOUT_DMI_P AU22 CLK_EXP_P 5 C
RN2017
PCIE_CLK_REQ1# M1 SRN0J-6-GP
PCIECLKRQ1#/GPIO18 CLKOUT_DP_N_C
AM12 2 3 CLK_DP_N 5
CLKOUT_DP_N CLKOUT_DP_P_C
CLKOUT_DP_P AM13 1 EDP 4 CLK_DP_P 5
AA48
31 PCIE_CLK_LAN# CLKOUT_PCIE2N
AA47
Lan 31 PCIE_CLK_LAN CLKOUT_PCIE2P
CLKIN_DMI_N
BF18 CLK_BUF_EXP_N
V10 BE18 CLK_BUF_EXP_P
31 PCIE_CLK_LAN_REQ# PCIECLKRQ2#/GPIO20 CLKIN_DMI_P
RN2008
65 PCIE_CLK_WLAN# Y37 BJ30 CLK_BUF_CPYCLK_N 2 3
CLKOUT_PCIE3N CLKIN_GND1_N CLK_BUF_CPYCLK_P
65 PCIE_CLK_WLAN Y36 BG30 1 4
WLAN CLKOUT_PCIE3P CLKIN_GND1_P
65 CLK_PCIE_WLAN_REQ# A8 SRN10KJ-L-GP
PCIECLKRQ3#/GPIO25 CLK_BUF_DOT96_N
G24
CLKIN_DOT_96N CLK_BUF_DOT96_P
E24
CLKIN_DOT_96P
Y43
CLKOUT_PCIE4N
Y45 CLKOUT_PCIE4P
AK7 CLK_BUF_CKSSCD_N
PCIE_CLK_REQ4# CLKIN_SATA_N CLK_BUF_CKSSCD_P
L12 AK5
PCIECLKRQ4#/GPIO26 CLKIN_SATA_P
CLK_BUF_REF14
V45
V46
CLKOUT_PCIE5N REFCLK14IN
K45 -1
CLKOUT_PCIE5P
PCIE_CLK_REQ5# L14 H45 CLK_PCI_FB 18
PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK XTAL25_IN SC15P50V2JN-2-GP 2 1 C2008
2
AB42 V47 XTAL25_IN X2001
CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT R2006 XTAL-25MHZ-102-GP
AB40 CLKOUT_PEG_B_P XTAL25_OUT V49
-1 PEG_B_CLKRQ# E6
1MR2J-1-GP 82.30020.851
2nd = 82.30020.791
1
PEG_B_CLKRQ#/GPIO56
1
3D3V_S0 Y47 XCLK_RCOMP 1 R2007 2 XTAL25_OUT SC15P50V2JN-2-GP 2 1 C2007
XCLK_RCOMP 1D05V_VTT
RN2018 V40 90D9R2F-1-GP
PCIE_CLK_LAN_REQ# CLKOUT_PCIE6N
1 4 V42
PCIE_CLK_REQ1# CLKOUT_PCIE6P
2 3
PCIE_CLK_REQ6# T13
B PCIECLKRQ6#/GPIO45 B
SRN10KJ-L-GP
V38 K43
CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64
FLEX CLOCKS
V37 3D3V_S0 3D3V_S0

CLKOUT_PCIE7P
CLKOUTFLEX1/GPIO65
F47 UMA_DISCRETE#
PCIE_CLK_REQ7# K12 UMA: 1 1
PCIECLKRQ7#/GPIO46
1
H47 DIS :0 1
CLKOUTFLEX2/GPIO66 R2012 R2013
AK14 CLKOUT_ITPXDP_N Optimus(Muxless) : 1 0
K49 DGPU_PRSNT# 10KR2J-L-GP Do Not Stuff
PCIECLKRQ1# and PCIECLKRQ2# AK13
CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67
UMA
Support S0 power only
2
PANTHER-GP-NF UMA_DIS# 22
71.PANTH.00U DGPU_PRSNT#
1
R2010 R2011
Do Not Stuff 10KR2J-L-GP
DY Muxless
2
3D3V_S5 RN2001
SRN10KJ-6-GP
1 8 CLK_PCIE_WLAN_REQ#
2 7 PCIE_CLK_REQ6#
3 6 PCIE_CLK_REQ5#
4 5 PCIE_CLK_REQ4#
RN2009
SRN10KJ-L3-GP
CLK_BUF_REF14 1 10
CLK_BUF_CKSSCD_P 2 9 CLK_BUF_EXP_P RN2002
CLK_BUF_CKSSCD_N 3 8 CLK_BUF_EXP_N SRN10KJ-6-GP
4 7 CLK_BUF_DOT96_N 1 8 PCIE_CLK_REQ0#
5 6 CLK_BUF_DOT96_P 2 7 PCIE_CLK_REQ7#
3 6 PEG_B_CLKRQ#
4 5 EC_SWI#
need very close to PCH
A A
<Core Design>
Wistron Corporation
Title
PCH (PCI-E/SMBUS/CLOCK/CL)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH RTC_AUX_S5

-1
RTC_X1 R2115 1 20KR2F-L-GP
2 INTVRMEN- Integrated SUS
1 R2101 2 RTC_X2 R2116 1 2
1.05V VRM Enable
1
10MR2J-L-GP 20KR2F-L-GP C2103 High - Enable internal VRs
SC1U16V3KX-5GP Low - Enable external VRs
X2101
2
X-32D768KHZ-34GPU
82.30001.661
2nd = 82.30001.B21 PCH1A 1 OF 10
LPC_AD[0..3] 27,71
D D
1 4 RTC_X1 A20 C38 LPC_AD0
RTCX1 FWH0/LAD0 LPC_AD1
-1 FWH1/LAD1 A38
SC6P50V2CN-1GP
C2101
C2102
SC6P50V2CN-1GP
LPC
RTC_X2 C20 B37 LPC_AD2
RTCX2 FWH2/LAD2
1
1
C37 LPC_AD3
RTC_RST# FWH3/LAD3
2 3 D20 RTCRST#
D36 LPC_FRAME# 27,71
2
2 FWH4/LFRAME#
2
SRTC_RST# G22 SRTCRST#
1
G2101 E36
SM_INTRUDER# LDRQ0#
RTC
C2104 Do Not Stuff 2 R2104 1 K22 K36
SC1U16V3KX-5GP 1MR2J-1-GP INTRUDER# LDRQ1#/GPIO23
2
RTC_AUX_S5 1 2 PCH_INTVRMEN C17 V5 INT_SERIRQ 27
1
R2105 INTVRMEN SERIRQ
330KR2F-L-GP
SATA0RXN AM3 SATA_RXN0 56
HDA_BITCLK N34 HDA_BCLK SATA0RXP AM1 SATA_RXP0 56
HDD1
SATA 6G
27 RTCRST_ON G RTC Reset HDA_SYNC L34 HDA_SYNC
SATA0TXN
SATA0TXP
AP7
AP5
SATA_TXN0
SATA_TXP0
56
56
D RTC_RST# 29 HDA_SPKR T10 AM10
SPKR SATA1RXN
SATA1RXP AM8
RTC_RST#_SS HDA_RST# K34 AP11
HDA_RST# SATA1TXN
SATA1TXP AP10
1
Q2102
R2111 2N7002K-2-GP 29 HDA_SDIN0 E34 AD7
R2106 2KR2F-3-GP 84.2N702.J31 HDA_SDIN0 SATA2RXN
SATA2RXP AD5
100KR2F-L1-GP 2ND = 84.2N702.031 G34 AH5
HDA_SDIN1 SATA2TXN
AH4
2
SATA2TXP
C34 HDA_SDIN2
IHDA
SATA3RXN AB8
A34 HDA_SDIN3 SATA3RXP AB10
C SATA3TXN AF3 C
SATA3TXP AF1
27 ME_UNLOCK 1 R2107 2 HDA_SDOUT A36
1KR2J-L2-GP HDA_SDO
SATA
SATA4RXN Y7 SATA_RXN4 56
SATA4RXP Y5 SATA_RXP4 56
C36 HDA_DOCK_EN#/GPIO33 SATA4TXN
SATA4TXP
AD3
AD1
SATA_TXN4
SATA_TXP4
56
56
ODD
N32 HDA_DOCK_RST#/GPIO13
SATA5RXN Y3
SATA5RXP Y1
SATA5TXN AB3
2 R2121 1 PCH_JTAG_TCK_BUF J3 AB1
4K7R2J-L-GP JTAG_TCK SATA5TXP
H7 Y11 1D05V_VTT
JTAG_TMS SATAICOMPO
JTAG
2 DY 1 HDA_SYNC
29 HDA_CODEC_SYNC R2122 Do Not Stuff SATA_COMP R2112
K5 JTAG_TDI SATAICOMPI Y10 1 2 37D4R2F-GP
2 1 HDA_SDOUT
29 HDA_CODEC_SDOUT R2123 33R2J-L1-GP 1D05V_VTT
H1 JTAG_TDO
SATA3RCOMPO AB12
1 4 HDA_RST# AB13 SATA3_COMP R2113 1 2 49D9R2F-GP

29 HDA_CODEC_RST# HDA_BITCLK SATA3COMPI
29 HDA_CODEC_BITCLK 2 3
RN2102 27,60 SPI_CLK_R 1 R2108 2 PCH_SPI_CLK T3 AH1 RBIAS_SATA3 R2114 1 2 750R2F-GP

SRN33J-5-GP-U 33R2J-L1-GP SPI_CLK SATA3RBIAS
27,60 SPI_CS0#_R 1 2 PCH_SPI_CS0# Y14 SPI_CS0#

R2109 33R2J-L1-GP
T1 SPI_CS1#
SPI
Flash Descriptor Security Overide P3 SATA_LED#
SATALED#
Low = Default 27,60 SPI_SI_R 1 R2110 2 PCH_SPI_SI V4 V14 SATA_DET#0
33R2J-L1-GP SPI_MOSI SATA0GP/GPIO21
B HDA_SDOUT High = Enable B
27,60 SPI_SO_R U3 SPI_MISO SATA1GP/GPIO19 P1
PANTHER-GP-NF
+3VS_+1.5VS_HDA_IO
1 R2102 2 HDA_SDOUT 71.PANTH.00U 3D3V_S0

Do Not Stuff RN2103
DY SRN10KJ-6-GP
22 PSW _CLR# 1 8
SATA_LED# 2 7
INT_SERIRQ 3 6
SATA_DET#0 4 5
PLL ODVR VOLTAGE
Low = 1.8V (Default) HDA_CODEC_BITCLK HDA_CODEC_SDOUT SPI_CS0#_R
HDA_SYNC High = 1.5V
2
EC2102 EC2103 EC2101

Do Not Stuff Do Not Stuff Do Not Stuff
1
DY DY DY
+3VS_+1.5VS_HDA_IO
1 R2103 2 HDA_SYNC
1KR2J-L2-GP
5V_S0
A A
G <Core Design>
D HDA_SYNC_R 1 R2124 2 HDA_SYNC HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to
33R2J-L1-GP
HDA_CODEC_SYNC S sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this Wistron Corporation
signal on the board. Signal may have leakage paths via powered off devices (Audio Taipei Hsien 221, Taiwan, R.O.C.
Q2101
2N7002K-2-GP Codec) and hence contend with the external pull-up. A blocking FET is
84.2N702.J31 Title
recommended in such a case to isolate HDA_SYNC from the Audio Codec device
2ND = 84.2N702.031
until after the Strap sampling is complete. PCH (SPI/RTC/LPC/SATA/IHDA)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1F 6 OF 10
S_GPIO T7 C40 SATA_ODD_PWRGT 56

BMBUSY#/GPIO0 TACH4/GPIO68
EC_SMI# A42 B41 UMA_DIS# 20
3D3V_S0 TACH1/GPIO1 TACH5/GPIO69
DGPU_HPD_INTR# H36 C41 VRAM_SIZE1
TACH2/GPIO6 TACH6/GPIO70
D RN2203 D
1 4 H_RCIN# 27 EC_SCI# E38 A40 VRAM_SIZE2
H_A20GATE TACH3/GPIO7 TACH7/GPIO71
2 3
ICC_EN# C10
GPIO8
SRN10KJ-L-GP
PCH_GPIO12 C4
56 SATA_ODD_PRSNT# LAN_PHY_PWR_CTRL/GPIO12
PCH_GPIO15 G2 P4 H_A20GATE 27
3D3V_S0 GPIO15 A20GATE
PCH_GPIO24 R2202 AU16 H_PECI_R DY 1 R2203 2
PECI H_PECI 5,27
1 2 U2 Do Not Stuff
SATA4GP/GPIO16
1
P5 H_RCIN# 27
R2220 10KR2J-L-GP RCIN#
GPIO
10KR2J-L-GP D40 AY11
92,93 DGPU_PWROK TACH0/GPIO17 PROCPWRGD H_CPUPWRGD 5,36,97
CPU/MISC
PCH_GPIO22 T5 AY10 PCH_THERMTRIP_R 1 R2204 2 H_THERMTRIP# 5,36
2
SCLOCK/GPIO22 THRMTRIP# 390R2J-1-GP

PCH_GPIO24 E8 T14
GPIO24 INIT3_3V#
PCH_GPIO27 E16 AY1 NV_CLE
GPIO27 DF_TVS
PLL_ODVR_EN P8 1D8V_S0
GPIO28
AH8
TS_VSS1
21 PSW_CLR# K1
STP_PCI#/GPIO34
1
3D3V_S0 AK11
RN2201 FP_DET# TS_VSS2
K4
GPIO35
2
SRN10KJ-6-GP AH10 R2209
EC_SMI# G2201 DMI_OVRVLTG TS_VSS3 2K2R2J-2-GP
1 8 V8
DGPU_HPD_INTR# Do Not Stuff SATA2GP/GPIO36
2 7 AK10
2
C EC_SCI# FDI_OVRVLTG TS_VSS4 C
3 6 M5
PCH_GPIO48 SATA3GP/GPIO37 NV_CLE
4 5 1 R2205 2
Pass Word Clear H_SNB_IVB# 5
1
SPK_HPD_C N2 P37 1KR2J-L2-GP
SLOAD/GPIO38 NC_1
RN2202 49 EDP#_LVDS M3
SRN10KJ-6-GP SDATAOUT0/GPIO39
SPK_HPD_C 1 8 PCH_GPIO48 V13 BG2
FP_DET# SDATAOUT1/GPIO48 VSS_NCTF_15#BG2
2 7
S_GPIO 3 6 PCH_GPIO49 V3 BG48
PCH_GPIO49 SATA5GP/GPIO49/TEMP_ALERT# VSS_NCTF_16#BG48 FDI_OVRVLTG
4 5
USB3_SUPPORT D6 BH3
GPIO57 VSS_NCTF_17#BH3
1
FDI TERMINATION VOLTAGE OVERRIDE
BH47 R2208
RN2204 3D3V_S5 VSS_NCTF_18#BH47 10KR2J-L-GP
SRN10KJ-6-GP Do Not Stuff TP2206 1 PCH_NCTF_1 A4 BJ4
PCH_GPIO27 VSS_NCTF_1#A4 VSS_NCTF_19#BJ4
1 8 GPIO37 LOW - Tx, Rx terminated to same voltage
NCTF
2
2 7 A44 BJ44 (FDI_OVRVLTG) (DC Coupling Model DEFAULT)
PCH_GPIO12 VSS_NCTF_2#A44 VSS_NCTF_20#BJ44
3 6
4 5 A45 BJ45
VSS_NCTF_3#A45 VSS_NCTF_21#BJ45
Do Not Stuff TP2208 1 PCH_NCTF_3 A46 BJ46 DMI_OVRVLTG
1
PCH_GPIO15 1 R2201 2 A5 BJ5 DMI TERMINATION VOLTAGE OVERRIDE
1KR2J-L2-GP VSS_NCTF_5#A5 VSS_NCTF_23#BJ5 R2210
A6 BJ6 10KR2J-L-GP
A4,A44,A45,A46,A5,A6,B3,B47,
BJ45,BJ46,BJ5,BJ6,C2,C48,D1,
BD1,BD49,BE1,BE49,BF1,BF49,
BG2,BG48,BH3,BH47,BJ4,BJ44,
B3 C2 GPIO36 LOW - Tx, Rx terminated to same voltage
2
VSS_NCTF_7#B3 VSS_NCTF_25#C2
(DMI_OVRVLTG) (DC Coupling Model DEFAULT)
B47 C48
B VSS_NCTF_8#B47 VSS_NCTF_26#C48 B
D49,E1,E49,F1,F49
BD1 D1
VSS_NCTF_9#BD1 VSS_NCTF_27#D1
NCTF TEST PIN:

BD49 D49
VSS_NCTF_10#BD49 VSS_NCTF_28#D49
BE1 E1 ICC_EN#
VSS_NCTF_11#BE1 VSS_NCTF_29#E1
Integrated Clock Chip Enable
1
BE49 E49
VSS_NCTF_12#BE49 VSS_NCTF_30#E49 R2211
Do Not Stuff TP2207 1 PCH_NCTF_2 BF1 F1 Do Not Stuff ICC_EN# HIGH (R2211 DY)- DISABLED [DEFAULT]
VSS_NCTF_13#BF1 VSS_NCTF_31#F1
DY
Do Not Stuff TP2209 1 PCH_NCTF_4 BF49 F49
2
VSS_NCTF_14#BF49 VSS_NCTF_32#F49
LOW (R2211)- ENABLED
PANTHER-GP-NF GPIO8 has a weak[20K] internal pull up.
Integrated Clock Enable functionality is achieved
3D3V_S0 3D3V_S0 3D3V_S5 71.PANTH.00U via soft-strap. The default is integrated clock
enable.
1
R2218 R2214 R2216 R2221 PLL_ODVR_EN

10KR2J-L-GP Do Not Stuff 10KR2J-L-GP 10KR2J-L-GP PLL ON DIE VR ENABLE
1
2G 1G USB30
R2212
NOTE:This signal has a weak internal pull-up 20K
2
Do Not Stuff
DY ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT
A
VRAM_SIZE1 DISABLED -- LOW (R2212 STUFFED) <Core Design> A
2
PCH_GPIO22 VRAM_SIZE2 USB3_SUPPORT
1
R2219 R2215 R2217 R2222 Wistron Corporation

Do Not Stuff 10KR2J-L-GP Do Not Stuff Do Not Stuff 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
DY 1G_512M 512M_2G USB20 Taipei Hsien 221, Taiwan, R.O.C.
2
Title
PCH (GPIO/CPU)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
1D05V_VTT
PCH1G POWER 7 OF 10
3D3V_DAC_S0
1.7A 63mA
AA23 VCCCORE1 VCCADAC U48 +VCCA_DAC_1_2 1 R2315 2
AC23 Do Not Stuff
VCCCORE2
C2301
SC10U6D3V5KX-1GP
C2302
SC1U6D3V2KX-L-1-GP
C2303
SC1U6D3V2KX-L-1-GP
C2304
SC1U6D3V2KX-L-1-GP
C2313
SCD01U16V2KX-L1-GP
C2314
SCD1U10V2KX-L1-GP
C2315
Do Not Stuff
AD21
CRT
VCCCORE3
1
D AD23 U47 5V_S0 3D3V_DAC_S0 D
VCCCORE4 VSSADAC U2301
AF21 DY
VCC CORE
VCCCORE5
AF23
2
VCCCORE6 3D3V_S0
AG21 VCCCORE7 1 IN OUT 5
AG23 VCCCORE8 1mA 2 GND
C2312
SC1U6D3V2KX-L-1-GP
C2327
SC10U6D3V3MX-L-GP
AG24 AK36 +3VS_VCCA_LVDS 1 R2304 2 3 4
VCCCORE9 VCCALVDS EN NC#4
1
AG26 Do Not Stuff
VCCCORE10
C2311
SC1U10V2KX-1GP
AG27 VCCCORE11 VSSALVDS AK37
1
AG29 TLV70233DBVR-GP
2
VCCCORE12
AJ23 VCCCORE13 74.70233.03F
LVDS
AJ26 AM37 2nd = 74.08818.B3F
2
VCCCORE14 VCCTX_LVDS1
AJ27 VCCCORE15
AJ29 AM38 1D8V_S0
VCCCORE16 VCCTX_LVDS2
AJ31 VCCCORE17 40mA
AP36 +1.8VS_VCCTX_LVDS 1 R2305 2
1D05V_VTT VCCTX_LVDS3 Do Not Stuff
C2316
SCD01U16V2KX-L1-GP
C2317
SCD01U16V2KX-L1-GP
C2318
Do Not Stuff
VCCTX_LVDS4 AP37
2
AN19 VCCIO28
DY
1
BJ22 3D3V_S0
1D05V_VTT VCCAPLLEXP
3.711A(Total) VCC3_3_6 V33
HVCMOS
AN16 VCCIO15
1
C2306
Do Not Stuff
C2307
SC1U6D3V2KX-L-1-GP
C2308
SC1U6D3V2KX-L-1-GP
C2309
SC1U6D3V2KX-L-1-GP
AN17 C2319
VCCIO16
1
1
V34 SCD1U10V2KX-L1-GP
VCC3_3_7
DY
2
AN21
2
2
C VCCIO17 C
AN26 VCCVRM_S0
VCCIO18
AN27 VCCIO19 VCCVRM3 AT16
AP21 1D05V_VTT 1D5V_S0_PCH VCCVRM_S0

VCCIO20
AP23 VCCIO21 VCCDMI1 AT20
1 R2302 2
1
DMI
AP24 C2320 Do Not Stuff
VCCIO22 SC1U6D3V2KX-L-1-GP
VCCIO
AP26 AB36
2
VCCIO23 VCCCLKDMI
AT24 L2303 1D05V_VTT
VCCIO24 IND-10UH-218-GP 1D5V_S0 1D5V_S0_PCH
70mA
+1.05VS_VCC_DMI_CCI 1 2
AN33 VCCIO25 68.10050.10Y PG4317
C2321
SC1U6D3V2KX-L-1-GP
C2325
Do Not Stuff
2nd = 68.10090.10B 1 2
1
AN34 VCCIO26 VCCDFTERM1 AG16
3D3V_S0 DY Do Not Stuff
228mA(Total)
2
BH29 AG17 PG4318
VCC3_3_3 VCCDFTERM2
DFT / SPI
1 2
1
C2310 AJ16 Do Not Stuff

SCD1U10V2KX-L1-GP VCCDFTERM3 1D8V_S0
2
167mA(Total) VCCVRM_S0 AP16 VCCVRM2 2mA PG4319

VCCDFTERM4 AJ17 1 2
1
B Do Not Stuff B
BG6 VCCAFDIPLL C2326 C2322
SCD1U10V2KX-L1-GP SCD1U10V2KX-L1-GP
2
1D05V_VTT AP17 VCCIO27
V1
FDI
VCCSPI
47mA(Total) 1D05V_VTT AU20 VCCDMI2
10mA 3D3V_S5
1
PANTHER-GP-NF
C2323
SC1U6D3V2KX-L-1-GP
71.PANTH.00U 2
A <Core Design> A
Wistron Corporation
Title
PCH (POWER1)
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1J POWER 10 OF 10 1D05V_VTT
AD49 VCCACLK VCCIO29 N26
1
1mA P26 C2423
VCCIO30 SC1U6D3V2KX-L-1-GP
3D3V_S5 1 R2402 2 VCCDSW3_3 T16 VCCDSW3_3
Do Not Stuff P28 3D3V_S5
2
VCCIO31 D2401
3D3V_AUX_S5 2 R2403 1 V12 T27 CH751H-40PT-GP
DCPSUSBYP VCCIO32
2
Do Not Stuff 3D3V_S0 83.R0304.A8F
DY T29 3D3V_S5 2nd = 83.R0304.D8F
VCCIO33
T38
VCC3_3_5
1
D C2402 T23 5V_S5 D
1
SC1U10V2KX-1GP VCCSUS3_3_7
BH23
VCCAPLLDMI2
1
T24
2
VCCSUS3_3_8 C2424
1D05V_VTT AL29 VCCIO14
V23 SCD1U10V2KX-L1-GP 1 2
2
VCCSUS3_3_9
USB
R2408
AL24 V24 3D3V_S5 10R2J-2-GP
DCPSUS3 VCCSUS3_3_10
1
95mA
P24 C2426
VCCSUS3_3_6 SCD1U10V2KX-L1-GP
2
1
AA19
VCCASW1 C2425
VCCIO34 T26 1D05V_VTT
AA21 SCD1U10V2KX-L1-GP
2
VCCASW2
1mA
AA24 M26 +5VA_PCH_VCC5REFSUS
VCCASW3 V5REF_SUS 3D3V_S0
AA26 D2402
VCCASW4
Clock and Miscellaneous

AN23 CH751H-40PT-GP
DCPSUS4
2
1D05V_VTT AA27 83.R0304.A8F
VCCASW5
903mA VCCSUS3_3_1
AN24 3D3V_S5 2nd = 83.R0304.D8F
AA29 5V_S0
VCCASW6
C2403
SC10U6D3V5KX-1GP
C2404
SC10U6D3V5KX-1GP
C2406
SC1U6D3V2KX-L-1-GP
C2407
SC1U6D3V2KX-L-1-GP
C2408
Do Not Stuff
AA31
1
VCCASW7
1
1
1mA
DY AC26 P34 +5VS_PCH_VCC5REF 1 2
VCCASW8 V5REF R2407
2
2
AC27 10R2J-2-GP
VCCASW9
1
N20 3D3V_S5 C2427
VCCSUS3_3_2 SC1U10V2KX-1GP
AC29
PCI/GPIO/LPC
VCCASW10
N22
2
VCCSUS3_3_3
AC31
VCCASW11
1
P20 C2428
VCCSUS3_3_4 SC1U6D3V2KX-L-1-GP
AD29
VCCASW12
P22
2
C VCCSUS3_3_5 C
AD31
1D05V_VTT VCCASW13
L2402 W21 AA16 3D3V_S0
IND-10UH-218-GP VCCASW14 VCC3_3_1
80mA
1 2 +1.05VS_VCCA_A_DPL W23 W16
VCCASW15 VCC3_3_8
68.10050.10Y
1
1
2nd = 68.10090.10B W24 T34 C2430 C2431
C2409 VCCASW16 VCC3_3_4 SCD1U10V2KX-L1-GP SCD1U10V2KX-L1-GP
SC1U6D3V2KX-L-1-GP W26
2
2
VCCASW17
W29 3D3V_S0
L2403 VCCASW18
80mA IND-10UH-218-GP W31
VCCASW19 VCC3_3_2
AJ2
1 2 +1.05VS_VCCA_B_DPL
1
68.10050.10Y W33 C2429
VCCASW20
1
2nd = 68.10090.10B AF13 SCD1U10V2KX-L1-GP

C2410 VCCIO5
2
SC1U6D3V2KX-L-1-GP +VCCRTCEXT N16
2
DCPRTC 1D05V_VTT
VCCIO12 AH13
1
C2411 VCCVRM_S0 Y49 AH14

SCD1U10V2KX-L1-GP VCCVRM4 VCCIO13
2
1
C2432
AF14 SC1U6D3V2KX-L-1-GP
+1.05VS_VCCA_A_DPL VCCIO6
BD47
2
VCCADPLLA
SATA
VCCAPLLSATA AK1
+1.05VS_VCCA_B_DPL BF47 VCCADPLLB
C2412 AF11 VCCVRM_S0
VCCVRM1
1D05V_VTT AF17
1D05V_VTT VCCIO7
1 2 AF33
VCCDIFFCLKN1
55mA AF34
VCCDIFFCLKN2 VCCIO2
AC16
SC1U6D3V2KX-L-1-GP AG34
VCCDIFFCLKN3 1D05V_VTT
AC17
VCCIO3
1
B B
1D5V_S5
C2414 C2413 AG33 AD17 3D3V_S5
1D05V_VTT VCCSSC VCCIO4
SC1U6D3V2KX-L-1-GP 1 2 U2401
2
1
C2435
SC1U6D3V2KX-L-1-GP 2 1 +VCCSST V16 SC1U6D3V2KX-L-1-GP 1 5
DCPSST 1D05V_VTT VIN VOUT
2 DY
2
GND
C2421
Do Not Stuff
C2416
Do Not Stuff
C2415 3 4
EN NC#4
1
SCD1U10V2KX-L1-GP T17 T21
DCPSUS1 VCCASW22
V19
DCPSUS2 DY DY
C2437
Do Not Stuff
Do Not Stuff
MISC
2
1
1D05V_VTT V21 Do Not Stuff
VCCASW23
1mA DY
CPU
BJ8
2
V_PROC_IO
C2417
SC4D7U6D3V3KX-L-GP
C2418
SCD1U10V2KX-L1-GP
C2419
Do Not Stuff
T19
VCCASW21
1
DY +3VS_+1.5VS_HDA_IO
2
HDA
A22 P32 10mA

RTC
RTC_AUX_S5 VCCRTC VCCSUSHDA
1
C2433
6uA PANTHER-GP-NF SCD1U10V2KX-L1-GP
+3VS_+1.5VS_HDA_IO
2
71.PANTH.00U
1
C2420 DY
Do Not Stuff 1 R2410 2 1D5V_S5
DY Do Not Stuff
2
1 R2409 2 3D3V_S5
Do Not Stuff
DY
1 R2415 2 1D5V_S0_PCH
Do Not Stuff
A A
<Core Design>
Wistron Corporation
Title
PCH (POWER2)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = PCH
PCH1I 9 OF 10
AY4 VSS159 VSS259 H46

AY42 VSS160 VSS260 K18
B11 VSS163 VSS263 K46
B15 VSS164 VSS264 K7
B19 VSS165 VSS265 L18
B23 VSS166 VSS266 L2
D B27 VSS167 VSS267 L20 D
PCH1H 8 OF 10 B31 L26
VSS168 VSS268
H5 VSS0 B35 VSS169 VSS269 L28
B39 VSS170 VSS270 L36
AA17 VSS1 VSS80 AK38 B7 VSS171 VSS271 L48
AA2 VSS2 VSS81 AK4 F45 VSS172 VSS272 M12
AA3 VSS3 VSS82 AK42 BB12 VSS173 VSS273 P16
AA33 VSS4 VSS83 AK46 BB16 VSS174 VSS274 M18
AA34 VSS5 VSS84 AK8 BB20 VSS175 VSS275 M22
AB11 VSS6 VSS85 AL16 BB22 VSS176 VSS276 M24
AC19 VSS13 VSS92 AL27 BC14 VSS183 VSS283 M46
AC2 VSS14 VSS93 AL31 BC18 VSS184 VSS284 M8
AC21 VSS15 VSS94 AL33 BC2 VSS185 VSS285 N18
AC24 VSS16 VSS95 AL34 BC22 VSS186 VSS286 P30
AC33 VSS17 VSS96 AL48 BC26 VSS187 VSS287 N47
AC34 VSS18 VSS97 AM11 BC32 VSS188 VSS288 P11
AC48 VSS19 VSS98 AM14 BC34 VSS189 VSS289 P18
AD10 VSS20 VSS99 AM36 BC36 VSS190 VSS290 T33
AD11 VSS21 VSS100 AM39 BC40 VSS191 VSS291 P40
AD19 VSS24 VSS103 AM46 BD46 VSS194 VSS294 P7
AD24 VSS25 VSS104 AM7 BD5 VSS195 VSS295 R2
C AD26 AN2 BE22 R48 C
VSS26 VSS105 VSS196 VSS296
AD27 VSS27 VSS106 AN29 BE26 VSS197 VSS297 T12
AD33 VSS28 VSS107 AN3 BE40 VSS198 VSS298 T31
AD34 VSS29 VSS108 AN31 BF10 VSS199 VSS299 T37
AD36 VSS30 VSS109 AP12 BF12 VSS200 VSS300 T4
AD37 VSS31 VSS110 AP19 BF16 VSS201 VSS301 W34
AD40 VSS35 VSS114 AP38 BF26 VSS205 VSS305 V11
AD43 VSS37 VSS116 AP42 BD3 VSS207 VSS307 V26
AD8 VSS40 VSS119 AR2 BF40 VSS210 VSS310 V31
AE2 VSS41 VSS120 AR48 BF8 VSS211 VSS311 V36
AE3 VSS42 VSS121 AT11 BG17 VSS212 VSS312 V39
AF10 VSS43 VSS122 AT13 BG21 VSS213 VSS313 V43
AF12 VSS44 VSS123 AT18 BG33 VSS214 VSS314 V7
AD14 VSS45 VSS124 AT22 BG44 VSS215 VSS315 W17
AD16 VSS46 VSS125 AT26 BG8 VSS216 VSS316 W19
AF16 VSS47 VSS126 AT28 BH11 VSS217 VSS317 W2
AF26 VSS50 VSS129 AT34 BH19 VSS220 VSS320 Y12
AF27 VSS51 VSS130 AT39 H10 VSS221 VSS321 Y38
B B
AF4 VSS55 VSS134 AU24 BH35 VSS225 VSS325 Y8
AF42 VSS56 VSS135 AU30 BH39 VSS226 VSS328 BG29
AF46 VSS57 VSS136 AV16 BH43 VSS227 VSS329 N24
AF5 VSS58 VSS137 AV20 BH7 VSS228 VSS330 AJ3
AF7 VSS59 VSS138 AV24 D3 VSS229 VSS331 AD47
AF8 VSS60 VSS139 AV30 D12 VSS230 VSS333 B43
AG19 VSS61 VSS140 AV38 D16 VSS231 VSS334 BE10
AG2 VSS62 VSS141 AV4 D18 VSS232 VSS335 BG41
AG31 VSS63 VSS142 AV43 D22 VSS233 VSS337 G14
AG48 VSS64 VSS143 AV8 D24 VSS234 VSS338 H16
AH11 VSS65 VSS144 AW14 D26 VSS235 VSS340 T36
AH3 VSS66 VSS145 AW18 D30 VSS236 VSS342 BG22
AH36 VSS67 VSS146 AW2 D32 VSS237 VSS343 BG24
AH39 VSS68 VSS147 AW22 D34 VSS238 VSS344 C22
AH40 VSS69 VSS148 AW26 D38 VSS239 VSS345 AP13
AH42 VSS70 VSS149 AW28 D42 VSS240 VSS346 M14
AH46 VSS71 VSS150 AW32 D8 VSS241 VSS347 AP3
AH7 VSS72 VSS151 AW34 E18 VSS242 VSS348 AP1
AJ19 VSS73 VSS152 AW36 E26 VSS243 VSS349 BE16
AJ21 VSS74 VSS153 AW40 G18 VSS244 VSS350 BC16
AJ24 VSS75 VSS154 AW48 G20 VSS245 VSS351 BG28
AJ33 VSS76 VSS155 AV11 G26 VSS246 VSS352 BJ28
AJ34 VSS77 VSS156 AY12 G28 VSS247
AK12 VSS78 VSS157 AY22 G36 VSS248
AK3 VSS79 VSS158 AY28 G48 VSS249
H12 VSS250
PANTHER-GP-NF H18 VSS251
H22 VSS252
A H24 <Core Design> A
71.PANTH.00U H26
VSS253
VSS254
H30 VSS255
H32
H34
VSS256
VSS257
Wistron Corporation
F3 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VSS258 Taipei Hsien 221, Taiwan, R.O.C.
Title
PANTHER-GP-NF
PCH (VSS)
71.PANTH.00U A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
A
Title
Clock(colay)
A4
Husk/Petra -1
5 4 3 2 1
SSID = KBC 5 4 3 2 1
3D3V_S0
C2710
SCD1U10V2KX-L1-GP
C2711
Do Not Stuff
2
1
DY 3D3V_AUX_KBC
3D3V_AUX_KBC
2
EC_VSBY 1 R2705 2
Do Not Stuff
RTC_AUX_S5
C2702
Do Not Stuff
C2703
Do Not Stuff
C2704
SCD1U10V2KX-L1-GP
C2705
SCD1U10V2KX-L1-GP
C2706
SCD1U10V2KX-L1-GP
C2707
SCD1U10V2KX-L1-GP
C2708
Do Not Stuff
C2709
Do Not Stuff
EC_VBKUP 1 R2706 2
1
2
EC_VSBY Do Not Stuff
DY DY DY DY
EC_VBKUP
2
1
D D
115
102
114
19
46
76
88
75
4
U2701A 1 0F 2
U2701B 2 0F 2
AVCC
VDD
VSBY
VBKUP
VCC1
VCC2
VCC3
VCC4
VCC5
KCOL[0..17] 69
28 FAN_TACH1 31 53 KCOL0
GPIO56/TA1 KBSOUT0/GPOB0/JENK# KCOL1
65 WLAN_WAKE# 63 GPIO14/TB1 KBSOUT1/GPIOB1/TCK 52
104 7 PLT_RST# 5,18,31,36,65,71,83,97 19,29,36,37,47 PM_SLP_S3# 64 51 KCOL2
VREF LRESET#/GPIOF7 GPIO1/TB2 KBSOUT2/GPIOB2/TMS KCOL3
LCLK/GPIOF5 2 CLK_PCI_KBC 18 KBSOUT3/GPIOB3/TDI 50
40 AD_IA 97 3 LPC_FRAME# 21,71 68 CHARGE_LED 32 49 KCOL4
PCB_VER_AD GPIO90/AD0 LFRAME#/GPIOF6 LPC_AD3 GPIO15/A_PWM KBSOUT4/GPOB4/JEN0# KCOL5
98 1 29 KBC_BEEP 118 48
ADT_TYPE GPIO91/AD1 LAD3/GPIOF4 LPC_AD2 GPIO21/B_PWM KBSOUT5/GPIOB5/TDO KCOL6
AD_IA
99 GPIO92/AD2 LAD2/GPIOF3 128 LPC_AD[0..3] 21,71 62 GPIO13/C_PWM KBSOUT6/GPIOB6/RDY# 47

69 KB_BL_DET 100 127 LPC_AD1 40 STOP_CHG# 65 43 KCOL7
GPIO93/AD3 LAD1/GPIOF2 LPC_AD0 GPIO32/D_PWM KBSOUT7/GPIOB7 KCOL8
21 RTCRST_ON 108 GPIO5/AD4 LAD0/GPIOF1 126 68 STDBY_LED 22 GPIO45/E_PWM KBSOUT8/GPIOC0 42
MODEL_ID 96 125 INT_SERIRQ 21 28 FAN1_PWM 81 41 KCOL9
GPIO4/AD5 SERIRQ/GPIOF0 GPIO66/G_PWM KBSOUT9/GPOC1/SDP_VIS# KCOL10
92 DGPU_VR_HOT# 95 8 PM_CLKRUN# 19 69 KB_BL_PWM 66 40
GPIO3/AD6 GPIO11/CLKRUN# GPIO33/H_PWM KBSOUT10&P80_CLK/GPIOC2 KCOL11
37,42,48 ALL_POWER_OK 94 9 L_BKLT_EN 17 68 PWRLED 16 39
GPIO7/AD7 GPIO65/SMI# GPIO40/F_PWM KBSOUT11&P80_DAT/GPIOC3
2
29 ECSCI#_KBC 38 KCOL12
C2701 ECSCI#/GPIO54 KBSOUT12/GPIO64 KCOL13
31 LAN_PWR_EN 101 GPIO94/DA0 GPIO10/LPCPD# 124 KBSOUT13/GPIO63 37
Do Not Stuff 65 WLAN_PERST# 105 121 H_A20GATE 22 21 ME_UNLOCK 23 36 KCOL14
1
GPIO95/DA1 GPIO85/GA20 GPIO46/CIRRXM/TRIST# KBSOUT14/GPIO62 KCOL15

106 122 H_RCIN# 22 65 E51_RxD 113 35
DY DISCRETE# GPIO96/DA2 KBRST#/GPIO86 GPIO87/CIRRXM/SIN_CR KBSOUT15/GPIO61/XOR_OUT KCOL16
107 65 E51_TxD 111 34
GPIO97/DA3 GP/I/O83/SOUT_CR/TRIST# GPIO60/KBSOUT16 KCOL17
-1 GPIO57/KBSOUT17 33
31 LAN_WAKE# 79 27 BLON_OUT 49 19 PCH_SUSCLK_KBC 77 54 KROW0

GPIO02 GPIO52/PSDAT3/RDY# GPIO0/EXTCLK KBSIN0/GPIOA0/N2TCK KROW1
38 AD_OFF 6 25 29 AMP_MUTE# 30 55
GPIO24 GPIO50/PSCLK3/TDO GPIO55/CLKOUT/IOX_DIN_DIO KBSIN1/GPIOA1/N2TMS KROW2
41 3D3V_SRC_EN 109 GPIO30/F_WP# GPIO27/PSDAT2 11 WLAN_PWR_EN# 65 KBSIN2/GPIOA2 56
36,97 S5_ENABLE 14 10 DGPU_PWR_EN#_R 2 R2716 1 DGPU_PWR_EN# 18,93 ECRST# 85 57 KROW3
GPIO34/CIRRXL GPIO26/PSCLK2 Do Not Stuff VCC_POR# KBSIN3/GPIOA3 KROW4
86 DGPU_ALARM 15 71 TPDATA 69 58
GPIO36 GPIO35/PSDAT1 KBSIN4/GPIOA4 KROW5
39 BAT_IN# 80 72 TPCLK 69 59
GPIO41/F_WP# GPIO37/PSCLK1 KBSIN5/GPIOA5
70 LID_CLOSE# 17 GPIO42/TCK 5,22 H_PECI 1 R2715 2 PECI 13 PECI KBSIN6/GPIOA6 60 KROW6
KROW[0..7] 69
19 RSMRST#_KBC 20 43R2J-GP 12 61 KROW7
GPIO43/TMS VTT KBSIN7/GPIOA7
1 R2770 2 AD_OFF 19,46 PM_SLP_S4# 21 GPIO44/TDI GPIO17/SCL1/N2TCK 70 BAT_SCL 39,40
1KR2J-L2-GP 86 DGPUHOT 26 69
GPIO51/N2TCK GPIO22/SDA1/N2TMS BAT_SDA 39,40 1D05V_VTT
ECSWI#_KBC 123 67 NPCE885PA0DX-GP
GPIO67N2TMS GPIO73/SCL2 SML1_CLK 20,28,49,86
65 WIFI_RF_EN 82 GPIO75 GPIO74/SDA2 68 SML1_DATA 20,28,49,86
65 BLUETOOTH_EN 83 119 AP_DET# 65
GPIO76 GPIO23/SCL3
19 S0_PWR_GOOD 84 GPIO77 GPIO31/SDA3 120 DC_BATFULL 68
24 PROCHOT_EC
GPIO47/SCL4
1
28 C2712
33R2J-L1-GP GPIO53/SDA4 CHG_ON# 40
21,60 SPI_CS0#_R 1 R2701 2 EC_SPI_CS#_C 90 F_CS0#
SCD1U10V2KX-L1-GP
33R2J-L1-GP 1 R2702 2 EC_SPI_CLK_C
21,60 SPI_CLK_R 92 PSL
2
Do Not Stuff F_SCK
21,60 SPI_SO_R 1 R2703 2 EC_SPI_DI_C 86 74 EC_ENABLE#
33R2J-L1-GP F_SDI&F_SDIO1 PSL_OUT_GPIO71#
21,60 SPI_SI_R 1 R2704 2 EC_SPI_DO_C 87 F_SDIO&F_SDIO0 PSL_IN2_GPI06# 93 KBC_PWRBTN#_R
91 73 AC_IN# 40
GPIO81/F_WP# PSL_IN1_GPI70#
19,97 PM_PWRBTN# 117 GPIO20/TA2/IOX_DIN_DIO

19 AC_PRESENT 112
110
GP/I/O84/IOX_SCLK/XORTR#
44 KBC_VCORF
FAE suggest
61,62 USB_PWR_EN# GPO82/IOX_LDSH/TEST# VCORF PCH_SUSCLK_KBC
C C
1
AGND
GND1
GND2
GND3
GND4
GND5
GND6
C2736
SC20P50V2JN-1GP
C2713
1
SC1U10V3KX-L1-GP
R2727
2
NPCE885PA0DX-GP 100KR2F-L1-GP
18
45
78
89
116
5
103
2
71.00885.A0G
3D3V_S0
PSL Function
RN2708
1 4
2 3 FAN_TACH1
3D3V_AUX_S5 3D3V_AUX_KBC 3D3V_AUX_S5
SRN10KJ-L-GP 3D3V_AUX_KBC
Non-10mW
2
1 R2772 2
1
R2713 0R2J-L-GP
3D3V_AUX_KBC R2714 ECRST# 1 R2758 2 ECSWI#_KBC 330KR2J-L1-GP
20 EC_SWI#
10KR2J-L-GP Do Not Stuff
RN2707 DY 10mW
1
1
SRN100KJ-6-GP RN2709 29,68,82 KBC_PWRBTN# 2 R2757 1 KBC_PWRBTN#_R

E
2
1 4 CHG_ON# PURE_HW_SHUTDOWN#_R 1 4 PURE_HW_SHUTDOWN# C2715 22 EC_SCI# 1 R2759 2 ECSCI#_KBC 470R2J-2-GP
1
2 3 STOP_CHG# 2 3 ECRST#_B B Do Not Stuff Do Not Stuff C2717 S
28,36,86 PURE_HW_SHUTDOWN#
2
DY G2701 DY Do Not Stuff D

SRN10KJ-L-GP Q2701 Q2703
D
Do Not Stuff
C
G
MMBT3906-4-GP Do Not Stuff
84.T3906.A11 EC_SPI_DI_C 1 R2774 2 BLUETOOTH_EN Do Not Stuff
G
2nd = 84.03906.F11 Do Not Stuff 2ND = 84.03413.A31
1
3D3V_AUX_KBC R2773 DY
RN2701
SRN4K7J-8-GP 100KR2J-4-GP EC_ENABLE#
2 3 BAT_SCL
1 4 BAT_SDA PROCHOT_EC G
2
D H_PROCHOT#_EC 1 R2733 2 H_PROCHOT# 5,42 AC_IN# KBC_PWRBTN# EC_ENABLE#

1
Do Not Stuff
S
2 R2775 1 BAT_IN# R2732
100KR2J-4-GP 100KR2J-4-GP Q2702
2N7002K-2-GP
2
RN2705 84.2N702.J31
B 1
2
4
3
ECRST#
S5_ENABLE
2ND = 84.2N702.031
B
SRN10KJ-L-GP
IOAC
3D3V_SRC 3D3V_AUX_KBC
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

3D3V_IOAC
1
SA 100.0K 10.0K 3.0V

R2777 R2780 3D3V_AUX_KBC
10KR2J-L-GP 10KR2J-L-GP SB 100.0K 20.0K 2.75V
1
R2781 SC 100.0K 33.0K 2.48V 3D3V_SRC

2
1
10KR2J-L-GP
R2707
100KR2F-L1-GP
WLAN_PWR_EN# 3D3V_SRC_EN -1 100.0K 47.0K 2.24V ADT_TYPE A/D(PIN99) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE R2709
1
65W Do Not Stuff

2
AP_DET# -1M 100.0K 64.9K 2.0V R2776 65W N/A 100.0K 3.3V UMA
47KR2F-GP
2
1
-2 100.0K 76.8 1.87V 90W 100.0K N/A 0V ADT_TYPE

VDD33 3D3V_IOAC R2782
2
Do Not Stuff -3 100.0K 100K 1.65V 30W 10.0K 100.0K 0.3V DISCRETE#
DY PCB_VER_AD
1
Do Not Stuff
-3M 100.0K 143.0K 1.358V 40W 20.0K 100.0K 0.55V
2
1
R2708
R2710
R2778 R2779 -1M For PCH B3 100.0K 174.0K 1.204V R2726 120W 33.0K 100.0K 0.82V DY 10KR2J-L-GP
10KR2J-L-GP 10KR2J-L-GP 100KR2F-L1-GP Muxless
64.17435.6DL Reserved 47.0K 100.0K 1.06V
2
2
-4 100.0K 215.0K 1.047V Reserved 64.9K 100.0K 1.3V

LAN_WAKE# WLAN_WAKE#
3D3V_SRC
1
R2711
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR SERIES RESISTOR VOLTAGE 100KR2F-L1-GP
14"(AMD) 30K 100K 40.2K 0.7615
2
15"(AMD) 30K 100K 40.2K 0.4838 MODEL_ID 1 R2717 2 MODEL_ID_R 49
40K2R2F-GP
1
14"(NV) 20K 100K 40.2K 0.55
R2712
A 15"(NV) 20K 100K 40.2K 0.3888 20KR2F-L-GP

A
2
pin 5 is NC, the model is 14"
pin 5 is GND, the model is 15"
<Core Design>
Wistron Corporation
Title
KBC NPCE885
Custom
Husk/Petra -1
5 4 3 2 1
SSID = Thermal 3D3V_S0
Thermal sensor NCT 7718W
1
2
RN2801 Q2803
SRN2K2J-1-GP 2N7002KDW -GP
84.2N702.A3F
2nd = 84.DM601.03F 5V_S0
*Layout* 15 mil
4
3
D 3D3V_S0 D
NCT_CLK 1 6 SML1_CLK 20,27,49,86
1
C2809
SC4D7U10V3KX-GP
C2808
SCD1U10V2KX-L1-GP
1
2 5 D2802
1
CH551H-30PT-GP
2
C2802 3 4 83.R5003.C8F
2
SCD1U10V2KX-L1-GP 2ND = 83.R5003.H8H
1
3rd = 83.5R003.08F
NCT_DATA
SML1_DATA 20,27,49,86
Layout notice :
Both DXN and DXP routing 10 mil
trace width and 10 mil spacing. 1 R2802 2
Do Not Stuff DY
Q2801 1 R2803 2
6
PMBS3904-1-GP Do Not Stuff DY
84.03904.L06
27 FAN1_PW M 1 2 FAN1_PW M_R 4
P2800_DXP 3D3V_S0 R2806 3 FAN1
U2801 Do Not Stuff FAN_TACH1_C 2 ACES-CON4-19-GP
1
1
C2807
SC2200P50V2KX-2GP
20.F1637.004
3
C R2808 C2806 1 8 NCT_CLK 5V_S0 1 2nd = 20.F1808.004 C

Do Not Stuff Do Not Stuff VDD SCL NCT_DATA
DY 1 2 7 3rd = 20.F1579.004
2
D+ SDA ALERT#
DY 3 D- ALERT# 6
THERM_SYS_SHDN# 4 5
2
5
P2800_DXN T_CRIT# GND
27 FAN_TACH1 1 2 FAN_TACH1_C
2.System Sensor, Put on palm rest NCT7718W -GP
1.H/W T8 Shutdown
D2801
CH551H-30PT-GP
83.R5003.C8F
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
3D3V_S0
1
R2813 3D3V_S0
18K7R2D-GP
R5
1
2
R2809
ALERT# 2KR2F-3-GP
B
R7 B
2
S THERM_SYS_SHDN#
27,36,86 PURE_HW _SHUTDOW N# D
1
G DY 1 R2810 2 3D3V_S0
1
C2811
Do Not Stuff
R2812 Do Not Stuff
Do Not Stuff DY Q2802 IMVP_PW RGD_R 1 2 IMVP_PW RGD 36,42
DY 2N7002K-2-GP R2811
2
84.2N702.J31 Do Not Stuff
2
2ND = 84.2N702.031
SB T8=85 degree
<Core Design>
A A
Wistron Corporation
Title
Thermal NCT7718
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
5V_S0 5VA_S0
1 R2923 2
Do Not Stuff
HDA_CODEC_SDOUT
HDA_CODEC_BITCLK
3D3V_S0 5V_S0 U2902
1
1 R2922 2
0R3J-4-GP C2927 1 5
SC1U10V3KX-L1-GP 19,27,36,37,47 PM_SLP_S3# EN NC#5
G2901 2
2
GND
C2903
SC10U6D3V3MX-L-GP
C2904
SCD1U10V2KX-L1-GP
C2906
SC10U10V3MX-GP
C2907
SCD1U10V2KX-L1-GP
5V_S5 3 VIN VOUT 4
1
1
1 2
1
DY C2934
Do Not Stuff C2935 Do Not Stuff SC10U25V5KX-GP
2
1
FC2901
Do Not Stuff
FC2902
Do Not Stuff
G2903
2
DY 2nd = 74.70247.03F Due to layout concern,
1
D 1 2 D
2
Do Not Stuff
CLOSE TO PIN39 and 46 change to DGND
DY DY
2
AUD_AGND
3D3V_S5
RN2901
DY SRN47K-2-GP-U R2904
1 R2908 2 AUDIO_PC_BEEP 2 1 AUDIO_BEEP 4 1 KBC_BEEP_1 1 Do Not Stuff
2 KBC_BEEP 27
Do Not Stuff C2921 3 2 SPKR_SB_1 1 2
3D3V_S0 HDA_SPKR 21
C2922
SC100P50V2JN-L-GP
SC1U6D3V2KX-L-1-GP R2905
1
Do Not Stuff
1 R2925 2 R2906
21 HDA_SDIN0 1 R2915 2 Do Not Stuff 4K7R2J-L-GP
2
22R2J-2-GP 1D5V_S0
DY
2
1 R2914 2 1 R2902 2 COMBO_MIC_JD#
21 HDA_CODEC_BITCLK
33R2J-L1-GP Do Not Stuff
21 HDA_CODEC_SDOUT 281
D
HDA_CODEC_SYNC 21
DY Q2901
PD# EAPD 2 R2903 1 BSS138-8-GP
HDA_CODEC_RST# 21
Do Not Stuff 84.00138.H31
ACZ_BITCLK_AUDIO_+
1
C2909 2nd = 84.05067.031 5V_S5
DY Do Not Stuff
G
2
S
AC97_DATIN
AUD_3VD_R
C C
1
COMBO_MIC 1 R2919 2 COMBO_MIC_Q
AUDIO_PC_BEEP
22K1R2F-L-GP EC2901
1
Do Not Stuff
2
C2930 DY
3D3V_S0 SC10U6D3V3MX-L-GP
2
58 AUD_SPK_R+_R AUD_AGND
58 AUD_SPK_R-_R
D2906 U2901
10
11
12
1
2
3
4
5
6
7
8
9
R2907 1 2 39K2R2F-L-GP AUD_HP1_JD# 58
2
DIGITAL DVDD-IO
PD#
RESET#
SDATA-OUT
GPIO0/DMIC-DATA
GPIO1/DMIC-CLK
BCLK
DVSS
PCBEEP
DVDD
SDATA-IN
(include thermal pad) SYNC Spilt by DGND
3 AUD_AGND
49 GND
1 48 13 ALC268_SENSE_A MIC2V
EAPD SPDIFO SENSE_A LIN2-L_PORT-B C2925 1
47 EAPD LINE2-L/PORT-E-L 14 2 SC1U16V3KX-5GP
2
46 15 LIN2-R_PORT-B C2924 1 2 SC1U16V3KX-5GP
5V_S0 PVDD2 LINE2-R/PORT-E-R
45 16 MIC2-L_PORT-B C2920 1 2 SC2D2U10V3KX-L-GP R2917
AZ2025-02S-GP SPK-OUT-R+ MIC2-L/PORT-F-L MIC2-R_PORT-B C2919 1
44 SPK-OUT-R- MIC2-R/PORT-F-R 17 2 SC2D2U10V3KX-L-GP RN2902 2K2R2J-2-GP
83.02025.0A1 43 18 ALC268_SENSE_B R2920
1 2COMBO_MIC_JD# SRN1KJ-4-GP
PVSS2 SENSE_B INT_MIC1_R
42 19 271 20KR2F-L-GP CLOSE TO PIN18 4 5 INT_MIC_L_R 49
1
PVSS1 JDREF COMBO_MIC_R
58 AUD_SPK_L-_R 41 SPK-OUT-L- MONO-OUT 20 3 6 COMBO_MIC 58
58 AUD_SPK_L+_R 40 21 MIC1-L_PORT-B C2918 1 2 Do Not Stuff AUD_MIC_L 2 7
SPK-OUT-L+ MIC1-L/PORT-B-L
1
39 22 MIC1-R_PORT-B C2917 1 2 Do Not Stuff AUD_MIC_R 1 8
HPOUT-R/PORT-I-R
5V_S0
HPOUT-L/PORT-I-L
PVDD1 MIC1-R/PORT-B-R
1
5VA_S0 38 AVDD2 LINE1-L/PORT-C-L 23 DY
MIC1-VREFO-R
JDREF C2926 R2927

MIC1-VREFO-L
37 AVSS2 LINE1-R/PORT-C-R 24 DY
2
1
C2910
SCD1U10V2KX-L1-GP
MIC2-VREFO
C2901 TVL-0402-01-AB1-GP 22K1R2F-L-GP

SC1000P50V3JN-GP-U
ANALOG
LDO-CAP
D2905 AUD_AGND
CPVEE
AVDD1
AVSS1
2
2
1
VREF
AZ2025-02S-GP
CBN
CBP
B 83.02025.0A1 R2909 B
20KR2F-L-GP
ALC271X-VB6-CG-GP CLOSE TO PIN19 AUD_AGND AUD_AGND
36
35
34
33
32
31
30
29
28
27
26
25
AUD_AGND 5VA_S0
3
CLOSE TO PIN38 71.00271.B03

MIC2V
LDO_CAP_AUDIO
VREF
AUD_CBN
AUD_CBP
HP_OUT_R_AUD
CPVEE
HP_OUT_L_AUD
AUD_AGND
1
2 PM_SLP_S3# 19,27,36,37,47
C2913
SCD1U10V2KX-L1-GP 3
2
D2901 1 AMP_MUTE# 27
BAW56-5-GP
CLOSE TO PIN35 83.00056.Q11
2
AUD_AGND PD# 2nd = 83.00056.K11

C2911 C2916 1 2 AUD_AGND
SC2D2U10V3KX-L-GP SCD1U10V2KX-L1-GP 2 KBC_PWRBTN# 27,68,82
1
2 R2926 1 INT_MIC_L_R
58 AUD_HP1_JACK_R2
1
10KR2J-L-GP 3
58 AUD_HP1_JACK_L2
CLOSE TO PIN34 1 2 AUD_AGND R2910
C2914 Do Not Stuff 1 HDA_CODEC_RST# 21
AUD_AGND 2 1 C2912 SC10U6D3V5KX-1GP DY
SC2D2U10V3KX-L-GP D2902
2
2
BAW56-5-GP
D2903 83.00056.Q11
AZ2025-02S-GP 2nd = 83.00056.K11
83.02025.0A1 MIC2V
2 3
1 4
RN2904
3
A SRN47J-7-GP A
<Core Design>
Wistron Corporation
Title
Audio Codec
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
Audio AMP
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
Do Not Stuff
27 LAN_PWR_EN 4 3
EN/EN# OC#
2
GND
3D3V_SRC 5 1
1
IN OUT
R3119
Do Not Stuff
LAN_IOAC
C3136
Do Not Stuff
LAN_IOAC
1
U3102
Do Not Stuff
LAN_IOAC
2
D D
2 R3105 1 EVDD10
3D3V_S5 VDD33 LDO 0R2J-L-GP
C3120
SCD1U10V2KX-L-GP
C3127
SC1U6D3V2KX-L-1-GP
1
1
SWR 2 R3120 1
0R2J-L-GP
2 R3101 1 VDD33
2
0R5J-5-GP VDD33 2 R3104 1
C3101
SCD1U10V2KX-L-GP
C3102
Do Not Stuff
C3103
SCD1U10V2KX-L-GP
C3104
Do Not Stuff
C3105
SCD1U10V2KX-L-GP
C3106
Do Not Stuff
C3107
SCD1U10V2KX-L-GP
C3108
Do Not Stuff
C3109
Do Not Stuff
Non_LAN_IOAC 0R2J-L-GP
1
DY
ENSWREG 2 R3102 1 L3101
2
DY DY DY Do Not Stuff REGOUT 1 2 VDD10
DY DY Do Not Stuff
C3113
Do Not Stuff
C3114
Do Not Stuff
C3115
SCD1U10V2KX-L-GP
C3116
SCD1U10V2KX-L-GP
C3117
SCD1U10V2KX-L-GP
C3118
SCD1U10V2KX-L-GP
C3119
SCD1U10V2KX-L-GP
DY
ENSWREG 2 R3103 1
1
0R2J-L-GP
DY DY
2
the Caps close to VDD33 pin
CARD_3V3
LDO
Close to VDDREG pin
SWR
10M/100M/1G_LED#
C3110
SCD1U10V2KX-L-GP
C3111
Do Not Stuff
1
LAN_ACT_LED#
2
VDD33/18
DY RSET
SD_CD#
VDD33
VDD33
VDD10
VDD33
VDD10
XTAL2
XTAL1
RSET
1
R3117
2K49R2F-GP
-1
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
U3101
C 65 C
AVDD33
AVDD33
AVDD10
CKXTAL2
CKXTAL1
AVDD33
XD_CD#
MS_D0/XD_D1
MS_D4/XD_D0
SD_CD#/MS_D5/XD_ALE
VDD33/18
DVDD10
LED0
GPO
LED1
RSET
GND XTAL1 C3125 2 1 SC12P50V2JN-3GP
2
X3101
R3106 XTAL-25MHZ-102-GP
DY Do Not Stuff 82.30020.851
2nd = 82.30020.791
1
1
XTAL2 C3126 2 1 SC15P50V2JN-2-GP
1 48 REGOUT
59 MDI0+ MDIP0 REGOUT VDD33
2 47
59 MDI0- VDD10 MDIN0 VDDREG VDD33
3 46
AVDD10 VDDREG ENSWREG
4 45
59 MDI1+ MDIP1 ENSWREG_H SDA
5 44
59 MDI1- MDIN1 SDA
6 43
59 MDI2+ MDIP2 LED3
7 42
59 MDI2- VDD10 MDIN2 SCL/LED_CR VDD10
8 41
AVDD10 DVDD10 LAN_WAKE#_R
9 40
59 MDI3+ MDIP3 LANWAKE# VDD33 VDD33 3D3V_S0
10 39
59 MDI3- VDD33 MDIN3 DVDD33 ISOLATEB
11 38
VDD33 AVDD33 ISOLATE# PLT_RST#
12 37
2
CARD_3V3 DVDD33 PERST# PCIE_CLK_LAN_REQ#
13 36
CARD_3V3 CLKREQ# SD_WP R3107
14 35
SD_D7/XD_RDY SD_WP/MS_D1/XD_WP# 1KR2J-L2-GP
15 34
1
SD_D6/MS_INS#/XD_RE# MS_BS/XD_CLE
SD_CMD/MS_D6/XD_D3
VDD33/18
SD_D1/MS_CLK/XD_D6
SD_CLK/MS_D3/XD_D4
16 33
SD_D5/XD_CE# VDD33/18
SD_D0/MS_D7/XD_D5
SD_D3/MS_D2/XD_D2
R3109 R3110
1
Do Not Stuff Do Not Stuff ISOLATEB
C3123
SCD1U10V2KX-L-GP
C3124
SCD1U10V2KX-L-GP
C3134
Do Not Stuff
C3135
Do Not Stuff
DY DY
SD_D4/XD_WE#
1
SD_D2/XD_D7
2
R3108
REFCLK_N
REFCLK_P
10M/100M/1G_LED# Do Not Stuff
2
EVDD10
DY DY DY
HSON
HSOP
SDA
HSIN
HSIP
GND
GND
2
RTL8411AA-CG-GP
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
71.08411.A03
PCIE_CLK_LAN#
PCIE_CLK_LAN
PCIE_RXN3_C
PCIE_RXP3_C
B
close to pin33 and pin53 B
EVDD10
SP10
SP5
SP6
SP7
SP8
SP9
C3121
SCD1U10V2KX-L-GP
C3122
SCD1U10V2KX-L-GP
1
1
2
2
close the Pin 18~pin 23
PCIE_RXN3
PCIE_RXP3
PCIE_TXN3
PCIE_TXP3
SP5 2 R3111 1 SP5 SP6 SP7 SP8 SP9 SP10
SD_DATA1 74
0R2J-L-GP
C3128
Do Not Stuff
C3129
Do Not Stuff
C3130
Do Not Stuff
C3131
Do Not Stuff
C3132
Do Not Stuff
C3133
Do Not Stuff
1
1
SP6 2 R3112 1 SD_DATA0 74
0R2J-L-GP DY DY DY DY DY DY
2
SP7 2 R3113 1 SD_CLK 74
0R2J-L-GP
SP8 2 R3114 1 SD_CMD 74

0R2J-L-GP
SP9 2 R3115 1 SD_DATA3 74 PCIE_CLK_LAN_REQ# PCIE_TXP3

0R2J-L-GP PCIE_CLK_LAN_REQ# 20 PCIE_TXP3 20
SP10 2 R3116 1 PCIE_CLK_LAN PCIE_TXN3
SD_DATA2 74 PCIE_CLK_LAN 20 PCIE_TXN3 20
0R2J-L-GP
PCIE_CLK_LAN# PCIE_RXP3
PCIE_CLK_LAN# 20 PCIE_RXP3 20
SD_WP
SD_WP 74
PLT_RST# PCIE_RXN3
PLT_RST# 5,18,27,36,65,71,83,97 PCIE_RXN3 20
SD_CD# LAN_WAKE#_R 1 R3118 2 LAN_WAKE#
SD_CD# 74 LAN_WAKE# 27
Do Not Stuff
LAN_ACT_LED#
LAN_ACT_LED# 59
10M/100M/1G_LED#
10M/100M/1G_LED# 59
A A
<Core Design>
Wistron Corporation
Title
LAN(RTL8411)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
RTS5159 (CARD READER)

Custom
Husk/Petra -1
5 4 3 2 1
A B C D E
4 4
3
(Blanking) 3
2 2
<Core Design>
1
Wistron Corporation 1
Title
Reserved
A4
Husk/Petra -1
A B C D E
5 4 3 2 1
D D
(Blanking)
C C
B B
<Core Design>
A
Title
Reserved
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
USB 3.0 Controller

Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
Power Sequence
1D05V_VTT 1 R3622 2 H_THERMTRIP# 5,22

1KR2J-L2-GP
E
DY Q3601
D 1 R3601 2 H_PW RGD_R B MMBT3904-4-GP D
5,22,97 H_CPUPW RGD Do Not Stuff 84.T3904.C11
C3602
SCD1U10V2KX-L1-GP
2ND = 84.03904.P11
C
1
3rd = 84.03904.L06
5,18,27,31,65,71,83,97 PLT_RST# 2 R3616 1
2
4K7R2J-L-GP
1
28,42 IMVP_PW RGD 1 R3614 2 SYS_PW ROK 19 R3632
Do Not Stuff 2K2R2J-2-GP
1
C3612
2
1 DY Do Not Stuff 2
2
19,27,29,37,47 PM_SLP_S3# 3 3 PURE_HW _SHUTDOW N# 27,28,86
2 41 5V_S5_EN 1 D3601
D3603 BAS16-6-GP
BAS16-6-GP 83.00016.K11
1
83.00016.K11 2ND = 83.00016.F11
R3602
Do Not Stuff
2ND = 83.00016.F11
DY
2 R3603 1 S5_ENABLE 27,97
2
2KR2F-3-GP
C C
ANNIE Run Power U3604

AO4468-GP
84.04468.037 3D3V_S5
5V_S0 2nd = 84.08882.037 5V_S5
5V_S5
1 S D 8
2 S D 7
1 DY 2 3 S D 6 1 R3608 2 PS_S3CNTRL 37
1
RUN_ENABLE C3607 4 G D 5 100KR2J-4-GP

C3603 Do Not Stuff
Do Not Stuff
D
2
DY
1 R3626 2 Q3606
Do Not Stuff U3607 2N7002K-2-GP
AO4468-GP
84.2N702.J31
84.04468.037
3D3V_S0 2nd = 84.08882.037 3D3V_SRC 2ND = 84.2N702.031
1 S D 8
S
2 S D 7
U3610 3 S D 6
RUN_ENABLE_R
G5938TL1U-GP 4 G D 5
5V_S5 RUN_ENABLE 19,27,29,37,47 PM_SLP_S3#
74.05938.09P
19,27,29,37,47 PM_SLP_S3# 6 EN VCC 1

3D3V_S0 5 DC2 GND 2
5V_S0 4 3 U3605
DC1 HV AO4468-GP
B B
84.04468.037
1D5V_S0 2nd = 84.08882.037 1D5V_S3
1 S D 8
2 S D 7
3 S D 6
4 G D 5
-1:EC
1
C3611
U3611 2 SCD01U50V2KX-L-GP
Do Not Stuff
5V_S5_EN 2 R3628 1 3D3V_S5_EN 4 3 3D3V_S5

Do Not Stuff EN/EN# OC#
GND 2
DY 3D3V_SRC 5 IN DY OUT 1
1
C3614
1
Do Not Stuff Do Not Stuff C3615

DY Do Not Stuff
2
DY
2
A A
3D3V_SRC 3D3V_S5 <Core Design>
1 R3629 2 Wistron Corporation

0R5J-5-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Title
Power Plane Enable

Custom
Husk/Petra -1
Date: W ednesday, March 07, 2012 Sheet 36 of 103
5 4 3 2 1
5 4 3 2 1
Close to CPU
S3 Power Reduction Circuit Processor VREF_DQ Implementation
1 R3707 2
DDR_VREF_S3 Do Not Stuff DY
DY 1 R3708 2
Do Not Stuff
S +V_SM_VREF_CNT 9 Q3709
D D
2
D AO3418-GP
R3705
G 100KR2J-4-GP 14 DDR_W R_VREF01_B4 D S M_VREF_DQ_DIMM0_C 9
Q3708 IVB
1
2N7002K-2-GP 84.03418.031
G
84.2N702.J31
2ND = 84.2N702.031
PM_SLP_S3# 19,27,29,36,47
DRAMRST_CNTRL_PCH 20
Close to DIMM
DY
S3 Power Reduction Circuit SM_DRAMPWROK 1 R3714 2
Do Not Stuff
0D75V_S0 Q3710
AO3418-GP
1
15 DDR_W R_VREF01_D1 D S M_VREF_DQ_DIMM1_C 9
R3703
22R2J-2-GP IVB
3D3V_S0 84.03418.031
G
C C
1D05VTT_PW RGD 45,48
2
1
R3712
PS_S3CNTRL_D
DRAMRST_CNTRL_PCH 20
2
Do Not Stuff
DY R3710
Do Not Stuff
2
0D75V_EN_R 2 R3711 1 0D75V_EN 46

Do Not Stuff
D
19,27,29,36,47 PM_SLP_S3# 1 R3716 2
Do Not Stuff Q3701
1
DY C3705 2N7002K-2-GP
Do Not Stuff
DY 84.2N702.J31
2
2ND = 84.2N702.031
S
Close to CPU
36 PS_S3CNTRL S3 Power Reduction Circuit SM_DRAMPWROK
1D5V_S3
1
B R3706 B
1KR2J-L2-GP
Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK
2
1 R3709 2
Do Not Stuff
3D3V_S5 1D5V_S3 DY S3 Power Reduction Circuit
3D3V_S5 1D5V_S0 SM_DRAMRST#
1
5 SM_DRAMRST# S
R3713 R3721
1
200R2F-L-GP DY Do Not Stuff D SM_DRAMRST#_D 1 R3718 2 DDR3_DRAMRST# 14,15

R3702 Do Not Stuff
1
200R2F-L-GP G
2
19 PM_DRAM_PW RGD 1 5 C3702

IN B VCC Do Not Stuff
Q3703
2
2
27,42,48 ALL_POW ER_OK 1 R3701 2 0D75V_EN_1 2 IN A
2N7002K-2-GP DY
Do Not Stuff 84.2N702.J31
1
3 4 VDDPW RGOOD_R 1 R3719 2 VDDPW RGOOD 5 2ND = 84.2N702.031

C3701 GND OUT Y 130R2F-1-GP
DY
Do Not Stuff U3701
2
74VHC1G09DFT2G-GP DRAMRST_CNTRL_PCH 20
2
73.01G09.AAH
2nd = 73.01G09.0AB R3720
DY Do Not Stuff 2 1DRAMRST_CNTRL_PCH
C3703
SCD047U16V2KX-1-GP
1
A <Core Design> A
Wistron Corporation
Title
ADAPTER
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
6 AD_JK
NP1
1Pin=3A 1
2
PC3801
SCD1U50V3KX-GP
3
K
4
1
5 PC3802
1
NP2 SC1U50V5ZY-1-GP
7
2
A
DCIN1
ACES-CON5-27-GP
C C
20.F2182.005 D3801
2nd = 20.F2198.005 P6SBMJ27APT-GP
83.P6SBM.DAG
2nd = 83.P6SMB.JAG
3rd = 83.P6SMB.CAG
AD_JK AD+
PU3802
1 S D 8
2 S D 7
3 S D 6
PWR_AD+_2 4 G D 5
QM3005S-GP
2
B B
PR3807
200KR2F-L-GP
PC3805
1
SC1U50V5ZY-1-GP
2
R2
E
3 PWR_ADJK_EN B R1
1 R1 C
27 AD_OFF
2
1
R2
PQ3801 PQ3802 PR3808
LTC024EUB-FS8-GP PDTA124EU-1-GP 100KR2J-4-GP
84.00024.A1K 84.00124.K1K
2ND = 84.00124.H1K 2nd = 84.00024.01K
2
3rd = 84.05124.011 3rd = 84.05124.A11
<Core Design>
Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Title
DCIN JACK
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
BATTERY CONNECTOR
Do Not Stuff TP3901 1 BT+
D Do Not Stuff TP3902 1 D

BT+ Delete PR3901
Wayler , 2011-0116
Do Not Stuff TP3903 1 BI
Do Not Stuff TP3904 1 BATA_SCL_1

Do Not Stuff TP3905 1 BATA_SDA_1
1
BT+
R3902
Do Not Stuff
1
Do Not Stuff TP3906 1 BAT_IN#_1
3
5
7
Do Not Stuff TP3907 1 BI PC3901 PC3902
2
SCD1U50V3KX-GP SC2200P50V2KX-2GP
2
2
4
6
8
27 BAT_IN# 4 5 BAT_IN#_1
3 6 BATA_SDA_1
27,40 BAT_SDA
C 2 7 BATA_SCL_1 C
27,40 BAT_SCL BAT2
1 8
ACES-CONN8D-GP
PN3901 20.81633.008
SRN33J-7-GP
PD3901
K
MMPZ5232BPT-GP-U BAT_IN#_1
83.5R603.D3F
2ND = 83.5R603.K3F
3rd = 83.5R603.Q3F
A
B B
<Core Design>
A
Title
BATT CONN
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
AD+_TO_SYS DCBATOUT
SSID = Charger PU4001
PR4004
BT+
AD+ 8 D S 1
7 D S 2 1 2 1 S D 8
1
6 D S 3 2 S D 7
5 D G 4 PR4021 D01R3721F-GP-U AD+ 3 S D 6
100KR2F-L2-GP 4 G D 5
P1403EV8-GP
A8( ANNIE/ASTRO)
K
1
PR4023 84.P1403.B37 PU4002
1
PR4014,PR4016 10KR2F-L1-GP
AD+_G_2
PG4002
P1403EV8-GP
84.P1403.B37 SA:change the ESD
1
PR4022 PG4001 Do Not Stuff
Do Not Stuff PD4002
A
1
AD+ total power R1 R2 10KR2F-L1-GP PR4009 PR4011 P6SBMJ27APT-GP
DC_IN_D
1 DY 2 83.P6SBM.DAG
D Do Not Stuff 470KR2J-L1-GP D
2nd = 83.P6SMB.JAG
SCD1U50V3KX-GP
65w 12.4K 100K PQ4001 3rd = 83.P6SMB.CAG
AD+_G_1
1 2
2
3 4
80w 41.2k 100K PC4003
PWR_CHG_ACOK SCD1U25V2KX-GP
2 5 -1:EC
PC4002
2nd = 84.DM601.03F DCBATOUT
90w 60.4k 100K 1 6
1
AD+
2N7002KDW-GP
120w 118k 100K
2
84.2N702.A3F
PWR_CHG_ACN
PWR_CHG_ACP
1
1 2 PWR_CHG_VCC PC4004 PWR_CHG_REGN PC4005 PC4025 PC4006
1
SCD1U50V3KX-GP
CHG_AGND
2
1
Do Not Stuff
SC4D7U25V5KX-GP
SCD1U25V2ZY-1GP
PR4006 PR4015 10R5J-GP PC4001
5
6
7
8
SCD47U25V3KX-1GP
2
D
D
D
D
316KR2F-L-GP CHG_AGND PR4008 PD4003 PC4009 PU4004 DY
2
1 2PWR_CHG_BTST_R
K A 1 2 FDMC8884-GP-U
CHG_AGND 84.08884.A37
2
SCD047U25V2KX-GP
PU4003 0R3J-4-GP CH520S-30PT-GP SC1U16V3KX-2GP
2nd = 84.00412.037
PC4017
83.R0203.08F
ACN
ACP
1
3D3V_AUX_S5
G
S
S
S
PWR_CHG_IOUT 20 2nd = 83.1R003.I8F
VCC
1
PR4031
4
3
2
1
PR4007
MAG. 7*7*3
2
R1 12K4R2F-GP 10KR2F-L1-GP PWR_CHG_ACDET6 17 PWR_CHG_BTST
ACDET BTST
1
PR4007 change to 12K4 DCR: 37~40mOhm

1
PR4010
Idc : 5.5 A , Isat : 10A
2
49K9R2F-L-GP PC4010 Wayler , 2012-0112STOP_CHG
REGN
16
SCD01U50V2KX-L-GP PL4001
Charger Current=1.4~3.6A
2
1
PR4002 3 IND-4D7UH-173-GP
2
PR4001 CMPOUT PWR_CHG_HIDRV

HIDRV
18 68.4R71C.10K BT+
R2 100KR2F-L1-GP 3D3MR2J-GP 1 2 2nd = 68.4R710.20D
4
DY PR4017
C CMPIN PWR_CHG_PHASE PC4013 BT+_R C
19 1 2 1 2
2
2
CHG_AGND PWR_CHG_CMPIN PHASE Do Not Stuff
Do Not Stuff
D01R3721F-GP-U
Do Not Stuff
PWR_CHG_BAT_SCL 9 15 PWR_CHG_LODRV
SCL LODRV
2
PG4003
CHG_AGND
PG4004
5
6
7
8
PWR_CHG_BAT_SDA 8
SDA
D
D
D
D
3D3V_AUX_S5 PR4025 PU4005
1
Do Not Stuff
10R2F-L-GP FDMC8884-GP-U
13 PWR_CHG_SRP 1 2 84.08884.A37 PC4020 PC4021 PC4022 PC4023
SRP
1
1
PC4019
PWR_CHG_ILIM 10 2nd = 84.00412.037
ILIM
1
PR4020 12 PWR_CHG_SRN 1 2
SRN DY
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
100KR2F-L2-GP
G
S
S
S
PR4024
2 SCD1U50V3KX-GP
PWR_CHG_AD_OFF 11 7D5R2F-GP
4
3
2
1
NC#11
2
74.24727.073 CHG_AGND
D
PQ4007 1 PR4005 5
ACOK# IOUT
7 PWR_CHG_IOUT 1 2 AD_IA 27
2N7002A-7-GP DY Do Not Stuff PR4013 PWR_CHG_CSOP_1
GND
GND
SCD1U25V2KX-GP
Do Not Stuff
G PWR_CHG_REGN
CHG_ON# 27
Do Not Stuff
BQ24727RGRR-GP
PR4028
2
21
14
1
PR4026
1
SC220P50V2JN-3GP
PC4016
S
PC4011
DY Do Not Stuff
2 1 Delete PG4005
2
1
2
1
BATT_SENSE_G Wayler , 2011-0116
CHG_AGND PG4013
DY
SCD1U25V2KX-GP
Do Not Stuff
2
3D3V_AUX_S5
1
PC4012
CHG_AGND
B 3D3V_AUX_S5 B
2
1
PR4032 PR4033
Do Not Stuff DY DYDo Not Stuff 3D3V_AUX_S5 CHG_AGND

1
CHG_AGND
PR4029
2
1
2 1 PWR_CHG_BAT_SCL 100KR2J-4-GP
27,39 BAT_SCL
PG4008 Do Not Stuff PR4030
100KR2J-4-GP
2
2 1 PWR_CHG_BAT_SDA
27,39 BAT_SDA
PG4010 Do Not Stuff
2
PWR_CHG_ACOK
27 AC_IN#
D PQ4006 27 STOP_CHG#
2N7002A-7-GP
G AC_IN#
D
PQ4008
2N7002A-7-GP
S
G STOP_CHG
S
A A
<Core Design>
Wistron Corporation
Title
CHARGER BQ24707A
Custom
Husk/Petra -1
Date: Tuesday, March 06, 2012 Sheet 40 of 108
5 4 3 2 1
A B C D E
DCBATOUT_2
3D3V_SRC 3D3V_PWR
K
PG4109
1 2 PD4105
DCBATOUT_2 PWR_3D3V_DCBATOUT MMPZ5228BPT-GP
Do Not Stuff
5V_PWR 5V_S5
PG4110 Vz=3.9V
1DCBATOUT_PD1A
1 2 PG4101 PG4115
1 2 DCBATOUT_2 PWR_5V_DCBATOUT 1 2
Do Not Stuff
PG4111 Do Not Stuff PG4105 Do Not Stuff
1 2 PG4102 PWR_5V3D3V__EN0 1 2 PG4116
1 2 DCBATOUT_2 1 2
1
1 2 PG4103 PR4128 1 2 PG4117
1 2 PR4125 PU4106 40K2R2F-GP 1 2
Do Not Stuff 100KR2F-L1-GP 4 3 Do Not Stuff
2
4 1 2 PG4104 5 2 PWR_5V3D3V__EN0_G2 1 2 PG4118 4
2
1 2 1 2
Do Not Stuff PWR_5V3D3V__EN0_G5 6 1 Do Not Stuff
1
1
1 2 2N7002KDW-GP PR4127 1 2 PG4119
PR4129 69K8R2F-GP
Do Not Stuff 750KR2F-GP
84.2N702.A3F Do Not Stuff
1 2
Do Not Stuff
2
PG4120
PR4128 change to 40k2
SA_20111004
2
1 2
SA_20111004 Change to 84.2N702.A3F
PR4127 change to 69k8
Do Not Stuff
DCBATOUT_2 Wayler.2012-0131
PWR_3D3V_DCBATOUT
PU4103 change to cost down version PWR_5V_DCBATOUT
1
PC4113
SA_20111006
1
PC4129 PC4112 PC4110 SCD01U50V2KX-L-GP

D PC4111 PC4114 PC4116
2
SCD1U25V3KX-L-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SCD1U25V3KX-L-GP
DY Iomax=6A
8
7
6
5
5
6
7
8
1
Do Not Stuff
SC4D7U25V5KX-GP
PU4103 D
2
D
D
D
D
D
OCP>9A
D
D
D
PU4101 RT8223MZQW-GP-U PU4104
74.08223.B73 FDMC8884-GP-U
16
FDMC8884-GP-U
2
84.08884.A37 84.08884.A37
2nd = 84.08067.A37 2nd = 84.08067.A37
VIN
PR4105 PR4106
G
S
S
S
PC4115 2D2R3-1-U-GP 2D2R3-1-U-GP PC4118
S
S
S
G
PL4101 S G SCD1U25V3KX-L-GP SCD1U25V3KX-L-GP G S PL4102

1
2
3
4
4
3
2
1
IND-2D2UH-122-GP 1 2PWR_3D3V_BOOT1
1 2PWR_3D3V_BOOT2 9 22 PWR_5V_BOOT1 1 2PWR_5V_BOOT1_1 1 2 IND-2D2UH-122-GP
BOOT2 BOOT1
68.2R21B.10J 68.2R21B.10J
3D3V_PWR 2nd = 68.2R210.20B PWR_3D3V_UGATE2 10 21 PWR_5V_UGATE1 2nd = 68.2R210.20B 5V_PWR
UGATE2 UGATE1
2 1 PWR_3D3V_PHASE2 11 20 PWR_5V_PHASE1 1 2
PHASE2 PHASE1
PWR_3D3V_LGATE2 PWR_5V_LGATE1
D
D 12
LGATE2 LGATE1
19
1
PC4119
8
7
6
5
5
6
7
8
SCD1U50V3KX-GP
D
D
D
D
D
D
D
D
PG4121 PU4102 PWR_3D3V_VOUT2 7 24 PWR_5V_VOUT1 PU4105 PG4124 PC4120

2
1
VOUT2 VOUT1
Do Not Stuff
Do Not Stuff
SCD1U50V3KX-GP
FDMC8878-GP FDMC8878-GP
PT4101 84.08878.A30 PWR_3D3V_FB2 PWR_5V_FB1 84.08878.A30 PT4102
3
Iomax=5A SE220U6D3VM-30-GP 2nd = 84.08065.B37
5
FB2 FB1
2
2nd = 84.08065.B37 SE220U6D3VM-30-GP 3
2
3D3V_S5
OCP>7.5A
2
2
G
S
S
S
2 PWR_5V3D3V__EN0 13
1 DY 23
S
S
S
G
PR4109
Do Not Stuff EN PGOOD
77.52271.09L G S
1
2
3
4
4
3
2
1
1
PWR_3D3V_ENTRIP2 6 PWR_5V_ENTRIP1
2ND = 77.52271.07L S G PWR_5V3D3V_VREF ENTRIP2 ENTRIP1
1 PR4110
77.52271.09L
3 15 Do Not Stuff 2ND = 77.52271.07L
REF PGND
DY
1
SCD22U10V2KX-1GP
PC4122
PWR_5V3D3V_TONSEL 4 25
2
TONSEL GND
3V_5V_POK 19
2
PWR_5V3D3V_SKIPSEL 14 18 PWR_5V3D3V_ENC
SKIPSEL ENC
VREG3
VREG5
PR4111 7.32K changee to 6.8K
1
PR4112 DY
17
PR4111 5V_AUX_S5
6K8R2F-2-GP Do Not Stuff 3D3V_AUX_S5 3D3V_AUX_S5
R1 1PWR_5V3D3V_VREG3
1PWR_5V3D3V_VREG5
PG4122 PG4123
1 2 1 2
R1
2
1 2
1
PWR_3D3V_FB2_R 1 PR4120 2 PR4114
PC4124 Do Not Stuff Do Not Stuff Do Not Stuff
1
Do Not Stuff Do Not Stuff PR4115
DY DY 33KR2F-2-GP
2
1 2
PWR_5V_FB1_R
1
2
PR4116 PC4125 PC4126 PC4128 DY
R2
SC4D7U6D3V5KX-3GP
SC10U10V3MX-GP
10KR2F-L1-GP Do Not Stuff

Vout = 2 * ( 1 + R1/R2 )
2
R2
2
= 2 * ( 1 + 6.8K / 10K) Modify Description

2
1
Close to VFB Pin (pin5) = 3.36V PR4119
21K5R2F-GP
Modify Description Vout = 2 * ( 1 + R1/R2 )
2
= 2 * ( 1 +33K / 21K)
PWR_5V3D3V_VREF 2 PR4118 1 Close to VFB Pin (pin2)
Do Not Stuff = 5.14V
2 2
3D3V_AUX_S5 2 PR4121 1
Do Not Stuff
TONSEL CH1 CH2
GND 200kHz 250kHz
VREF 300kHz 375kHz
SB_20120116 VREG3 or VREG5 400kHz 500kHz
5V OCP setting
SKIPSEL VREG3 or VREG5 VREF(2V) GND
PWR_5V_ENTRIP1_R
1 PR4107 2 PWR_5V_ENTRIP1
84K5R2F-GP
Operating OOA Auto Skip Auto Skip
84.2N702.A3F PWM only
2nd = 84.DM601.03F Mode
1
3rd = 84.2N702.F3F PC4127

Do Not Stuff
PQ4101 -1:EC DY
2
3D3V OCP setting

4 3
36 5V_S5_EN 1 PR4122 2 PWR_5V_EN 5 2 PWR_3D3V_EN 2 PR4123 1 3D3V_SRC_EN 27

PWR_3D3V_ENTRIP2 1 PR4108 2 PWR_3D3V_ENTRIP2_R 6 1 DY
88K7R2F-GP
1
2N7002KDW-GP PC4108
PC4109 Do Not Stuff
Do Not Stuff DY
2
DY
SB_20120116
1 PWR_5V_EN 1
1 PR4130 2 PWR_3D3V_EN
0R2J-L-GP
<Core Design>
Wistron Corporation
Title
5V/3D3V(RT8223M)
Custom
Husk/Petra -1
Date: Wednesday, March 07, 2012 Sheet 41 of 103
A B C D E
5 4 3 2 1
SSID = CPU.Regulator
D D
1 2 VSSSENSE_R
8 VSSSENSE VSS_AXG_SENSE_R
PR4245 Do Not Stuff 1 2 VSS_AXG_SENSE 9
PC4201 PR4243 Do Not Stuff
1 2 PC4202
1 2
SCD01U50V2KX-L-GP
SCD01U50V2KX-L-GP
DY
1 2 Do Not Stuff PC4204
PC4203 2 1 DY
1 2 PWR_VCORE_FB_4 Do Not Stuff
8 VCCSENSE
PR4246 Do Not Stuff
PWR_VCORE_FBG_4 1 2 VCC_AXG_SENSE 9
PWR_VCORE_FB_3 PR4244 Do Not Stuff
PC4205
Setting LoadLine PWR_VCORE_FBG_3
1 2 1 PR4201 2 PC4206
2KR2F-3-GP Do Not Stuff
Setting GFX LoadLine
2 PR4202 1 2 1
SC680P50V2KX-2GP 2KR2F-3-GP DY
PC4207 PR4203 PR4204 PR4205 2K61R2F-1-GP
1 2 1 2 1 2 PR4206 PC4208
267KR2F-GP 1K91R2F-1-GP 1 2 1 267KR2F-GP
2 2 1
SC150P50V2KX-GP PWR_VCORE_FB_2
PWR_VCORE_FB_1 PWR_VCORE_FBG_1 PWR_VCORE_FBG_2 SC150P50V2KX-GP
PC4210
PC4209 PR4207 PR4208
PWR_VCORE_COMP 1 2 1 2 1 499R2F-2-GP
2 1 499R2F-2-GP
2 1 2 1 2 PWR_VCORE_COMPG
SC33P50V2JN-3GP PC4211 SC470P50V2KX-3GP PC4212
1
SC470P50V2KX-3GP SC47P50V2JN-3GP
PR4209 PR4210
42K2R2F-L-GP 5V_S5 154KR2F-GP
2
Setting IMax
2
PR4211 PR4212
1R2F-GP Do Not Stuff
43 VSUM+
C C
1
1
PR4213
2K61R2F-1-GP PWR_VCORE_BOOT1
PWR_VCORE_BOOT1 43
PWR_VCORE_VDD
PWR_VCORE_VCCP
PWR_VCORE_FB
PWR_VCORE_FBG
1
1
PC4214 PC4215
2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PWR_VCORE_BOOTG
PWR_VCORE_BOOTG 44
1
1
ISUMP_1 PR4214 PC4216 PC4213
2
SCD15U10V2KX-GP
11KR2F-L-GP 3D3V_S0
SCD01U50V2KX-L-GP
Place near choke of Phase1 SA:change power plane

2
2
1
PR4215
NTC-10K-27-GP
1
PR4218
25
26
17
38
16
39
20
30
31
2
453R2F-1-GP PU4201 PR4216 PR4217

1 2 1K91R2F-1-GP 1K91R2F-1-GP
VCCP
FB
FBG
RTNG
BOOT1
BOOT2
BOOT1G
VDD
RTN
43 VSUM-
2
1
PC4217
Setting OCP
14 19 IMVP_PWRGD 28,36
SCD1U10V2KX-L-GP PWR_VCORE_ISUMN ISUMP PGOOD PWR_VCORE_GOODG
15 36
2
ISUMN PGOODG
PWR_VCORE_ISUMPG 1 18 PWR_VCORE_COMP
44 PWR_VCORE_ISUMPG ISUMPG COMP
PWR_VCORE_ISUMNG 40 37 PWR_VCORE_COMPG
44 PWR_VCORE_ISUMNG ISUMNG COMPG
13 21 PWR_VCORE_UGATE1
PWR_VCORE_ISEN2 ISEN1 UGATE1 PWR_VCORE_UGATE1 43
12 29
5V_S5 ISEN2 UGATE2
11
ISEN3/FB2 PWR_VCORE_LGATE1
23
LGATE1 PWR_VCORE_LGATE1 43
2 27
PWR_VCORE_ISEN2 PWR_VCORE_ISEN2G ISEN1G LGATE2
1 2 3
PR4239 Do Not Stuff ISEN2G PWR_VCORE_LGATEG
34
LGATE1G PWR_VCORE_UGATEG PWR_VCORE_LGATEG 44 5V_S5
32
PWR_VCORE_PHASE1 UGATE1G PWR_VCORE_UGATEG 44
43 PWR_VCORE_PHASE1 22
PWR_VCORE_ISEN2G PHASE1
1 2 28
PR4241 Do Not Stuff PHASE2 PWR_VCORE_PWM3
24 1 2
PWR_VCORE_PHASEG PWM3 PWR_VCORE_PWM2G PR4220 1
44 PWR_VCORE_PHASEG 33 35 2 Do Not Stuff
PHASE1G PWM2G PR4240 Do Not Stuff
VR_HOT#
DY
ALERT#
VR_ON
1
NTCG
SCLK
B PC4224 B
GND
NTC
SDA
SC1U10V2KX-1GP
2
ISL95836HRTZ-2-GP
10
4
41
PR4221 PR4222 74.95836.B33
1 3K83R2F-GP
2 1 NTC-470K-9-GP
2
PWR_VCORE_VR_HOT#
PWR_VCORE_VR_ON
PWR_VCORE_SCLK
PWR_VCORE_SDA
NTC Place near high side MOSFET of Phase1 PR4223

PWR_VCORE_NTC_1 1 27K4R2F-GP
2 PWR_VCORE_NTC
PR4224 PR4225
1 3K83R2F-GP
2 1 NTC-470K-9-GP
2 PWR_VCORE_NTCG
1D05V_VTT
NTC place near high side MOSFET of Phase1 PR4226
PWR_VCORE_NTCG_1 2 27K4R2F-GP
1
Close to VR
2
PR4229 PC4225
1
1
1 499R2F-2-GP
2 PR4227 SCD1U10V2KX-L-GP
1D05V_VTT
1
PR4228 PR4230
75R3J-L-GP 54D9R2F-L1-GP 130R2F-1-GP
1 2 PC4226
2
SCD1U10V2KX-L-GP
5,27 H_PROCHOT# 1 PR4231 2

Do Not Stuff SA:change to be 0603
8 VR_SVID_ALERT#
8 H_CPU_SVIDCLK 1 PR4232 2
Do Not Stuff
8 H_CPU_SVIDDAT 1 PR4233 2
A Do Not Stuff A
27,37,48 ALL_POWER_OK 1 PR4234 2

Do Not Stuff
<Core Design>
Wistron Corporation
Title
ISL95836_CPU_CORE(1/3)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
BOM control
PW R_VCCCORE1_DCBATOUT
PR4301 Vcc_core
1
1 2D2R3-1-U-GP
2 PW R_VCCCORE_BOOT1_1 PU4301 2 PU4302 2 PC4302 PC4303 PC4304 PC4306 PC4305
42 PW R_VCORE_BOOT1 Iccmax=33A
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
Do Not Stuff
3 3 DY Do Not Stuff
D 1 4 1 4 DY D
Itdc=25A
2
10 10
1
PC4301 9 9
SCD22U25V3KX-GP 7 7 OCP>40A
8 6 8 6
2
5 5
VCC_CORE DCBATOUT PW R_VCCCORE1_DCBATOUT
PL4301 PG4301
42 PW R_VCORE_UGATE1 FDMS3600-02-RJK0215-COLAY-GP Do Not Stuff
42 PW R_VCORE_PHASE1 1 2 1 2
1st = 84.03664.037 1st = 84.03664.037 L-D36UH-1-GP
68.R3610.20A Do Not Stuff
DY 2nd = 68.R3610.20C PT4301 PT4302 PT4303 PG4304
1
Do Not Stuff
ST470U2VDM-5-GP-U1
ST470U2VDM-5-GP-U1
1 2
2 2 2
Do Not Stuff
2
DY PG4307
3
PG4302 PG4303 1 2
Do Not Stuff
Do Not Stuff
42 PW R_VCORE_LGATE1
Do Not Stuff
1
PG4308
BOM control 1 2
Do Not Stuff
PG4309
PT4301 change to 79.33719.2EL
PWR_VCCCORE_VSUM+_1
PWR_VCCCORE_VSUM-_1
Main source 2nd source 1 2
PT4302 , PT4303 change to 79.47719.2FL
Do Not Stuff
84.03664.037 Wayler , 2012-0202 PG4310
C PU4301 C
(FDMS3664S) Mount 1 2
Do Not Stuff
84.03664.037 DY
1
PU4302 PR4307 PT4307
(FDMS3664S) 1 1R2F-GP2 ST22U25VDM-1-GP
VSUM- 42
77.22261.04L
2
PR4311
2 3K65R2F-1-GP
1 VSUM+ 42
-1:EC
PW R_VCCCORE1_DCBATOUT DCBATOUT_2
PG4311
1 2
Do Not Stuff
PG4312
1 2
B Do Not Stuff B
PG4313
1 2
Do Not Stuff
PG4314
1 2
Do Not Stuff
PG4315
1 2
Do Not Stuff
PG4316
1 2
Do Not Stuff
PG4320
1 2
Do Not Stuff
PG4321
1 2
Do Not Stuff
A <Core Design> A
Wistron Corporation
Title
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
PWR_GFXCORE1_DCBATOUT
1
PC4402 PC4403 PC4404
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
2
BOM control
DCBATOUT_2
42 PWR_VCORE_UGATEG
PU4401 2 PU4402 2 DCBATOUT_2 PWR_GFXCORE1_DCBATOUT
3 3
1
1 4 1 4 PT4403
10 10 SE47U25VM-11-GP PG4401
PR4401 9 9 79.47612.3FL 1 2
2
42 PWR_VCORE_BOOTG 1 2D2R3-1-U-GP
2 PWR_GFXCORE_BOOT_1 7 7 2nd = 79.47613.3AL
8 6 8 6 Do Not Stuff
C
5 5 Vcc_gfxcore PG4404 C
DY 1 2
Iccmax=33 A
1
PC4401
SCD22U25V3KX-GP Do Not Stuff
FDMS3600-02-RJK0215-COLAY-GP Do Not Stuff
TDC = 21.5A PG4405
2
1st = 84.03664.037 1st = 84.03664.037 VCC_GFXCORE 1 2

OCP>40A
PL4401 Do Not Stuff
1 2 PG4406
42 PWR_VCORE_PHASEG
L-D36UH-1-GP 1 2
68.R3610.20A PT4401 , PT4402
2nd = 68.R3610.20C Do Not Stuff
42 PWR_VCORE_LGATEG
PT4401 PT4402 Change to 79.33719.2EL PG4407
1
ST330U2VDM-8-GP-U
ST330U2VDM-8-GP-U
1 2
PG4402 PG4403 2 2 Wayler , 2012-0130
Do Not Stuff
Do Not Stuff
Do Not Stuff
PG4408
BOM control
3
1 2
Do Not Stuff
PWR_GFXCORE1_ISN_R
Main source 2nd source PG4409
PWR_GFXCORE1_ISP_R
1 2
84.03664.037 PC4405 DY Do Not Stuff

PU4401 Do Not Stuff PR4402
(FDMS3664S) Mount 2 1 PC4410_1 1 Do Not Stuff
2
1
DY
PC4406
84.03664.037 SCD1U10V2KX-L-GP PR4404
DY
2
PU4402 PR4406 464R2F-GP
(FDMS3664S) 1 1R2F-GP2 VSUMG- 1 2 PWR_VCORE_ISUMNG 42
1
PR4405
B NTC-10K-27-GP B
Setting GFX OCP
1
VSUMG+_1 PR4407 PC4407 PC4408
11KR2F-L-GP SCD15U10V2KX-GP
SCD022U16V2KX-3GP
2
2
1
2
PR4409
2K61R2F-1-GP
2
PR4408
2 3K65R2F-1-GP
1 VSUMG+ 1 2 PWR_VCORE_ISUMPG 42
PR4410 Do Not Stuff
A A
<Core Design>
Wistron Corporation
Title
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SA_20111004 SA_20111013
1D05V_VTT 1D05V_PW R 1D05V_VTT
TPS51218D for 1D05V
DCBATOUT_2 PW R_DCBATOUT_1D05V PG4513
PG4501 1 2
1 2
D Do Not Stuff D
Do Not Stuff PG4514 PG4506
PG4502 1 2 1 2
1 2
PG4503 1 2 1 2
1 2
PG4504 1 2 1 2
1 2
Do Not Stuff PG4509
1 2
Do Not Stuff
PG4518 PG4510
1 2 1 2
Do Not Stuff Do Not Stuff PW R_DCBATOUT_1D05V

PG4511
1 2
Do Not Stuff
1
PG4520 PG4512 PC4504 PC4506 PC4507 PC4511
SCD01U25V2KX-3GP
SCD1U25V3KX-L-GP
1 2 1 2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
2
2
C PU4502 C
D
5
6
7
8
FDMS7698-GP
D
D
D
D
84.07698.037
2nd = 84.08065.037
G
4
S
S
S
PR4516 Iomax = 20.645A
PR4504 change to 54K9 , OCP > 27A Freq=360KHz
3
2
1
3D3V_S0 2 1
2012-0130 , Wayler. TDC = 14.45 A
G S Pana. 0.42uH 7*7*4
10KR2J-L-GP PU4501 PR4505 PC4503 OCP > 26.83A
2D2R3-1-U-GP SCD1U25V3KX-L-GP DCR=1.5mohm
1 11 1D05V_PW R
37,48 1D05VTT_PW RGD PGOOD GND PL4501
1 2 PW R_1D05V_IMAX 2 10 PW R_1D05V_BOOT 1 2 PW R_1D05V_BOOT_R 1 2
PR4504 54K9R2F-L-GP
PW R_1D05V_EN TRIP VBST PW R_1D05V_UGATE
46,47 RUNPW ROK 1 2 3 EN DRVH 9
PR4512 Do Not Stuff PW R_1D05V_VFB 4 8 PW R_1D05V_PHASE 1 2
VFB SW
Do Not Stuff
PW R_1D05V_CCM 5 7 5V_S5 IND-D42UH-4-GP
RF V5IN
暫暫暫暫7x7mm
6 PW R_1D05V_LGATE 68.R4210.20B
OCP setting DRVL
1
PC4505 PC4509
SC1KP50V2KX-1GP
1
Do Not Stuff
PR4503 SD: PC4508
470KR2F-GP TPS51218DSCR-GP-U2
D DY DY
2
1
74.51218.073 C4502 PU4503
2
5
6
7
8
SC1U10V2KX-1GP FDMS0308AS-GP PR4506 DY
2
D
D
D
D
10R2F-L-GP
SB
2
84.00308.B30
2nd = 84.08058.037
2
VTT_SENSE_L PT4504 PT4503
B Do Not Stuff SE330U2VDM-L-GP B
G
4
1
S
S
S
PR4507 Do Not Stuff 79.33719.L01
3
2
1
10KR2F-L1-GP
G S
2
PW R_1D05V_VFB
1
PR4508
20KR2F-L-GP
PR4510
2
VTT_SENSE_L 1
DY 2 VCCIO_SENSE 8
VSS_SENSE_L
Do Not Stuff
1
1
PC4510
DY Do Not Stuff PR4509
2
10R2F-L-GP
PR4511
VSS_SENSE_L 1
DY 2 VSSIO_SENSE 8
Vout=0.704*(1+R1/R2)
2
Do Not Stuff
A <Core Design> A
Wistron Corporation
Title
DC to DC_1D05V(TPS51218D)
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
1D5V_PWR 1D5V_S3 1D5V_PWR

SSID = PWR.Plane.Regulator_1p5v0p75v PG4610 PG4618
1 2 1 2
DCBATOUT_2 PWR_DCBATOUT_1D5V Do Not Stuff Do Not Stuff
PG4601 PG4611 PG4619
1 2 1 2 1 2
Change power source Do Not Stuff Do Not Stuff Do Not Stuff
1
PG4602
2
SA_20111004 1
PG4612
2 1
PG4620
2
D PG4603 PG4613 PG4621 D
1 2 1 2 1 2

PG4614 PG4622
1 2 1 2
RT8207L for 1D5V Do Not Stuff

PG4615
Do Not Stuff
1 2
PR4604 Do Not Stuff
PWR_1D5V_VCC5 PG4616
SC:delete PT4601 2
5D1R2F-GP
1 5V_S5
1 2
1
PC4606 Do Not Stuff
OCP setting SC1U10V2KX-1GP PWR_DCBATOUT_1D5V PG4617
1 2
2
1
1
PC4602
SC1KP50V2KX-1GP
PR4603 Do Not Stuff
PR4603 change to 8K87 , OCP>24A
8K87R2F-2-GP 2012 - 0111 - Wayler PC4614 PC4616 PC4617 PC4615
1
1 2 PWR_1D5V_EN
19,27 PM_SLP_S4# PR4612 Do Not Stuff PWR_1D5V_VDDP 1 PR4605 2 5V_S5 D DY
SCD1U25V3KX-L-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
Do Not Stuff
Do Not Stuff
2
1
1
PC4612 C694
Do Not Stuff SC1U10V2KX-1GP
2
2
DY PWR_1D5V_CS PU4602
5
6
7
8
FDMS7698-GP
D
D
D
D
3D3V_S5 84.07698.037
2nd = 84.08065.037
1
PR4602
G
16
14
15
C 4 C
S
S
S
10KR2F-L1-GP PU4601 PC4609
SCD1U25V3KX-L-GP
G S CYNTEC. 0.68uH 7*7*3 IccMAX = 18.38A
CS
VDDP
VDD
3
2
1
PR4606
Close to pin23 DCR= 5 ~ 5.5 mohm
2
BOOT 22 PWR_1D5V_BOOT 1 2 PWR_1D5V_PHASE_L 1 2 IccTDC = 12.86A
45,47 RUNPWROK 13 2D2R3-1-U-GP Idc=15.5A, Isat=25A
PGOOD OCP > 23.89A
PWR_DCBATOUT_1D5V 1PR4610 2PWR_1D5V_TON 12 21 PWR_1D5V_UGATE
620KR2F-GP TON UGATE
PWR_1D5V_EN 1D5V_PWR
20100728 11 S5 PL4601
PWR_0D75V_EN 10 20 PWR_1D5V_PHASE 1 2
PG4605 S3 PHASE IND-D68UH-36-GP
1 2 PWR_1D5V_VTTIN 23 68.R681A.10A
-1:EC
1D5V_S3 VLDOIN
2nd = 68.R6810.20B
1
Do Not Stuff PWR_1D5V_LGATE PT4602

LGATE
19 D
1
暫暫暫暫7x7mm
PG4606 PC4603 7 PC4613 SE390U2D5VM-12-GP
NC#7
5
6
7
8
Do Not Stuff
SC10U6D3V5MX-L1-GP 77.53971.01L
1 2
DY
2
D
D
D
D
SD: 2nd = 79.3971V.6AL
2
Do Not Stuff 1 18 PU4603
PG4607 VTTGND PGND FDMS0308AS-GP
17
PWR_1D5V_VDDQ NC#17
1D5V_S3 1 2 4
MODE 84.00308.B30
PWR_1D5V_VDDQ
G
VDDQ
8 4 2nd = 84.08058.037
S
S
S
Do Not Stuff
PWR_1D5V_FB
Close to pin23 DDR_VREF_PWR 24 9
3
2
1
VTT FB
1
DY G
1
2 PR4608
VTTSNS
VTTREF
6 30K9R2F-GP PC4610
DEM 5V_S5
Do Not Stuff
Iomax=1A R1 S
GND
GND
2
2
OCP>1.5A RT8207LZQW-GP
25
5
Close to output cap pin1, not 74.08207.D73
1
B inside of the output cap PU4601 change to 74.08207.D73 R2 PR4609
PR4608 change to 30.9K
Vout=0.75*(1+R1/R2) B
30KR2F-GP
2012 - 0111 - Wayler 2012 - 0111 - Wayler
1PWR_1D5V_VTTREF
2
1 PR4607 2 DDR_VREF_S3 Vout setting
Do Not Stuff
Close to PIN9
+0.75VS PC4608
SCD033U16V2KX-GP
Iomax: 1.2A
2
PG4608 1 PR4615 2 PWR_0D75V_EN

37 0D75V_EN Do Not Stuff
0D75V_S0 1 2 DDR_VREF_PWR
Do Not Stuff
PG4609
1 2
Do Not Stuff
1
PC4604 PC4605
SC10U6D3V5MX-L1-GP
Do Not Stuff
2
DY
A A
<Core Design>
Wistron Corporation
Title
RT8207
Custom
Husk/Petra -1
Date: Wednesday, March 07, 2012 Sheet 46 of 103
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_1p8v
D
RT9025 for 1D8V_S0 D
3D3V_S0 5V_S5 SA_20111004

C
Iomax>2.22A C
1
PC4701 PC4702 OCP>3A
SC10U6D3V5MX-L1-GP
SC1U10V2KX-1GP
2
2
PG4701
1 2
Vo(cal.)=1.812V 1D8V_LDO 1D8V_S0
Do Not Stuff
PU4701
PG4702
1 2
NC#5 5
4 6 Do Not Stuff
VDD VOUT
1
3 VIN ADJ 7
19,27,29,36,37 PM_SLP_S3# 1 PR4706 2 PWR_1D8V_EN 2 8 PR4704 PC4704 PC4705 PC4706
EN GND
SC100P50V2JN-L-GP
SC10U6D3V5MX-L1-GP
Do Not Stuff
Do Not Stuff 1 9 20K5R2F-GP
2
45,46 RUNPWROK PGOOD GND
DY
2
RT9025-25ZSP-GP PWR_1D8V_ADJ
1
B 74.09025.B3D B
1
PC4707 2nd = 74.09661.07D
SCD1U10V2KX-L1-GP PR4705
2
16K2R2F-GP
2
<Core Design>
A
Title
LDO_1D8V(RT9025)
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
1011 SA
LDO G978 for VCCSA D85V_PW RGD

1
PR4803
2
10KR2J-L-GP
3D3V_S0
1 2 ALL_POW ER_OK 27,37,42

PR4808 Do Not Stuff
1 DY 2
PR4812 Do Not Stuff
PW R_VCCSA_VID1 1 2 VCCSA_VID1 9
PR4804 Do Not Stuff
PW R_VCCSA_VID0 1 2 VCCSA_VID0 9
PR4805 Do Not Stuff
PW R_VCCSA_EN 1 2
PR4801 Do Not Stuff 1D05VTT_PW RGD 37,45
1
DY PC4810
Do Not Stuff
2
C C
Design Current =4 A
1011 SA
PU4802
0D85V_PW R PWR_VCCSA_VID0 1 9 5V_S0 0D85V_PW R 0D85V_S0

PW R_VCCSA_VID1 D0 GND PW R_VCCSA_EN
2 D1 VEN/MODE 8
3 7 D85V_PWRGD PG4804
VO#3 POK
4 VO#4 VPP 6 1 2
VIN 5
Do Not Stuff
1
1D05V_VTT PC4809 PG4805
G978F11U-GP PG4810 SC1U10V2KX-1GP 1 2
PC4803
SC10U6D3V5KX-1GP
PC4804
SC10U6D3V5KX-1GP
PC4805
Do Not Stuff
PC4806
Do Not Stuff
PWR_G978_VIN
74.00978.031 1 2
2
1
Do Not Stuff
DY DY Do Not Stuff PG4806
PG4811 1 2
2
1 2
1
Do Not Stuff
PC4808 Do Not Stuff PG4807
SC22U6D3V5MX-L3-GP PG4812 1 2
2
1 2
B Do Not Stuff B
Do Not Stuff PG4808
PG4813 1 2
1 2
Do Not Stuff
Do Not Stuff PG4809
1 2
Do Not Stuff
A <Core Design> A
Wistron Corporation
Title
VCCSA LDO G978

A3 -1
Husk/Petra
5 4 3 2 1
SSID = VIDEO
F4902 F4901 DCBATOUT
FUSE-1D1A6V-4GP-U POLYSW-1D1A24V-GP-U
3D3V_S0 69.50007.691 3D3V_CAMERA_S0 DCBATOUT_LCD 69.50007.A31
2ND = 69.50007.771 2nd = 69.50007.A41
1 2
2 1
DCBATOUT_LCD
EC4903
Do Not Stuff
1
2
C4906
SC4D7U25V5KX-GP
C4904
SC1KP50V2KX-1GP
C4903
LCD1 DY SC10U6D3V3MX-L-GP C4905
SCD1U50V3KX-GP
41 pin 5 is NC, the model is 14"
1
NP1
1 pin 5 is GND, the model is 15"
2
3
4
5 MODEL_ID_R 27
6 INT_MIC_L_R 29
7 AUD_GND 1 R4907 2 1D05V_VTT
8 DBC_EN_C R4920 1 EDP 2 0R2J-L-GP DP_HPD0_C 0R2J-L-GP
9 BLON_OUT_C
2
10 LCD_BRIGHTNESS R4902 2 1 33R2J-L1-GP INT_MIC_L_R 3D3V_S0
L_BKLT_CTRL 17
11 3D3V_CAMERA_S0 R4921
12 USB_CAMERA# 1 R4908 2 Do Not Stuff 1KR2J-L2-GP
USB_PN3 18
1
13 USB_CAMERA 1 R4909 2 Do Not Stuff USB_PP3 18
14 CCD GND DY
1
15 LVDSA_CLK 17 EC4906 DP_HPD# 4
2
16 LVDSA_CLK# 17 Do Not Stuff
17 R4916 R4919
18 LVDSA_DATA2 17 Do Not Stuff Do Not Stuff
D
2
19 LVDSA_DATA2# 17 DY DY
20 AUD_GND Q4902
1
21 LVDSA_DATA1 17 2N7002K-2-GP 4 DP_AUXN_CPU
22 LVDSA_DATA1# 17 EDP 84.2N702.J31 4 DP_AUXP_CPU
23 1 R4910 2
24 LVDSA_DATA0 17 Do Not Stuff 2ND = 84.2N702.031
25 LVDSA_DATA0# 17 DY
2
26
S
27 DP_TXP1_CPU_C R4917 R4918
28 DP_TXN1_CPU_C AUD_AGND DP_HPD0_C Do Not Stuff Do Not Stuff
29 DY DY
2
30 DP_AUXP_CPU_C
1
31 DP_AUXN_CPU_C R4922
32 100KR2J-4-GP
33 DP_TXP0_CPU_C EDP
34 DP_TXN0_CPU_C
1
35 EDP#_LVDS_R
36 DP_DDC_DATA_CPU_C
37 DP_DDC_CLK_CPU_C DP_TXP1_CPU_C EDP 1 2 C4916 SCD1U16V2KX-L-GP
LCDVDD DP_TXP1_CPU 4
38 DP_TXN1_CPU_C EDP 1 2 C4915 SCD1U16V2KX-L-GP
3D3V_S0 DP_TXN1_CPU 4
39
40
NP2 DP_AUXP_CPU_C EDP 1 2 C4911 SCD1U16V2KX-L-GP
DP_AUXP_CPU 4
1
42 DP_AUXN_CPU_C EDP 1 2 C4912 SCD1U16V2KX-L-GP

DP_AUXN_CPU 4
C4901 C4902
PS-CON40-GP SCD1U10V2KX-L1-GP SC1U6D3V2KX-L-1-GP
2
DP_TXP0_CPU_C EDP 1 2 C4913 SCD1U16V2KX-L-GP

DP_TXP0_CPU 4
20.F1816.040 DP_TXN0_CPU_C EDP 1 2 C4914 SCD1U16V2KX-L-GP
DP_TXN0_CPU 4
2nd = 20.F1860.040
RN4908
SRN0J-6-GP
1 4 3D3V_S0
LVDS_DDC_DATA_R 17
2 3 LVDS_DDC_CLK_R 17
1
3D3V_S0
RN4907 R4933
Do Not Stuff 10KR2J-L-GP
DP_DDC_DATA_CPU_C 1 4 EDP_DDC_DATA
1
DP_DDC_CLK_CPU_C 2 DY 3 EDP_DDC_CLK
2
R4915 EDP#_LVDS_C 1 R4929 2 EDP#_LVDS 22
Q4904
Layout 40 mil MMBT3904-4-GP
C
2
LCDVDD 84.T3904.C11
3D3V_S0 LCDVDD EDP#_LVDS_R 1 R4923 2 EDP#_LVDS_B B 2ND = 84.03904.P11
150KR2J-L1-GP 3rd = 84.03904.L06
U4901
E
17 LVDS_VDD_EN 1 5
EN IN
1
2
2
GND
3 4
OUT NC#4
C4907
SC4D7U6D3V3KX-L-GP
RNH491
2
1
C4908
SC4D7U6D3V3KX-L-GP
DY Do Not Stuff
1
1
R4914
Do Not Stuff
C4909
Do Not Stuff
SY6288C6AAC-GP Q4901
DY DY 74.06288.B7F Do Not Stuff
EDP: pin35 NC
2
4
3
2nd = 74.09724.09F Do Not Stuff LVDS: pin35 GND

2
2nd = 84.DM601.03F
1
EDP_DDC_CLK 1 6 SML1_CLK 20,27,28,86

2 DY 5
3 4
EDP_DDC_DATA
SML1_DATA 20,27,28,86
DY
27 BLON_OUT 1 R4903 2 BLON_OUT_C 2 R4904 1 3D3V_S0
1KR2J-L2-GP Do Not Stuff
2
R4911
100KR2J-4-GP
DBC_EN_C
C4910
SC100P50V2JN-L-GP
2
1
1
R4906
Do Not Stuff
DY
2
LCD_BRIGHTNESS
DP_TXN1_CPU_C
DP_TXP1_CPU_C
EC4904
Do Not Stuff
EC4905
Do Not Stuff
EC4902
Do Not Stuff
1
DY DY DY
2
<Core Design>
Wistron Corporation
Title
LCD Connector
A2
Husk/Petra -1
5 4 3 2 1
CRT DDCDATA & DDCCLK level shift 5V_CRT_S0 5V_HDMI
1
CRT_DDCDATA_CON CRT_DDCDATA_CON 59 D5001
5V_CRT_S0 CH551H-30PT-GP
CRT_DDCCLK_CON CRT_DDCCLK_CON 59 83.R5003.C8F
3D3V_S0 2ND = 83.R5003.H8H
C5012
SCD01U16V2KX-L1-GP
CRT_R CRT_R 59 3rd = 83.5R003.08F
2
1
CRT_G CRT_G 59
2
1
D D
3
4
CRT_B RN5002 3D3V_S0
CRT_B 59
2
SRN2K2J-1-GP RN5003
CRT_HSYNC_CON CRT_HSYNC_CON 59 SRN10KJ-L-GP
CRT_VSYNC_CON CRT_VSYNC_CON 59
3
4
2
1
4 3 CRT_DDCDATA_CON
17 CRT_DDC_DATA
5 2
6 1
17 CRT_DDC_CLK
CRT_DDCCLK_CON
Q5001
2N7002KDW -GP
84.2N702.A3F
2nd = 84.DM601.03F
L5001
BLM18BB220SN-GP
68.00084.A11
C
17 CRT_RED 1 2 CRT_R C
L5002
BLM18BB220SN-GP
68.00084.A11
17 CRT_GREEN 1 2 CRT_G CRT_DDCDATA_CON
CRT_HSYNC_CON
L5003 CRT_VSYNC_CON
C5008
Do Not Stuff
C5009
Do Not Stuff
BLM18BB220SN-GP CRT_DDCCLK_CON
C5010
Do Not Stuff
68.00084.A11
1
C5011
17 CRT_BLUE 1 2 CRT_B DY DY DY DY Do Not Stuff
2
C5001
SC10P50V2JN-4GP
C5002
SC10P50V2JN-4GP
C5003
SC10P50V2JN-4GP
C5004
SC10P50V2JN-4GP
C5005
SC10P50V2JN-4GP
C5006
SC10P50V2JN-4GP
8
7
6
5
1
2
2
RN5004
SRN150F-1-GP
1
2
3
4
B B
5V_S0
5V_S0
U5001B U5001A
TC74VHCT125AFTQK2M-GP TC74VHCT125AFTQK2M-GP
73.74125.F0B 73.74125.F0B
14
14
4
2nd = 73.74125.L13 2nd = 73.74125.L13

5 6 2 3
CRT_HSYNC1_1 1 R5001 2 CRT_HSYNC_CON

7
10R2J-2-GP
CRT_VSYNC1_1 1 R5002 2 CRT_VSYNC_CON

5V_S0 5V_S0 10R2J-2-GP
U5001C U5001D
TC74VHCT125AFTQK2M-GP TC74VHCT125AFTQK2M-GP
14
10
14
13
73.74125.F0B 73.74125.F0B
2nd = 73.74125.L13 2nd = 73.74125.L13
17 CRT_VSYNC 9 8 CRT_VSYNC1_1 17 CRT_HSYNC 12 11 CRT_HSYNC1_1
A <Core Design> A
7
Wistron Corporation
Title
CRT Connector
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = VIDEO HDMI Level Shifter & CONNECTOR HDMI1

20
22
1 HDMI_DATA2_R
2
3 HDMI_DATA2_R#
4 HDMI_DATA1_R
D 5 D
6 HDMI_DATA1_R#
7 HDMI_DATA0_R
8
9 HDMI_DATA0_R#
HDMI_DATA2_R# 10 HDMI_CLK_R
HDMI_DATA2_R 11
HDMI_DATA0_R# 12 HDMI_CLK_R#
HDMI_DATA0_R 13
14 5V_HDMI 5V_S0
15 DDC_CLK_HDMI
HDMI_DATA1_R 16 DDC_DATA_HDMI
HDMI_DATA1_R# 17
HDMI_CLK_R 18 5V_HDMI 2 1
HDMI_CLK_R#
Close to HDMI Connector 19
23 F5101
change = DIS:499 ohm 21 FUSE-1D1A6V-4GP-U
Fist = UMA Muxless:680 ohm 69.50007.691
8
7
6
5
5
6
7
8
SKT-HDMI23-45-GP 2nd = 69.50007.771
RN5114 RN5115 22.10296.631
SRN499F-GP SRN499F-GP
1
2
3
4
4
3
2
1
17 HDMI_CLK_R# 3D3V_S0
17 HDMI_CLK_R
HPD_HDMI_CON
17 HDMI_DATA0_R#
17 HDMI_DATA0_R
C HDMI_PLL_GND C
Q5102
D
17 HDMI_DATA1_R# MMBT3904-4-GP
C
17 HDMI_DATA1_R Q5105 84.T3904.C11
17 HDMI_DATA2_R# 2N7002K-2-GP 1 R5111 2HDMI_HPD_B B 2ND = 84.03904.P11
150KR2J-L1-GP 3rd = 84.03904.L06
17 HDMI_DATA2_R 84.2N702.J31
E
1
2ND = 84.2N702.031
5V_S0 R5110
Do Not Stuff DY HDMI_HPD_E 1 R5129 2 HDMI_PCH_DET 17
G
S
Do Not Stuff
1
R5112
10KR2J-L-GP
2
D5103
BAW 56-5-GP
83.00056.Q11
2nd = 83.00056.K11
5V_S0_D1 1 5V_S0
B B
5V_S0_D2 2
4
3
Q5106 RN5102
2N7002KDW -GP 3D3V_S0 SRN2K2J-1-GP
84.2N702.A3F
2nd = 84.DM601.03F
1
2
4 3 DDC_CLK_HDMI
17 PCH_HDMI_CLK
DDC_DATA_HDMI
5 2
6 1
17 PCH_HDMI_DATA
A <Core Design> A
Wistron Corporation
Title
HDMI Level Shifter/Connector

A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
LED BACKLIGHT CONVERTER POWER
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
eDP
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
<Core Design>
A
Title
S-VIDEO
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
<Core Design>
A
Title
Reserved
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = User.Interface
D
ITP Connector D
H_CPURST# use pull-up Resistor close

ITP connector 500 mil ( max ),
others place near CPU side.
C C
CPU ITP Connector

TCK(PIN 5)
TCK(PIN AC5)
FBO(PIN 11)
B B
<Core Design>
A
Title
ITP
A4
Husk/Petra -1
5 4 3 2 1
SSID = SATA SATA HDD Connector
-1:EC HDD1
23
NP1 22 21
1 1 NP1
21 SATA_TXP0 DY Do Not Stuff 2 1 C5610 SATA_TXP0_C 2 2

21 SATA_TXN0 DY Do Not Stuff 2 1 C5609 SATA_TXN0_C 3 5V_S0 3
4 4
C5613
SC10U25V5KX-GP
C5604
SCD1U10V2KX-L1-GP
21 SATA_RXN0 DY Do Not Stuff 1 2 C5602 SATA_RXN0_C 5 5
1
21 SATA_RXP0 DY Do Not Stuff 1 2 C5603 SATA_RXP0_C 6 6
7 7
8
2
8 9
9 10
10 11
11 12
12 13
13 14
5V_S0 14 21 SATA_TXP0 SCD01U16V2KX-L1-GP C5614 1 2 SATA_TXP0_3C 15
15 21 SATA_TXN0 SCD01U16V2KX-L1-GP C5615 1 2 SATA_TXN0_3C 16
C5605
Do Not Stuff 16 17
1
1
C5606 17 21 SATA_RXN0 SCD01U16V2KX-L1-GP C5616 1 2 SATA_RXN0_3C 18
SCD1U10V2KX-L1-GP 18 21 SATA_RXP0 SCD01U16V2KX-L1-GP C5617 1 2 SATA_RXP0_3C 19
DY 19 20 NP2
2
2
20 24 23
21
22 HDD2
NP2 FOX-CON20-1-GP-U
24 20.F1546.020
Do Not Stuff
Do Not Stuff
2nd = 22.10300.031
3rd = 22.10300.011
DY
ODD Connector SATA Zero Power ODD

5V_S0
High Active 2A
1
TC5601
ODD1 SC10U25V5KX-GP U5601
DY ZPO ZPO
2
5V_S0 R5603 2 1 ODD_PW R_5V P2 P4 SATA_ODD_DA#_C Do Not Stuff 2 R5602 1 1 8 ODD_PW R_5V
+5V MD SATA_ODD_DA# 18 GND OUT#8
Do Not Stuff ODD P3 P1 SATA_ODD_PRSNT# 22 2 7
+5V DP IN#2 OUT#7
3 IN#3 OUT#6 6
GND S1 22 SATA_ODD_PW RGT 4 EN/EN# OCB 5
1
21 SATA_TXN4 SCD01U16V2KX-L1-GP 1 2 C5611 SATA_TXN4_C S3 S4 TC5602
SCD01U16V2KX-L1-GP 1 A- GND
21 SATA_TXP4 2 C5612 SATA_TXP4_C S2 A+ GND S7 SC10U25V5KX-GP
1
P5 SY6288CCAC-GP
2
GND R5604
GND P6 74.06288.079
21 SATA_RXN4 SCD01U16V2KX-L1-GP 1 2 C5607 SATA_RX4-_C S5 14 Do Not Stuff 2nd = 74.02311.A79
SCD01U16V2KX-L1-GP 1 B- GND
21 SATA_RXP4 2 C5608 SATA_RX4+_C S6 B+ GND 15 DY
2
NP1 NP1
NP2 NP2
SKT-SATA7P-6P-119-GP
22.10300.H31
2nd = 22.10300.H61
3D3V_S0
1
R5605
10KR2J-L-GP
3D3V_S0 RN5601
SRN10KJ-L-GP
2
1 4 SATA_ODD_PW RGT
ZPO 3 SATA_ODD_DA# SATA_ODD_DA#_C
ODD_PWRGT#
2
6
Q5601
ZPO 2N7002KDW -GP
84.2N702.A3F <Core Design>
2nd = 84.DM601.03F
1
Wistron Corporation
SATA_ODD_PW RGT SATA_ODD_DA#
Title
HDD/ODD
A3
Husk/Petra -1
Date: Friday, March 09, 2012 Sheet 56 of 103
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
E-SATA/USB CHARGER
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = AUDIO
LOUT1
D 5 AUD_HP1_JD# 29 D
4
2 AUD_HP1_JACK_R1 1 R5802 2 AUD_HP1_JACK_R2 AUD_HP1_JACK_R2 29
Do Not Stuff
1 AUD_HP1_JACK_L1 1 R5803 2 AUD_HP1_JACK_L2 AUD_HP1_JACK_L2 29
6 Do Not Stuff
3 COMBO_MIC_R1 2 1 COMBO_MIC 29
R5801
1
AUDIO-JK235-GP-U 549R3F-GP
22.10270.661
2nd = 22.10270.941 EC5802 EC5801
Do Not Stuff Do Not Stuff COMBO_MIC
AUD_AGND DY DY
1
EC5803
Do Not Stuff
DY
2
AUD_AGND
5
1 AUD_SPK_L-_R 29
2 AUD_SPK_L+_R 29
C 3 C
AUD_SPK_R-_R 29
4 AUD_SPK_R+_R 29
6
EC5804
Do Not Stuff
EC5805
Do Not Stuff
EC5806
Do Not Stuff
EC5807
Do Not Stuff
1
SPK1
ACES-CON4-29-GP DY DY DY DY
20.F1639.004
2
2nd = 20.F1804.004
3rd = 20.F1352.004
B B
A <Core Design> A
Wistron Corporation
Title
Audio Jack
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = LAN
FT1
27
25
1
2 CRT_R 50
3 CRT_G 50
4
5
6 3D3V_S5 2 3 CONN_PWR
CRT_B 50
XF5901 7 1 4 CONN_PWR2
CRT_DDCCLK_CON 50
31 MDI3+ 2 23 RJ45_7 8
D CRT_VSYNC_CON 50 D
9 RN5901
CRT_DDCDATA_CON 50
1
XRF_TDC1 1 24 MCT1 10 SRN470J-4-GP-U
CRT_HSYNC_CON 50
11 EC5901 EC5902
3 22 RJ45_8 12 Do Not Stuff Do Not Stuff
31 MDI3- 5V_CRT_S0
2
1:1 13 CONN_PWR DY DY
14 CONN_PWR2
31 MDI1+ 5 20 RJ45_3 15 10M/100M/1G_LED# 31
16 LAN_ACT_LED# 31
4 21 MCT2 17 RJ45_4
C5901
SCD1U10V2KX-L1-GP
18 RJ45_7
1
31 MDI1- 6 19 RJ45_6 19 RJ45_5

1:1 20 RJ45_8
21 RJ45_1
2
31 MDI2+ 8 17 RJ45_4 22 RJ45_3

23 RJ45_2
7 18 MCT3 24 RJ45_6
31 MDI2- 9 16 RJ45_5 26
1:1 28
31 MDI0+ 11 14 RJ45_1 SKT-IO24-GP-U

22.10342.011
10 15 MCT4 2nd = 22.10342.021
12 13 RJ45_2
31 MDI0-
1:1
XFORM-24P-63-GP
68.89240.30D
2nd = 68.IH601.301
XRF_TDC1
C C
C5916
Do Not Stuff
1
DY
2
U5904
5V_S5 5
U5901
5V_S5 5
2 TVLST2304AD0-GP
6
TVLST2304AD0-GP
6
31 MDI0+
31 MDI1+
31 MDI0-
31 MDI1-
U5902
U5903 5V_S5 5
5V_S5 5
B B
2
2
TVLST2304AD0-GP
6
TVLST2304AD0-GP
6
31 MDI2+
31 MDI3+
31 MDI2-
31 MDI3-
MCT1
MCT2
MCT3
MCT4
MDI1-
MCT3
MCT4
MCT1
MCT2
MDI0+
MDI1+
MDI2+
MDI3+
MDI0-
MDI2-
MDI3-
LAN_ACT_LED#
1
1
10M/100M/1G_LED# GDT1 GDT2 GDT3 GDT4
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
R5903 R5901 R5902 R5904
2
75R3J-L-GP 75R3J-L-GP 75R3J-L-GP 75R3J-L-GP

A A
EC5910 EC5909 EC5903 EC5904 EC5905 EC5906 EC5908 EC5907

1
2
1
1
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
C5907
SC1KP50V2KX-1GP
C5906
SC1KP50V2KX-1GP
<Core Design>
2
DY DY DY DY
MCT_R
Wistron Corporation
1
C5905
SC1KP2KV6KX-GP Title
2
LAN CONNECTOR
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = Flash.ROM
3D3V_S5
3D3V_S5
C6001
Do Not Stuff
C6002
SCD1U10V2KX-L1-GP
1
1
DY
2
8
7
6
5
D D
RN6001
SRN4K7J-10-GP
1
2
3
4
SPI_HOLD_0#
3D3V_S5
U6001
21,27 SPI_CS0#_R 1 CS# VCC 8

21,27 SPI_SO_R 1 2 SPI_SO 2 7
R6001 33R2J-L1-GP SPI_W P# SO/SIO1 HOLD#
3 WP# SCLK 6 SPI_CLK_R 21,27
4 GND SI/SIO0 5 SPI_SI_R 21,27
EC6003
Do Not Stuff
EC6001
Do Not Stuff
1
1
EC6002 DY MX25L6406EM2I-12G-GP DY DY
Do Not Stuff 72.25640.D01
2
2nd = 72.25Q64.B01
2
C C
Q6001
-1:EC
SSID = RTC CH715FPT-GP
83.R0304.B81 +RTC_VCC
2nd = 83.00040.E81
RTC_AUX_S5
B 1 RTC_PW R 1 R6002 2 1 B
1KR2J-L2-GP PWR
2 GND
3 Width=20mils NP1 NP1
NP2 NP2
2 3D3V_AUX_S5
2
C6003 RTC1
Do Not Stuff BAT-330DG02PSS0301CE-GP-U1
1
DY 62.70001.051
2nd = 62.70001.061
<Core Design>
A

Title
Flash/RTC
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = USB
D D
USB20_V2
C6102
SCD1U16V2KX-L-GP
C6103
Do Not Stuff
1
1
DY
2
USB20_V2
AUSB2
8
L6101 6
FILTER-4P-6-GP 1
C
18 USB_PN0 4 3 USBPN0_C C
2
18 USB_PP0 1 2 USBPP0_C 3
4
5
7
SKT-USB8-3-GP-U
22.10321.B81
2nd = 22.10321.C41
3rd = 22.10321.E01
Low Active 2A
USB20_V2
5V_S5 U6102
1 GND OUT#8 8
2 IN#2 OUT#7 7
3 IN#3 OUT#6 6
C6104
SCD1U16V2KX-L-GP
C6106
Do Not Stuff
4 EN/EN# OCB 5
1
1
C6105 DY
SC1U10V3KX-L1-GP SY6288DCAC-GP
2
2
B
74.06288.A79 B
2nd = 74.02301.079
27,62 USB_PW R_EN#
USB20_V2
AUSB3
8
USB20_V2
6
L6102 1
18 USB_PN9 1 2 USBPN9_C
2
18 USB_PP9 4 3 USBPP9_C 3 TC6102
1
4 SE220U6D3VM-30-GP
FILTER-4P-6-GP 5 77.52271.09L
7
2
SKT-USB8-3-GP-U
22.10321.B81
2nd = 22.10321.C41
3rd = 22.10321.E01
A <Core Design> A
Wistron Corporation
Title
USB Power SW
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
Low Active 2A
USB30_VCCA
D 5V_S5 U6201 D
1 GND OUT#8 8
2 IN#2 OUT#7 7
3 IN#3 OUT#6 6
C6201
SCD1U16V2KX-L-GP
C6203
Do Not Stuff
4 EN/EN# OCB 5
1
1
C6202 DY
SC1U10V3KX-L1-GP SY6288DCAC-GP
2
2
74.06288.A79
2nd = 74.02301.079
27,61 USB_PW R_EN#
AUSB1 USB30_VCCA
SKT-USB13-23-GP
USB30_VCCA
4 3 USB_PN1_L 2 1
18 USB_PN1 D- VBUS
USB_PP1_L 3 D+
18 USB_PP1 1 2
C 5 TC6201 C
L6201 STDA_SSRX- USB30_RN2 18 SE220U6D3VM-30-GP
7 GND_DRAIN STDA_SSRX+ 6 USB30_RP2 18
1
FILTER-4P-6-GP 77.52271.09L
8 USB30_TN0_C 2 1 SCD1U16V2KX-L-GP C6206
STDA_SSTX- USB30_TN2 18
10 9 USB30_TP0_C 2 1 SCD1U16V2KX-L-GP C6207
USB30_TP2 18
2
CHASSIS#10 STDA_SSTX+
11 CHASSIS#11
4 GND CHASSIS#12 12
CHASSIS#13 13
22.10339.521
2nd = 22.10339.141
3rd = 22.10321.Z41
USB 3.0 Connector

Pin definition
B B
1 POWER
2 USB 2.0 D-
3 USB 2.0 D+
4 GND
5 StdA_SSRX- SuperSpeed RX
6 StdA_SSRX+
7 GND
8 StdA_SSTX- SuperSpeed TX
9 StdA_SSTX+
A <Core Design> A
Wistron Corporation
Title
USB 3.0 Port

A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = User.Interface
Bluetooth Module conn.
D D
ANNIE Bluetooth Module
C C
B B
<Core Design>
A
Title
Bluetooth
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
A
Title
RESERVED
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = Wireless Mini Card Connector(802.11a/b/g/n)

3D3V_IOAC
3D3V_IOAC
1D5V_S0
W LAN1 1D5V_S0 W IFI_RF_EN
C6502
SCD1U16V2KX-L-GP
C6503
SC10U6D3V5KX-1GP
C6504
SCD1U16V2KX-L-GP
D 53 D
1
NP1
C6505
1 W LAN_W AKE#_R 1 R6511 2 C6508 SC10U6D3V5KX-1GP
W LAN_W AKE# 27
2
2 0R2J-L-GP Do Not Stuff
IOAC DY
3
2
4
5
6
7 CLK_PCIE_W LAN_REQ# 20
8
9
10
PCIE_CLK_WLAN#
11 PCIE_CLK_W LAN# 20
PCIE_CLK_WLAN
12
13 PCIE_CLK_W LAN 20
14
15
16 W LAN_RST# +5V_MINI_DEBUG USB_PN11 USB_PP11 3D3V_IOAC
17 E51_RXD_R R6501 1 2 Do Not Stuff E51_RXD 27
EC6513
Do Not Stuff
EC6512
Do Not Stuff
18
1
EC6511
Do Not Stuff
EC6509
Do Not Stuff
EC6507
Do Not Stuff
EC6503
Do Not Stuff
19 E51_TXD_R R6502 1 2 Do Not Stuff E51_TXD 27 DY DY DY DY DY
1
20 W IFI_RF_EN 27 EC6510
21 Do Not Stuff DY DY
2
22 W LAN_RST#
2
23 PCIE_RXN4 20
24
25 PCIE_RXP4 20
C 26 C
27
28
-1
29
30
31 PCIE_TXN4 20 W LAN_RST# 1 R6504 2
DEBUG_DET# 0R2J-L-GP PLT_RST# 5,18,27,31,36,71,83,97
32
33 PCIE_TXP4 20
34
35 W LAN_RST# 1 R6505 2 W LAN_PERST# 27
36 Do Not Stuff
USB_PN11 18
37 DY
38 USB_PP11 18
39
40 Q6501
41 DMP2130L-7-GP
42 84.02130.031
43 2ND = 84.03413.A31 5V_S5
44
45
46 AP_DET# 27 S
47 +5V_MINI_DEBUG D
D
48
G
49
2
50
G
51 +5V_MINI_DEBUG R6503
52 100KR2J-4-GP
NP2
54
1
B B
DEBUG_DET#
SKT-MINI52P-110-GP
62.10043.G01 Low Active 2A
2nd = 62.10043.C31
G
3D3V_SRC 3D3V_S0 3D3V_IOAC 27 BLUETOOTH_EN D
S +5V_MINI_DEBUG
1 R6512 2
Do Not Stuff Q6502
Non-IOAC 2N7002K-2-GP
1
C6501 84.2N702.J31
SC1U10V2KX-1GP 2ND = 84.2N702.031
IOAC
2
U6501
IOAC
1 GND OUT#8 8
2 IN#2 OUT#7 7
3 IN#3 OUT#6 6
27 W LAN_PW R_EN# 4 EN/EN# OCB 5
SY6288DCAC-GP
74.06288.A79
A 2nd = 74.02301.079 <Core Design> A
Wistron Corporation
Title
MINICARD(WLAN)/ITP CONN
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = Wireless
Mini Card Connector(WWAN)
D D
C C
B B
<Core Design>
A
Title
WWAN Connector
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
<Core Design>
A
Title
Reserved
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
Power button LED

Q6801
3 FRONT_PW RLED#_Q FRONT_PW RLED#_Q 82
1 R1
27 PW RLED
2
R2 PLED1
LTC043ZUB-FS8-GP LED-BO-5-GP-U1
84.00043.011 FRONT_PW RLED#_Q 1 R6801 2 330R2F-GP FRONT_PW RLED#_R 3 1 5V_S5
2nd = 84.00143.E1K
STDBY_LED#_Q 1 R6802 2 330R2F-GP STDBY_LED#_R 2
1st = 83.00326.M70
Power STDBY_LED 2nd = 83.01212.A70
Q6802
3 STDBY_LED#_Q
1 R1
27 STDBY_LED
2
C R2 C
LTC043ZUB-FS8-GP
84.00043.011
2nd = 84.00143.E1K
CHLED1
LED-BO-5-GP-U1
DC_BATFULL#_Q 1 R6803 2 330R2F-GP DC_BATFULL#_R 3 1 5V_AUX_S5
CHARGE_LED#_Q 1 R6804 2 330R2F-GP CHARGE_LED#_R 2
Battery LED2(DC_BATFULL) 1st = 83.00326.M70

2nd = 83.01212.A70
Q6805
3 DC_BATFULL#_Q
1 R1
27 DC_BATFULL
2
R2
LTC043ZUB-FS8-GP
84.00043.011
2nd = 84.00143.E1K KBC_PW RBTN# 27,29,82
1 EC6801
B Battery LED1(CHARGE) MLVG0402101NV05-GP

B
Q6808
2
3 CHARGE_LED#_Q
1 R1
27 CHARGE_LED
2
R2
LTC043ZUB-FS8-GP
84.00043.011
2nd = 84.00143.E1K
<Core Design>
A A
Wistron Corporation
Title
LED Bard/Power Button

Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = KBC
Internal KeyBoard TOUCH PAD
Connector 3D3V_S0
D 3D3V_S0 D
上上上
1
2
1
EC6902
SC56P50V2JN-2GP
KB1 RN6901
ETY-CON26-7-GP SRN4K7J-8-GP
20.K0733.026
2
2nd = 20.K0752.026
TPAD1
4
3
ACES-CON8-37-GP
10
RN6902 1
27
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
28
SRN33J-5-GP-U
27 TPCLK 1 4 TP_CLK 2
27 TPDATA 2 3 TP_DATA 3
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
4 14 0.5 pitch
14,15,20 PCH_SMBDATA 5
14,15,20 PCH_SMBCLK 6
7
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17
18 TP_IN#
KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
8
KROW [0..7] 27
9
KCOL[0..17] 27 20.K0637.008
C TPAD2 C
ACES-CON8-40-GP
9
1
2
3
4 15 1.0 pitch
5
6
7
8
10
20.K0667.008
2nd = 20.K0665.008
5V_S0
KB2
6
4
3
2 KB_BL_DET_R 1 R6901 2 KB_BL_DET 27
100KR2J-4-GP
1
1 KB_LED_PW M_D C6901
1
SCD1U25V2KX-GP
B R6902 B
5
2
200KR2F-L-GP
ACES-CON4-50-GP
2
20.K0722.004
D
Q6901
AO3418-GP
27 KB_BL_PW M 1 R6903 2 KB_BL_PW M_R G 84.03418.031
0R2J-L-GP
C6902
Do Not Stuff
S
1
DY
2
A <Core Design> A
Wistron Corporation
Title
Key Board/Touch Pad

A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
3D3V_AUX_KBC
C C
1
C7002 LID1
SCD1U10V2KX-L1-GP APX9132HAI-TRG-GP
2
1st = 74.05712.0BB
2nd = 74.01803.07B
1 VDD
GND 3
27 LID_CLOSE# 1 R7002 2 LID_CLOSE#_1 2

100R2J-L-GP VOUT
1
DY C7001
Do Not Stuff
2
B B
<Core Design>
A
Title
Hall Sensor
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
3D3V_S0
DB1
1
21,27 LPC_AD0 2
21,27 LPC_AD1 3
21,27 LPC_AD2 4
21,27 LPC_AD3 5
21,27 LPC_FRAME# 6
5,18,27,31,36,65,83,97 PLT_RST# 7
C 8 C
18 CLK_PCI_LPC 9
10
11
12
Do Not Stuff
DY
B B
<Core Design>
A
Title
Dubug connector
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
(Blanking)
B B
A <Core Design> A
Wistron Corporation
Title
Reserved
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = SDIO SD/MMC Card Reader

CARD_3V3
CARD1
Layout 40 mil
D 4 VDD DAT0 7 SD_DATA0 31 D
DAT1 8 SD_DATA1 31
DAT2 9 SD_DATA2 31
31 SD_CLK 5 CLK
31 SD_CMD 2 CMD CD/DAT3 1 SD_DATA3 31
1
C7401
SC4D7U6D3V3KX-L-GP 11 NP1
31 SD_WP WRITE_PROTECT NP1
10 NP2
2
31 SD_CD# CARD_DETECT NP2
12 12 VSS1 3
13 13 VSS2 6
SDCARD-13P-2-GP
62.10051.C41
2nd = 62.10051.D71
C
SD_CLK C
1
EC7401
DY Do Not Stuff
2
B B
<Core Design>
A A
Wistron Corporation
Title
CARD Reader CONN

Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = ExpressCard
+1.5V_CARD Max. 650mA, Average 500mA.
+3.3V_CARD Max. 1300mA, Average 1000mA
+3.3V_CARDAUX Max. 275mA
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
New Card
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
<Core Design>
A
Title
Reserved
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B (Blanking) B
<Core Design>
A
Title
Reserved
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C
(Blanking) C
B B
<Core Design>
A
Title
Reserved
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
Note
SSID = User.Interface - no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
D
- design PCB pad based on our sensor LGA pad size (add 0.1mm) D
Free Fall Sensor - solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can
C C
B B
<Core Design>
A
Title
G- Sensor
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
A
Title
Reserved
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
(Blanking)
C C
B B
<Core Design>
A
Title
Reserved
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
1 5V_S5
2
D 3 KBC_PW RBTN# 27,29,68 D
PW RCN1 4 FRONT_PW RLED#_Q 68
ACES-CON6-52-GP 5
20.K0721.006 6
2nd = 20.K0382.006
8
C C
B B
A <Core Design> A
Wistron Corporation
Title
IO Board Connector
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
1D05V_VGA_S0
C8374
SC10U6D3V5KX-1GP
Muxless
C8373
SC10U6D3V5KX-1GP
Muxless
C8334
SC4D7U6D3V3KX-L-GP
Muxless
C8361
SC1U6D3V2KX-L-1-GP
Muxless
1
1
D D
3D3V_VGA_S0
2
1
3D3V_VGA_S0 VGA1A 1 OF 17
R8302
10KR2J-L-GP 1/17 PCI_EXPRESS
Muxless
G AJ11
2
PEX_WAKE#
AG19
VGA_RST# PEX_IOVDD_1
20 PEG_CLKREQ# D AJ12 AG21
PEX_RST# PEX_IOVDD_2
AG22
PEG_CLKREQ#_1 PEX_IOVDD_3
S AK12 AG24
PEX_CLKREQ# PEX_IOVDD_4
AH21
Q8301 PEX_IOVDD_5
20 CLK_PCIE_VGA AL13 AH25
2N7002K-2-GP PEX_REFCLK PEX_IOVDD_6
20 CLK_PCIE_VGA# AK13
PEX_REFCLK#
84.2N702.J31
2ND = 84.2N702.031 PEG_RXP0 C8301 1 2 SCD22U10V2KX-1GP PEG_C_RXP0 AK14
PEG_RXN0 C8302 PEG_C_RXN0 PEX_TX0
Muxless 1 2 SCD22U10V2KX-1GP AJ14
3D3V_VGA_S0 PEX_TX0# 1D05V_VGA_S0
Muxless
Muxless PEG_TXP0 AN12
PEG_TXN0 PEX_RX0
AM12 AG13
PEX_RX0# PEX_IOVDDQ_1
AG15
PEX_IOVDDQ_2
1
PEG_RXP1 C8303 1 2 SCD22U10V2KX-1GP PEG_C_RXP1 AH14 AG16

R8303 PEG_RXN1 C8304 PEG_C_RXN1 PEX_TX1 PEX_IOVDDQ_3
1 2 SCD22U10V2KX-1GP AG14 AG18
PEX_TX1# PEX_IOVDDQ_4
C8371
SC10U6D3V5KX-1GP
Muxless
C8372
SC10U6D3V5KX-1GP
Muxless
C8333
SC4D7U6D3V3KX-L-GP
Muxless
C8360
SC1U6D3V2KX-L-1-GP
Muxless
Do Not Stuff Muxless AG25
PEX_IOVDDQ_5
1
DY Muxless PEG_TXP1 AN14 AH15
PEG_TXN1 PEX_RX1 PEX_IOVDDQ_6
AM14 AH18
2
AH26
2
VGA_RST# PEG_RXP2 PEG_C_RXP2 PEX_IOVDDQ_8
18 DGPU_HOLD_RST# 1 R8361 2 C8305 1 2 SCD22U10V2KX-1GP AK15 AH27
Do Not Stuff PEG_RXN2 C8306 PEG_C_RXN2 PEX_TX2 PEX_IOVDDQ_9
1 2 SCD22U10V2KX-1GP AJ15 AJ27
PEX_TX2# PEX_IOVDDQ_10
Muxless PEX_IOVDDQ_11
AK27
Muxless PEG_TXP2 AP14 AL27
PEG_TXN2 PEX_RX2 PEX_IOVDDQ_12
AP15 AM28
AN28
PEG_RXP3 C8307 PEG_C_RXP3 PEX_IOVDDQ_14
1 2 SCD22U10V2KX-1GP AL16
3D3V_VGA_S0 PEG_RXN3 C8308 PEG_C_RXN3 PEX_TX3
1 2 SCD22U10V2KX-1GP AK16
PEX_TX3#
Muxless
U8301 Muxless PEG_TXP3 AN15
PEG_TXN3 PEX_RX3
18 DGPU_HOLD_RST# 1 AM15
B PEX_RX3#
5
VCC PEG_RXP4 C8309 PEG_C_RXP4
C
5,18,27,31,36,65,71,97 PLT_RST# 2 1 2 SCD22U10V2KX-1GP AK17 C
A VGA_RST# PEG_RXN4 C8310 PEG_C_RXN4 PEX_TX4
DY 4 1 2 SCD22U10V2KX-1GP AJ17
Y PEX_TX4#
3
GND
Muxless
Do Not Stuff PEG_TXN4 PEX_RX4
AM17
PEX_RX4#
Do Not Stuff
PEG_RXP5 C8311 1 2 SCD22U10V2KX-1GP PEG_C_RXP5 AH17
1 2 SCD22U10V2KX-1GP AG17
PEX_TX5#
Muxless PEX_PLL_HVDD
AH12 3D3V_VGA_S0
Muxless PEG_TXP5 AP17
PEX_RX5
C8367
SCD1U10V2KX-L1-GP
Muxless
C8366
SC4D7U6D3V3KX-L-GP
Muxless
PEG_TXN5 AP18 AG12
PEX_RX5# PEX_SVDD_3V3
PEG_RXP6 C8313 1 2 SCD22U10V2KX-1GP PEG_C_RXP6 AK18
1
1 2 SCD22U10V2KX-1GP AJ18
PEX_TX6#
Muxless
2
PEG_TXN6 PEX_RX6
AM18
PEX_RX6#
PEG_RXP7 C8315 1 2 SCD22U10V2KX-1GP PEG_C_RXP7 AL19
1 2 SCD22U10V2KX-1GP AK19
PEX_TX7#
4 PEG_TXP[0..15] Muxless
PEG_TXN7 PEX_RX7
4 PEG_TXN[0..15] AM20
PEX_RX7#
PEG_RXP8 C8317 1 2 Do Not Stuff PEG_C_RXP8 AK20
1 2 Do Not Stuff AJ20
PEX_TX8#
DY VDD_SENSE
L4 VGACORE_VDD_SENSE_1 92
DY PEG_TXP8 AP20
PEG_TXN8 PEX_RX8
AP21
PEX_RX8#
PEG_RXP[0..15] 4 L5 VGACORE_GND_SENSE_1 92
PEG_RXP9 C8319 PEG_C_RXP9 GND_SENSE
1 2 Do Not Stuff AH20
PEG_RXN[0..15] 4 1 2 Do Not Stuff AG20
PEX_TX9#
DY
DY PEG_TXP9 AN21
PEG_TXN9 PEX_RX9
AM21
PEX_RX9#
PEG_RXN10 C8322 PEG_C_RXN10 AJ21 PEX_TX10
1 2 Do Not Stuff
PEX_TX10#
DY NC_3V3AUX
P8
DY PEG_TXP10 AN23
PEG_TXN10 PEX_RX10
AM23
B PEX_RX10# B
PEG_RXP11 C8323 1 2 Do Not Stuff PEG_C_RXP11 AL22
PEG_RXN11 C8324 PEG_C_RXN11 AK22 PEX_TX11
1 2 Do Not Stuff
PEX_TX11#
DY
DY PEG_TXP11 AP23
PEG_TXN11 PEX_RX11
AP24
PEX_RX11#
AJ26
PEG_RXP12 C8325 PEG_C_RXP12 AK23 PEX_TSTCLK_OUT
1 2 Do Not Stuff AK26
PEG_RXN12 C8326 PEG_C_RXN12 AJ23 PEX_TX12 PEX_TSTCLK_OUT#
1 2 Do Not Stuff
PEX_TX12#
DY
DY PEG_TXP12 AN24
PEG_TXN12 PEX_RX12
AM24
PEX_RX12# 1D05V_VGA_S0
PEG_RXP13 C8327 1 2 Do Not Stuff PEG_C_RXP13 AH23
PEG_RXN13 C8328 PEG_C_RXN13 AG23 PEX_TX13
1 2 Do Not Stuff AG26
PEX_TX13# PEX_PLLVDD
DY
DY PEG_TXP13 AN26
PEX_RX13
C8369
SCD1U10V2KX-L1-GP
Muxless
C8368
SC4D7U6D3V3KX-L-GP
Muxless
C8370
SC1U6D3V2KX-L-1-GP
Muxless
PEG_TXN13 AM26
1
PEX_RX13#
PEG_RXN14 PEG_C_RXN14 AJ24 PEX_TX14
C8330 1 2 Do Not Stuff AK11 TESTMODE 1 R8307 2
2
PEX_TX14# TESTMODE 10KR2J-L-GP
DY
DY PEG_TXP14 AP26 Muxless
PEG_TXN14 PEX_RX14
AP27
PEX_RX14#
PEG_RXP15 C8331 1 2 Do Not Stuff PEG_C_RXP15 AL25
PEG_RXN15 C8332 PEG_C_RXN15 AK25 PEX_TX15
1 2 Do Not Stuff
PEX_TX15#
DY
DY PEG_TXP15 AN27 AP29 PEX_TERMP 1 R8305 2
PEG_TXN15 PEX_RX15 PEX_TERMP 2K49R2F-GP
AM27
PEX_RX15#
Muxless
N13P-GS-A1-GP
71.0N13P.00U Muxless
A A
<Core Design>
Wistron Corporation
Title
GPU_PCIE/STRAPPING(1/5)
A2
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
VGA1J 10 OF 17
5/17 IFPAB
ALL PINS NC FOR GF117
IFPA_TXC# AN6
AM6 VGA1K 11 OF 17
IFPA_TXC
AJ8 IFPAB_RSET
6/17 IFPC
D D
AN3
IFPA_TXD0# ALL PINS NC FOR GF117
AP3
IFPA_TXD0
IFPAB_PLLVDD AH8 AF8
IFPAB_PLLVDD IFPC_RSET
IFPA_TXD1# AM5 DVI/HDMI DP
AN5
IFPA_TXD1
1
R8413 IFPC_PLLVDD AF7 I2CW_SDA AG2

10KR2J-L-GP IFPC_PLLVDD IFPC_AUX_I2CW_SDA#
AK6 AG3
Muxless
IFPA_TXD2#
IFPA_TXD2 AL6
HDMI
I2CW_SCL IFPC_AUX_I2CW_SCL
1
R8415
2
10KR2J-L-GP AG4
TXC IFPC_L3#
IFPA_TXD3#
AH6 Muxless TXC IFPC_L3
AG5
AJ6
LVDS IFPA_TXD3
AH4
2
TXD0 IFPC_L2#
IFPC TXD0 IFPC_L2
AH3
AH9
IFPB_TXC#
AJ9 TXD1 AJ2
IFPB_TXC IFPC_L1#
TXD1 AJ3
IFPAB_IOVDD IFPC_L1
AG8
IFPA_IOVDD
AP5 AJ1
IFPB_TXD4# TXD2 IFPC_L0#
AG9 AP6 TXD2 AK1
IFPB_IOVDD IFPB_TXD4 IFPC_L0
IFPB_TXD5# AL7
1
AM7 IFPC_IOVDD AF6 P2

R8412 IFPB_TXD5 IFPC_IOVDD GPIO15
10KR2J-L-GP
1
Muxless AM8 R8411 N13P-GS-A1-GP
IFPB_TXD6# 10KR2J-L-GP
AN8
2
IFPB_TXD6
Muxless Muxless
AL8
2
IFPB_TXD7#
AK8
IFPB_TXD7
C C
GPIO14 N4
IFPAB
N13P-GS-A1-GP
VGA1M 13 OF 17
8/17 IFPEF VGA1L 12 OF 17
7/17 IFPD
DVI-DL DVI-SL/HDMI DP
AN2
IFPD_RSET
DVI/HDMI DP
I2CY_SDA I2CY_SDA AB4

IFPE_AUX_I2CY_SDA# IFPD_PLLVDD AG7
I2CY_SCL I2CY_SCL IFPE_AUX_I2CY_SCL AB3 IFPD_PLLVDD I2CX_SDA IFPD_AUX_I2CX_SDA# AK2
IFPEF_PLLVDD AB8 I2CX_SCL AK3
IFPEF_PLLVDD IFPD_AUX_I2CX_SCL
1
R8414 AC5
TXC TXC IFPE_L3#
1
10KR2J-L-GP AD6 AC4 R8410 AK5
IFPEF_RSET TXC TXC IFPE_L3 TXC IFPD_L3#
Muxless 10KR2J-L-GP AK4
TXD0 TXD0 IFPE_L2#
AC3
AC2
Muxless EDPTXC IFPD_L3
AL4
2
B TXD0 TXD0 IFPE_L2 IFPD TXD0 IFPD_L2# B

TXD0 AL3
2
IFPD_L2
AC1
TXD1 TXD1 IFPE_L1#
AD1 TXD1 AM4
IFPE TXD1 TXD1 IFPE_L1
TXD1
IFPD_L1#
IFPD_L1
AM3
AD3
TXD2 TXD2 IFPE_L0#
AD2 AM2
TXD2 TXD2 IFPE_L0 TXD2 IFPD_L0#
TXD2 AM1
IFPD_L0
HPD_E
DP HPD_E
GPIO18
R1
IFPD_IOVDD AG6
IFPD_IOVDD GPIO17
M6
R8409 N13P-GS-A1-GP
1
10KR2J-L-GP
Muxless 71.0N13P.00U Muxless
2
IFPDE_PLL_IO_VDD AC7
IFPE_IOVDD
I2CZ_SDA AF2
IFPF_AUX_I2CZ_SDA#
I2CZ_SCL AF3
IFPF_AUX_I2CZ_SCL
AC8 IFPF_IOVDD
TXC IFPF_L3# AF1
TXC AG1
IFPF_L3
1
R8407 TXD3 TXD0 AD5

10KR2J-L-GP IFPF_L2#
TXD3 TXD0 AD4
IFPF_L2
Muxless
TXD4 TXD1 AF5
IFPF
2
IFPF_L1#
TXD4 TXD1 AF4
IFPF_L1
TXD5 TXD2 AE4

IFPF_L0#
TXD5 TXD2 AE3
IFPF_L0
A A
<Core Design>
HPD_F
GPIO19 P3
Wistron Corporation
N13P-GS-A1-GP 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
71.0N13P.00U Muxless Title
GPU Memory(2/5)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
VGA1B 2 OF 17
2/17 FBA
VGA1C 3 OF 17
3/17 FBB
88,89 MDA[63..0]
MDA0 L28 E1
MDA1 FBA_D0 FB_CLAMP
M29
MDA2 FBA_D1 90,91 MDB[63..0] MDB0
L29 G9
MDA3 FBA_D2 MDB1 FBB_D0
M28 E9
N31 G8
MDA5 FBA_D4 FB_PLLVDD_16mil MDB3 FBB_D2
P29 K27 F9
MDA6 FBA_D5 FB_DLL_AVDD MDB4 FBB_D3
R29 F11
P28 G11
MDA8 FBA_D7 MDB6 FBB_D5 4 OF 17 VGA1D
J28 F12 1D5V_VGA_S0
H29 G12 14/17 FBVDDQ
FBA_D9 FBB_D7
1
MDA10 J29 MDB8 G6
MDA11 FBA_D10 C8522 MDB9 FBB_D8
H28 F5 AA27
MDA12 FBA_D11 SCD1U10V2KX-L1-GP MDB10 FBB_D9 FBVDDQ_1
G29 E6 AA30
2
FBA_D12 FBB_D10 FBVDDQ_2
C8504
SCD1U10V2KX-L1-GP
Muxless
C8505
SCD1U10V2KX-L1-GP
Muxless
C8506
SCD1U10V2KX-L1-GP
Muxless
C8507
SCD1U10V2KX-L1-GP
Muxless
C8512
SCD1U10V2KX-L1-GP
Muxless
C8508
SC1U10V3KX-L1-GP
Muxless
C8509
SC1U10V3KX-L1-GP
Muxless
C8510
SC4D7U6D3V3KX-L-GP
Muxless
C8511
SC4D7U6D3V3KX-L-GP
Muxless
MDA13 E31 Muxless MDB11 F6 AB27
D MDA14 FBA_D13 MDB12 FBB_D11 FBVDDQ_3 D
E32 F4 AB33
MDA15 FBA_D14 MDB13 FBB_D12 FBVDDQ_4
F30 G4 AC27
FBA_D15 FBB_D13 FBVDDQ_5
1
MDA16 C34 MDB14 E2 AD27
D32 F3 AE27
B33 C2 AF27
2
C33 D4 AG27
F33 D3 B13
F32 C1 B16
H33 B3 B19
H32 C4 E13
P34 B5 E16
P32 C5 E19
P31 A11 H10
P33 C11 H11
L31 D11 H12
L34 B11 H13
L32 D8 H14
L33 A8 H15
AG28 C8 H16
AF29 U30 B8 H18
MDA34 FBA_D33 FBA_CMD0 -FBA_CS0 88 MDB32 FBB_D31 FBVDDQ_23
AG29 T31 F24 H19
MDA35 FBA_D34 FBA_CMD1 MDB33 FBB_D32 FBVDDQ_24
AF28 U29 G23 D13 H20
MDA36 FBA_D35 FBA_CMD2 FBA_ODT0 88 MDB34 FBB_D33 FBB_CMD0 -FBB_CS0 90 FBVDDQ_25
AD30 R34 E24 E14 H21
MDA37 FBA_D36 FBA_CMD3 FBA_CKE0 88 MDB35 FBB_D34 FBB_CMD1 FBVDDQ_26
AD29 R33 G24 F14 H22
MDA38 FBA_D37 FBA_CMD4 FBA_A14 88,89 MDB36 FBB_D35 FBB_CMD2 FBB_ODT0 90 FBVDDQ_27
AC29 U32 D21 A12 H23
MDA39 FBA_D38 FBA_CMD5 FBA_RST 88,89 MDB37 FBB_D36 FBB_CMD3 FBB_CKE0 90 FBVDDQ_28
AD28 U33 E21 B12 H24
MDA40 FBA_D39 FBA_CMD6 FBA_A9 88,89 MDB38 FBB_D37 FBB_CMD4 FBB_A14 90,91 FBVDDQ_29
AJ29 U28 G21 C14 H8
MDA41 FBA_D40 FBA_CMD7 FBA_A7 88,89 MDB39 FBB_D38 FBB_CMD5 FBB_RST 90,91 FBVDDQ_30
AK29 V28 F21 B14 H9
AJ30 V29 G27 G15 L27
AK28 V30 D27 F15 M27
AM29 U34 G26 E15 N27
AM31 U31 E27 D15 P27
MDA46 FBA_D45 FBA_CMD12 FBA_BA0 88,89 MDB44 FBB_D43 FBB_CMD10 FBB_A4 90,91 FBVDDQ_35
AN29 V34 E29 A14 R27
MDA47 FBA_D46 FBA_CMD13 -FBA_WE 88,89 MDB45 FBB_D44 FBB_CMD11 FBB_A1 90,91 FBVDDQ_36
AM30 V33 F29 D14 T27
MDA48 FBA_D47 FBA_CMD14 FBA_A15 88,89 MDB46 FBB_D45 FBB_CMD12 FBB_BA0 90,91 FBVDDQ_37
AN31 Y32 E30 A15 T30
MDA49 FBA_D48 FBA_CMD15 -FBA_CAS 88,89 MDB47 FBB_D46 FBB_CMD13 -FBB_WE 90,91 FBVDDQ_38
AN32 AA31 D30 B15 T33
MDA50 FBA_D49 FBA_CMD16 -FBA_CS1 89 MDB48 FBB_D47 FBB_CMD14 FBB_A15 90,91 FBVDDQ_39
AP30 AA29 A32 C17 V27
MDA51 FBA_D50 FBA_CMD17 MDB49 FBB_D48 FBB_CMD15 -FBB_CAS 90,91 FBVDDQ_40
AP32 AA28 C31 D18 W27
MDA52 FBA_D51 FBA_CMD18 FBA_ODT1 89 MDB50 FBB_D49 FBB_CMD16 -FBB_CS1 91 FBVDDQ_41
AM33 AC34 C32 E18 W30
MDA53 FBA_D52 FBA_CMD19 FBA_CKE1 89 MDB51 FBB_D50 FBB_CMD17 FBVDDQ_42
AL31 AC33 B32 F18 W33
MDA54 FBA_D53 FBA_CMD20 FBA_A13 88,89 MDB52 FBB_D51 FBB_CMD18 FBB_ODT1 91 FBVDDQ_43
AK33 AA32 D29 A20 Y27
MDA55 FBA_D54 FBA_CMD21 FBA_A8 88,89 MDB53 FBB_D52 FBB_CMD19 FBB_CKE1 91 FBVDDQ_44
AK32 AA33 A29 B20
MDA56 FBA_D55 FBA_CMD22 FBA_A6 88,89 MDB54 FBB_D53 FBB_CMD20 FBB_A13 90,91
AD34 Y28 C29 C18
AD32 Y29 B29 B18 F1
MDA58 FBA_D57 FBA_CMD24 FBA_A5 88,89 MDB56 FBB_D55 FBB_CMD22 FBB_A6 90,91 FB_VDDQ_SENSE
AC30 W31 B21 G18 1D5V_VGA_S0
AD33 Y30 C23 G17
MDA60 FBA_D59 FBA_CMD26 FBA_BA2 88,89 MDB58 FBB_D57 FBB_CMD24 FBB_A5 90,91
AF31 AA34 A21 F17 F2
MDA61 FBA_D60 FBA_CMD27 FBA_BA1 88,89 MDB59 FBB_D58 FBB_CMD25 FBB_A3 90,91 FB_GND_SENSE
AG34 Y31 C21 D16
MDA62 FBA_D61 FBA_CMD28 FBA_A12 88,89 MDB60 FBB_D59 FBB_CMD26 FBB_BA2 90,91
AG32 Y34 B24 A18
MDA63 FBA_D62 FBA_CMD29 FBA_A10 88,89 MDB61 FBB_D60 FBB_CMD27 FBB_BA1 90,91
AG33 Y33 C24 D17 2 R8501 1 FB_CAL_PD_VDDQ J27
FBA_D63 FBA_CMD30 -FBA_RAS 88,89 MDB62 FBB_D61 FBB_CMD28 FBB_A12 90,91 40D2R2F-GP FB_CAL_PD_VDDQ
V31 B26 A17
FBA_CMD31 MDB63 FBB_D62 FBB_CMD29 FBB_A10 90,91
C26
FBB_D63 FBB_CMD30
B17
-FBB_RAS 90,91 Muxless
P30 R32 E17 FB_CAL_PU_GND H27
88 DQMA0 FBA_DQM0 FBA_CMD_RFU0 FBB_CMD31 FB_CAL_PU_GND
F31 AC32
88 DQMA1 FBA_DQM1 FBA_CMD_RFU1
F34 90 DQMB0 E11 C12
88 DQMA2 FBA_DQM2 FBB_DQM0 FBB_CMD_RFU0 FB_CAL_TERM_GND
M32 90 DQMB1 E3 C20 H25
88 DQMA3 FBA_DQM3 FBB_DQM1 FBB_CMD_RFU1 FB_CAL_TERM_GND
AD31 1D5V_VGA_S0 90 DQMB2 A3
89 DQMA4 FBA_DQM4 FBB_DQM2
AL29 90 DQMB3 C9 1D5V_VGA_S0
C 89 DQMA5 FBA_DQM5 FBB_DQM3 N13P-GS-A1-GP C
AM32 91 DQMB4 F23
89 DQMA6 FBA_DQM6 FBA_DEBUG0_R28 R8522 1 FBB_DQM4
AF34 R28 2 60D4R2F-GP 91 DQMB5 F27
89 DQMA7 FBA_DQM7 FBA_DEBUG0 FBA_DEBUG0_AC28 R8523 1 FBB_DQM5
2 10KR2J-L-GP
FBA_DEBUG1
AC28 91 DQMB6 C30
FBB_DQM6 71.0N13P.00U Muxless
1
R8503
40D2R2F-GP
Muxless
R8502
60D4R2F-GP
Muxless
Muxless 91 DQMB7 A24 G14 FBB_DEBUG0_G14 R8526 1 2 Do Not Stuff
FBB_DQM7 FBB_DEBUG0
88 QSAP_0 M31 Muxless G20 FBB_DEBUG0_G20 R8527 1 2 Do Not Stuff
FBA_DQS_WP0 FBB_DEBUG1
88 QSAP_1 G31
FBA_DQS_WP1 DY
88 QSAP_2 E33
FBA_DQS_WP2 FBA_CLK0
R30
CLKA0 88 90 QSBP_0 D10
FBB_DQS_WP0 DY
88 QSAP_3 M33 R31 90 QSBP_1 D5
2
FBA_DQS_WP3 FBA_CLK0# CLKA0# 88 FBB_DQS_WP1
89 QSAP_4 AE31 AB31 90 QSBP_2 C3 D12
FBA_DQS_WP4 FBA_CLK1 CLKA1 89 FBB_DQS_WP2 FBB_CLK0 CLKB0 90
89 QSAP_5 AK30 AC31 90 QSBP_3 B9 E12
FBA_DQS_WP5 FBA_CLK1# CLKA1# 89 FBB_DQS_WP3 FBB_CLK0# CLKB0# 90
89 QSAP_6 AN33 91 QSBP_4 E23 E20
FBA_DQS_WP6 FBB_DQS_WP4 FBB_CLK1 CLKB1 91
89 QSAP_7 AF33 91 QSBP_5 E28 F20
FBA_DQS_WP7 FBB_DQS_WP5 FBB_CLK1# CLKB1# 91
91 QSBP_6 B30
FBB_DQS_WP6
91 QSBP_7 A23
FBB_DQS_WP7
88 QSAN_0 M30 K31
FBA_DQS_RN0 FBA_WCK1
88 QSAN_1 H30 L30
FBA_DQS_RN1 FBA_WCK1#
88 QSAN_2 E34 H34 90 QSBN_0 D9 F8
FBA_DQS_RN2 FBA_WCK23 FBB_DQS_RN0 FBB_WCK1
88 QSAN_3 M34 J34 90 QSBN_1 E4 E8
FBA_DQS_RN3 FBA_WCK23# FBB_DQS_RN1 FBB_WCK1#
89 QSAN_4 AF30 AG30 90 QSBN_2 B2 A5
89 QSAN_5 AK31 AG31 90 QSBN_3 A9 A6
89 QSAN_6 AM34 AJ34 91 QSBN_4 D22 D24
89 QSAN_7 AF32 AK34 91 QSBN_5 D28 D25
91 QSBN_6 A30 B27
FBB_DQS_RN6 FBB_WCK67
J30 91 QSBN_7 B23 C27
FBA_WCKB1 FBB_DQS_RN7 FBB_WCK67#
THE FBA_WCKBxx J31
FBA_WCKB1#
PINS ARE USED J32 D6
FBA_WCKB23 FBB_WCKB1
ONLY ON GK107 J33 THE FBB_WCKBxx D7
FBA_WCKB23# FBB_WCKB1#
THEY ARE NC AH31 PINS ARE USED C6
FOR GF108 AJ31 1D05V_VGA_S0
ONLY ON GK107 B6
AND FOR GF117 AJ32 THEY ARE NC F26
AJ33 L8502
FOR GF108 E26
AND FOR GF117 A26
FBB_WCKB67
H26
FB_VREF FBA_PLL_AVDD
U27 FB_PLLVDD_16mil 1 ( ( 2
FBB_WCKB67#
A27
C8517
SCD1U10V2KX-L1-GP
Muxless
C8518
SCD1U10V2KX-L1-GP
Muxless
C8519
SC10U6D3V3MX-L-GP
Muxless
C8520
SC10U6D3V3MX-L-GP
Muxless
BLM18KG300TN1D-GP H17 FB_PLLVDD_16mil

FBB_PLL_AVDD
1
N13P-GS-A1-GP CHIP BEAD BLM18KG300TN1D MURATA

Muxless
Muxless N13P-GS-A1-GP
71.0N13P.00U
2
1
C8523
SCD1U10V2KX-L1-GP
2
Muxless
B B
CLKA1 CLKA0
CLKB1 CLKB0
1
R8504 R8505
1
162R2F-GP 162R2F-GP
Muxless Muxless R8506 R8507
2
DY DY
CLKA1# CLKA0# Group A Group B
2
FBB_CKE0 CLKB1# CLKB0#
CKE0 FBA_CKE0 CKE0
FBB_CKE1
FBCLK Termination place on VRAM side CKE1 FBA_CKE1 CKE1
FBCLK Termination place on VRAM side
Reset FBA_RST FBB_RST Reset
ODT0 FBA_ODT0 FBB_ODT0 ODT0
ODT1 FBA_ODT1 FBB_ODT1 ODT1
1
1
R8508
10KR2J-L-GP
Muxless
R8509
10KR2J-L-GP
Muxless
R8510
10KR2J-L-GP
Muxless
R8511
10KR2J-L-GP
Muxless
R8512
10KR2J-L-GP
Muxless
R8513
Do Not Stuff
DY
R8514
Do Not Stuff
DY
R8515
Do Not Stuff
DY
R8516
Do Not Stuff
DY
R8517
Do Not Stuff
DY
2
A A
<Core Design>
Wistron Corporation
Title
GPU_DP/LVDS/CRT/GPIO(3/5)
A1
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
3D3V_VGA_S0_DACA_VDD_16MIL
1
R8629
10KR2J-L-GP VGA1N 14 OF 17
1D05V_VGA_S0 PLLVDD_PWR
Muxless 4/17 DACA
2
GF108/GKx GF117 GF117 GF108/GKx L8601
AG10 R4 BLM18KG300TN1D-GP
DACA_VDD NC NC I2CA_SCL
NC I2CA_SDA
R5 1 ( ( 2
DACA_VREF_AP9 AP9 CHIP BEAD BLM18KG300TN1D MURATA
DACA_VREF TSEN_VREF
Muxless
C8605
SCD1U10V2KX-L1-GP
Muxless
C8602
SC4D7U6D3V3KX-L-GP
Muxless
C8608
SC10U6D3V3MX-L-GP
Muxless
AP8 NC NC AM9
DACA_RSET DACA_HSYNC
D
1 NC DACA_VSYNC
AN9 D
1
R8641
10KR2J-L-GP
Muxless NC AK9
2
DACA_RED VGA1O 15 OF 17
2
NC AL10 11/17 XTAL_PLL

DACA_GREEN
NC AL9
DACA_BLUE
AD8
PLLVDD
AE8
N13P-GS-A1-GP SP_PLLVDD
Muxless 71.0N13P.00U AD7
VID_PLLVDD NC
GF108/GKx GF117
Muxless
3D3V_VGA_S0 TP8609Do Not Stuff VIDEO_CLK_XTAL_SS H1 J4 N12P_XTAL_OUTBUFF
3D3V_VGA_S0 XTAL_SSIN XTAL_OUTBUFF
H3 H2
XTAL_IN XTAL_OUT
1
Q8601 N13P-GS-A1-GP R8605
1
2N7002KDW-GP R8604 10KR2J-L-GP
4
3
84.2N702.A3F Do Not Stuff Muxless

RN8605 2nd = 84.DM601.03F DY 71.0N13P.00U
SRN4K7J-8-GP
2
Muxless SMBC_THERM_NV 1 6 R8606
SML1_CLK 20,27,28,49
2
27MHZ_IN 1 Do Not Stuff
2 27MHZ_OUT
2 5 DY
1
2
2
SMBC_THERM_NV
SMBD_THERM_NV 3 4 SMBD_THERM_NV R8607
20,27,28,49 SML1_DATA
390R2J-1-GP
Muxless Muxless
1
1 2 27MHZ_OUT_R
X8601
1
C8610 XTAL-27MHZ-62-GP-U C8611
SC15P50V2JN-2-GP SC15P50V2JN-2-GP
unknown function 82.30034.501
unknown function Muxless 2nd = 82.30034.521 Muxless
2
3D3V_VGA_S0 Muxless
Q8603 -1
27 DGPU_ALARM 1 R8620 2 dGPU_ALARM_R G
Do Not Stuff
Q8605
D GPIO9_ALERT#
G
S
D PURE_HW_SHUTDOWN# 27,28,36
2N7002K-2-GP GPIO8_OVERT# 1 R8615 2 GPIO8_OVERT#_R S
84.2N702.J31 Do Not Stuff
2ND = 84.2N702.031 Do Not Stuff
Muxless
Do Not Stuff
2ND = 84.2N702.031
C C
DY
Q8604
27 DGPUHOT 1 R8628 2 DGPUHOT_R G

Do Not Stuff
D DGPUHOT#
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Muxless
3D3V_VGA_S0
Do Not Stuff
TP8608 VGA1Q 17 OF 17
10/19 MISC1
I2CS_SCL
T4 SMBC_THERM_NV VRAM Table(N13P-GS/GT/LP/GL/GLP/NS/GE)
1
T3 SMBD_THERM_NV
I2CS_SDA
R8612
10KR2J-L-GP
Muxless
R8613
10KR2J-L-GP
Muxless
R8614
10KR2J-L-GP
Muxless
R2
I2CC_SCL
I2CC_SDA
R3 Hynix 2G_B-Die Hynix 1G Samsung 2G_C-Die Samsung 1G 5Kohm
0110(0x6) 0010(0x2) 0111(0x7) 0011(0x3)
2
R7
Do Not Stuff
TP8613 THERMDN_TP I2CB_SCL
K4 R6
Do Not Stuff
TP8614 THERMDP_TP K3
THERMDN I2CB_SDA
128*16 64*16 128*16 64*16 64.49915.6DL
THERMDP
Do Not Stuff 1 R8622 2 JTAG_TCK_TP AM10

Do Not Stuff
TP8607 N12P_JTAG_TMS JTAG_TCK
DY AP11
Do Not Stuff
TP8615
Do Not Stuff
TP8606
N12P_JTAG_TDI
N12P_JTAG_TDO
AM11
AP12
JTAG_TMS
JTAG_TDI
34.8Kohm 15Kohm 45Kohm 20Kohm 10Kohm
1 2 N12P_GPIO_JTAG_TRST AN11 JTAG_TDO
JTAG_TRST# GPIO0
P6
M3
H_VID4 92 ROM_SI
R8621
10KR2J-L-GP
GPIO1
GPIO2
L6
P5 GPIO3_P5
H_VID3 92
1 R8636 2 GPU_DPRSLP 92 R8627 64.34825.6DL 64.15025.6DL 64.45325.6DL 64.20025.6DL 64.10025.L0L
GPIO3 Do Not Stuff
Muxless GPIO4
P7 DY
L7 H_VID1 92
GPIO5
M7 H_VID2 92
GPIO6 N12P_GPIO7_H5
N8 TP8616 Do Not Stuff
B GPIO7 GPIO8_OVERT# B
M1
GPIO8 GPIO9_ALERT#
M2
GPIO9
L1
GPIO10
M5 H_VID0 92
GPIO11 DGPUHOT#
N3
GPIO12
GPIO13
M4
R8 GPIO16_R8
H_VID5 92
1 R8639 2 GPU_DPRSLP 92
VRAM Table(N13M-GS/NS)
GPIO16
GPIO20
P4 DY Do Not Stuff
P1
GPIO21
Hynix 2G_D-die Hynix 2G_B-die
1100(0xC) 0110(0x6)
128*16 128*16
N13P-GS-A1-GP Muxless
71.0N13P.00U
Logical Strap Bit Mapping

Resistor Pull-up Pull-down
5Kohms 1000 0000
10Kohms 1001 0001
3D3V_VGA_S0
15Kohms 1010 0010
20Kohms 1011 0011
VGA1P 16 OF 17 25Kohms 1100 0100
12/17 MISC2 30Kohms 1101 0101
2
35Kohms 1110 0110

R8645
Do Not Stuff 45Kohms 1111 0111
DY
H6 ROM_CS#
1
ROM_CS#
H5 ROM_SI_D3
ROM_SI ROM_SO_C4
H7
STRAP0 ROM_SO ROM_SLK_D4
J2 H4
STRAP1 STRAP0 ROM_SCLK
J7
STRAP2 STRAP1
J6
STRAP3 STRAP2
J5 3D3V_VGA_S0
STRAP4 STRAP3
J3 3D3V_VGA_S0
STRAP4
3D3V_VGA_S0
L2
BUFRST#
1
1
1
R8630 R8632 R8634 R8637 R8638

STRAP_REF0_GND_N9 J1 L3 R8624 R8625 R8626 Do Not Stuff 10KR2F-L1-GP 10KR2F-L1-GP Do Not Stuff Do Not Stuff
MULTI_STRAP_REF0_GND CEC Do Not Stuff Do Not Stuff Do Not Stuff DY Hynix2Gb_B Muxless Hynix2Gb_D DY
DY DY DY
2
2
STRAP0 STRAP3
2
2
1
A R8616 ROM_SI_D3 STRAP1 A

Do Not Stuff ROM_SO_C4 STRAP2 STRAP4
N13M-GS:DY ROM_SLK_D4
1
1
1
N13P-GS-A1-GP R8631 R8633 R8635 R8640 R8619

2
Muxless R8627 R8617 R8618 10KR2F-L1-GP Do Not Stuff Do Not Stuff 10KR2F-L1-GP 10KR2F-L1-GP
10KR2F-L1-GP 10KR2F-L1-GP 10KR2F-L1-GP Muxless Hynix2Gb_D DY Hynix2Gb_B Muxless
N13M-GS N13M-GS N13M-GS
2
2
2
<Core Design>
Wistron Corporation
Title
GPU_POWER(4/5)
A1
Husk/Petra -1
Date: Friday, March 09, 2012 Sheet 86 of 103
5 4 3 2 1
5 4 3 2 1
VGA1I 9 OF 17
15/17 GND_1/2
A2 AM25 VGA1H 8 OF 17
VGA_CORE 6 OF 17 GND_1 GND_71
VGA1F AA17 AN1
GND_5 GND_72 16/17 GND_2/2
13/17 NVVDD AA18 GND_6 GND_73 AN10
AA20 AN13 N19 T28
GND_7 GND_74 GND_141 GND_170
AA12 AA22 AN16 N2 T32
VDD_1 GND_8 GND_75 GND_142 GND_171
C8704
SC4D7U6D3V3KX-L-GP
Muxless
C8703
SC4D7U6D3V3KX-L-GP
Muxless
C8702
SC4D7U6D3V3KX-L-GP
Muxless
C8701
SC4D7U6D3V3KX-L-GP
Muxless
AA14 AB12 AN19 N21 T5
AA16 AB14 AN22 N23 T7
1
AA19 AB16 AN25 N28 U12
AA21 AB19 AN30 N30 U14
AA23 AB2 AN34 N32 U16
2
AB13 AB21 AN4 N33 U19
AB15 A33 AN7 N5 U21
AB17 AB23 AP2 N7 U23
AB18 AB28 AP33 P13 V12
D AB20 AB30 B1 P15 V14 D
AB22 VDD_12 AB32 GND_18 GND_86 B10 P17 GND_153 GND_182 V16
AC12 VDD_13 AB5 GND_19 GND_87 B22 P18 GND_154 GND_183 V19
AC14 VDD_14 AB7 GND_20 GND_88 B25 P20 GND_155 GND_184 V21
AC16 AC13 B28 P22 V23
AC19 AC15 B31 R12 W13
AC21 VDD_17 AC17 GND_23 GND_91 B34 R14 GND_158 GND_187 W15
AC23 AC18 B4 R16 W17
C8708
SC4D7U6D3V3KX-L-GP
Muxless
C8707
SC4D7U6D3V3KX-L-GP
Muxless
C8706
SC4D7U6D3V3KX-L-GP
Muxless
C8705
SC4D7U6D3V3KX-L-GP
Muxless
M12 VDD_19 AA13 GND_3 GND_93 B7 R19 GND_160 GND_189 W18
M14 VDD_20 AC20 GND_25 GND_94 C10 R21 GND_161 GND_190 W20
1
M16 AC22 C13 R23 W22
M19 AE2 C19 T13 W28
M21 AE28 C22 T15 Y12
2
2
M23 AE30 C25 T17 Y14
N13 AE32 C28 T18 Y16
N15 VDD_26 AE33 GND_31 GND_100 C7 T2 GND_167 GND_196 Y19
N17 VDD_27 AE5 GND_32 GND_101 D2 T20 GND_168 GND_197 Y21
N18 VDD_28 AE7 GND_33 GND_102 D31 T22 GND_169 GND_198 Y23
N20 VDD_29 AH10 GND_34 GND_103 D33
N22 VDD_30 AA15 GND_4 GND_104 E10
P12 AH13 E22
VDD_31 GND_35 GND_105
P14 AH16 E25
P16 AH19 E5
P19 AH2 E7
P21 AH22 F28 AG11 AH11
VDD_35 GND_39 GND_109 GND_F GND_H
P23 AH24 F7
C8720
SCD1U10V2KX-L-GP
Muxless
C8719
SCD1U10V2KX-L-GP
Muxless
C8718
SCD1U10V2KX-L-GP
Muxless
C8717
SCD1U10V2KX-L-GP
Muxless
R13 AH28 G10
R15 AH29 G13
1
1
R17 VDD_39 AH30 GND_43 GND_113 G16
R18 AH32 G19
R20 AH33 G2
2
2
R22 VDD_42 AH5 GND_46 GND_116 G22
T12 VDD_43 AH7 GND_47 GND_117 G25 GND_OPT_1 C16
T14 AJ7 G28 W32
VDD_44 GND_48 GND_118 GND_OPT_2
T16 AK10 G3
T19 AK7 G30 Optional CMD GNDs (2)
T21 AL12 G32 NC for 4-Lyr cards
C T23 AL14 G33 C
VDD_48 GND_52 GND_122 N13P-GS-A1-GP
U13 AL15 G5
U15 AL17 G7
U17 VDD_51 AL18 GND_55 GND_125 K2 Muxless 71.0N13P.00U
C8731
SC10U6D3V3MX-L-GP
Muxless
C8730
SC10U6D3V3MX-L-GP
Muxless
C8729
SC10U6D3V3MX-L-GP
Muxless
C8728
SC10U6D3V3MX-L-GP
Muxless
C8727
SC10U6D3V3MX-L-GP
Muxless
U18 VDD_52 AL2 GND_56 GND_126 K28

U20 VDD_53 AL20 GND_57 GND_127 K30
1
U22 VDD_54 AL21 GND_58 GND_128 K32

V13 VDD_55 AL23 GND_59 GND_129 K33
V15 AL24 K5
2

V17 AL26 K7
V18 AL28 M13
V20 VDD_59 AL30 GND_63 GND_133 M15
V22 AL32 M17
W12 AL33 M18
W14 AL5 M20
W16 AM13 M22
W19 AM16 N12
W21 AM19 N14
W23 AM22 N16
C8732
Do Not Stuff
DY
C8733
Do Not Stuff
DY
C8736
Do Not Stuff
DY
C8737
Do Not Stuff
DY
Y13
VDD_67
Y15
VDD_68
1
Y17
VDD_69 N13P-GS-A1-GP
Y18
VDD_70
Y20
2
VDD_71
Y22 VDD_72 71.0N13P.00U Muxless
N13P-GS-A1-GP
Muxless
71.0N13P.00U
VGA1E 5 OF 17
9/17 XVDD
B CONFIGURABLE B
POWER
CHANNELS
U1
XVDD_1
U2
XVDD_2
U3
XVDD_3
U4
XVDD_4
U5
XVDD_5
U6
XVDD_6
U7
XVDD_7
U8
XVDD_8
VGA1G 7 OF 17 V1
3D3V_VGA_S0 XVDD_9
17/17 NC/VDD33 V2
XVDD_10
V3
XVDD_11
AC6 J8 V4
NC#AC6 VDD33_1 XVDD_12
AJ28 K8 V5
NC#AJ28 VDD33_2 XVDD_13
C8710
SC1U6D3V2KX-L-1-GP
Muxless
C8709
SC1U6D3V2KX-L-1-GP
Muxless
C8734
SCD1U10V2KX-L1-GP
Muxless
C8735
SCD1U10V2KX-L1-GP
Muxless
C8739
SCD1U10V2KX-L1-GP
Muxless
C8740
SC4D7U6D3V3KX-L-GP
Muxless
AJ4 L8 V6
AJ5 M8 V7
1
AL11 V8
NC#AL11 XVDD_16
C15
NC#C15
D19
2
NC#D19
D20 W2
NC#D20 XVDD_17
D23 NC#D23 XVDD_18 W3
D26 NC#D26 XVDD_19 W4
H31 W5
NC#H31 XVDD_20
T8 W7
NC#T8 XVDD_21
V32 W8
NC#V32 XVDD_22
N13P-GS-A1-GP
Y1
XVDD_23
Muxless XVDD_24
Y2
71.0N13P.00U XVDD_25
Y3
XVDD_26 Y4
A Y5 A
XVDD_27
XVDD_28 Y6
XVDD_29 Y7
XVDD_30 Y8 <Core Design>
AA1
XVDD_31
XVDD_32
AA2 Wistron Corporation
AA3 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
XVDD_33 Taipei Hsien 221, Taiwan, R.O.C.
XVDD_34 AA4
XVDD_35 AA5
AA6 Title
XVDD_36
Muxless AA7
XVDD_37
XVDD_38 AA8 GPU_DPPWR/GND(5/5)
71.0N13P.00U Size Document Number Rev
N13P-GS-A1-GP Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
1D5V_VGA_S0
VRAM2
VRAM1 MDA[63..0] 85,89
MDA[63..0] 85,89 K8 E3 MDA26
MDA23 VDD DQL0 MDA27
K8 VDD DQL0 E3 K2 VDD DQL1 F7
K2 F7 MDA19 N1 F2 MDA28
VDD DQL1 MDA22 VDD DQL2 MDA30
N1 VDD DQL2 F2 R9 VDD DQL3 F8
R9 F8 MDA16 B2 H3 MDA24
D B2 VDD DQL4 H3 D9 VDD DQL5 H8 D
D9 H8 MDA18 G7 G2 MDA25
G7 VDD DQL6 G2 R1 VDD DQL7 H7
R1 H7 MDA17 N9
VDD DQL7 VDD MDA7
N9 VDD DQU0 D7
D7 MDA12 A8 C3 MDA0
DQU0 MDA8 VDDQ DQU1 MDA6
A8 VDDQ DQU1 C3 A1 VDDQ DQU2 C8
A1 C8 MDA15 C1 C2 MDA2
VDDQ DQU2 MDA10 VDDQ DQU3 MDA4
C1 VDDQ DQU3 C2 C9 VDDQ DQU4 A7
C9 A7 MDA13 D2 A2 MDA3
D2 VDDQ DQU5 A2 E9 VDDQ DQU6 B8
E9 B8 MDA14 F1 A3 MDA1
VDDQ DQU6 MDA11 VDDQ DQU7
F1 VDDQ DQU7 A3 H9 VDDQ
H9 VDDQ H2 VDDQ DQSU C7 QSAP_0 85
H2 VDDQ DQSU C7 QSAP_1 85 DQSU# B7 QSAN_0 85
B7 QSAN_1 85 VRAM1_VREF H1
VRAM1_VREF DQSU# VREFDQ
H1 VREFDQ M8 VREFCA DQSL F3 QSAP_3 85
M8 F3 VRAM_ZQ1 L8 G3
VREFCA DQSL QSAP_2 85 ZQ DQSL# QSAN_3 85
VRAM_ZQ2 L8 G3
ZQ DQSL# QSAN_2 85
2
ODT K1 FBA_ODT0 85
2
K1 R8802 85,89 FBA_A0 N3

ODT FBA_ODT0 85 A0
R8801 85,89 FBA_A0 N3 243R2F-2-GP 85,89 FBA_A1 P7
A0 A1
243R2F-2-GP 85,89 FBA_A1 P7 A1 Muxless 85,89 FBA_A2 P3 A2 CS# L2 -FBA_CS0 85
Muxless 85,89 FBA_A2 P3 L2 -FBA_CS0 85 85,89 FBA_A3 N2 T2 FBA_RST 85,89
1
A2 CS# A3 RESET#
85,89 FBA_A3 N2 T2 FBA_RST 85,89 85,89 FBA_A4 P8
1
A3 RESET# A4
85,89 FBA_A4 P8 A4 85,89 FBA_A5 P2 A5
85,89 FBA_A5 P2 A5 85,89 FBA_A6 R8 A6 NC#T7 T7 FBA_A14 85,89
85,89 FBA_A6 R8 A6 NC#T7 T7 FBA_A14 85,89 85,89 FBA_A7 R2 A7 NC#L9 L9
85,89 FBA_A7 R2 A7 NC#L9 L9 85,89 FBA_A8 T8 A8 NC#L1 L1
85,89 FBA_A8 T8 A8 NC#L1 L1 85,89 FBA_A9 R3 A9 NC#J9 J9
85,89 FBA_A9 R3 A9 NC#J9 J9 85,89 FBA_A10 L7 A10/AP NC#J1 J1
C 85,89 FBA_A10 L7 A10/AP NC#J1 J1 85,89 FBA_A11 R7 A11 C
85,89 FBA_A11 R7 A11 85,89 FBA_A12 N7 A12/BC#
85,89 FBA_A12 N7 A12/BC# 85,89 FBA_A13 T3 A13 VSS J8
85,89 FBA_A13 T3 A13 VSS J8 85,89 FBA_A15 M7 A15 VSS M1
85,89 FBA_A15 M7 A15 VSS M1 VSS M9
VSS M9 VSS J2
VSS J2 85,89 FBA_BA0 M2 BA0 VSS P9
85,89 FBA_BA0 M2 BA0 VSS P9 85,89 FBA_BA1 N8 BA1 VSS G8
85,89 FBA_BA1 N8 BA1 VSS G8 85,89 FBA_BA2 M3 BA2 VSS B3
85,89 FBA_BA2 M3 B3 1D5V_VGA_S0 T1
BA2 VSS VSS
VSS T1 VSS A9
VSS A9 85 CLKA0 J7 CK VSS T9
1
85 CLKA0 J7 CK VSS T9 85 CLKA0# K7 CK# VSS E1
85 CLKA0# K7 E1 R8803 P1
CK# VSS 1K33R2F-GP VSS
VSS P1 85 FBA_CKE0 K9 CKE
85 FBA_CKE0 K9 CKE Muxless VSSQ G1
G1 F9
2
VSSQ VSSQ VRAM1_VREF
VSSQ F9 85 DQMA0 D3 DMU VSSQ E8
D3 E8 VRAM1_VREF E7 E2
85 DQMA1 DMU VSSQ 85 DQMA3 DML VSSQ
1
85 DQMA2 E7 DML VSSQ E2 1 VSSQ D8
D8 C8802 D1 C8817
VSSQ VSSQ
1
D1 R8804 SCD01U16V2KX-L1-GP L3 B9 SCD01U16V2KX-L1-GP
85,89 -FBA_WE
2
VSSQ 1K33R2F-GP W E# VSSQ
85,89 -FBA_WE L3 W E# VSSQ B9 Muxless 85,89 -FBA_CAS K3 CAS# VSSQ B1 Muxless
85,89 -FBA_CAS K3 B1 Muxless 85,89 -FBA_RAS J3 G9
2
CAS# VSSQ RAS# VSSQ
85,89 -FBA_RAS J3 G9
2
RAS# VSSQ
H5TQ1G63BFR-12C-GP
H5TQ1G63BFR-12C-GP
Muxless
Muxless
B B
1D5V_VGA_S0
C8801
SCD1U10V2KX-L-GP
Muxless
C8803
SCD1U10V2KX-L-GP
Muxless
C8804
SCD1U10V2KX-L-GP
Muxless
C8805
SCD1U10V2KX-L-GP
Muxless
C8806
SCD1U10V2KX-L-GP
Muxless
FOR VRAM1
1
1
2
1D5V_VGA_S0
1D5V_VGA_S0
1
C8809
SC10U6D3V3MX-L-GP
2
Muxless
C8810
SCD1U10V2KX-L-GP
Muxless
C8811
SCD1U10V2KX-L-GP
Muxless
C8812
SCD1U10V2KX-L-GP
Muxless
C8813
SCD1U10V2KX-L-GP
Muxless
C8814
SCD1U10V2KX-L-GP
Muxless
A <Core Design> A
1
FOR VRAM2 Wistron Corporation

2

Title
GPU-VRAM1,2 (1/4)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
1D5V_VGA_S0
VRAM3
MDA[63..0] 85,88 VRAM4
K8 E3 MDA58 MDA[63..0] 85,88
VDD DQL0 MDA57 MDA43
K2 VDD DQL1 F7 K8 VDD DQL0 E3
N1 F2 MDA62 K2 F7 MDA42
R9 F8 N1 F2
B2 H3 R9 F8
D9 VDD DQL5 H8 B2 VDD DQL4 H3
G7 G2 MDA56 D9 H8 MDA41
R1 VDD DQL7 H7 G7 VDD DQL6 G2
N9 R1 H7 MDA47
VDD MDA51 VDD DQL7
D DQU0 D7 N9 VDD D
A8 C3 MDA53 D7 MDA33
VDDQ DQU1 MDA50 DQU0 MDA37
A1 C8 A8 C3
C1 C2 A1 C8
C9 A7 C1 C2
D2 VDDQ DQU5 A2 C9 VDDQ DQU4 A7
E9 B8 MDA49 D2 A2 MDA39
F1 VDDQ DQU7 A3 E9 VDDQ DQU6 B8
H9 F1 A3 MDA38
VDDQ VDDQ DQU7
H2 VDDQ DQSU C7 QSAP_6 85 H9 VDDQ
B7 QSAN_6 85 H2 C7 QSAP_4 85
VRAM3_VREF DQSU# VDDQ DQSU
H1 VREFDQ DQSU# B7 QSAN_4 85
M8 F3 QSAP_7 85 VRAM3_VREF H1
VRAM_ZQ3 VREFCA DQSL VREFDQ
L8 G3 QSAN_7 85 M8 F3 QSAP_5 85
ZQ DQSL# VRAM_ZQ4 VREFCA DQSL
L8 ZQ DQSL# G3 QSAN_5 85
K1 FBA_ODT1 85
ODT
2
85,88 FBA_A0 N3 K1 FBA_ODT1 85

A0 ODT
2
R8901 85,88 FBA_A1 P7 85,88 FBA_A0 N3
A1 R8904 A0
243R2F-2-GP 85,88 FBA_A2 P3 L2 -FBA_CS1 85 85,88 FBA_A1 P7
A2 CS# A1
Muxless 85,88 FBA_A3 N2 T2 FBA_RST 85,88 243R2F-2-GP 85,88 FBA_A2 P3 L2 -FBA_CS1 85
A3 RESET# A2 CS#
85,88 FBA_A4 P8 Muxless 85,88 FBA_A3 N2 T2 FBA_RST 85,88
1
A4 A3 RESET#
85,88 FBA_A5 P2 85,88 FBA_A4 P8
1
A5 A4
85,88 FBA_A6 R8 A6 NC#T7 T7 FBA_A14 85,88 85,88 FBA_A5 P2 A5
85,88 FBA_A7 R2 A7 NC#L9 L9 85,88 FBA_A6 R8 A6 NC#T7 T7 FBA_A14 85,88
85,88 FBA_A8 T8 L1 85,88 FBA_A7 R2 L9
A8 NC#L1 A7 NC#L9
85,88 FBA_A9 R3 J9 85,88 FBA_A8 T8 L1
A9 NC#J9 A8 NC#L1
85,88 FBA_A10 L7 J1 85,88 FBA_A9 R3 J9
A10/AP NC#J1 A9 NC#J9
85,88 FBA_A11 R7 85,88 FBA_A10 L7 J1
A11 A10/AP NC#J1
85,88 FBA_A12 N7 85,88 FBA_A11 R7
A12/BC# A11
C 85,88 FBA_A13 T3 J8 85,88 FBA_A12 N7 C
A13 VSS A12/BC#
85,88 FBA_A15 M7 M1 85,88 FBA_A13 T3 J8
A15 VSS A13 VSS
VSS M9 85,88 FBA_A15 M7 A15 VSS M1
J2 M9
VSS VSS
85,88 FBA_BA0 M2 BA0 VSS P9 VSS J2
85,88 FBA_BA1 N8 G8 1D5V_VGA_S0 85,88 FBA_BA0 M2 P9
BA1 VSS BA0 VSS
85,88 FBA_BA2 M3 BA2 VSS B3 85,88 FBA_BA1 N8 BA1 VSS G8
VSS T1 85,88 FBA_BA2 M3 BA2 VSS B3
1
A9 T1
VSS R8902 VSS
85 CLKA1 J7 T9 A9
CK VSS 1K33R2F-GP VSS
85 CLKA1# K7 E1 85 CLKA1 J7 T9
CK# VSS CK VSS
VSS
P1 Muxless 85 CLKA1# K7
CK# VSS
E1
85 FBA_CKE1 K9 P1
2
CKE VSS
G1 85 FBA_CKE1 K9
VSSQ VRAM3_VREF CKE VRAM3_VREF
F9 G1
VSSQ VSSQ
85 DQMA6 D3 DMU VSSQ E8 VSSQ F9
1
85 DQMA7 E7 DML VSSQ E2 85 DQMA4 D3 DMU VSSQ E8
1
D8 R8903 C8902 85 DQMA5 E7 E2 C8917
VSSQ 1K33R2F-GP SCD01U16V2KX-L1-GP DML VSSQ SCD01U16V2KX-L1-GP
D1 D8
2
VSSQ VSSQ
85,88 -FBA_WE L3 B9 Muxless Muxless D1 Muxless
2
WE# VSSQ VSSQ
85,88 -FBA_CAS K3 B1 85,88 -FBA_WE L3 B9
2
CAS# VSSQ WE# VSSQ
85,88 -FBA_RAS J3 RAS# VSSQ G9 85,88 -FBA_CAS K3 CAS# VSSQ B1
85,88 -FBA_RAS J3 RAS# VSSQ G9
H5TQ1G63BFR-12C-GP
Muxless H5TQ1G63BFR-12C-GP
Muxless
B B
1D5V_VGA_S0
C8901
SCD1U10V2KX-L-GP
Muxless
C8903
SCD1U10V2KX-L-GP
Muxless
C8904
SCD1U10V2KX-L-GP
Muxless
C8905
SCD1U10V2KX-L-GP
Muxless
C8906
SCD1U10V2KX-L-GP
Muxless
FOR VRAM3
1
1
2
1D5V_VGA_S0
1D5V_VGA_S0
1
C8909
SC10U6D3V3MX-L-GP
2
C8910
SCD1U10V2KX-L-GP
Muxless
C8911
SCD1U10V2KX-L-GP
Muxless
C8912
SCD1U10V2KX-L-GP
Muxless
C8913
SCD1U10V2KX-L-GP
Muxless
C8914
SCD1U10V2KX-L-GP
Muxless
Muxless
<Core Design>
1
A A

2

Title
GPU-VRAM3,4 (2/4)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
VRAM6
1D5V_VGA_S0
VRAM5 MDB[63..0] 85,91
MDB[63..0] 85,91 K8 E3 MDB3
MDB20 VDD DQL0 MDB7
K8 E3 K2 F7
VDD DQL0 MDB17 VDD DQL1 MDB0
K2 F7 N1 F2
N1 VDD DQL2 F2 R9 VDD DQL3 F8
R9 F8 MDB19 B2 H3 MDB1
B2 VDD DQL4 H3 D9 VDD DQL5 H8
D9 H8 MDB21 G7 G2 MDB2
G7 VDD DQL6 G2 R1 VDD DQL7 H7
D R1 H7 MDB16 N9 D
VDD DQL7 VDD MDB30
N9 D7
VDD MDB14 DQU0 MDB25
D7 A8 C3
DQU0 MDB8 VDDQ DQU1 MDB31
A8 C3 A1 C8
VDDQ DQU1 MDB15 VDDQ DQU2 MDB27
A1 VDDQ DQU2 C8 C1 VDDQ DQU3 C2
C1 C2 MDB10 C9 A7 MDB28
C9 VDDQ DQU4 A7 D2 VDDQ DQU5 A2
D2 A2 MDB9 E9 B8 MDB29
E9 VDDQ DQU6 B8 F1 VDDQ DQU7 A3
F1 A3 MDB11 H9
VDDQ DQU7 VDDQ
H9 VDDQ H2 VDDQ DQSU C7 QSBP_3 85
H2 VDDQ DQSU C7 QSBP_1 85 DQSU# B7 QSBN_3 85
B7 QSBN_1 85 VRAM5_VREF H1
VRAM5_VREF DQSU# VREFDQ
H1 VREFDQ M8 VREFCA DQSL F3 QSBP_0 85
M8 F3 QSBP_2 85 VRAM_ZQ6 L8 G3 QSBN_0 85
VRAM_ZQ5 VREFCA DQSL ZQ DQSL#
L8 G3 QSBN_2 85
ZQ DQSL#
ODT K1 FBB_ODT0 85
2
2
K1 FBB_ODT0 85 85,91 FBB_A0 N3
R9001 ODT R9002 A0
85,91 FBB_A0 N3 85,91 FBB_A1 P7
A0 A1
Muxless Do Not Stuff 85,91 FBB_A1 P7 A1 Do Not Stuff 85,91 FBB_A2 P3 A2 CS# L2 -FBB_CS0 85
85,91 FBB_A2 P3
A2 CS#
L2 -FBB_CS0 85 Muxless 85,91 FBB_A3 N2
A3 RESET#
T2 FBB_RST 85,91
85,91 FBB_A3 N2 T2 FBB_RST 85,91 85,91 FBB_A4 P8
1
1
A3 RESET# A4
85,91 FBB_A4 P8 A4 85,91 FBB_A5 P2 A5
85,91 FBB_A5 P2 85,91 FBB_A6 R8 T7 FBB_A14 85,91
A5 A6 NC#T7
85,91 FBB_A6 R8 T7 FBB_A14 85,91 85,91 FBB_A7 R2 L9
A6 NC#T7 A7 NC#L9
85,91 FBB_A7 R2 L9 85,91 FBB_A8 T8 L1
A7 NC#L9 A8 NC#L1
85,91 FBB_A8 T8 L1 85,91 FBB_A9 R3 J9
A8 NC#L1 A9 NC#J9
85,91 FBB_A9 R3 J9 85,91 FBB_A10 L7 J1
A9 NC#J9 A10/AP NC#J1
85,91 FBB_A10 L7 J1 85,91 FBB_A11 R7
A10/AP NC#J1 A11
85,91 FBB_A11 R7 85,91 FBB_A12 N7
C A11 A12/BC# C
85,91 FBB_A12 N7 A12/BC# 85,91 FBB_A13 T3 A13 VSS J8
85,91 FBB_A13 T3 J8 85,91 FBB_A15 M7 M1
A13 VSS A15 VSS
85,91 FBB_A15 M7 A15 VSS M1 VSS M9
VSS M9 VSS J2
VSS J2 85,91 FBB_BA0 M2 BA0 VSS P9
85,91 FBB_BA0 M2 BA0 VSS P9 85,91 FBB_BA1 N8 BA1 VSS G8
85,91 FBB_BA1 N8 G8 1D5V_VGA_S0 85,91 FBB_BA2 M3 B3
BA1 VSS BA2 VSS
85,91 FBB_BA2 M3 B3 T1
BA2 VSS VSS
T1 A9
VSS VSS
1
A9 85 CLKB0 J7 T9
VSS R9003 CK VSS
85 CLKB0 J7 T9 85 CLKB0# K7 E1
CK VSS Do Not Stuff CK# VSS
85 CLKB0# K7 E1 P1
CK# VSS VSS
VSS
P1 Muxless 85 FBB_CKE0 K9
CKE
85 FBB_CKE0 K9 G1
2
CKE VSSQ
VSSQ G1 VSSQ F9
F9 VRAM5_VREF 85 DQMB3 D3 E8
VSSQ DMU VSSQ
85 DQMB1 D3 E8 85 DQMB0 E7 E2
DMU VSSQ DML VSSQ
1
85 DQMB2 E7 E2 D8
DML VSSQ VSSQ
1
D8 R9004 D1 VRAM5_VREF
VSSQ Do Not Stuff C9002 VSSQ
VSSQ D1 85,91 -FBB_WE L3 WE# VSSQ B9
L3 B9 Muxless Do Not Stuff K3 B1
85,91 -FBB_WE 85,91 -FBB_CAS
2
WE# VSSQ CAS# VSSQ
1
85,91 -FBB_CAS K3 B1 Muxless 85,91 -FBB_RAS J3 G9
2
CAS# VSSQ RAS# VSSQ C9017
85,91 -FBB_RAS J3 G9
RAS# VSSQ Do Not Stuff
2
Do Not Stuff Muxless
Do Not Stuff Muxless
Muxless
B B
1D5V_VGA_S0
C9001
Do Not Stuff
Muxless
C9003
Do Not Stuff
Muxless
C9004
Do Not Stuff
Muxless
C9005
Do Not Stuff
Muxless
C9006
Do Not Stuff
Muxless
FOR VRAM5
1
1
2
1D5V_VGA_S0
1D5V_VGA_S0
1
C9009
Do Not Stuff
2
Muxless
C9010
Do Not Stuff
Muxless
C9011
Do Not Stuff
Muxless
C9012
Do Not Stuff
Muxless
C9013
Do Not Stuff
Muxless
C9014
Do Not Stuff
Muxless
A A
<Core Design>
1

2

Title
GPU-VRAM5,6 (3/4)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0
VRAM7
1D5V_VGA_S0
MDB[63..0] 85,90 VRAM8
K8 E3 MDB34 MDB[63..0] 85,90
VDD DQL0 MDB33 MDB58
K2 VDD DQL1 F7 K8 VDD DQL0 E3
N1 F2 MDB36 K2 F7 MDB57
R9 VDD DQL3 F8 N1 VDD DQL2 F2
B2 H3 MDB35 R9 F8 MDB56
D9 VDD DQL5 H8 B2 VDD DQL4 H3
G7 G2 MDB32 D9 H8 MDB61
R1 VDD DQL7 H7 G7 VDD DQL6 G2
N9 R1 H7 MDB62
VDD MDB48 VDD DQL7
D DQU0 D7 N9 VDD D
A8 C3 MDB53 D7 MDB41
VDDQ DQU1 MDB50 DQU0 MDB47
A1 VDDQ DQU2 C8 A8 VDDQ DQU1 C3
C1 C2 MDB55 A1 C8 MDB42
C9 VDDQ DQU4 A7 C1 VDDQ DQU3 C2
D2 A2 MDB54 C9 A7 MDB40
E9 VDDQ DQU6 B8 D2 VDDQ DQU5 A2
F1 A3 MDB52 E9 B8 MDB44
VDDQ DQU7 VDDQ DQU6 MDB46
H9 VDDQ F1 VDDQ DQU7 A3
H2 VDDQ DQSU C7 QSBP_6 85 H9 VDDQ
DQSU# B7 QSBN_6 85 H2 VDDQ DQSU C7 QSBP_5 85
VRAM7_VREF H1 B7 QSBN_5 85
VREFDQ VRAM7_VREF DQSU#
M8 VREFCA DQSL F3 QSBP_4 85 H1 VREFDQ
VRAM_ZQ7 L8 G3 QSBN_4 85 M8 F3 QSBP_7 85
ZQ DQSL# VRAM_ZQ8 VREFCA DQSL
L8 ZQ DQSL# G3 QSBN_7 85
2
ODT K1 FBB_ODT1 85
2
R9101 85,90 FBB_A0 N3 K1
A0 ODT FBB_ODT1 85
Do Not Stuff 85,90 FBB_A1 P7 R9104 85,90 FBB_A0 N3
A1 A0
Muxless 85,90 FBB_A2 P3 A2 CS# L2 -FBB_CS1 85 Do Not Stuff 85,90 FBB_A1 P7 A1
85,90 FBB_A3 N2 T2 FBB_RST 85,90 Muxless 85,90 FBB_A2 P3 L2 -FBB_CS1 85
1
A3 RESET# A2 CS#
85,90 FBB_A4 P8 85,90 FBB_A3 N2 T2 FBB_RST 85,90
1
A4 A3 RESET#
85,90 FBB_A5 P2 A5 85,90 FBB_A4 P8 A4
85,90 FBB_A6 R8 A6 NC#T7 T7 FBB_A14 85,90 85,90 FBB_A5 P2 A5
85,90 FBB_A7 R2 A7 NC#L9 L9 85,90 FBB_A6 R8 A6 NC#T7 T7 FBB_A14 85,90
85,90 FBB_A8 T8 A8 NC#L1 L1 85,90 FBB_A7 R2 A7 NC#L9 L9
85,90 FBB_A9 R3 A9 NC#J9 J9 85,90 FBB_A8 T8 A8 NC#L1 L1
85,90 FBB_A10 L7 A10/AP NC#J1 J1 85,90 FBB_A9 R3 A9 NC#J9 J9
85,90 FBB_A11 R7 A11 85,90 FBB_A10 L7 A10/AP NC#J1 J1
85,90 FBB_A12 N7 A12/BC# 85,90 FBB_A11 R7 A11
C 85,90 FBB_A13 T3 A13 VSS J8 85,90 FBB_A12 N7 A12/BC# C
85,90 FBB_A15 M7 A15 VSS M1 85,90 FBB_A13 T3 A13 VSS J8
VSS M9 85,90 FBB_A15 M7 A15 VSS M1
VSS J2 VSS M9
85,90 FBB_BA0 M2 BA0 VSS P9 VSS J2
85,90 FBB_BA1 N8 BA1 VSS G8 85,90 FBB_BA0 M2 BA0 VSS P9
85,90 FBB_BA2 M3 BA2 VSS B3 85,90 FBB_BA1 N8 BA1 VSS G8
T1 1D5V_VGA_S0 85,90 FBB_BA2 M3 B3
VSS BA2 VSS
VSS A9 VSS T1
85 CLKB1 J7 CK VSS T9 VSS A9
1
85 CLKB1# K7 CK# VSS E1 85 CLKB1 J7 CK VSS T9
P1 R9102 85 CLKB1# K7 E1
VSS Do Not Stuff CK# VSS
85 FBB_CKE1 K9 CKE VSS P1
VSSQ G1 Muxless 85 FBB_CKE1 K9 CKE
F9 G1
2
VSSQ VSSQ
85 DQMB6 D3 DMU VSSQ E8 VSSQ F9
85 DQMB4 E7 E2 VRAM7_VREF 85 DQMB5 D3 E8 VRAM7_VREF
DML VSSQ DMU VSSQ
VSSQ D8 1 85 DQMB7 E7 DML VSSQ E2
VSSQ D1 VSSQ D8
1
L3 B9 R9103 C9118 D1
85,90 -FBB_W E WE# VSSQ Do Not Stuff Do Not Stuff VSSQ
K3 B1 L3 B9 C9117
85,90 -FBB_CAS CAS# VSSQ 85,90 -FBB_W E WE# VSSQ Do Not Stuff
85,90 -FBB_RAS J3 G9 Muxless Muxless 85,90 -FBB_CAS K3 B1
2
RAS# VSSQ CAS# VSSQ
85,90 -FBB_RAS J3 G9 Muxless
2
RAS# VSSQ
Do Not Stuff
Muxless Do Not Stuff
Muxless
B 1D5V_VGA_S0 B
1D5V_VGA_S0
C9101
Do Not Stuff
Muxless
C9102
Do Not Stuff
Muxless
C9103
Do Not Stuff
Muxless
C9104
Do Not Stuff
Muxless
C9105
Do Not Stuff
Muxless
C9106
Do Not Stuff
Muxless
FOR VRAM7
1
1
2
1
C9109
Do Not Stuff
2 Muxless
1D5V_VGA_S0
<Core Design>
C9110
Do Not Stuff
Muxless
C9111
Do Not Stuff
Muxless
C9112
Do Not Stuff
Muxless
C9113
Do Not Stuff
Muxless
C9114
Do Not Stuff
Muxless
A A
1
Wistron Corporation
FOR VRAM8 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2
Title
GPU-VRAM7,8 (4/4)
Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = PWR.Plane.Regulator_GFX
Change power source Net
Wayler 12/07
PWR_DCBATOUT_VGA_CORE_2
DCBATOUT PWR_DCBATOUT_VGA_CORE Muxless
PG9201 1 2 VGA_CSP1_R
1 2
1
PR9201 Muxless
Do Not Stuff Muxless Muxless Muxless 30K9R2F-GP PR9202
PG9202 PC9202 PC9203 PC9204 42K2R2F-L-GP
1
D D
2
SCD01U50V2KX-L-GP
VGA_CSP1_R_1
1 2
SC10U25V5KX-GP
SC10U25V5KX-GP
PR9203
1
Do Not Stuff 76K8R2F-GP
2
PWR_VGA_CORE_PN1
2
PG9203 Muxless PC9201
SCD01U50V2KX-L-GP
1 2
2
Muxless Muxless
Do Not Stuff PR9204
PG9204 PWR_DCBATOUT_VGA_CORE_2 NTC-150K-GP
1 2
Do Not Stuff VGA_CSN1_R
2
PG9205 PWR_VGA_CORE_UGATE1
1 2
PU9202
5
6
7
8
FDMS7698-GP
Do Not Stuff N13P-GS-LP N13P-GL N13M-GS
2
D
D
D
D
PG9206 2 PR9209 1 VGA_VBST1_R 1 2 84.07698.037
71.0N13P.00U 71.0N13P.B0U 71.0N13M.E0U 0R3J-4-GP
PWR_VGA_CORE_VBST1
1 2 2nd = 84.00172.037
Muxless PC9206 Muxless PG9214 PG9213
Do Not Stuff NVVDD 0.9V 0.975V 0.875V SCD1U25V3KX-L-GP Do Not Stuff Do Not Stuff
1
PWR_VGA_CORE_V5FILT
G
Muxless 4
Boot Voltage VID[6:0]=0110000 VID[6:0]=0101010 VID[6:0]0110010
S
S
S
VGA_CORE
1 phase change 0ohm
3
2
1
PR9215 DY 63.10334.L0L 63.10334.L0L PL9201
1
NV_VID1 PR9207 PR9208 1 2
PR9230 63.10334.L0L DY DY 0R2J-L-GP Do Not Stuff L-D36UH-1-GP
Muxless 68.R3610.20A PT9201 PT9202
PR9217 DY 63.10334.L0L DY DY 2nd = 68.R3610.20C Muxless DY
5
6
7
8
1
ST330U2VDM-4-GP
Do Not Stuff
NV_VID3 Muxless
D
D
D
D
PR9232 63.10334.L0L DY 63.10334.L0L PU9203
PWR_VGA_CORE_LGATE1 FDMS0308AS-GP Panasonic. 0.36uH 10*11.5*4
2
1
1
PR9218 63.10334.L0L DY 63.10334.L0L PR9210 PR9211 84.00308.B30
NV_VID4 Do Not Stuff 0R2J-L-GP 2nd = 84.00166.037 DCR=1.1mohm
PR9233 DY 63.10334.L0L DY
G
DY Muxless Muxless 4 Idc=17A, Isat=24A
S
S
S
2
3
2
1
3D3V_VGA_S0
3D3V_VGA_S0
PR9218 Mount , PR9233 DY For N13M-GS Vboot = 0.875V
C PWR_VGA_CORE_AGND C
PWR_VGA_CORE_THAL# 1 PR9212 2 DGPU_VR_HOT# 27
1
PWR_VGA_CORE_TRIPSEL Do Not Stuff
PR9214 PR9215 PR9216 PR9217 PR9218 PR9219 PR9220 5V_S0 PR9213 PWR_DCBATOUT_VGA_CORE
Vga_core
1
1
Do Not Stuff
10KR2J-L-GP
Do Not Stuff
Do Not Stuff
10KR2J-L-GP
10KR2J-L-GP
Do Not Stuff
56R2J-L1-GP
PU9201 Muxless
Muxless MuxlessMuxless Muxless Iccmax=24A
DY DY DY DY
2
PC9208 1 2 SC2D2U10V3KX-L-GP 26 31 DY
PC9209 1 2 SC2D2U10V3KX-L-GP PWR_VGA_CORE_V5FILT 38 V5IN TRIPSEL
36 PWR_VGA_CORE_VREF DY OCP>40A
2
V5FILT TONSEL PWR_VGA_CORE_UGATE2 PC9210 PC9211 PC9212

Muxless DY
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
PWR_VGA_CORE_VBST1 22
PWR_VGA_CORE_VBST2 VBST1
29 21
VBST2 DRVH1
24
2
PC9214 1 PWR_VGA_CORE_VREF DRVL1
2 SCD22U10V2KX-1GP 40 PU9205
VREF
5
6
7
8
Muxless 30 Do Not Stuff
DRVH2
D
D
D
D
DRVL2
27 DY
PWR_VGA_CORE_AGND PWR_VGA_CORE_VID0
86 H_VID0 1
PR9221
2
Do Not PWR_VGA_CORE_VID1
20
VID0 PWR_VGA_CORE_THAL#
Panasonic. 0.36uH 10*11.5*4
86 H_VID1 1 2 Stuff 19 10
PR9222 Do Not PWR_VGA_CORE_VID2 VID1 THAL# PWR_VGA_CORE_IMON DCR=1.1mohm
86 H_VID2 1 2 Stuff 18 11
PR9223 Do Not PWR_VGA_CORE_VID3 VID2 IMON PWR_VGA_CORE_OSRSEL PWR_VGA_CORE_LGATE2
2 Stuff
G
1 17 32 4
86 H_VID3 VID3 OSRSEL Idc=17A, Isat=24A
S
S
S
PR9224
1 Do Not
2 Stuff PWR_VGA_CORE_VID4 16 33
86 H_VID4 VID4 PGD DGPU_PWROK 22,93
PR9257
1 Do Not
2 Stuff PWR_VGA_CORE_VID5 15 34
86 H_VID5
3
2
1
PR9258 Do Not Stuff PWR_VGA_CORE_VID6 VID5 PG# PWR_VGA_CORE_DROOP
14 39
VID6 DROOP VGA_CORE
PR9229 PR9230 PR9231 PR9232 PR9233 PR9234 PR9235 VGA_CSP1_R 1 2 PWR_VGA_CORE_CSP1 6
1
CSP1
10KR2J-L-GP
Do Not Stuff
10KR2J-L-GP
10KR2J-L-GP
Do Not Stuff
Do Not Stuff
10KR2J-L-GP
VGA_CSN1_R PR9226
1 Do Not
2 Stuff PWR_VGA_CORE_CSN1 5 23 PWR_VGA_CORE_LL1 PL9202
PR9227 Do Not Stuff CSN1 LL1 PWR_VGA_CORE_LL2
28 1 2
PWR_VGA_CORE_CSP2 LL2 Do Not Stuff
Muxless DY MuxlessMuxless DY DY Muxless 3
CSP2
PWR_VGA_CORE_CSN2 4 9 PWR_VGA_CORE_THRM
CSN2 THRM
DY
2
PR9239 1Do Not Stuff2 PWR_VGA_CORE_GFB 7 1 PWR_VGA_CORE_V5FILT DY PT9204 PT9203

83 VGACORE_GND_SENSE_1 GFB PU
PR9241 1Do Not Stuff2 PWR_VGA_CORE_VFB 8 1 2VGA_VBST2_R 1 2
83 VGACORE_VDD_SENSE_1 PWR_VGA_CORE_IMON
1
VFB
ST330U2VDM-4-GP
ST330U2VDM-4-GP
PC9217 1 Muxless
2 SC3300P50V2KX-1GP
5
6
7
8
2
3D3V_VGA_S0 PR9243 1 Muxless2 11K8R2F-GP 12 25 PR9225 PC9215 PU9206
NTC-150K-GP
SLP PGND
D
D
D
D
PG9212
Do Not Stuff
PG9211
Do Not Stuff
13 PR9238 Do Not Stuff Do Not Stuff Do Not Stuff Muxless Muxless
2
PWR_VGA_CORE_VR_ON PCNT
1 2 35
EN GND
2 Muxless DY DY
PWR_VGA_CORE_AGND 37 41 PWR_VGA_CORE_VBST2
1
PR9256 SLEW GND
1
10KR2J-L-GP PWR_VGA_CORE_V5FILT
G
4
1
PWR_VGA_CORE_PCNT
S
S
S
Muxless PC9225 TPS51728RHAR-GP 1Muxless 2 PWR_VGA_CORE_THRM_R
B SCD1U25V3KX-L-GP 10R2J-L-GP 2 Muxless B
PD9201
2
3
2
1
PWR_VGA_CORE_CSN1
PWR_VGA_CORE_CSN2
PWR_VGA_CORE_CSP1
PWR_VGA_CORE_CSP2
Muxless PR9261 PR9244

2 1 Muxless 2KR2F-3-GP
93 DGPU_PWR_EN
PWR_VGA_CORE_AGND
VGA_CSN2_R
CH551H-30PT-GP 3D3V_VGA_S0 PR9249
1
83.R5003.C8F Do Not Stuff PWR_VGA_CORE_SLEW
VGA_CSP2_R_1
2ND = 83.R5003.H8H DY PR9240
3rd = 83.5R003.08F 1 2 1 Do Not Stuff
Muxless
Do Not Stuff
PR9253 PR9251 DY
1
124KR2F-GP
1phase PR9261 mount
1
1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
PR9252 Muxless DYDo Not Stuff PR9248 PR9246 PC9218
2 2
1
Do Not Stuff PC9219 9K09R2F-GP Do Not Stuff PWR_VGA_CORE_PN2
DY DY DY DY 2phase PR9261 DY
2
1
1
SC220P50V2KX-3GP
PC9221
PC9222
PC9223
PC9224
DY Muxless DY
2
DY
2
PWR_VGA_CORE_VREF
PR9247
2
2
Muxless VGA_VREF_L Do Not Stuff
86 GPU_DPRSLP
DY
1
1
PWR_VGA_CORE_AGND PC9220
2
SC3300P50V2KX-1GP 1 2 VGA_CSP2_R
PR9254 Muxless
2
0R2J-L-GP PR9250
Muxless PWR_VGA_CORE_VREF Do Not Stuff
PWR_VGA_CORE_AGND DY
1
PWR_VGA_CORE_AGND
PWR_VGA_CORE_AGND
1
1 2
PR9255 Do Not Stuff
PR9259
0R2J-L-GP
Muxless 3D3V_VGA_S0
2
PR9236 PWR_VGA_CORE_AGND
A Do Not Stuff A
1
DY
VGA_CSP2_R 1 2 PWR_VGA_CORE_CSP2 PR9228
10KR2J-L-GP
Muxless
VGA_CSN2_R 1 2 PWR_VGA_CORE_CSN2
<Core Design>
2
DY
Do Not Stuff DGPU_PWROK
Wistron Corporation
2
PR9237
PR9260 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
0R2J-L-GP Taipei Hsien 221, Taiwan, R.O.C.
Muxless
Title
TPS51728_VGA_CORE
1
1phase PR9259 , PR9260 mount Size Document Number Rev
2phase PR9259 , PR9260 DY

PWR_VGA_CORE_AGND
Husk/Petra -1
Date: Thursday, March 08, 2012 Sheet 92 of 103
5 4 3 2 1
5 4 3 2 1
D
Q9302 D
DMP2130L-7-GP U9301
84.02130.031 AO4468-GP
2ND = 84.03413.A31 84.04468.037
Muxless 3D3V_VGA_S0 1D5V_S3 2nd = 84.08882.037 1D5V_VGA_S0 U9302
AO4468, SO-8
AO4468-GP
S Id=11.6A, Qg=9~12nC 1D05V_VTT 84.04468.037 1D05V_VGA_S0
3D3V_S0
D Rdson=17.4~22m ohm 8 D S 1 2nd = 84.08882.037
D
7 D S 2
1
C9302
SCD1U10V2KX-L1-GP
Muxless
6 D S 3 TC9302 TC9301
1
R9302 C9301 5 D G 4 ST100U6D3VBM-5GP Do Not Stuff 8 D S 1
1
100KR2J-4-GP SC10U6D3V3MX-L-GP 77.C1071.081 Do Not Stuff 7 D S 2
Muxless Muxless Muxless Muxless DY 6 D S 3
2
5 D G 4
2
2
3.3V_ALW_1
Muxless
2
6
4
Q9301 R9304
2N7002KDW-GP 10R2J-2-GP
84.2N702.A3F Muxless RUNON_R_1
2nd = 84.DM601.03F
1
Muxless
1
RUNON_R_1
C C
3.3V_RUN_VGA_1
-1:3D3V_VGA discharge
1
3D3V_S0 1 R9308 2 DGPU_PWR_EN 92 C9303
10KR2F-L1-GP Do Not Stuff
DGPU_PWR_EN
Muxless DY
2
2
C9308
SCD22U10V2KX-1GP
G Muxless
1
18,27 DGPU_PWR_EN#
D
Q9305
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Muxless
B RUNON_R_1 B
5V_S5 U9305
2
G5938TL1U-GP
74.05938.09P R9323
5V_S5 Do Not Stuff
1
C9304
Do Not Stuff 6 1
22,92 DGPU_PWROK
1
EN VCC
DY 1D5V_VGA_S0 5 2
2
DC2 GND RUNON_R_1_HV

1D05V_VGA_S0 4 3
DC1 HV
Muxless
<Core Design>
A A
Wistron Corporation
Title
DISCRETE VGA POWER

Custom
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
<Core Design>
A
Title
LVDS_Switch
A4
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
D D
C C
B B
A <Core Design> A
Wistron Corporation
Title
CRT_Switch
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
SSID = SDIO
D D
C C
B B
A A
<Core Design>
Wistron Corporation
Title
TOUCH PANEL
A2
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
CPU
HS3 HS2
STF236R128H34-1-GP STF236R128H34-1-GP
HS1
STF236R128H34-1-GP
Check test point
H6 H10 H11 3D3V_S0 1 AFTP1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
H1 H2 H3 H4 H5 3D3V_AUX_S5 1 AFTP7
1
3D3V_S5 1 AFTP8
1
1
5V_S5 1 AFTP9
1
D D
1 AFTP10
1st = 34.4TU18.001 1st = 34.4TU18.001 1st = 34.4TU18.001 19,27 PM_PW RBTN#
5,22,36 H_CPUPW RGD 1 AFTP11
HS4 HS5 AFTP12
1
STF236R128H34-1-GP STF236R128H34-1-GP 27,36 S5_ENABLE
H12 5,18,27,31,36,65,71,83 PLT_RST# 1 AFTP13
Do Not Stuff
放放Dimm Door打打打打打打
1
1st = 34.4TU18.001 1st = 34.4TU18.001 Test Point
1
Muxless VGA Muxless
-1:EC(34.4TU18.001)
2nd:34.4TU18.101
C C
1D05V_VTT DCBATOUT DCBATOUT_2 PW R_VCCCORE1_DCBATOUT 3D3V_S0

EC9705
Do Not Stuff
EC9706
Do Not Stuff
EC9701
SCD1U50V3KX-GP
EC9702
Do Not Stuff
EC9707
SCD1U50V3KX-GP
EC9723
Do Not Stuff
EC9722
SCD1U50V3KX-GP
EC9721
SCD1U50V3KX-GP
EC9704
Do Not Stuff
1
EC9708
Do Not Stuff
1
1
DY DY
DY DY DY DY
2
2
B B
1 2
DY
EC9728
Do Not Stuff
1D5V_S3 5V_S0 5V_S5
1 2
DY
EC9711
Do Not Stuff
EC9712
Do Not Stuff
EC9713
Do Not Stuff
EC9714
Do Not Stuff
EC9715
Do Not Stuff
EC9716
Do Not Stuff
EC9717
Do Not Stuff
EC9718
Do Not Stuff
EC9719
SCD1U10V2KX-L1-GP
EC9720
Do Not Stuff
EC9725
Do Not Stuff
EC9729
1
1
Do Not Stuff
DY DY DY DY DY DY DY DY DY DY
2
2
AUD_AGND
DCBATOUT LCDVDD
EC9703
SCD1U50V3KX-GP
EC9726
SCD1U10V2KX-L1-GP
A <Core Design> A
1
Wistron Corporation
2

Title
UNUSED PARTS/EMI Capacitors

A3
Husk/Petra -1
Date: Thursday, March 08, 2012 Sheet 97 of 103
5 4 3 2 1
5 4 3 2 1
Power Sequence
PU4601 PU4501 U4801
PM_SLP_S4# 1D5V_S3 RUNPWROK 1D05V_S0 1.05VTT_PWRGD 0D85V_S0 0D85V_S0
D 1D5V_S3 D
1D05V_VTT ALL_POWER_OK
0D75V_EN
0D75V_S0
PLT_RST#
U? U? U?
U?
ALL_POWER_OK EC S0_PWR_GOOD PCH PM_DRAM_PWRGD AND GATE VDDPWRGOOD CPU H_CPU_SVIDCLK
C C
ALL_POWER_OK
H_CPUPWRGD
U?
VCC_GFXCORE
CPU_CORE
SYS_PWROK
VCC_CORE
H_CPU_SVIDCLK U?
B IMVP_PWRGD AND GATE B
S0_PWR_GOOD
A <Core Design> A
Wistron Corporation
Title
Change History
A3
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
Intel-Power Up Sequence
(AC mode) red word: KBC GPIO
(DC mode) red word: KBC GPIO
+RTC_VCC
+RTC_VCC T1
T1
PCH_RTCRST#
PCH_RTCRST#
+PWR_SRC
+PWR_SRC T2
T2
+3.3V_RTC_LDO
+3.3V_RTC_LDO
T3 KBC GPIO36 control
D Press Power button D
S5_ENABLE KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3
T4
+5V_ALW EC_ENABLE# (GPIO51) keep low
T5 T3
+KBC_PWR
+3.3V_ALW T4 KBC GPIO36 control
T6
S5_ENABLE
+5VALW_PCH_VCC5REFSUS T5
+5V_ALW
T6 +5V_ALW & +3.3V_ALW need meet 0.7V difference
+15V_ALW T7
T8 TPS51125 to KBC GPIO46 +3.3V_ALW
T7 +5V_ALW & +3.3V_ALW need meet 0.7V difference
3V_5V_POK
PCH to KBC GPI94 +5VALW_PCH_VCC5REFSUS
SUS_PWR_DN_ACK T9
KBC GPIO43 to PCH +15V_ALW T8
T10 T9 TPS51125 to KBC GPIO46
PCH_RSMRST#(EC Delay 40ms) >10ms
T11 PCH to KBC GPIO00 3V_5V_POK
T10 KBC GPO84 to PCH
PCH_SUSCLK_KBC
PM_PWRBTN#
AC_PRESENT_EC T12 <200ms PCH to KBC GPI94
SUS_PWR_DN_ACK T11
KBC GPIO43 to PCH
PCH_RSMRST# T12 >10ms
PCH to KBC GPIO01
Press Power button T13
PCH_SUSCLK_KBC
AC KBC_PWRBTN_EC# KBC_PWRBTN_EC# GPIO3
3V_5V_POK
T13 KBC GPO84 to PCH DC PCH_RSMRST#
AC PM_PWRBTN# T14
PM_SLP_S4#
AC PM_PWRBTN# T15
T14 PM_SLP_S3# >30us
T16 KBC GPO16 to LAN
PM_LAN_ENABLE
PM_SLP_S4# T17
T15
+3.3V_LAN
PM_SLP_S3# >30us
C
T16 KBC GPO16 to LAN C
+1.5V_SUS T18
PM_LAN_ENABLE
T17
+V_DDR_REF(0.9V) T19
+3.3V_LAN +5V_RUN & +3.3V_RUN need meet 0.7V difference
+5V_RUN T20
+1.5V_SUS T18
+3.3V_RUN T21
+V_DDR_REF(0.9V) T19 T22
+5V_RUN & +3.3V_RUN need meet 0.7V difference
+5VS_PCH_VCC5REF
+5V_RUN T20
+1.5V_RUN T23 H_PWRGD
+3.3V_RUN T21 T25 >1ms
T22
+1.8V_RUN T24
+5VS_PCH_VCC5REF KBC GPIO71 to RT8208B
GFX_CORE_EN(Discrete only) T26
+1.5V_RUN T23 H_PWRGD
T25 >1ms T27
+VGA_CORE(Discrete only)
+1.8V_RUN T24 T28 KBC GPIO30 to APL5930
KBC GPIO71 to RT8208B 1.0V_RUN_VGA_EN(Discrete only)
GFX_CORE_EN(Discrete only)------Delay 5ms T26
T29
T27 +1.0V_RUN_VGA(Discrete only)
+VGA_CORE(Discrete only) T30 KBC GPIO66 to APL5930
T28 KBC GPIO30 to APL5930 1.8V_VGA_RUN_EN(Discrete only)
1.0V_RUN_VGA_EN(Discrete only)------Delay 4ms
T31
T29 +1.8V_RUN_VGA(Discrete only)
+1.0V_RUN_VGA(Discrete only) T32 KBC GPI95
T30 KBC GPIO66 to APL5930 +3.3V_RUN_VGA_EN(Discrete only)-->DY reserved
1.8V_VGA_RUN_EN(Discrete only)------Delay 5ms T33
T31 +3.3V_RUN_VGA(Discrete only) -->Reserved for sequence
+1.8V_RUN_VGA(Discrete only)
T32 KBC GPI95
+3.3V_RUN_VGA_EN(Discrete only)-->DY reserved RUNPWROK T34
T33
T35
+3.3V_RUN_VGA(Discrete only) -->Reserved for sequence +1.05V_VTT
T36 TPS51218 to KBC GPI34
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
RUNPWROK T34
T37
T35 +0.75V_DDR_VTT
+1.05V_VTT
B
T36 TPS51218 to KBC GPI34 H_VTTPWRGD T38 B
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)

T37
+0.75V_DDR_VTT
H_VTTPWRGD T38
+1.05V_VTT
T39
CPU to TPS51611
GFX_VR_EN(UMA only)
+1.05V_VTT UMA GFX CORE Power
T39 T40
CPU to TPS51611 +CPU_GFX_CORE(UMA only)
GFX_VR_EN(UMA only)
T40 UMA GFX CORE Power
+CPU_GFX_CORE(UMA only)
1.5CPU_1.05VTT_PWRGD
T41 ( >99ms )
KBC GPO53 to ISL62883
IMVP_VR_ON
1.5CPU_1.05VTT_PWRGD T42
T41 ( >99ms ) CPU CORE Power
KBC GPO53 to ISL62883 +VCC_CORE <3ms
IMVP_VR_ON
T42 CLK_CPU_BCLK
CPU CORE Power CLKIN_BCLK(from CK505) stable
+VCC_CORE <3ms
43 >1ms ISL62883 to CLOCKGEN
CLK_CPU_BCLK
CLKIN_BCLK(from CK505) stable CK_PWRGD
ISL62884 to KBC GPO14
T44 >1ms
43 >1ms ISL62883 to CLOCKGEN IMVP_PWRGD T45
CK_PWRGD 1.5CPU_1.05VTT_PWRGD Delay 10ms
ISL62884 to KBC GPO14 T46 >5ms
T44 >1ms
IMVP_PWRGD T45 KBC GPIO47 to PCH
1.5CPU_1.05VTT_PWRGD Delay 10ms PM_PWROK 3ms< T47 <20ms
T46 >5ms
T48 >1ms
KBC GPIO47 to PCH +1.5V_RUN_CPU T49 >100ns
PM_PWROK 3ms< T47 <20ms PM_DRAM_PWRGD (for S3 Reduction)
T48 >1ms
+1.5V_RUN_CPU T49 >100ns
H_VTTPWRGD
A
PM_DRAM_PWRGD (for S3 Reduction) T50 >1ms A
PM_PWROK
H_VTTPWRGD T51 >1ms
T50 >1ms
+VCC_CORE
PM_PWROK 0.05ms< T52 <650ms
T51 >1ms
H_PWRGD
T53 KBC LRESET#
+VCC_CORE
0.05ms< T52 <650ms PLT_RST# >1ms
T54 KBC GPIO45
H_PWRGD <Core Design>
T53 KBC LRESET# PLTRST_DELAY#
T55
PLT_RST# >1ms Wistron Corporation
T54 KBC GPIO45 H_CPURST#
PLTRST_DELAY# Taipei Hsien 221, Taiwan, R.O.C.
T55 Title
H_CPURST# Power Sequence
A1
Husk/Petra -1
5 4 3 2 1
5 4 3 2 1
1D5V_VGA_S0 AO4468
1V_VGA_S0 RT9025
RT8208B VGA_CORE For Discrete
D D
DCBATOUT UP6165BQKF-1
Adapter
NCP6131S52MNR2G UP6128PQDD APL5916KAI

AO4407A DDR_VREF_S3 0D75V_S0 1D5V_S3
Charger
BQ24745 VCC_CORE VCC_GFXCORE 1D05V_VTT 0D85V_S0
+AD For UMA
AO4468
Battery
UP6183PQAG 1D5V_S0
For Discrete
1D5V_DDR_S0
C 3D3V_AUX_S5
3D3V_S5 C
5V_AUX_S5 5V_S5
UP7534BRA8 UP7534BRA8 UP7534BRA8 AO4468

SI2301CDS AO4468 RT9025
5V_USB1_S3 5V_USB2_S3 5V_USB0_S5 5V_S0

+KBC_PWR 3D3V_S0 3D3V_VGA_S0 1D8V_VGA_S0
USB Power USB Power USB Charge Power For Discrete

For Discrete
G9091
RT9025 G5285T11U-GP 3D3V_CARD_S0
B
3D3V_DAC_S0 B
1D8V_S0 LCDVDD
Power Shape
Regulator LDO Switch
<Core Design>
A A
Wistron Corporation
Title
Power Block Diagram

A3
Husk/Petra -1
5 4 3 2 1
A B C D E
PCH SMBus Block Diagram 3D3V_S5 3D3V_S0 KBC SMBus Block Diagram
‧ ‧ 5V_S0
3D3V_S0 ‧
SRN2K2J-1-GP
‧ SRN2K2J-1-GP
DIMM 1
‧ ‧
SRN10KJ-5-GP
‧ ‧
SMBCLK SMB_CLK PCH_SMBCLK
1
TouchPad Conn. 1
‧
SCL
SMBDATA SMB_DATA PCH_SMBDATA
‧
SDA PSDAT1 TPDATA TPDATA TPDATA
3D3V_S5
PSCLK1 TPCLK TPCLK TPCLK
SMBus Address:A0
‧ 2N7002SPT
3D3V_AUX_KBC
‧
SRN2K2J-8-GP
SML1CLK SML1_CLK
SRN4K7J-8-GP
To KBC & eDP DIMM 2
‧
SML1DATA SML1_DATA
Battery Conn.
‧
PCH_SMBCLK
3D3V_S5 SCL SRN100J-3-GP
‧
SML0CLK SML0_CLK PCH_SMBDATA GPIO17/SCL1 BAT_SCL BATA_SCL_1 CLK_SMB
SDA
SML0DATA SML0_DATA GPIO22/SDA1 BAT_SDA BATA_SDA_1 DAT_SMB SMBus address:16
SMBus Address:A4
SRN2K2J-1-GP
3D3V_S0 G-Sensor BQ24745
‧ ‧ KBC SCL
‧
PCH_SMBCLK
SMBus address:12
PCH PCH_SMBDATA
SCLK
SDATA
NPCE795 SDA
SRN2K2J-1-GP
UMA SMBus address:xx LCDVDD_eDP
2 SCL 2
PCH
SDVO_CTRLCLK PCH_HDMI_CLK Level DDC_CLK_HDMI
Minicard
SDA
‧
SDVO_CTRLDATA PCH_HDMI_DATA
Shift DDC_DATA_HDMI
LCDVDD_eDP
UMA
‧ WLAN ‧ SRN2K2J-1-GP
‧
PCH_SMBCLK
3D3V_S0
SMB_CLK
eDP
‧
PCH_SMBDATA
SMB_DATA
‧ ‧
LCD_SMBCLK
LCD_SMBDATA
SCL
SDA
SMBus address:XX
SRN2K2J-1-GP Minicard ‧
‧
GPIO73/SCL2 SML1_CLK
2N7002DW-1-GP
UMA SRN0J-6-GP
PCH_SMBCLK
W-WAN
SMB_CLK
GPIO74/SDA2 SML1_DATA
L_DDC_CLK LVDS_DDC_CLK_R
PCH_SMBDATA
L_DDC_DATA LVDS_DDC_DATA_R SMB_DATA
UMA
3D3V_VGA_S0
CRT_DDC_CLK CRT_DDC_CLK
CRT_DDC_DATA CRT_DDC_DATA
‧
SRN2K2J-1-GP
3
DIS
SRN0J-6-GP 3
DDC1CLK GPU_LVDS_CLK LVDS_DDC_CLK CLK

DDC1DATA GPU_LVDS_DATA LVDS_DDC_DATA DATA LCD CONN
DIS SRN0J-6-GP
DDC2CLK VGA_CRT_DDCCLK
DDC2DATA VGA_CRT_DDCDATA
3D3V_S0 DIS 5V_S0
VGA ‧ ‧
3D3V_S0
SRN0J-6-GP
UMA SRN2K2J-1-GP
UMA
‧ SRN10KJ-6-GP
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT CONN
5V_S0
3D3V_VGA_S0 UMA
‧ ‧ 2N7002DW-1-GP
4
5V_S0 4
SRN1K5J-GP
SRN2K2J-1-GP
DIS
DDC2CLK GPU_HDMI_CLK DDC_CLK_HDMI
<Core Design>
TSCBTD3305CPWR
DDC2DATA GPU_HDMI_DATA DDC_DATA_HDMI
HDMI CONN Wistron Corporation
SRN0J-6-GP
Title
SMBUS Block Diagram

A2
Husk/Petra -1
DIS Date: Monday, March 05, 2012 Sheet 101 of 103
A B C D E
A B C D E
Thermal Block Diagram Audio Block Diagram

1 1
SPKR_PORT_D_L-
PAGE28 DXP P2800_DXP SPKR_PORT_D_R+ SPEAKER

MMBT3904-3-GP
SC2200P50V2KX-2GP
DXN P2800_DXN
Thermal Place near CPU Codec
NCT7718W PWM CORE
ALC271
MMBT3904-3-GP
AUD_HP1_JACK_R1 CMBO
PCH SML1_CLK
T8
AUD_HP1_JACK_L1
COMBO_MIC
LOUT
SML1_DATA
2
SMBUS OTZ
THERM_SYS_SHDN# 2N7002
D
PURE_HW_SHUTDOWN#
IMVP_PWRGD EN 3V/5V AUD_HP1_JD# 2
S PGOD
G
VR
Put under CPU(T8 HW shutdown)
INT_MIC_L_R
AMIC
VGA
SMBUS
3 3
4 <Core Design> 4
Wistron Corporation
Title
Thermal/Audio Block Diagram

Custom
Husk/Petra -1
A B C D E
5 4 3 2 1
D D
C C
B B
<Core Design>
A A
Wistron Corporation
Title
USB charger
A3
Husk/Petra -1
5 4 3 2 1

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5 4 3 2 1

DY :None Installed ANNIE: ONLY FOR ANNIE solution.

900MHz Intel CPU

LANE3 Card Reader 5 CARD READER

PCI EXPRESS -- GRAPHICS

E21 PEG_C_TXP12 C420 1 2 DY Do Not Stuff PEG_TXP12

PEG_TX7 PEG_C_TXP7 C425 SCD22U10V2KX-1GP PEG_TXP7

R501 C502 C49

BF44 SM_RCOMP_0 R506 1 2 140R2F-GP

JTAG & BPM

37 VDDPW RGOOD BE45 SM_DRAMPWROK BPM#0 G58

M_A_DQ38 AT48 AK55 M_A_DQS#7 M_B_DQ37 BE49 AT60 M_B_DQS#6

DDR SYSTEM MEMORY B

SSID = CPU CPU1E 5 OF 9

AT21 RSVD10 DC_TEST_A58 A58

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled

PEG DEFER TRAINING

1: PEG Train immediately following xxRESETB de assertion

PEG IO AND DDR IO

F42 AB17 PG804

J29 VCC50 VCCIO47 AG21

J32 VCC51 VCCIO48 AJ14

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

VDDQ_SENSE BC43 TP_VDDQ_SENSE 1 TP901 Do Not Stuff

C915 R18 VCCSA9

VCCSA11 Do Not Stuff Do Not Stuff

V18 D49 VCCSA_VID1

SSID = CPU CPU1H 8 OF 9

A13 VSS1 VSS91 AM38

NCTF TEST PIN

SSID = MEMORY M_A_A0 98

DM1 <Core Design>

49 L_BKLT_CTRL P45 L_BKLTCTL SDVO_STALLN AM42

Digital Display Interface

LVDSA_DATA#2 DDPB_2N DDBP_DATA0 C1706 SCD1U10V2KX-L1-GP

CRT_BLUE 50 CRT_BLUE N48 M43

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

4 DMI_RXN0 BC24 DMI0RXN FDI_RXN0 BJ14 FDI_TXN0 4

FDI_LSYNC1 BB10 FDI_LSYNC1 4

C A18 DSW ODVREN C

System Power Management

2 1 PW ROK L22 G8 RTC_AUX_S5

37 PM_DRAM_PW RGD B13 D10 DSW ODVREN R1918 1 DY 2 Do Not Stuff

PM_RSMRST# C21 H4 PM_SLP_S4# 27,46

SUS_PW R_ACK_R K16 F4 PM_SLP_S3# 27,29,36,37,47

27,97 PM_PW RBTN# E20 PWRBTN# SLP_A# G10

27 AC_PRESENT H20 G16 SLLP_SUS#_TP 1 TP1904 Do Not Stuff

PM_RI# A10 K14

2 R1921 1 PCIE_W AKE#

SSID = PCH 3D3V_S5

BG34 SML0_DATA 3 2 RN2004

65 PCIE_RXN4 BF36 PERN4

AB49 AV22 CLK_EXP_N 5

V37 3D3V_S0 3D3V_S0

SSID = PCH RTC_AUX_S5

1 4 HDA_RST# AB13 SATA3_COMP R2113 1 2 49D9R2F-GP

RN2102 27,60 SPI_CLK_R 1 R2108 2 PCH_SPI_CLK T3 AH1 RBIAS_SATA3 R2114 1 2 750R2F-GP

27,60 SPI_CS0#_R 1 2 PCH_SPI_CS0# Y14 SPI_CS0#

1 R2102 2 HDA_SDOUT 71.PANTH.00U 3D3V_S0

EC2102 EC2103 EC2101

S_GPIO T7 C40 SATA_ODD_PWRGT 56

SCLOCK/GPIO22 THRMTRIP# 390R2J-1-GP

NCTF TEST PIN: