You are on page 1of 5

Green University of Bangladesh

Department of Computer Science and Engineering (CSE)


Faculty of Sciences and Engineering
Semester: (Spring, Year:2023), B.Sc. in CSE (Day)

Lab Report NO : 01
Course Title: Digital
Logic Design Lab
Course Code: CSE-204 Section: 221- D3

Lab Experiment Name: Design a Combinational Logic Circuit for 4x1 MUX
and Verify the Truth Table.

Student Details
Name ID

1. RAJIB GOSWAMI 221002370

Lab Date : 22-03-2023


Submission Date : 23-03-2023
Course Teacher’s Name : Mr. Mozdaher Abdul Quader

Lab Report Status Marks:


………………………………… Signature:.....................
Comments:.............................................. Date:..............................
1. EXPERIMENT NAME
Design a Combinational Logic Circuit for 4x1 MUX and Verify the Truth Table.

2. OBJECTIVES
 To determine the 4-to-1 multiplexer.
 To learn working principle of multiplexer
 To use of multiplexer

3. Equipment and apparatus

4. DESIGN

4.1 Block Diagram of 4x1 MUX

S1 S2

4.2 Circuit diagram:


S1
S2
4.3 TRUTH TABLE OF 4X1 MUX

Selection Line Output


S1 S2 Y
0 0 I0
0 1 I1
1 0 I2
1 1 I3

From Truth table, we can directly write the Boolean function for output, Y as,
Y = Ś1Ś2I0+Ś1S2I1+S1Ś2I2+S1S2I3

5. PROCEDURE
Steps for setup the circuits to analyze the operation of the 4x1 Multiplexer:
1. Construct the circuit on breadboard for each Gate by inserting the appropriate IC.
2. Check the combinations of various inputs as shown in truth tables for each Gate.
3. If the input is low connect input to Ground, which indicates logic 0.
4. If input is high or logic 1 then connect the input to the power supply.
5. When output is high the bulb will glow which indicates output as high, if the bulb is
not glowing then the output is low.

6. IMPLEMENTATION

The circuit implementation on TinkerCad.


Diagram of implemented circuit on TinkerCad Breadboard

7. TEST RESULT
Truth Table for 4x1 Mux

Selection Line Output


S1 S2 Y
0 0 I0
0 1 I1
1 0 I2
1 1 I3
OUTPUTS:

S1= 0,S2 = 0; Y= I0 S1= 0,S2 = 1; Y= I1

S1= 1,S2 = 0; Y= I2 S1= 1,S2 = 1; Y= I3


when we put both S1 and S2 off then we get I0 as output ,when S1 off and S2 on then we get I1 as
output, when S1 on and S2 off then we get I2 as output and we get I3 as output when S1 and S2
both are on. Which satisfy the truth table.

8. ANALYSIS AND DISCUSSION


In terms of practical lab experience, it allows one chip, the multiplexer, to do the job of several
simple logic gates. We use 2 three-input and gate IC, one not-gate IC and one or-gate IC to
complete the experiment. We face some problem at the time of connecting wires to the chip.
After connection at the simulation time, we get the exact result from the circuit as like theory.
So, the error percentage of the experiment is 0.

You might also like