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PD - 95505

IRF8010PbF
Applications
SMPS MOSFET
l High frequency DC-DC converters HEXFET® Power MOSFET
l UPS and Motor Control
l Lead-Free VDSS RDS(on) max ID
100V 15mΩ 80A†
Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
l Typical RDS(on) = 12mΩ
TO-220AB

Absolute Maximum Ratings


Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 80 h
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 57 A
IDM Pulsed Drain Current c 320
PD @TC = 25°C Power Dissipation 260 W
Linear Derating Factor 1.8 W/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery dv/dt e 16 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Mounting torque, 6-32 or M3 screw 1.1(10) N•m (lbf•in)

Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.57
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62

Notes  through † are on page 8


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07/06/04
IRF8010PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 12 15 mΩ VGS = 10V, ID = 45A f
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 100V, VGS = 0V
––– ––– 250 VDS = 100V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 VGS = -20V

Dynamic @ TJ = 25°C (unless otherwise specified)


Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 82 ––– ––– V VDS = 25V, ID = 45A
Qg Total Gate Charge ––– 81 120 ID = 80A
Qgs Gate-to-Source Charge ––– 22 ––– nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– 26 ––– VGS = 10V f
td(on) Turn-On Delay Time ––– 15 ––– VDD = 50V
tr Rise Time ––– 130 ––– ID = 80A
td(off) Turn-Off Delay Time ––– 61 ––– ns RG = 39Ω
tf Fall Time ––– 120 ––– VGS = 10V f
Ciss Input Capacitance ––– 3830 ––– VGS = 0V
Coss Output Capacitance ––– 480 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 59 ––– pF ƒ = 1.0MHz
Coss Output Capacitance ––– 3830 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 280 ––– VGS = 0V, VDS = 80V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 530 ––– VGS = 0V, VDS = 0V to 80V e
Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy dh ––– 310 mJ
IAR Avalanche Current c ––– 45 A
EAR Repetitive Avalanche Energy c ––– 26 mJ

Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 80 MOSFET symbol D

(Body Diode) A showing the


G
ISM Pulsed Source Current ––– ––– 320 integral reverse
(Body Diode) ch p-n junction diode.
S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 80A, VGS = 0V f
trr Reverse Recovery Time ––– 99 150 ns TJ = 150°C, IF = 80A, VDD = 50V
Qrr Reverse RecoveryCharge ––– 460 700 nC di/dt = 100A/µs f
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

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IRF8010PbF

10000 1000
VGS VGS
TOP 15V TOP 15V
12V 12V
10V

ID, Drain-to-Source Current (A)


10V
ID, Drain-to-Source Current (A)

1000 6.0V 6.0V


5.5V 5.5V
5.0V 5.0V
4.5V
100 4.5V
BOTTOM 4.0V BOTTOM 4.0V
100

4.0V
10
10
4.0V
1
20µs PULSE WIDTH
20µs PULSE WIDTH Tj = 175°C
Tj = 25°C 1
0.1
0.1 1 10 100
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 3.5
I D = 80A

T J = 175°C 3.0
ID, Drain-to-Source Current (Α)

RDS(on) , Drain-to-Source On Resistance

2.5
100
(Normalized)

2.0

1.5
T J = 25°C
10
1.0

VDS = 50V 0.5


20µs PULSE WIDTH
1 V GS = 10V
0.0
2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( ° C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance


Vs. Temperature
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IRF8010PbF

100000 12
VGS = 0V, f = 1 MHZ ID= 80A
Ciss = C gs + Cgd, C ds SHORTED
VDS= 80V

VGS , Gate-to-Source Voltage (V)


Crss = Cgd 10
Coss = Cds + Cgd VDS= 50V
10000
VDS= 20V
C, Capacitance(pF)

Ciss 8

1000 6

Coss
4

100
Crss 2

0
10
0 20 40 60 80 100
1 10 100
Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.


Drain-to-Source Voltage Gate-to-Source Voltage

1000 10000

OPERATION IN THIS AREA


ID, Drain-to-Source Current (A)

1000 LIMITED BY R DS(on)


100
I SD , Reverse Drain Current (A)

TJ = 175 ° C 100

10 100µsec

10
1msec
T J= 25 ° C
1
1 Tc = 25°C 10msec
Tj = 175°C
Single Pulse
V GS = 0 V
0.1 0.1
0.0 0.5 1.0 1.5 2.0 1 10 100 1000
V SD,Source-to-Drain Voltage (V)
VDS, Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area


Forward Voltage
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IRF8010PbF

80
RD
V DS
LIMITED BY PACKAGE
VGS
D.U.T.
60
RG
+
-VDD
ID , Drain Current (A)

10V
Pulse Width ≤ 1 µs
40
Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit


20
VDS
90%

0
25 50 75 100 125 150 175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

10
(Z thJC )

1
Thermal Response

D = 0.50

P DM
0.20
0.1
0.10 t1

0.05 t2

SINGLE PULSE
0.02 Notes:
0.01 (THERMAL RESPONSE)
1. Duty factor D = t1/ t 2
2. Peak T J = P DM x Z thJC +T C
0.01
0.00001 0.0001 0.001 0.01 0.1 1

t 1, Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

www.irf.com 5
IRF8010PbF

15V 600
ID
TOP 18A
500 32A
L DRIVER BOTTOM 45A
VDS

EAS , Single Pulse Avalanche Energy (mJ)


400
RG D.U.T +
V
- DD
IAS A
20V 300
tp 0.01Ω

Fig 12a. Unclamped Inductive Test Circuit 200

100
V(BR)DSS
tp
0
25 50 75 100 125 150 175

Starting Tj, Junction Temperature ( ° C)

Fig 12c. Maximum Avalanche Energy


I AS Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

QG
50KΩ

10 V 12V .2µF
.3µF
QGS QGD +
V
D.U.T. - DS

VG VGS

3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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IRF8010PbF

Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations


D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test

Driver Gate Drive


P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFET® Power MOSFETs

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IRF8010PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415) 3.78 (.149) -B-
2.87 (.113) 10.29 (.405) 3.54 (.139) 4.69 (.185)
2.62 (.103) 4.20 (.165)
-A- 1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045) LEAD ASSIGNMENTS
MIN HEXFET
1 - GATE
IGBTs, CoPACK
1 2 3 2 - DRAIN 1- GATE
1- GATE
3 - SOURCE 2- COLLECTOR
2- DRAIN
3- SOURCE
4 - DRAIN 3- EMITTER
4- DRAIN 4- COLLECTOR
14.09 (.555)
13.47 (.530) 4.06 (.160)
3.55 (.140)

0.93 (.037) 0.55 (.022)


3X 3X
0.69 (.027) 0.46 (.018)
1.40 (.055)
3X
1.15 (.045) 0.36 (.014) M B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

TO-220AB Part Marking Information


EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 1997 INT ERNAT IONAL PART NUMBER
IN THE AS S EMBLY LINE "C" RECT IFIER
LOGO
Note: "P" in assembly line
position indicates "Lead-Free" DAT E CODE
YEAR 7 = 1997
AS S EMBLY
LOT CODE WEEK 19
LINE C

Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. … Coss eff. is a fixed capacitance that gives the same charging time
‚ Starting TJ = 25°C, L = 0.31mH, RG = 25Ω, as Coss while VDS is rising from 0 to 80% VDSS.
IAS = 45A.
† Calculated continuous current based on maximum allowable
ƒ ISD ≤ 45A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS,
junction temperature. Package limitation current is 75A.
TJ ≤ 175°C.

TO-220 package is not recommended for Surface Mount Application.


Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.07/04
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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characteristics (“Beschaffenheitsgarantie”) . contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon WARNINGS
Technologies hereby disclaims any and all Due to technical requirements products may
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applicable legal requirements, norms and Technologies, Infineon Technologies’ products may
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intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
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