PD- 93922B

SMPS MOSFET IRFPS43N50K

HEXFET® Power MOSFET
Applications
l Switch Mode Power Supply (SMPS)
VDSS RDS(on) typ. ID
l Uninterruptible Power Supply 500V 0.078Ω 47A
l High Speed Power Switching
l Hard Switched and High Frequency
Circuits
Benefits
l Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and Super-247™
Avalanche Voltage and Current
l Low RDS(on)

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 47
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 29 A
IDM Pulsed Drain Current  190
PD @TC = 25°C Power Dissipation 540 W
Linear Derating Factor 4.3 W/°C
VGS Gate-to-Source Voltage ± 30 V
dv/dtPeak Diode Recovery dv/dt ƒ 9.0 V/ns
TJ Operating Junction and -55 to + 150
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 °C
(1.6mm from case )

Avalanche Characteristics
Symbol Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy‚ ––– 910 mJ
IAR Avalanche Current ––– 47 A
EAR Repetitive Avalanche Energy ––– 54 mJ

Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.23
RθCS Case-to-Sink, Flat, Greased Surface 0.24 ––– °C/W
RθJA Junction-to-Ambient ––– 40
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Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 500 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.60 ––– V/°C Reference to 25°C, ID = 1mA†
RDS(on) Static Drain-to-Source On-Resistance ––– 0.078 0.090 Ω VGS = 10V, ID = 28A „
VGS(th) Gate Threshold Voltage 3.0 ––– 5.0 V VDS = V GS, ID = 250µA
––– ––– 50 µA VDS = 500V, VGS = 0V
IDSS Drain-to-Source Leakage Current
––– ––– 250 µA VDS = 400V, VGS = 0V, TJ = 125°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 30V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 23 ––– ––– S VDS = 50V, ID = 28A
Qg Total Gate Charge ––– ––– 350 ID = 47A
Qgs Gate-to-Source Charge ––– ––– 85 nC VDS = 400V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 180 VGS = 10V, See Fig. 6 and 13 „
td(on) Turn-On Delay Time ––– 25 ––– VDD = 250V
tr Rise Time ––– 140 ––– ns ID = 47A
td(off) Turn-Off Delay Time ––– 55 ––– RG = 1.0Ω
tf Fall Time ––– 74 ––– VGS = 10V,See Fig. 10 „
Ciss Input Capacitance ––– 8310 ––– VGS = 0V
Coss Output Capacitance ––– 960 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 120 ––– pF ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 10170 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance ––– 240 ––– VGS = 0V, VDS = 400V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance ––– 440 ––– VGS = 0V, VDS = 0V to 400V

Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
D
IS Continuous Source Current MOSFET symbol
––– ––– 47
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G

––– ––– 190

(Body Diode)  p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.5 V TJ = 25°C, IS = 47A, VGS = 0V „
trr Reverse Recovery Time ––– 620 940 ns TJ = 25°C, IF = 47A
Q rr Reverse RecoveryCharge ––– 14 21 µC di/dt = 100A/µs „
IRRM Reverse RecoveryCurrent ––– 38 ––– A
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 400µs; duty cycle ≤ 2%.
max. junction temperature. (See Fig. 11)
Coss eff. is a fixed capacitance that gives the same charging time
‚ Starting TJ = 25°C, L = 0.82mH, RG = 25Ω,
IAS = 47A (See Figure 12a). as Coss while VDS is rising from 0 to 80% VDSS .

ƒ ISD ≤ 47A, di/dt ≤ 230A/µs, VDD ≤ V(BR)DSS,

TJ ≤ 150°C.
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 IRFPS43N50K

 
1000 1000
VGS VGS
TOP 15V TOP 15V
10V 10V

I D , Drain-to-Source Current (A)

I D , Drain-to-Source Current (A)

8.0V 8.0V
7.0V 7.0V
100 6.0V 6.0V
5.5V 5.5V
5.0V 100 5.0V
BOTTOM 4.5V BOTTOM 4.5V

10

10

1 4.5V

1
4.5V
0.1

20µs PULSE WIDTH 20µs PULSE WIDTH

TJ = 25 °C TJ = 150 °C
0.01 0.1
0.1 1 10 100 0.1 1 10 100
VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

1000 3.5
ID = 48A
RDS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)

3.0

100 TJ = 150 ° C 2.5

(Normalized)

2.0
10
1.5
TJ = 25 ° C
1.0
1

0.5
V DS = 50V
20µs PULSE WIDTH VGS = 10V
0.1 0.0
4 5 6 7 8 9 10 11 12 -60 -40 -20 0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( ° C)

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature
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 IRFPS43N50K

1000000 20
VGS = 0V, f = 1 MHZ ID = 48A
Ciss = Cgs + Cgd, Cds SHORTED V DS= 400V

VGS , Gate-to-Source Voltage (V)

V DS= 250V
100000 Crss = Cgd V DS= 100V
Coss = Cds + Cgd
C, Capacitance(pF)

15

10000 Ciss

10
1000
Coss

100 5
Crss

10
1 10 100 1000 0
0 50 100 150 200 250 300 350
QG , Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

1000 1000
OPERATION IN THIS AREA LIMITED
BY RDS(on)
ISD , Reverse Drain Current (A)

100
ID , Drain Current (A)

TJ = 150 ° C 100 10us

10 100us

TJ = 25 ° C
10
1ms
1

TC = 25 °C 10ms
TJ = 150 °C
V GS = 0 V Single Pulse
0.1 1
0.2 0.7 1.2 1.7 2.2 10 100 1000
VSD ,Source-to-Drain Voltage (V) VDS , Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRFPS43N50K

50 RD
VDS

VGS
40
D.U.T.
RG
ID , Drain Current (A)

+
-VDD

30 10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

20

Fig 10a. Switching Time Test Circuit

10 VDS
90%

0
25 50 75 100 125 150
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

1
Thermal Response (Z thJC )

D = 0.50
0.1

0.20


0.10
0.05 PDM
0.01 0.02 t1
0.01 SINGLE PULSE
(THERMAL RESPONSE) t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x ZthJC + TC
0.001
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRFPS43N50K


2000
ID
EAS , Single Pulse Avalanche Energy (mJ)

TOP 22A
30A
BOTTOM 47A
1500 1 5V

L D R IV E R
VDS
1000

RG D .U .T +
- VD D
IA S A
500 20V
tp 0 .0 1 Ω

Fig 12c. Unclamped Inductive Test Circuit

0
25 50 75 100 125 150
Starting TJ , Junction Temperature ( °C)

Fig 12a. Maximum Avalanche Energy

Vs. Drain Current V (B R )D SS
tp

IAS

Fig 12d. Unclamped Inductive Waveforms

Current Regulator
Same Type as D.U.T.

QG
50KΩ

12V .2µF
.3µF
VGS
+
QGS QGD
V
D.U.T. - DS

VGS VG
3mA

IG ID
Current Sampling Resistors
Charge
Fig 13a. Gate Charge Test Circuit Fig 13b. Basic Gate Charge Waveform

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 IRFPS43N50K
Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test

Driver Gate Drive

P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFET® Power MOSFETs

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IRFPS43N50K
SUPER -247AC Package Outline
Dimensions are shown in millimeters (inches)

0.13 [.005]
0.25 [.010] B A
5.50 [.216]
16.10 [.632] 4.50 [.178]
A 13.90 [.547]
2.15 [.084]
2X R 3.00 [.118] 15.10 [.595]
13.30 [.524]
2.00 [.079] 1.45 [.058]

1.30 [.051]
0.70 [.028]
16.10 [.633] 4
20.80 [.818] 4
15.50 [.611]
19.80 [.780]

C
1 2 3

Ø 1.60 [.063] E E
14.80 [.582] MAX.
13.80 [.544] 4.25 [.167]
3.85 [.152]

1.30 [.051]
3X
1.60 [.062] 1.10 [.044]
3X 2.35 [.092]
5.45 [.215] 1.45 [.058]
1.65 [.065] LE AD AS S IGNMENT S
S ECT ION E-E
2X 0.25 [.010] B A IGBT
NOT ES : MOS FET
1. DIMENS IONING AND T OLE RANCING PER AS ME Y14.5M-1994. 1 - GATE 1 - GATE
2. DIMENS IONS ARE S HOWN IN MILLIMET ERS [INCHES ] 2 - DRAIN 2 - COLLECT OR
3. CONT ROLLING DIMENS ION: MILLIMET ER 3 - S OURCE 3 - EMIT T ER
4. OUT LINE CONF ORMS T O JEDEC OUT LINE T O-274AA 4 - DRAIN 4 - COLLECT OR

Data and specifications subject to change without notice.

This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.04/01
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