ASSIGNMENT

EC 443 – Digital VLSI Design

Note: Submit the assignment by 17/3/2023.

Q.1. Explain the operation of NMOS transistor with its cross-sectional view?

Q.2. Explain the three modes of operation in MOSFET.

Q.3. Derive the expression for linear region drain current and saturation region drain current equation in MOSFET.

Q.4. Derive the equation for threshold voltage in MOSFET.

Q.5. Explain the Second order effects in MOSFET.

Q.6. Explain different types of capacitances in MOSFET.

Q.7. Why is NMOS technology preferred over PMOS technology?

Q.8. Draw and explain voltage transfer characteristic of CMOS inverter.

Q.9. What is Noise Margin? Derive the expression for VIL & VIH.

Q.10. What is symmetric CMOS inverter?

Q.11. Write short notes on Power dissipation in CMOS.

Q.12. Write the advantages and disadvantages of CMOS technology.

Q.13. Draw the basic gates using CMOS, PTL and TG.

Q.14. What do you understand by Ratioed Logic and Non-ratio logic.

Q.15. Draw and explain the working of NAND gate using pseudo NMOS logic and DCVS Logic.

Q.16. Draw and explain stick diagram for following:

(i) NAND gate

(ii) [𝐶 (𝐴 + 𝐵) + 𝐴𝐵]’

Q.17. Draw and explain 4:1 MUX using CMOS and TG.

Q.18. An Enhancement type NMOS transistor with Vt = 0.7volt conducts a current id = 100µA when Vgs = Vds=1.2V.
Find the value of id for Vgs = 1.5volts and Vds = 3volt.

Q.19. With the knowledge that µp = 0.4µn, what must be the relative width of n-channel and p-channel devices if
they are to have equal drain currents when operated in the saturation mode with overdrive voltages of the
same magnitude?

Q.20. An enhancement PMOS transistor has K(W/L) = 80µA/V2, Vt = -1.5volt and λ = -0.02V-1. The gate is connected
to ground and the source to +5volt. Find the drain current for Vd= +4volt, +1.5 volt, 0 volt and -5volt ?

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