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BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI - K. K.

BIRLA GOA CAMPUS


Microelectronic Circuits Tutorial 1

Ex 1: For W/L = 50/0.5, plot the drain current of an NFET and a PFET as a function of |VGS | as
|VGS | varies from 0 to 3 V. Assume that |VDS | = 3 V.
Ex 2: For W/L = 50/0.5 and |ID | = 0.5 mA, calculate the transconductance and output impedance
of both NMOS and PMOS devices. Also, find the “intrinsic gain,” defined as gm rO .
Ex 3: Derive expressions for gm rO in terms of ID and W/L. Plot gm rO as a function of ID with L as
a parameter. Note that λ ∝ 1/L.
Ex 4: Plot ID versus VGS for a MOS transistor (a) with VDS as a parameter, and (b) with VBS as a
parameter. Identify the break points in the characteristics.
Microelectronic Circuits (EEE F244/ECE F244/INSTR F244) Page 2 of 4

Ex 5: Sketch IX and the transconductance of the transistor as a function of VX for each circuit in
figure below as VX varies from 0 to VDD . In part (a), assume that VX varies from 0 to 1.5 V.

Ex 6: Sketch IX and the transconductance of the transistor as a function of VX for each circuit in
figure below as VX varies from 0 to VDD .
Microelectronic Circuits (EEE F244/ECE F244/INSTR F244) Page 3 of 4

Ex 7: Sketch Vout as a function of Vin for each circuit in figure as Vin varies from 0 to VDD .

Ex 8: Sketch Vout as a function of Vin for each circuit in figure as Vin varies from 0 to VDD .

Ex 9: Consider the structure shown in figure. Determine ID , as a function of VGS and VDS ,
and prove that the structure can be viewed as a single transistor having an aspect ratio W/(2L).
Assume that λ = γ = 0.

Ex 10: For an NMOS device operating in saturation, plot W/L versus VGS − VT H if (a) ID is constant,
and (b) gm is constant.
Microelectronic Circuits (EEE F244/ECE F244/INSTR F244) Page 4 of 4

Ex 11: Explain why the structures shown in figure below cannot operate as current sources even
though the transistors are in saturation.

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