Pilsung Taegyun

AB A

Fathur Afif Hari Gary Dhika April Mulya Yusuf

AB A A A AB AB AB AB

Anin Rizka
A B

Dion Siska Mirel Hani Airita

AB AB AB AB AB

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 Blocking Probability

Course Number : TTH2A3

CLO :3
Week : 9 ext

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 Time Switch and Space Switch

A A
FA FA
TB TA TB TA

FB FB
B B

Time Switch Space Switch

• Exchange TS in the same frame • Exchange same-number TS but in
different frame

• In small SN (<32) we use single stage time switch (T) or space switch (S)
• In large SN (>32) we use multistage Switching, for example:
• 3 stages STS or TST
• 5 stage STSTS or TSTST
• Larger SN = more stages = faster switching rate

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 Space Switch Explained
8 bit PCM word

A4 B3 C2 A1

C4 A3 A2 C1

8 bit PCM word

B4 C3 B2 B1
A4 A3 A2 A1 3 t4 t3 t2 t1

Periodes
& & &

B4 B3 B2 B1 2

& & &

C4 C3 C2 C1 1
t4 t3 t2 t1
& & &
Periodes

connection memory connection memory

connection memory 1
2 3

3 1 2
1 3 2 Control Address
(number of incoming highway)
2 3 1
3 1 2

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 Time Switch Explained
Speech Memory

ts : 4 3 2 1 Cell Cell ts : 4 3 2 1
A B C D content address D C A B
D 1

Frame C 2
B 3
A 4
write read
address address

3 (TS1)

Counter 4 (TS2)
1-4 2 (TS3)
1 (TS4)
cyclic Frame acyclic
time
slot
write

write

write

write
read

read

read

read
Speech Memory (SM) : stores content of TS
Connection Memory (CM) : controls read sequence from SM
Counter : control write sequence into SM

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 Multi Stage Switch
N/n
array k array
N/n • Multi stage switch has blocking
array
probability due to the shared cross points
n.k N/n .N/n k.n • To provide lower blocking probability,
numbers of matrix in center stage play
significant role:

N inlet n.k N/n .N/n k.n N outlet

k  2n  1
k  (n  1)  (n  1)  1  2n  1(min .)

• Replacing k in (1):
n.k N/n .N/n k.n
2
N
N X  2 N (2n  1)  (2n  1)  (2)
n
N N N N
NX  nk  k    nk  dN X N
1/ 2
(3)
n n n n 0  n 
dn 2
2
N (1) (3)  (2)
N X  2 Nk  k  
n Number of minimum cross point :
NX = total number of cross points
N = number of inlet/outlet N x  4 N ( 2 N  1)
n = size of every switch block inlet/outlet
k = number of center stage

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 S-T-S
10 SM-B1
B1 45
A1 B1
C1

CM-B1

B2 B2
A2 SM-B2
C2
1 1
CM-B2
2 10 45 2
10
A3 C3
3 B3 CM-B3 B3
3
SM-B3 10 45

CM-A1 CM-A2 10 011 45 011 CM-C2 CM-C3

CM-A1 CM-C1

Above figure explains interconnection from A1/TS10 to C1/TS45

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 T-S-T
SM-
A 124 C1 45
1 SM- 45
A1 CM- C1
C1
CM-
SM- A1
45 124

10 A2
A 10
124
SM-
2 C2 C2
1
10 124 CM-
CM- C2
A A2 2
SM- SM-
3 A3 C3
C3
3
CM- CM-
A3 C3

124 010
CM- CM-
B2 B3
CM-
B1

Above figure explains interconnection from A2/TS10 to C1/TS45.

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 Comparison

• Single stage Space (S) switch is inapplicable due to its

high blocking probability
• Single stage Time (T) switch may be used as non-blocking
switch block with low capacity (250 lines)
• T-S or S-T configuration may be used in small to medium
capacity, due to its blocking probability increases with
the Time Switch size
• The size of Space Switch increases in square function
with the number of input/output bus, while the size of
time switch increases in linear with the increment of
time slot number
• For exchanges with large capacity, we may use from
SSTSS, TSST, to TSSST configuration

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Blocking Probability

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 Blocking Probability in STS

1. STS Switch Block

Lee Graph
Assumptions : - Space switch non-blocking
- Time switch non-blocking p'
p'
- (STS) individual non-blocking p' p'
p p

p' p'
1

2
P1 = P(n/k)
q’ = 1 – P1 = 1 – p/b
N
Nxk Nxk k = number of Time switch matrix
B = k/n (concentration factor)

k Blocking Probability:

B = ( 1 – (1 – p/b) 2) ) k

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 Blocking Probability in TST

2. TST Switch Block

Lee Graph
Assumptions : - Space switch non-blocking
- Time switch non-blocking P1 P1
1
- (TST) individual non-blocking P P
2

1 inlet outlet 1
m em ory m em ory l

2 inlet outlet 2 B = (1 – q1 2)l

m em ory m em ory
Space q1 = 1 – P1 = 1 – P/a
Switch a = time expansion ( l/c)
l = number of time slot at space stage
c = number of time slot per frame at input
inlet outlet TST is non-blocking when l = 2c -1
N m em ory m em ory N

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 Blocking Probability in TSSST
P2 P2
3. TSSST Switch Block K
Lee Graph A B
P1 P1

inlet outlet k1  8
space space space
time time
stage stage stage
stage stage

TSM TSM
P2 P2
N N
Nx k x kxN K
n n
TSM TSM P1 = P/a A B

P2 = P/(ab)
a = l/c
b = k/n
TSM TSM Blocking Probability:
N N
Nx k x kxN
n n
TSM TSM B = { 1 – (q12 ( 1 – (1 – q22) k ) }
l

where:
q1 = 1 – P1 = 1 – P/a
q2 = 1 – P2 = 1 – P/ab

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Lee Graph

* C. Y. Lee

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Lee Graph Theory (1/2)

• A non-blocking switching is where

everyone can call everyone, at
anytime
• It is perfect, needed, but non efficient
• For economics reason, capacity is
limited especially at peak hours

• C. Y. Lee provides a concept and how

to calculate blocking probability
• This method based on linear graph
approach, and uses:
– nodes to describe switching stage
– arcs to describe link between stages
• Linier graph explains the possibility of
a path to be taken from inlet to outlet
(point to point)

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 Lee Graph Theory (2/2)

• Lee Graph is applicable for any type of

switching structure
• Lee Graph calculates blocking probability by
using link usage percentage
• “p” describes busy link probability at any time
frame, while “q” describes idle link probability
(q = 1 – p)

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 Erlang

• The erlang (E) is a dimensionless unit that is used in telephony

as a measure of offered load or carried load on telephone
switching equipment
• For example, a single circuit has the capacity to be used for 60
minutes in one hour. If 100 x six-minute calls are received on a
group of such circuits, then assuming no other calls are placed
for the rest of the hour, the total traffic in that hour will be six
hundred minutes, or 10 erlangs.[2]

• In 1946, the CCITT named the international unit of telephone

traffic the erlang in honor of Agner Krarup Erlang

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 Lee Graph Theory on Single Link

• If link carries a Erlang, then

busy link probability (p) = a, and
idle link probability (q) = 1 – p = 1 – a
• Blocking probability (B) = p = a (single link)

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 Lee Graph Theory on Parallel Link

• If each link carries a Erlang, then

busy probability for each link (p) = a, and
busy probability for both link (B) = p x p = p2
idle probability for any link (q) = 1 – B = 1 – p2
• For N parallel link, B = pN
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 Lee Graph Theory on Serial Link

p1 p2
X Y
q1 = 1 – p1 q2 = 1 – p2

• If each link carries a Erlang, then

busy probability for each link (p) = a, and
idle probability for both link (Q) = q1 x q2 =
(1-p1) x (1-p2)
• Blocking probability (B) = 1 – Q
• For N serial link, B = 1 - qN
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See you on next class

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