Lenovo Yoga 710-11ISK - LCFC Miray NM-A771 Rev 1.0

A B C D E
1 1
LCFC Confidential
2
Miray-SKY M/B Schematics Document 2
INTEL SKYLAKE Mobile ULT Platform

INTEL SKY Y-series CPU + LPDDR3 Memory
2016-02-17
m
REV:1.0
co
x.
3 3
fi
na
Vi
4 4
Security Classification LC Future Center Secret Data Title
Issued Date 2015/11/09 Deciphered Date 2015/11/09 Cover Page

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Size Document Number Rev
Miray
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Date: Monday, February 29, 2016 Sheet 1 of 38
A B C D E
5 4 3 2 1
LCFC-Miary Block diagram

Memory BUS-ChannelA&B LPDDR3-1866
D D
Micro HDMI Conn. DDI-Port1

16Gbx32
1.2V LPDDR3 1866MT/S 8Gbx32
eDP-Port[0:1] USB 2.0-Port1

eDP Conn. USB 3.0-Port1 USB30 Port
SATA Gen3 Port 1

NGFF SSD PCIe Port[5:8] (reserve) Intel Skylake-Y Platform
USB 2.0-Port7 Int. Camera
PCIe Port3 20*16.5*0.91 I2C-Port1 Touch Screen

NGFF Wlan&BT
USB20-Port3 BGA 1515
C C
TDP 4.5W
SPI BUS SPI ROM
(8MB)
SPK Conn.
(1.5W x 2) HD Audio
Codec ALC3240 LCP BUS TPM
Audio Combo Conn.
NPCT650
apple type
Audio SUB
ISH_I2C0
I2C-Port2
Touch Pad
Array D-MIC Conn.
m
co
G-Sensor LPC BUS I2C-Port0
BMA222E x.
G-Sensor EC
B
Battery
B
I2C SMBUS Sub-board

BMA222E ECIT8396_VFBGA128
fi
(ECIT8586_VFBGA128) Audio SUB

na
ALS Charger Sensor+DMIC_R SUB

AL3010
Vi
Sensor SUB Int.KB LID PAD DMIC_L SUB

Thermal Sensor
LID SW NCT7718W
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 Block Diagram

Miray
5 4 3 2 1
A B C D E
Voltage Rails ( O --> Means ON , X --> Means OFF ) BOM Structure Table Board ID Table
Board ID Description PCB Revision
+5VS BOM Structure BOM Structure
+3VALW TI@ TI MIPI camera mount MIRROR@ EC Mirror-code enable
Power Plane +5VALW
+3VS
TPM@ TPM module UNMIRROR@ EC Mirror-code disable
B+ +DDR_1.2V +1.8VS
DEBUG@ DEBUG CARD Part DA8@ PCB
+DDR_1.8V +DDR_0.6VS
+3VL +1.0VALW +3VALW_PCH
+CPU_CORE
ME@ ME part(connector, hole) UPI@ UPI MIPI camera mount
+1.8VALW +CPU_VCCIO
RF@ RF request
State +5VLP +CPU_VCCPRIM +CPU_VCCGT

EMC@ EMC request
CD@ COST DOWN Part
1 1
+CPU_VCCSA
REV@ RESERVER Part
S0 O O O O O BOM Configuration Table

SKU Description BOM Config
S3 O O O O X
O O X O X
SKU1
DS3
O O O X X
SKU2
S5 S4/AC Only
S5 S4 O X X X X
Battery only
S5 S4 X X X X X
AC & Battery
don't exist
2 2
SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# +VALW +VALW_PCH +V +VS Clock
Full ON HIGH HIGH HIGH ON ON ON ON ON
S1(Power On Suspend) LOW HIGH HIGH ON ON ON ON LOW X76&VGA Configuration Table

SKU Description BOM Config
S3 (Suspend to RAM) LOW LOW HIGH ON ON ON OFF OFF
DS3 (Suspend to RAM) LOW LOW HIGH ON LOW ON OFF OFF
S4 (Suspend to Disk) LOW LOW LOW ON ON OFF OFF OFF
S5 (Soft OFF) LOW LOW LOW ON ON OFF OFF OFF
m
SMBUS Control Table
co
SOURCE Sensor ALS BATT Thermal charger EC
x.
Sensor
3 3
EC_SMB_CLK1 IT8586
X X V X V X
fi
EC_SMB_DAT1 +3VALW_EC
EC_SMB_CLK3 IT8586 V V X X X X
na
EC_SMB_DAT3 +3VS +3VS +3VS
EC_SMB_CLK0 IT8586
X X X V X X PCB And LOGO Config
Vi
EC_SMB_DAT0 +3VS +3VS

ZZZ3
LOGO
DA8@
EC_SMB_CLK4 PCH V PCB

EC_SMB_DAT4 +3VS X X X X X +3VS
PCB 11G NM-A771 REV1 M/B
ZZZ9 6Y75@ ZZZ16 6Y54@ ZZZ17 6Y30@ ZZZ18 4405@
CPU
ZZZ4 HDMI@
SM Bus address PCIE PORT LIST USB Port Table 6Y75 1.2G 6Y54 D0 1.1G 6Y30 D0 0.9G 4405Y D0 1.4G
USB20 USB30
Device address
HDMI LOGO
Port Device
1 1
ZZZ13 MIC4G@
USB USB ZZZ6 HY8G@ ZZZ7 MIC8G@ ZZZ8 SAM8G@ ZZZ12 HY4G@ ZZZ14 SAM4G@
Battery 0001 011X b
VRAM
EC1 Charger
1 2 2
2 3 3
EXHCI/XHCI
4 4
BT
Sensor MICRON 4G
EC3 ALS
3 WLAN 5 4 HYNIX 8G MICRON8G SAMSUNG 8G HYNIX 4G SAMSUNG 4G
Thermal Sensor 1001_100xb

4 7 Camera
EC0 5--8 Reserve PCIE SSD 9

8 SATA SSD
PCH EC
EC4 Security Classification LC Future Center Secret Data Title
Issued Date 2015/11/09 Deciphered Date 2015/11/09 Notes List

Miray
A B C D E
5 4 3 2 1
?
SKYLAKE_ULX
UC1A
DISPLAY
A46 H45
18 CPU_HDMI_TX2- DDI1_TXN[0] EDP_TXN[0] CPU_EDP_TX0- 17
18 CPU_HDMI_TX2+
C46
DDI1_TXP[0] EDP_TXP[0]
F45
CPU_EDP_TX0+ 17 DDP*_CTRLDATA
18 CPU_HDMI_TX1-
C48
DDI1_TXN[1] EDP_TXN[1]
J44
CPU_EDP_TX1- 17 This signal has a weak internal pull-down.
A48 G44 0 = Port B is not detected.
*
18 CPU_HDMI_TX1+ B45 DDI1_TXP[1] EDP_TXP[1] J46 CPU_EDP_TX1+ 17
18 CPU_HDMI_TX0-
D45 DDI1_TXN[2] EDP_TXN[2] G46
1 = Port B is detected.
D 18 CPU_HDMI_TX0+ DDI1_TXP[2] EDP_TXP[2] D
B47 H43
18 CPU_HDMI_CLK- D47 DDI1_TXN[3] EDP_TXN[3] F43
eDP
18 CPU_HDMI_CLK+ DDI1_TXP[3] EDP_TXP[3]
DDI pull up at HDMI side.
A42 J42
DDI2_TXN[0] EDP_AUXN CPU_EDP_AUX- 17
C42 G42
A44 DDI2_TXP[0] EDP_AUXP CPU_EDP_AUX+ 17
C44 DDI2_TXN[1] A40 EDP_DISP_ULT 1 @
B41 DDI2_TXP[1] EDP_DISP_UTIL TC166 +CPU_VCCIO
D41 DDI2_TXN[2] H41
B43 DDI2_TXP[2] DDI1_AUXN F41 24.9_0402_1%
DDI2_TXN[3] DDI1_AUXP RC4
D43 J40
DDI2_TXP[3] DDI2_AUXN G40 EDP_COMP 1 2
L6 DDI2_AUXP
18 HDMI_DDC_CLK GPP_E18/DDPB_CTRLCLK
H6
GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0
C11 PCH_HDMI_HPD
PCH_HDMI_HPD 18 +VCCIOA_OUT & EDP_COMP :
18 HDMI_DDC_DATA
GPP_E14/DDPC_HPD1
L10 RC3026 Trace Width: 20mil
H4 M7 1 2 0_0402_5% Space: 25mil
1 F4 GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 F6 EC_SCI# 9,25
@ TC171 GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 A7 @
Max length: 100mil
GPP_E17/EDP_HPD PCH_EDP_HPD 17
M5
L4 GPP_E22 D4
GPP_E23 eDP_BKLEN B6 PCH_BKLT_CTRL PCH_BKLT_EN 17,25
EDP_COMP A50 eDP_BKLCTL D3 PCH_LCD_VDDEN PCH_BKLT_CTRL 17
DISPLAY SIDEBANDS
eDP_RCOMP eDP_VDDEN PCH_LCD_VDDEN 17
1 OF 20
SKYLAKE-Y_FCBGA1515
REV = 1 ?
@
C C
m
co
x.
B B
fi
na
Vi
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (DDI,EDP)

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL Size Document
Size Document Number
Number Rev
Rev
Miray
Date:
Date: Monday, February 29, 2016 Sheet
Sheet 4 of 38
5 4 3 2 1
5 4 3 2 1
+CPU_VCCSTG
Debug Port DG
2 1 CPU_PROCHOT# Merged MCP XDP-SFF-26Pin Connector Pinout
RC19 1K_0402_1%
SKYLAKE_ULX?
UC1D
+CPU_VCCSTG
+CPU_VCCST TC15 @ 1 CATERR# H49 D53 XDP_TCK
F49 CATERR# PROC_TCK C54 XDP_TDI XDP_TDI 2 1
25 CPU_PECI_R CPU_PROCHOT# 1 2 J48 PECI PROC_TDI G48 XDP_TDO
PROCHOT# RC1546 51_0402_5%
25 CPU_PROCHOT# PROCHOT# PROC_TDO XDP_TMS XDP_TDO
RC20 499_0402_1% THRMTRIP# H47 C59 2 1
D
RC57 1 2 0_0402_5% SKTOCC# B62 THERMTRIP# PROC_TMS F47 XDP_TRST# RC1543 51_0402_5%
D
2 1 THRMTRIP# SKTOCC# PROC_TRST# XDP_TMS 2 1
RC143 1K_0402_1% TC11 @ 1 XDP_BPM0# H51 JTAG
B53 PCH_JTAG_TCK RC1547 51_0402_5%
TC12 @ 1 XDP_BPM1# J50 BPM#[0] PCH_JTAG_TCK C50 XDP_TDI
BPM#[1] PCH_JTAG_TDI
130 degree output ,for breakpoint and performance monitor signal TC13 @ 1 XDP_BPM2#
XDP_BPM3#
F51
BPM#[2] PCH_JTAG_TDO
B51 XDP_TDO
XDP_TMS XDP_TCK
TC14 @ 1 G50 A52 1 2
BPM#[3] PCH_JTAG_TMS C52 XDP_TRST# RC1551 51_0402_5%
TPM_ID1 E11 PCH_TRST# B49 XDP_TCK PCH_JTAG_TCK 1 @ 2
TPM_ID2 M9 GPP_E3/CPU_GP0 JTAGX RC1552 51_0402_5%
PCH_TP_INT# BD8 GPP_E7/CPU_GP1 XDP_TRST# 1 @ 2
26 PCH_TP_INT# GPP_B3/CPU_GP2
BC11
GPP_B4/CPU_GP3 For Boundary Scan RC1553 51_0402_5%
RC155 1 2 49.9_0402_1% BN17

RC156 1 2 49.9_0402_1% BP16 PROC_POPIRCOMP
PCH_OPIRCOMP
CPU MISC
4 OF 20
SKYLAKE-Y_FCBGA1515
REV = 1 ?
@
TPM_ID1 Description
0 NO physical TPM
1 physical TPM
C C
+3VS
2
2
10K_0402_5%
10K_0402_5%
TPM@
RC3029
RC3031
@
1
TPM_ID1
m
TPM_ID2
co
2
2
10K_0402_5%
10K_0402_5%
x.
RC3030
RC3032
B B
UNTPM@ @
1
fi
na
0901 add
Vi
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (XDP,JATG)

Miray
5 4 3 2 1
5 4 3 2 1
DDRA_DQS#[0..7]
Non-interleave ballmap
15 DDRA_DQS#[0..7]
DDRA_DQS[0..7]
15 DDRA_DQS[0..7]
DDRB_DQS#[0..7]
16 DDRB_DQS#[0..7]
DDRB_DQS[0..7] ?
16 DDRB_DQS[0..7] SKYLAKE_ULX
UC1B ?
BC62 UC1C
SKYLAKE_ULX
15 DDRA_DQ[0..7] DDRA_DQ0 DDR0_CKN[0] DDRA_CLK0# 15
AG61 BC60
DDRA_DQ1 DDR0_DQ[0] DDR0_CKP[0] DDRA_CLK0 15 16 DDRB_DQ[0..7] DDRB_DQ0
AH60 BA60 BC41 BK36
DDRA_DQ2 AK62 DDR0_DQ[1] DDR0_CKN[1] BA62 DDRA_CLK1# 15 DDRB_DQ1 BC39 DDR0_DQ[32]/DDR1_DQ[0] DDR1_CKN[0] BM36 DDRB_CLK0# 16
DDRA_DQ3 DDR0_DQ[2] DDR0_CKP[1] DDRA_CLK1 15 DDRB_DQ2 DDR0_DQ[33]/DDR1_DQ[1] DDR1_CKP[0] DDRB_CLK0 16
AK60 BG41 BD32
DDRA_DQ4 AH62 DDR0_DQ[3] BB57 DDRB_DQ3 BE39 DDR0_DQ[34]/DDR1_DQ[2] DDR1_CKN[1] BF32 DDRB_CLK1# 16
DDRA_DQ5 DDR0_DQ[4] DDR0_CKE[0] DDRA_CKE0 15 DDRB_DQ4 DDR0_DQ[35]/DDR1_DQ[3] DDR1_CKP[1] DDRB_CLK1 16
AG63 BC58 BF42
D DDRA_DQ6 DDR0_DQ[5] DDR0_CKE[1] DDRA_CKE1 15 DDRB_DQ5 DDR0_DQ[36]/DDR1_DQ[4] D
AL61 BE57 BD42 BN33
DDRA_DQ7 AL63 DDR0_DQ[6] DDR0_CKE[2] AW61 DDRA_CKE2 15 DDRB_DQ6 BG39 DDR0_DQ[37]/DDR1_DQ[5] DDR1_CKE[0] BK32 DDRB_CKE0 16
15 DDRA_DQ[8..15] DDRA_DQ8 DDR0_DQ[7] DDR0_CKE[3] DDRA_CKE3 15 DDRB_DQ7 DDR0_DQ[38]/DDR1_DQ[6] DDR1_CKE[1] DDRB_CKE1 16
AM60 BE41 BG33
DDRA_DQ9 AM62 DDR0_DQ[8] AW63 16 DDRB_DQ[8..15] DDRB_DQ8 BC43 DDR0_DQ[39]/DDR1_DQ[7] DDR1_CKE[2] BH30 DDRB_CKE2 16
DDRA_DQ10 DDR0_DQ[9] DDR0_CS#[0] DDRA_CS0# 15 DDRB_DQ9 DDR0_DQ[40]/DDR1_DQ[8] DDR1_CKE[3] DDRB_CKE3 16
AT60 BJ57 BD46
DDRA_DQ11 DDR0_DQ[10] DDR0_CS#[1] DDRA_CS1# 15 DDRB_DQ10 DDR0_DQ[41]/DDR1_DQ[9]
AR61 BN61 BG43 BM30
DDRA_DQ12 AN61 DDR0_DQ[11] DDR0_ODT[0] DDRA_ODT0 15 DDRB_DQ11 BG45 DDR0_DQ[42]/DDR1_DQ[10] DDR1_CS#[0] BJ33 DDRB_CS0# 16
DDRA_DQ13 DDR0_DQ[12] DDRB_DQ12 DDR0_DQ[43]/DDR1_DQ[11] DDR1_CS#[1] DDRB_CS1# 16
AN63 AW59 BC45 BC35
DDRA_DQ14 AR63 DDR0_DQ[13] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] AW55 DDRA_CAA0 15 DDRB_DQ13 BE43 DDR0_DQ[44]/DDR1_DQ[12] DDR1_ODT[0] DDRB_ODT0 16
DDRA_DQ15 DDR0_DQ[14] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDRA_CAA1 15 DDRB_DQ14 DDR0_DQ[45]/DDR1_DQ[13]
AT62 BF62 BE45 BK30
15 DDRA_DQ[16..23] DDRA_DQ16 DDR0_DQ[15] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDRA_CAA2 15 DDRB_DQ15 DDR0_DQ[46]/DDR1_DQ[14] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDRB_CAA0 16
AT56 AV56 BF46 BN31
DDRA_DQ17 AR55 DDR1_DQ[0]/DDR0_DQ[16] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AW57 DDRA_CAA3 15 16 DDRB_DQ[16..23] DDRB_DQ16 BM28 DDR0_DQ[47]/DDR1_DQ[15] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] BM32 DDRB_CAA1 16
DDRA_DQ18 DDR1_DQ[1]/DDR0_DQ[17] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDRA_CAA4 15 DDRB_DQ17 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDRB_CAA2 16
AN57 AV58 BN27 BL37
DDRA_DQ19 AN55 DDR1_DQ[2]/DDR0_DQ[18] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] BA56 DDRA_CAA5 15 DDRB_DQ18 BK28 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] BG31 DDRB_CAA3 16
DDRA_DQ20 DDR1_DQ[3]/DDR0_DQ[19] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDRA_CAA6 15 DDRB_DQ19 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] DDRB_CAA4 16
AR57 BD59 BL25 BN37
DDRA_DQ21 DDR1_DQ[4]/DDR0_DQ[20] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] DDRA_CAA7 15 DDRB_DQ20 DDR1_DQ[35]/DDR1_DQ[19] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDRB_CAA5 16
AT58 BD61 BN25 BJ37
DDRA_DQ22 AM58 DDR1_DQ[5]/DDR0_DQ[21] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# BG61 DDRA_CAA8 15 DDRB_DQ21 BL27 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] BJ35 DDRB_CAA6 16
DDRA_DQ23 DDR1_DQ[6]/DDR0_DQ[22] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] DDRA_CAA9 15 DDRB_DQ22 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] DDRB_CAA7 16
AM56 BJ25 BM34
15 DDRA_DQ[24..31] DDRA_DQ24 AL55 DDR1_DQ[7]/DDR0_DQ[23] BK59 DDRB_DQ23 BJ27 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# BN35 DDRB_CAA8 16
DDRA_DQ25 DDR1_DQ[8]/DDR0_DQ[24] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] DDRA_CAB0 15 16 DDRB_DQ[24..31] DDRB_DQ24 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] DDRB_CAA9 16
AL57 BL62 BM24
DDRA_DQ26 DDR1_DQ[9]/DDR0_DQ[25] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] DDRA_CAB1 15 DDRB_DQ25 DDR1_DQ[40]/DDR1_DQ[24]
AH58 BJ61 BK24 BG37
DDRA_DQ27 AH56 DDR1_DQ[10]/DDR0_DQ[26] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AV60 DDRA_CAB2 15 DDRB_DQ26 BN21 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] BE37 DDRB_CAB0 16
DDRA_DQ28 DDR1_DQ[11]/DDR0_DQ[27] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] DDRA_CAB3 15 DDRB_DQ27 DDR1_DQ[42]/DDR1_DQ[26] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] DDRB_CAB1 16
AK58 BN62 BJ23 BC37
DDRA_DQ29 AK56 DDR1_DQ[12]/DDR0_DQ[28] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] BB61 DDRA_CAB4 15 DDRB_DQ28 BL23 DDR1_DQ[43]/DDR1_DQ[27] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] BF34 DDRB_CAB2 16
DDRA_DQ30 DDR1_DQ[13]/DDR0_DQ[29] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDRA_CAB5 15 DDRB_DQ29 DDR1_DQ[44]/DDR1_DQ[28] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] DDRB_CAB3 16
AG55 BL61 BN23 BC33
DDRA_DQ31 DDR1_DQ[14]/DDR0_DQ[30] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] DDRA_CAB6 15 DDRB_DQ30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[4] DDRB_CAB4 16
AG57 BM59 BJ21 BF30
15 DDRA_DQ[32..39] DDRA_DQ32 BE55 DDR1_DQ[15]/DDR0_DQ[31] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] BN58 DDRA_CAB7 15 DDRB_DQ31 BL21 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] BD36 DDRB_CAB5 16
DDRA_DQ33 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDRA_CAB8 15 16 DDRB_DQ[32..39] DDRB_DQ32 DDR1_DQ[47]/DDR1_DQ[31] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDRB_CAB6 16
BC55 AV62 BN45 BG35
DDRA_DQ34 BG53 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] DDRA_CAB9 15 DDRB_DQ33 BM46 DDR0_DQ[48]/DDR1_DQ[32] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] BC31 DDRB_CAB7 16
DDRA_DQ35 DDR0_DQ[18]/DDR0_DQ[34] DDRB_DQ34 DDR0_DQ[49]/DDR1_DQ[33] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDRB_CAB8 16
BE53 BB63 BL43 BF36
DDRA_DQ36 DDR0_DQ[19]/DDR0_DQ[35] DDR0_MA[3] DDRB_DQ35 DDR0_DQ[50]/DDR1_DQ[34] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] DDRB_CAB9 16
BC53 BL57 BK46
DDRA_DQ37 BG55 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[4] DDRB_DQ36 BN43 DDR0_DQ[51]/DDR1_DQ[35] BJ31
DDRA_DQ38 BD52 DDR0_DQ[21]/DDR0_DQ[37] AJ61 DDRA_DQS#0 DDRB_DQ37 BL45 DDR0_DQ[52]/DDR1_DQ[36] DDR1_MA[3] BK34
DDRA_DQ39 BF52 DDR0_DQ[22]/DDR0_DQ[38] DDR0_DQSN[0] AJ63 DDRA_DQS0 DDRB_DQ38 BJ45 DDR0_DQ[53]/DDR1_DQ[37] DDR1_MA[4]
15 DDRA_DQ[40..47] DDRA_DQ40 DDR0_DQ[23]/DDR0_DQ[39] DDR0_DQSP[0] DDR0_DQ[54]/DDR1_DQ[38]
BC51 AP62 DDRA_DQS#1 DDRB_DQ39 BJ43 BD40 DDRB_DQS#0
DDRA_DQ41 DDR0_DQ[24]/DDR0_DQ[40] DDR0_DQSN[1] 16 DDRB_DQ[40..47] DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[4]/DDR1_DQSN[0]
BE51 AP60 DDRA_DQS1 DDRB_DQ40 BM42 BF40 DDRB_DQS0
DDRA_DQ42 BC49 DDR0_DQ[25]/DDR0_DQ[41] DDR0_DQSP[1] AP56 DDRA_DQS#2 DDRB_DQ41 BN41 DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSP[4]/DDR1_DQSP[0] BD44 DDRB_DQS#1
DDRA_DQ43 BE49 DDR0_DQ[26]/DDR0_DQ[42] DDR1_DQSN[0]/DDR0_DQSN[2] AP58 DDRA_DQS2 DDRB_DQ42 BJ41 DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSN[5]/DDR1_DQSN[1] BF44 DDRB_DQS1
C C
DDRA_DQ44 BG51 DDR0_DQ[27]/DDR0_DQ[43] DDR1_DQSP[0]/DDR0_DQSP[2] AJ57 DDRA_DQS#3 DDRB_DQ43 BN39 DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] BK26 DDRB_DQS#2
DDRA_DQ45 BG49 DDR0_DQ[28]/DDR0_DQ[44] DDR1_DQSN[1]/DDR0_DQSN[3] AJ55 DDRA_DQS3 DDRB_DQ44 BK42 DDR0_DQ[59]/DDR1_DQ[43] DDR1_DQSN[4]/DDR1_DQSN[2] BM26 DDRB_DQS2
DDRA_DQ46 BF48 DDR0_DQ[29]/DDR0_DQ[45] DDR1_DQSP[1]/DDR0_DQSP[3] BD54 DDRA_DQS#4 DDRB_DQ45 BL41 DDR0_DQ[60]/DDR1_DQ[44] DDR1_DQSP[4]/DDR1_DQSP[2] BM22 DDRB_DQS#3
DDRA_DQ47 BD48 DDR0_DQ[30]/DDR0_DQ[46] DDR0_DQSN[2]/DDR0_DQSN[4] BF54 DDRA_DQS4 DDRB_DQ46 BL39 DDR0_DQ[61]/DDR1_DQ[45] DDR1_DQSN[5]/DDR1_DQSN[3] BK22 DDRB_DQS3
15 DDRA_DQ[48..55] DDRA_DQ48 DDR0_DQ[31]/DDR0_DQ[47] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQ[62]/DDR1_DQ[46] DDR1_DQSP[5]/DDR1_DQSP[3]
BJ55 BF50 DDRA_DQS#5 DDRB_DQ47 BJ39 BK44 DDRB_DQS#4
DDRA_DQ49 BL55 DDR1_DQ[16]/DDR0_DQ[48] DDR0_DQSN[3]/DDR0_DQSN[5] BD50 DDRA_DQS5 16 DDRB_DQ[48..55] DDRB_DQ48 BF28 DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSN[6]/DDR1_DQSN[4] BM44 DDRB_DQS4
DDRA_DQ50 BJ53 DDR1_DQ[17]/DDR0_DQ[49] DDR0_DQSP[3]/DDR0_DQSP[5] BM54 DDRA_DQS#6 DDRB_DQ49 BD28 DDR1_DQ[48] DDR0_DQSP[6]/DDR1_DQSP[4] BM40 DDRB_DQS#5
DDRA_DQ51 BL53 DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQSN[2]/DDR0_DQSN[6] BK54 DDRA_DQS6 DDRB_DQ50 BG25 DDR1_DQ[49] DDR0_DQSN[7]/DDR1_DQSN[5] BK40 DDRB_DQS5
DDRA_DQ52 BN55 DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQSP[2]/DDR0_DQSP[6] BK50 DDRA_DQS#7 DDRB_DQ51 BC27 DDR1_DQ[50] DDR0_DQSP[7]/DDR1_DQSP[5] BD26 DDRB_DQS#6
DDRA_DQ53 BN53 DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQSN[3]/DDR0_DQSN[7] BM50 DDRA_DQS7 DDRB_DQ52 BG27 DDR1_DQ[51] DDR1_DQSN[6] BF26 DDRB_DQS6
DDRA_DQ54 BM52 DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQSP[3]/DDR0_DQSP[7] DDRB_DQ53 BE27 DDR1_DQ[52] DDR1_DQSP[6] BF22 DDRB_DQS#7
DDRA_DQ55 BK52 DDR1_DQ[22]/DDR0_DQ[54] BG57 DDRB_DQ54 BE25 DDR1_DQ[53] DDR1_DQSN[7] BD22 DDRB_DQS7
15 DDRA_DQ[56..63] DDRA_DQ56 DDR1_DQ[23]/DDR0_DQ[55] DDR0_ALERT# DDRB_DQ55 DDR1_DQ[54] DDR1_DQSP[7]
BL51 BM56 BC25
DDRA_DQ57 BJ51 DDR1_DQ[24]/DDR0_DQ[56] DDR0_PAR 16 DDRB_DQ[56..63] DDRB_DQ56 BF24 DDR1_DQ[55] BD34
DDRA_DQ58 BL49 DDR1_DQ[25]/DDR0_DQ[57] AR53 DDRB_DQ57 BD24 DDR1_DQ[56] DDR1_ALERT# BD30
DDRA_DQ59 BJ49 DDR1_DQ[26]/DDR0_DQ[58] DDR_VREF_CA AN53 DDR_SM_VREFCA 15 DDRB_DQ58 BG21 DDR1_DQ[57] DDR1_PAR BP20
DDRA_DQ60 DDR1_DQ[27]/DDR0_DQ[59] DDR0_VREF_DQ DDR_SA_VREFDQ 15 DDRB_DQ59 DDR1_DQ[58] DRAM_RESET#
BN49 AW53 BC23
DDRA_DQ61 DDR1_DQ[28]/DDR0_DQ[60] DDR1_VREF_DQ DDR_SB_VREFDQ 16 DDRB_DQ60 DDR1_DQ[59]
BN51 BE23 BF64 SM_RCOMP_0 1 2
DDRA_DQ62 BK48 DDR1_DQ[29]/DDR0_DQ[61] BN47 DDR_VTT_CNTL DDRB_DQ61 BG23 DDR1_DQ[60] DDR_RCOMP[0] BJ64 SM_RCOMP_1 1 2
DDRA_DQ63 BM48 DDR1_DQ[30]/DDR0_DQ[62] DDR_VTT_CNTL DDRB_DQ62 BC21 DDR1_DQ[61] DDR_RCOMP[1] BC64 SM_RCOMP_2 1 2
DDR CH - A DDR CH - B
DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[62] DDR_RCOMP[2]
SMVREF DDRB_DQ63 BE21
DDR1_DQ[63]
RC26 200_0402_1%
WIDTH:20MIL RC25 80.6_0402_1%
2 OF 20 SPACING: 20MIL RC24 162_0402_1%
SKYLAKE-Y_FCBGA1515
3 OF 20
REV = 1 ?
SKYLAKE-Y_FCBGA1515
@ REV = 1 ?
m
@ Need to check the resistor value
co
+3VALW_PCH
x.
B B
fi
1
RC50
100K_0402_5%
2
na
CPU_DRAMPG_CNTL 35
+DDR_1.2V
C
1
RC48 1 2 2 QC14
Vi
1K_0402_5% B
E
MMBT3904WH_SOT323-3
3
DDR_VTT_CNTL
2
RC49
10K_0402_5%
@
1
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (DDR)

Miray
5 4 3 2 1
5 4 3 2 1
+3VALW_PCH
@
SML0_ALERT# 2 1
+VCCHDA ? R687 2.2K_0402_5%
UC1G
SKYLAKE_ULX SMB_ALERT# 2 1
R688 2.2K_0402_5%
RC47 1 @ 2 1K_0402_5% HDA_SDOUT RC43 1 2 33_0402_5% HDA_SYNC BJ19 AH9 SML1_ALERT# 1 2
23 PCH_HDA_SYNC HDA_BCLK HDA_SYNC/I2S0_SFRM GPP_G0/SD_CMD
RC42 1 2 33_0402_5% BK18 AH11 R689 150K_0402_5%
23 PCH_HDA_BCLK HDA_SDOUT HDA_BLK/I2S0_SCLK GPP_G1/SD_DATA0
BK16 AG12
HDA_SDO/I2S0_TXD GPP_G2/SD_DATA1 RPC686
HDA_SDO This signal has a weak internal pull-down. PCH_HDA_SDIN0 BL15 AF9
*
23 PCH_HDA_SDIN0 HDA_SDI0/I2S0_RXD GPP_G3/SD_DATA2 PCH_SMB_CLK 4 1
0 = Enable security measures defined in the Flash Descriptor. BL17
HDA_SDI1/I2S1_RXD GPP_G4/SD_DATA3
AF11 PCH_SMB_DATA 3 2
1 = Disable Flash Descriptor Security(override). This strap BL19 AG8
V5 HDA_RST#/I2S1_SCLK GPP_G5/SD_CD# AG10
should only be asserted high during external pull-up in BL12 GPP_D23/I2S_MCLK SDIO/SDXC GPP_G6/SD_CLK AE12 2.2K_0404_4P2R_5%
manufacturing/debug environments ONLY. RC45 1 2 33_0402_5% HDA_SDOUT BK14 I2S1_SFRM GPP_G7/SD_WP +3VALW_PCH
23 PCH_HDA_SDOUT I2S1_TXD @
AUDIO BL4 1 @
D
RC46 1 2 0_0402_5% GPP_A17/SD_PWR_EN#/ISH_GP7 BN4 1 @ TC82
D
25 PCH_ME_PROTECT GPP_A16/SD_1P8_SEL
For EMI AT13
GPP_F1/I2S2_SFRM
TC191
PCH_HDA_SDIN0 AT11 BF1 SD_RCOMP 2 1 RPC25
AP11 GPP_F0/I2S2_SCLK SD_RCOMP RC1537 200_0402_1% SML0_CLK 1 8
AT5 GPP_F2/I2S2_TXD SML0_DATA 2 7
GPP_F3/I2S2_RXD AJ8 1 @ PCH_SML1_CLK 3 6
1 GPP_F23
@ TC194 PCH_SML1_DAT 4 5
CC7 V3
10P_0402_50V8J TC124@ 1 V11 GPP_D19/DMIC_CLK0 10K_0804_8P4R_5%
2 GPP_D20/DMIC_DATA0 @
U12
U8 GPP_D17/DMIC_CLK1
PCH_BEEP AV3 GPP_D18/DMIC_DATA1
23 PCH_BEEP GPP_B14/SPKR
7 OF 20
The signal has a weak internal pull-down. SKYLAKE-Y_FCBGA1515
REV = 1 ?
0 = Disable ¡°Top Swap¡± mode. (Default) @
+3VS
1 = Enable ¡°Top Swap¡± mode.
2 1 PCH_BEEP
R684 2.2K_0402_5% +3VS
@
PCH_SPI_CS0# RC64 1 2 0_0402_5% SPI_CS0#

25 PCH_SPI_CS0#
PCH_SPI_SI RC52 1 2 15_0402_5% SPI_SI ?
25 PCH_SPI_SI SKYLAKE_ULX
UC1E
PCH_SPI_SO RC53 1 2 15_0402_5% SPI_SO
25 PCH_SPI_SO SPI_CLK PCH_SMB_CLK PM_CLKRUN#
AU10 AC12 1 2
PCH_SPI_CLK RC65 1 2 15_0402_5% SPI_CLK SPI_SO AU12 SPI0_CLK GPP_C0/SMBCLK W6 PCH_SMB_DATA
25 PCH_SPI_CLK SPI_SI SPI0_MISO GPP_C1/SMBDATA SMB_ALERT#
AT3 W8 R3024 8.2K_0402_5%
SPI_WP# AV11 SPI0_MOSI GPP_C2/SMBALERT#
SPI_HOLD# AV13 SPI0_IO2 SPI - FLASH SMBUS, SMLINK W4 SML0_CLK
SPI_CS0# AU4 SPI0_IO3 GPP_C3/SML0CLK AC10 SML0_DATA
C C
AU6 SPI0_CS0# GPP_C4/SML0DATA AA6 SML0_ALERT#
AU8 SPI0_CS1# GPP_C5/SML0ALERT#
+3V_SPI SPI0_CS2# AA4 PCH_SML1_CLK
SPI - TOUCH GPP_C6/SML1CLK W10 PCH_SML1_DAT
P9 GPP_C7/SML1DATA BB6 SML1_ALERT#
N8 GPP_D1 GPP_B23/SML1ALERT#/PCHHOT#
P3 GPP_D2 BK11
W12 GPP_D3 GPP_A1/LAD0/ESPI_IO0 BJ8 LPC_AD0 24,25
GPP_D21 GPP_A2/LAD1/ESPI_IO1
1
RC61 RC60 V7 LPC BG10 LPC_AD1 24,25

1K_0402_5% 1K_0402_5% N6 GPP_D22 GPP_A3/LAD2/ESPI_IO2 BP5 LPC_AD2 24,25
GPP_D0 GPP_A4/LAD3/ESPI_IO3 BP7 LPC_AD3 24,25
F12 GPP_A5/LFRAME#/ESPI_CS# BJ6 SUS_STAT# 1 @ LPC_FRAME# 24,25
C LINK
D12 CL_CLK GPP_A14/SUS_STAT#/ESPI_RESET# TC81
2
B12 CL_DATA BJ10 CLKOUT0 RC173 1 2 22_0402_5%

CL_RST# GPP_A9/CLKOUT_LPC0/ESPI_CLK CLK_PCI_TPM_R PCH_PCI_CLK 25
BF5 RC1541 2 TPM@ 1 22_0402_5%
SPI_WP# PCH_SPI_WP# GPP_A10/CLKOUT_LPC1 PM_CLKRUN# CLK_PCI_TPM 24
RC54 1 2 15_0402_5% BH11
EC_KBRST# GPP_A8/CLKRUN# PM_CLKRUN# 24
BL10
25 EC_KBRST# GPP_A0/RCIN#
@ BN8
24,25 EC_INT_SERIRQ GPP_A6/SERIRQ
SPI_HOLD# RC55 1 2 15_0402_5% PCH_SPI_HOLD#
5 OF 20
SKYLAKE-Y_FCBGA1515
@ REV = 1 ?
@ @
1 2
R3005 100_0402_1%
SPI_HOLD# for SKL ES Sample
m
1. 1K PD, unmont 1K PU with HOLD functionality disabled
* 2. 100ohm PD, 1K PU, disabled after RSMRST# de-assertion
co
EMC_NS@ EC_KBRST#
1 2
CC1981 1000P_0402_50V7K
1 2 EMC_NS@ PCH_PCI_CLK
CC1982 1000P_0402_50V7K
x.
B B
fi
+3VALW_PCH +3V_SPI
RC171 1 2 0_0402_5%
na
Vi
for signal SMB_ALERT#:

This signal has a weak internal pull-down.
0 = Disable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (no confidentiality). (Default)
1 = Enable Intel ME Crypto Transport Layer Security
(TLS) cipher suite (with confidentiality). Must be
+3V_SPI pulled up to support Intel AMT with TLS and Intel
UC4 SBA (Small Business Advantage) with TLS.
A A
PCH_SPI_CS0# 1 8
PCH_SPI_SO 2 /CS VCC 7 PCH_SPI_HOLD#
DO(IO1) /HOLD(IO3)
0.1u_0201_10V6K
PCH_SPI_WP# 3 6 PCH_SPI_CLK 1
4 /WP(IO2) CLK 5 PCH_SPI_SI
GND DI(IO0)
CC8
9
PAD_GND 2
W25Q64FVZPIQ_WSON8_6X5
Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (RTC&AUDIO&SATA&SMBUS)

Miray
5 4 3 2 1
5 4 3 2 1
RC71 2 1 1M_0402_5%
YC2
+3VS
SKYLAKE_ULX? XTAL24_OUT
UC1J 2 3
RPC3 @ NC1 OSC2
1 8 PCIE_CLKREQ#4 CLOCK SIGNALS XTAL24_IN 1 4
2 7 PCIE_CLKREQ#2 H35 J34 CLK_PCIE_XDP# 1 @ TC85 OSC1 NC2
3 6 PCIE_CLKREQ#5 20 CLK_PCIE_SSD# F35 CLKOUT_PCIE_N1 CLKOUT_ITPXDP_N G34 CLK_PCIE_XDP 1 @ TC87 1
PCIE_CLKREQ#0 20 CLK_PCIE_SSD PCIE_CLKREQ#1 CLKOUT_PCIE_P1 CLKOUT_ITPXDP_P
4 5 AV9 1 24MHZ_6PF_7V24000032
9,20 PCIE_CLKREQ#1 GPP_B6/SRCCLKREQ1# BA15 SUSCLK CC11
GPD8/SUSCLK SUSCLK 20,21 3.9P_0402_50V8-B
10K_0804_8P4R_5% J36 CC12
G36 CLKOUT_PCIE_N2 M1 XTAL24_IN +VCCCLK5 3.9P_0402_50V8-B 2
RC303 1 2 10K_0402_5% SYS_RESET# PCIE_CLKREQ#2 BD10 CLKOUT_PCIE_P2 XTAL24_IN L2 XTAL24_OUT 2
GPP_B7/SRCCLKREQ2# XTAL24_OUT 1103 change symbol
21 CLK_PCIE_WLAN#
J38
CLKOUT_PCIE_N3 XCLK_BIASREF
P1 DIFFCLK_BIASREF 1 2 Differential Clock Bias Reference:
G38 RC72 2.7K_0402_1%
21 CLK_PCIE_WLAN CLKOUT_PCIE_P3
D
9,21 WLAN_CLKREQ#
WLAN_CLKREQ# AV5
GPP_B8/SRCCLKREQ3# RTCX1
BN19 RTC_X1 Width: 12-15Mil D
RTC_X2 RTC_X1
RTCX2
BP18 Space:12Mil
H37
F37 CLKOUT_PCIE_N4 BH18 SRTC_RST# Length: 500Mil
PCIE_CLKREQ#4 AV7 CLKOUT_PCIE_P4 SRTCRST# BN12 RTC_RST# need to check R value RC32 2 1 10M_0402_5% RTC_X2
GPP_B9/SRCCLKREQ4# RTCRST# RTC_RST# 25
2 1 PCH_PLT_RST# H39 YC1
RC92 100K_0402_5% F39 CLKOUT_PCIE_N5 1 2
PCIE_CLKREQ#5 BC5 CLKOUT_PCIE_P5 RC1555
1 2 GPP_B10/SRCCLKREQ5# DIFFCLK_BIASREF 1 2 60.4_0402_1% 32.768KHZ_9PF_X1A000141000200
2 2
CC200 330P_0402_50V7K PCIE_CLKREQ#0 BB10 Cannonlake@
GPP_B5/SRCCLKREQ0# CC4 CC5
8P_0402_50V8J 8P_0402_50V8J
10 OF 20 1 1
SKYLAKE-Y_FCBGA1515
REV = 1 ?
@
CRYSTAL
? 1, Space 15MIL
2, No trace under crystal
SKYLAKE_ULX
UC1K
SYSTEM POWER MANAGEMENT 3, Place on oppsosit side of MCP for temp influence
BC9 PCH_SLP_S0#_R RC161 1 2 0_0402_5%
PCH_PLT_RST# BB8 GPP_B12/SLP_S0# AY14 PCH_SLP_S3#_R PCH_SLP_S0# 12,25
RC142 1 2 0_0402_5%
20,21,24,25 PCH_PLT_RST# SYS_RESET# GPP_B13/PLTRST# GPD4/SLP_S3# PCH_SLP_S3# 25
H2 BF16 PCH_SLP_S4#_R RC144 1 2 0_0402_5%
EC_RSMRST# SYS_RESET# GPD5/SLP_S4# PCH_SLP_S4# 25
BJ12 BH14 PCH_SLP_S5# 1 @ TC39
25 EC_RSMRST# RSMRST# GPD10/SLP_S5#
TC189 @ 1 A62 BN10 VCCRTC
VCCST_PWRGD 1 2 VCCST_PWRGD_R B61 PROCPWRGD SLP_SUS# BP11
R3031 60.4_0402_1% VCCST_PWRGD SLP_LAN# BH16
RC145 1 2 0_0402_5% EC_SYS_PWROK_R J1 GPD9/SLP_WLAN# BE17
+3VALW_PCH 25 EC_SYS_PWROK EC_PCH_PWROK_R SYS_PWROK GPD6/SLP_A# SRTC_RST#
RC146 1 2 0_0402_5% BP14 2 1
25 EC_PCH_PWROK EC_RSMRST# PCH_PWROK
1 2 BN15 BF14 EC_PBTN_OUT#_R 1 2 20K_0402_1% RC33
DSW_PWROK GPD3/PWRBTN# BD14 AC_PRESENT EC_PBTN_OUT# 25 RTC_RST# 2 1
RC140 0_0402_5% RC141 0_0402_5%
BL6 GPD1/ACPRESENT BD16 BATLOW# 20K_0402_1% RC34
25 SUSPWRDNACK GPP_A13/SUSWARN#/SUSPWRDNACK GPD0/BATLOW#
not need reserve TC129 @ 1 SUSACK#_R BF9
GPP_A15/SUSACK# BF7 PME# 1 @ TC89 1 1
RC79 1 @ 2 10K_0402_5% SUSPWRDNACK PCIE_WAKE# BP9 GPP_A11/PME# BG19 INTRUDER#
C C
20,21 PCIE_WAKE# WAKE# INTRUDER#
1U_0402_10V6K
1U_0402_10V6K
LAN_WAKE# BE15
CC6
CC9
BC15 GPD2/LAN_WAKE# BC7 PCH_EXTPWR_GATE#
GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE#
1
BB16 BD6 VRALERT# 1 @ TC138 2 2
GPD7/RSVD GPP_B2/VRALERT#
1 2 10K_0402_5% AC_PRESENT 11 OF 20 TP71

RC81
SKYLAKE-Y_FCBGA1515 @
REV = 1 ? VCCRTC
@
RPC5
1 8 PCIE_WAKE#
2 7 LAN_WAKE# INTRUDER# RC41 2 1 1M_0402_5%
3 6 BATLOW#
4 5 PCH_EXTPWR_GATE# CRB use 330K
+CPU_VCCST
10K_0804_8P4R_5%
PCH_EXTPWR_GATE# :Reserve pull up only?
2
EMC_NS@ RC137
12 EC_PCH_PWROK 1K_0402_5%
CC104 1000P_0402_50V7K
EMC_NS@
1 2 EC_SYS_PWROK RC139 SUSCLK 1 2
1
CC101 1000P_0402_50V7K VCCST_PWRGD 1 2 0_0402_5% 1K_0402_5% RC66

EC_VCCST_PWRGD 25
@
EMC_NS@
1 2 EC_RSMRST#
m
CC1983 1000P_0402_50V7K
co
2
@ VCCRTC
CC140
1000P_0402_50V7K
1 x. 1 1
0.1u_0201_10V6K
CC17
1U_0402_10V6K
CC26
B B
DC1 2 2
fi
RC88 1 2 0_0402_5% AC_PRESENT 3 @
25 EC_PCH_ACIN +3VL RC35
1 1 2
1 2 BAT_D 2
RTC_VCC 1.5K_0402_5%
1
RC36
na
0_0402_5% RC1491 BAT54CW_SOT323-3 45.3K_0402_1%
2
Vi
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (Clock,PM)

Miray
5 4 3 2 1
5 4 3 2 1
The signal has a weak internal pull-down. +3VALW_PCH
0 = Disable ¡°No Reboot¡± mode. (Default)

RPC17
+3VS USB_OC1# 8 1
1 = Enable ¡°No Reboot¡± mode USB_OC0#
USB_OC3#
7
6
2
3
@ USB_OC2# 5 4
2 1 GPP_B18
R685 2.2K_0402_5% 10K_0804_8P4R_5% +3VS
USB3.0 stand port
@ SKYLAKE_ULX ?
UC1H
R686
2 1
2.2K_0402_5%
GPP_B22
The signal has a weak internal pull-down. C20 C16
0 = boot from SPI. (Default) A20 PCIE1_RXN/USB3_5_RXN USB3_1_RXN A16 USB30_RX_N1 19
1 = enable boot to LPC,

PCIE1_RXP/USB3_5_RXP USB3_1_RXP USB30_RX_P1 19
1
R690 G20 G16
PCIE1_TXN/USB3_5_TXN USB3_1_TXN USB30_TX_N1 19
2.2K_0402_5% J20 J16
PCIE1_TXP/USB3_5_TXP SSIC / USB3 USB3_1_TXP USB30_TX_P1 19
@ RPC44
B19 B15 SATAGP0 8 1
D19 PCIE2_RXN/USB3_6_RXN USB3_2_RXN/SSIC_1_RXN D15 SATAGP2 7 2
2
F19 PCIE2_RXP/USB3_6_RXP USB3_2_RXP/SSIC_1_RXP F15 WLAN_CLKREQ# 6 3
D PCIE2_TXN/USB3_6_TXN USB3_2_TXN/SSIC_1_TXN 8,21 WLAN_CLKREQ# PCIE_CLKREQ#1 D
H19 H15 5 4
PCIE2_TXP/USB3_6_TXP USB3_2_TXP/SSIC_1_TXP 8,20 PCIE_CLKREQ#1
21 PCIE_PRX_DTX_N3 C22 C18 10K_0804_8P4R_5%

A22 PCIE3_RXN USB3_3_RXN/SSIC_2_RXN A18
21 PCIE_PRX_DTX_P3
WLAN G22 PCIE3_RXP USB3_3_RXP/SSIC_2_RXP G18 +3VS
21 PCIE_PTX_DRX_N3 PCIE3_TXN USB3_3_TXN/SSIC_2_TXN
J22 J18
21 PCIE_PTX_DRX_P3 PCIE3_TXP USB3_3_TXP/SSIC_2_TXP
B21 B17 RPC47
PCIE4_RXN USB3_4_RXN ISH_I2C1_SDA 1 4
D21 D17 ISH_I2C1_SCL
PCIE4_RXP USB3_4_RXP 2 3
F21 F17
H21 PCIE4_TXN USB3_4_TXN H17
PCIE4_TXP USB3_4_TXP 1K_0404_4P2R_5%
C24 AJ6 @
20 PCIE_PRX_DTX_N5 USB20_N1 19
USB3.0 stand port
A24 PCIE5_RXN USB2N_1 AJ4
20 PCIE_PRX_DTX_P5 PCIE5_RXP USB2P_1 USB20_P1 19 +3VS
G24
20 PCIE_PTX_DRX_N5 PCIE5_TXN
J24 AH5
20 PCIE_PTX_DRX_P5 PCIE5_TXP USB2N_5 AH3 RPC52
SSD B23 USB2P_5 PCH_BT_OFF# 8 1
20 PCIE_PRX_DTX_N6 PCIE6_RXN PCH_WLAN_OFF#
D23 PCIE/USB3/SATA
AF5 7 2
20 PCIE_PRX_DTX_P6 USB20_N3 17
camera
F23 PCIE6_RXP USB2N_7 AF3 THS_IRQ 6 3
20 PCIE_PTX_DRX_N6 PCIE6_TXN USB2P_7 USB20_P3 17
H23 USB2
PIRQA# 5 4
20 PCIE_PTX_DRX_P6 PCIE6_TXP AL6
USB20_N4 21
BT
C26 USB2N_3 AL4 10K_0804_8P4R_5%
20 PCIE_PRX_DTX_N7 PCIE7_RXN/SATA0_RXN USB2P_3 USB20_P4 21
A26
20 PCIE_PRX_DTX_P7 PCIE7_RXP/SATA0_RXP
G26 AG6
20 PCIE_PTX_DRX_N7 PCIE7_TXN/SATA0_TXN USB2N_9
J26 AG4
20 PCIE_PTX_DRX_P7 PCIE7_TXP/SATA0_TXP USB2P_9
20 SATA_PRX_DTX_N1 B25 AM3

D25 PCIE8_RXN/SATA1A_RXN USB2N_2 AM5
20 SATA_PRX_DTX_P1
SSD F25 PCIE8_RXP/SATA1A_RXP USB2P_2
20 SATA_PTX_DRX_N1 PCIE8_TXN/SATA1A_TXN USB2_COMP_R
H25 N2 1 2
20 SATA_PTX_DRX_P1 PCIE8_TXP/SATA1A_TXP USB2_COMP AF7 R3002 1 2 113_0402_1% +3VS
C28 USB2_ID AE6 RC105 2 1 0_0402_5%
A28 PCIE9_RXN USB2_VBUSSENSE RC106 1K_0402_5%
G28 PCIE9_RXP N12 USB_OC0#
PCIE9_TXN GPP_E9/USB2_OC0# USB_OC0# 19 SSD_SATA_PCIE_DET# 2 1
Impedance Compensation Inputs J28
PCIE9_TXP GPP_E10/USB2_OC1#
M11 USB_OC1#
RC188 @ 10K_0402_5%
F8 USB_OC2#
GPP_E11/USB2_OC2#
C Width 12~15Mil B27
PCIE10_RXN GPP_E12/USB2_OC3#
B8 USB_OC3# C
Space >12Mil D27
PCIE10_RXP
F27 F10
Length 500Mil H27 PCIE10_TXN GPP_E4/DEVSLP0 H10
RC119 PCIE10_TXP GPP_E5/DEVSLP1 L8 PCH_SATA_DEVSLP 20
PCIE_RCOMPN GPP_E6/DEVSLP2 EC_SENSOR_INT 25
1 2 A9
PCIE_RCOMPP B10 PCIE_RCOMPN G11 SATAGP0
PCIE_RCOMPP GPP_E0/SATAXPCIE0/SATAGP0 J11 SSD_SATA_PCIE_DET#
100_0402_1% PROC_PRDY# GPP_E1/SATAXPCIE1/SATAGP1 SSD_SATA_PCIE_DET# 20
1 D51 N10 SATAGP2
@ TC169 1 PROC_PREQ# B55 PROC_PRDY# GPP_E2/SATAXPCIE2/SATAGP2 +3VS
@ TC170 PIRQA# BF3 PROC_PREQ# H8 1 2
GPP_A7/PIRQA# GPP_E8/SATALED# EC_SCI# 4,25
RC3027 0_0402_5%
8 OF 20
SKYLAKE-Y_FCBGA1515
REV = 1 ?
@
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
?
SKYLAKE_ULX
UC1F
RC83
RC85
RC86
RC87
LPSS ISH
1
BC3 @ @ @ @
AW10 GPP_B15/GSPI0_CS# P11 BOARD_ID0
AW6 GPP_B16/GSPI0_CLK GPP_D9 T7
GPP_B18 BB4 GPP_B17/GSPI0_MISO GPP_D10 T5 BOARD_ID1
GPP_B18/GSPI0_MOSI GPP_D11 T11
PCH_WLAN_OFF# BB2 GPP_D12 BOARD_ID2
m
21 PCH_WLAN_OFF#
G Sensor
PCH_BT_OFF# AW12 GPP_B19/GSPI1_CS# P7 ISH_I2C0_SDA
21 PCH_BT_OFF# GPP_B20/GSPI1_CLK GPP_D5/ISH_I2C0_SDA ISH_I2C0_SCL ISH_I2C0_SDA 27 BOARD_ID3
AW4 P5
GPP_B22 AW8 GPP_B21/GSPI1_MISO GPP_D6/ISH_I2C0_SCL ISH_I2C0_SCL 27 Light sensor
co
GPP_B22/GSPI1_MOSI T9 ISH_I2C1_SDA
ISH_I2C1_SDA 27
sensor debug hooks
AC8 GPP_D7/ISH_I2C1_SDA T3 ISH_I2C1_SCL
21 UART_RX_DEBUG GPP_C8/UART0_RXD GPP_D8/ISH_I2C1_SCL ISH_I2C1_SCL 27
AA8
21 UART_TX_DEBUG GPP_C9/UART0_TXD
2
AA10 AM7
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
AA12 GPP_C10/UART0_RTS# GPP_F10/I2C5_SDA/ISH_I2C2_SDA AT9
GPP_C11/UART0_CTS# GPP_F11/I2C5_SCL/ISH_I2C2_SCL
BOARD_ID0
x.
AD5 U10
RC84
RC89
RC90
RC91
BOARD_ID1 AD7 GPP_C20/UART2_RXD GPP_D13/ISH_UART0_RXD/SML0BDATA U4
1
B BOARD_ID2 AD3 GPP_C21/UART2_TXD GPP_D14/ISH_UART0_TXD/SML0BCLK U6 @ @ @ @
B
BOARD_ID3 AD9 GPP_C22/UART2_RTS# GPP_D15/ISH_UART0_RTS# V9
+3VS GPP_C23/UART2_CTS# GPP_D16/ISH_UART0_CTS#/SML0BALERT#
fi
PCH_I2C_SDA0 AD11 AC6
Sensor PCH_I2C_SCL0 AB3 GPP_C16/I2C0_SDA GPP_C12/UART1_RXD/ISH_UART1_RXD AC4
GPP_C17/I2C0_SCL GPP_C13/UART1_TXD/ISH_UART1_TXD AB7
PCH_I2C_SDA1 AB9 GPP_C14/UART1_RTS#/ISH_UART1_RTS# AB5
touch panel PCH_I2C_SCL1 AB11 GPP_C18/I2C1_SDA GPP_C15/UART1_CTS#/ISH_UART1_CTS#
1
2
RPC29 GPP_C19/I2C1_SCL BF11

na
PCH_I2C_SDA2 GPP_A18/ISH_GP0 ISH_GP0 27

1K_0404_4P2R_5% AP3 BD2 1 @ TC190
touch pad PCH_I2C_SCL2 AP7 GPP_F4/I2C2_SDA GPP_A19/ISH_GP1 BJ1
GPP_F5/I2C2_SCL GPP_A20/ISH_GP2 BL3
AP5 GPP_A21/ISH_GP3 BJ3 PCH_THS_RST#
4
3
AT7 GPP_F6/I2C3_SDA GPP_A22/ISH_GP4 BD4 THS_IRQ PCH_THS_RST# 27

GPP_F7/I2C3_SCL GPP_A23/ISH_GP5 THS_IRQ 27
Vi
PCH_I2C_SCL1 PM_I2C_SCL1 BJ4

RC147 1 2 0_0402_5% Sx_EXIT_HOLDOFF#/GPP_A12/BM_BUSY#/ISH_GP6 ISH_GP6 27
PM_I2C_SCL1 27 AN4
AN6 GPP_F8/I2C4_SDA
PCH_I2C_SDA1 RC148 1 2 0_0402_5% PM_I2C_SDA1 GPP_F9/I2C4_SCL
PM_I2C_SDA1 27
BOARD ID table
6 OF 20 BOARD_ID2 BOARD_ID1 BOARD_ID0 DRAM
SKYLAKE-Y_FCBGA1515
? 0 0 0 4G SK HYNIX
REV = 1 0 0 1 4G MICRON
+3VS @ 0 1 0 4G SAMSUNG
0 1 1 8G SK HYNIX
RC229 1 2 0_0402_5%
GPIO Mapping 1
1
0
0
0
1
8G MICRON
8G SAMSUNG
+1.8VS +1.8VS GroupA/B/C/D/E/G -- Usued for 3.3V power plane 1 1 0
DC2 1 2 @ ISH@
GroupF-Used for 1.8V Power Plane 1 1 1
ISH_I2C0_SCL 1 2 EC_SMB_CLK3
EC_SMB_CLK3 25,26
RC159 0_0402_5% +3VS
SDM10U45LP-7_DFN1006-2-2 ISH_I2C0_SDA 1 2 EC_SMB_DAT3
EC_SMB_DAT3 25,26 I2C Mapping
1
2
1
2
RPC38 RPC24 RC160 0_0402_5%

2.2K_0404_4P2R_5% 2 2.2K_0404_4P2R_5% ISH@ GroupC -- Usued for 3.3V power plane
GroupF-Used for 1.8V Power Plane
PCH_THS_RST# 10K_0402_5% 2 @ 1 RC94
A 8396@ A
4
3
4
3
PCH_I2C_SCL2 1 6 PCH_I2C_SCL0 RC2533 1 2 0_0402_5% EC_I2C_CLK4

PM_I2C_SCL2 26 PCH_I2C_SDA0 EC_I2C_DAT4 EC_I2C_CLK4 25 10K_0402_5% 2 @ 1 RC95
QC2A RC2534 1 2 0_0402_5%
EC_I2C_DAT4 25
AO5804EL_SC89-6
8396@
5
PCH_I2C_SDA2 4 3
PM_I2C_SDA2 26
QC2B
LC Future Center Secret Data Title
AO5804EL_SC89-6
Security Classification
Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (GPIO,USB,PCIE)
Size
Size DocumentNumber
Document Number Rev
Rev
Miray
Date:
Sheet 9 of 38
5 4 3 2 1
5 4 3 2 1
CPU_CFG4 1 2
RC67 1K_0402_1%
CFG4 Setting:
D
1K PD, used for Enable EDP Panel D
SKYLAKE_ULX ?
UC1T
@ TC142 1 CPU_CFG0 G52 BL64

F53 CFG[0] RSVD_TP_04 BG47
@ TC143 1 CPU_CFG2 J52 CFG[1] RSVD_TP_03
H53 CFG[2] BA17
CPU_CFG4 H55 CFG[3] RSVD_TP_02 AY18
D55 CFG[4] RSVD_TP_01
C56 CFG[5] BF18
F55 CFG[6] RSVD_37 BE19
D61 CFG[7] RSVD_36
G58 CFG[8]
D57 CFG[9] BA23
F61 CFG[10] TP5 AY22
J60 CFG[11] TP6
J58 CFG[12]
H61 CFG[13] R12
H59 CFG[14] RSVD_35 P13
CFG[15] RSVD_34 M15
J54 RSVD_33 L16
G54 CFG[16] RSVD_32
CFG[17] L18
G56 RSVD_31 M17
J56 CFG[18] RSVD_30
CFG[19] AH7
1 2 CFG_RCOMP_R A54 RSVD_29
R3006 CFG_RCOMP K12
49.9_0402_1% A60 RSVD_28 H12
ITP_PMODE RSVD_27
B4 BN3
B3 RSVD_01 RSVD_26 BP3
RSVD_02 RSVD_25
C C
F3 L22
F1 RSVD_03 RSVD_24 M23
RSVD_04 RSVD_23
+VCCST L36 BN1
L38 RSVD_05 TP4
RSVD_06 AY20
BA19 RSVD_22 BA21
RSVD_07 RSVD_21
1
R3007 BB18
150_0402_5% RSVD_08 BB14 RSVD_BB14 R3009 1 2 0_0402_5%
BC19 RSVD_20
BD18 RSVD_09 M25
RSVD_10 RSVD_19 L24
2
D49 RSVD_18
M21 RSVD_11 L28
RSVD_L20 L20 RSVD_12 RSVD_17 M27
M19 RSVD_13 RSVD_16
RSVD_14 BJ15
L26 TP1 BJ17
RSVD_15 TP2
1
RESERVED SIGNALS
@ R3008
10K_0402_5%
20 OF 20
SKYLAKE-Y_FCBGA1515
REV = 1 ?
2
m
co
x.
B SKYLAKE_ULX ? B
UC1I
H29 H31
fi
F29 CSI2_DN0 CSI2_CLKN0 F31
F33 CSI2_DP0 CSI2_CLKP0 D31
H33 CSI2_DN1 CSI2_CLKN1 B31
J30 CSI2_DP1 CSI2_CLKP1 C34
G30 CSI2_DN2 CSI2_CLKN2 A34
J32 CSI2_DP2 CSI-2 CSI2_CLKP2 D39 R3003
na
G32 CSI2_DN3 CSI2_CLKN3 B39 100_0402_1%

CSI2_DP3 CSI2_CLKP3 A11 CSI2_COMP_R 1 2
D29 CSI2_COMP N4
B29 CSI2_DN4 GPP_D4/FLASHTRIG
C32 CSI2_DP4 eMMC
CSI2_DN5
Vi
A32 AN12
C30 CSI2_DP5 GPP_F13/EMMC_DATA0 AP9
A30 CSI2_DN6 GPP_F14/EMMC_DATA1 AN10
D33 CSI2_DP6 GPP_F15/EMMC_DATA2 AJ10
B33 CSI2_DN7 GPP_F16/EMMC_DATA3 AM9
CSI2_DP7 GPP_F17/EMMC_DATA4 AL12
D35 GPP_F18/EMMC_DATA5 AJ12
B35 CSI2_DN8 GPP_F19/EMMC_DATA6 AN8
C36 CSI2_DP8 GPP_F20/EMMC_DATA7
A36 CSI2_DN9 AL10
D37 CSI2_DP9 GPP_F21/EMMC_RCLK AL8
B37 CSI2_DN10 GPP_F22/EMMC_CLK AM11
C38 CSI2_DP10 GPP_F12/EMMC_CMD
A38 CSI2_DN11 BC1 EMMC_RCOMP_R 1 2
CSI2_DP11 EMMC_RCOMP R3004 200_0402_1%
9 OF 20
SKYLAKE-Y_FCBGA1515
REV = 1 ?
@
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (OTHER)

Miray
5 4 3 2 1
5 4 3 2 1
+CPU_CORE +CPU_VCCGT +CPU_VCCGT

+CPU_CORE +CPU_VCCGT
?
?
Place on secondary side, underneath the package
x12
SKYLAKE_ULX SKYLAKE_ULX
UC1L UC1M
24A 24A
A64 M58 AA53 AC53
AE32 VCC_01 VCC_90 N34 AB62 VCCGT_01 VCCGT_107 AC63
AE40 VCC_02 VCC_89 N54 AC47 VCCGT_02 VCCGT_106 AD62
VCC_03 VCC_88 VCCGT_03 VCCGT_105 1 1 1 1 1 1 1 1 1 1 1 1
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
AH41 N63 AC55 AE59
VCC_04 VCC_87 VCCGT_04 VCCGT_104
CC1110
CC1111
CC1112
CC1113
CC1114
CC1115
CC1116
CC1117
CC1118
CC1119
CC1120
CC1121
AN32 P64 AD54 AF46
AT33 VCC_05 VCC_86 R61 AD64 VCCGT_05 VCCGT_103 AG53
AT41 VCC_06 VCC_85 V41 AE61 VCCGT_06 VCCGT_102 AK47 2 2 2 2 2 2 2 2 2 2 2 2
J64 VCC_07 VCC_84 AC41 AF47 VCCGT_07 VCCGT_101 AN44
L48 VCC_08 VCC_83 AE38 AJ53 VCCGT_08 VCCGT_100 AN51
M33 VCC_09 VCC_82 AH32 AK49 VCCGT_09 VCCGT_99 AT49
M43 VCC_10 VCC_81 AL41 AN46 VCCGT_10 VCCGT_98 N48 +CPU_VCCGT CD@ CD@
M53
VCC_12 VCC_79
AT32 AT43
VCCGT_12 VCCGT_96
T44 Place on secondary side, underneath the package
D
M64
VCC_13 VCC_78
AT40 AT50
VCCGT_13 VCCGT_95
T51 x12 placeholder--not Stuff D
N40 H63 N50 U59
N59 VCC_14 VCC_77 L46 T 46 VCCGT_14 VCCGT_94 V58
P60 VCC_15 VCC_76 L63 T54 VCCGT_15 VCCGT_93 W55
R57 VCC_16 VCC_75 M41 U61 VCCGT_16 VCCGT_92 Y43
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
T41 M51 V60 Y50 @ @ @ @ @ @ @ @ @ @ @ @
CC1182
CC1183
CC1184
CC1185
CC1186
CC1187
CC1188
CC1189
CC1190
CC1191
CC1192
CC1193
AA32 M62 W57 Y60
AE33 VCC_19 VCC_72 N38 Y44 VCCGT_19 VCCGT_89 AB56
AE41 VCC_20 VCC_71 N57 Y51 VCCGT_20 VCCGT_88 AC43 2 2 2 2 2 2 2 2 2 2 2 2
AK32 VCC_21 VCC_70 P58 Y62 VCCGT_21 VCCGT_87 AC50
AN41 VCC_22 VCC_69 R41 AB54 VCCGT_22 VCCGT_86 AC59
AT35 VCC_23 VCC_68 T32 AB64 VCCGT_23 VCCGT_85 AD58
B64 VCC_24 VCC_67 Y41 AC49 VCCGT_24 VCCGT_84 AE55 +CPU_VCCGT
L40
VCC_26 VCC_65
AC32 AC57
VCCGT_26 VCCGT_82
AF43 Place on secondary side, underneath the package
L50
VCC_27 VCC_64
AE36 AD56
VCCGT_27 VCCGT_81
AF50 x12 placeholder--not Stuff
M35 AF41 AE53 AK44
M45 VCC_28 VCC_63 AL32 AE63 VCCGT_28 VCCGT_80 AK51
M56 VCC_29 VCC_62 AR41 AF49 VCCGT_29 VCCGT_79 AN49
N32 VCC_30 VCC_61 AT38 AK43 VCCGT_30 VCCGT_78 AT46
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
N42 F64 AK50 N44 @ @ @ @ @ @ @ @ @ @ @ @
CC1212
CC1213
CC1215
CC1214
CC1217
CC1216
CC1219
CC1218
CC1221
CC1220
CC1222
CC1223
N61 L44 AN47 R53
P62 VCC_33 VCC_58 L54 AT44 VCCGT_33 VCCGT_75 T49
R59 VCC_34 VCC_57 M39 AT51 VCCGT_34 VCCGT_74 U55 2 2 2 2 2 2 2 2 2 2 2 2
V32 VCC_35 VCC_56 M49 R51 VCCGT_35 VCCGT_73 V54
AA41 VCC_36 VCC_55 M60 +CPU_CORE T47 VCCGT_36 VCCGT_72 V64
AE35 VCC_37 VCC_54 N36 RC3015 U53 VCCGT_37 VCCGT_71 W61
AF32 VCC_38 VCC_53 N55 100_0402_1% U63 VCCGT_38 VCCGT_70 Y47
AK41 VCC_39 VCC_52 1 2 V62 VCCGT_39 VCCGT_69 Y56
AR32 VCC_40 L34 CPU_VCC_SENSE W59 VCCGT_40 VCCGT_68 AN50
AT36 VCC_41 VCC_SENSE L32 CPU_VSS_SENSE CPU_VCC_SENSE 36 Y46 VCCGT_41 VCCGT_67 AT47 +CPU_VCCGT
VCC_42 VSS_SENSE VCCGT_42 VCCGT_66
D64
VCC_43
1 2 CPU_VSS_SENSE 36 Y54
VCCGT_43 VCCGT_65
N46 Place on the same side
L42
VCC_44 100_0402_1%
Y64
VCCGT_44 VCCGT_64
T43 1U x2>10U x2>47U x9
L52 AB58 T50
M37 VCC_45 B58 SVID_ALERT# RC3017 AC44 VCCGT_45 VCCGT_63 U57
M47 VCC_46 VIDALERT# A56 SVID_CLK AC51 VCCGT_46 VCCGT_62 V56
R63 VCC_47 VIDSCK A58 SVID_DAT AC61 VCCGT_47 VCCGT_61 W53 1 1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6-K
1U_0201_6.3V6-K
VCC_48 VIDSOUT VCCGT_48 VCCGT_60
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
P56 +VCCSTG AD60 W63 @ @
R32 VCC_49 AA26 AE57 VCCGT_49 VCCGT_59 Y49 +CPU_VCCGT
CC1122
CC1123
CC1124
CC1125
CC1179
CC1151
CC1194
CC1172
Y32 VCC_50 VCCSTG_02 AC26 AF44 VCCGT_50 VCCGT_58 Y58 RC3018
C C
VCC_51 VCCSTG_01 AF51 VCCGT_51 VCCGT_57 AN43 100_0402_1% 2 2 2 2 2 2 2 2
AK46 VCCGT_52 VCCGT_56 1 2
CPU POWER 1 OF 4
AB60 VCCGT_53 N52 CPU_VCCGT_SENSE
AC46 VCCGT_54 VCCGT_SENSE P52 CPU_VSSGT_SENSE CPU_VCCGT_SENSE 36
VCCGT_55 VSSGT_SENSE CPU_VSSGT_SENSE 36
12 OF 20 1 2
CPU POWER 2 OF 4
SKYLAKE-Y_FCBGA1515 100_0402_1%
REV = 1 ?
13 OF 20
@ SKYLAKE-Y_FCBGA1515
RC3019 +CPU_CORE Place on secondary side, underneath the package
REV = 1 ? X20
@
+VCCST CD@
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
1 1 1 1 1 1 1 1 1 1
CC1095
CC1096
CC1097
CC1098
CC1099
CC1100
CC1101
CC1102
CC1196
CC1197
2 2 2 2 2 2 2 2 2 2
1
0.1u_0201_10V6K
@
CC42
CD@
2
2@
56_0402_5%
100_0402_1%
54.9_0402_1%
RC131
RC132
RC1544
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
1 1 1 1 1 1 1 1 1 1
1
CC1103
CC1104
CC1105
CC1106
CC1107
CC1108
CC1109
CC1198
CC1199
CC1200
m
2 2 2 2 2 2 2 2 2 2
RC133 1 2 220_0402_5% SVID_ALERT#
co
36 CPU_SVID_ALRT#
CD@ CD@
RC134 1 2 0_0402_5% SVID_CLK
36 CPU_SVID_CLK
+CPU_CORE Place on secondary side, underneath the package
RC135
SVID_DAT
x. X12 placeholder not stuff
1 2 0_0402_5%
36 CPU_SVID_DAT
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
B B
1 1 1 1 1 1 1 1 1 1
1, Alert# Route Between CLK and Data @ @ @ @ @ @ @ @ @ @
CC1206
CC1207
CC1208
CC1209
CC1210
CC1201
CC1202
CC1203
CC1204
CC1205
fi
2 2 2 2 2 2 2 2 2 2
na
+CPU_CORE
X8
Vi
1 1 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
CC1086
CC1085
CC1084
CC1080
CC1082
CC1083
CC1081
CC1087
2 2 2 2 2 2 2 2
CD@
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (Power)

Miray
5 4 3 2 1
5 4 3 2 1
+CPU_VCCIO

+DDR_1.2V +CPU_VCCIO +CPU_VCCSA x9
? ?
2A UC1N SKYLAKE_ULX UC1O SKYLAKE_ULX
+CPU_VCCG0
4.1A 1 1 1 1 1 1 1 1 1
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
AH64 AC23 AA29 AA35
VDDQ_01 VCCIO_13 VCCSA_01 VCCG0_12
CC1158
CC1159
CC1160
CC1161
CC1168
CC1169
CC1170
CC1171
CC1241
BA27 AF24 AF30 R38
BA37 VDDQ_02 VCCIO_12 AN26 AN29 VCCSA_02 VCCG0_11 Y35
BA49 VDDQ_03 VCCIO_11 AC24 L30 VCCSA_03 VCCG0_10 AA38 2 2 2 2 2 2 2 2 2
BP32
VDDQ_05 VCCIO_09
AF26 T30
VCCSA_05 VCCG0_08
T35 Processor IA cores gated power rail,
BP50 AR26 AC29 Y38 connects to board capacitors for filtering.
AK64 VDDQ_06 VCCIO_08 AE23 AH29 VCCSA_06 VCCG0_07 AC35
BA29 VDDQ_07 VCCIO_07 AH26 AN30 VCCSA_07 VCCG0_06 T38 +CPU_VCCIO CD@ CD@
BA41 VDDQ_08 VCCIO_06 AT26 M31 VCCSA_08 VCCG0_05 AC38
BA51
VDDQ_10 VCCIO_04
AE24 V29
VCCSA_10 VCCG0_03
V35 Place on secondary side, underneath the package
BP34 AK26 AC30 R35 x4
BP56 VDDQ_11 VCCIO_03 AE26 AK29 VCCSA_11 VCCG0_02 V38 +CPU_VCCG1
AT64 VDDQ_12 VCCIO_02 AL26 +CPU_VCCIO AR29 VCCSA_12 VCCG0_01
BA31 VDDQ_13 VCCIO_01 N30 VCCSA_13 AF35
BA43 VDDQ_14 AV26 Y29 VCCSA_14 VCCG1_12 AK38
VDDQ_15 VCCIO_DDR_26 VCCSA_15 VCCG1_11 1 1 1 1
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
BN64 AV36 AE29 AR35
VDDQ_16 VCCIO_DDR_25 VCCSA_16 VCCG1_10
CC1155
CC1156
CC1157
CC1242
BP40 AV46 AK30 AF38
VDDQ_17 VCCIO_DDR_24 VCCSA_17 VCCG1_09
D BP58
VDDQ_18 VCCIO_DDR_23
AW31 3A +CPU_VCCSA_DDR R29
VCCSA_18 VCCG1_08
AL35
2 2 2 2
D
AV64 AW41 Y30 AR38
BA33 VDDQ_19 VCCIO_DDR_22 AW51 AF29 VCCSA_19 VCCG1_07 AH35 CD@
BA45 VDDQ_20 VCCIO_DDR_21 AV28 AL29 VCCSA_20 VCCG1_06 AL38
BP24 VDDQ_21 VCCIO_DDR_20 AV38 T29 VCCSA_21 VCCG1_05 AH38
BP42 VDDQ_22 VCCIO_DDR_19 AV48 +CPU_VCCSA VCCSA_22 VCCG1_04 AN35 +CPU_VCCIO
BP64 VDDQ_23 VCCIO_DDR_18 AW33 RC3022 AT29 VCCG1_03 AK35
VDDQ_24 VCCIO_DDR_17 VCCSA_DDR_01 VCCG1_02
BA25
VDDQ_25 VCCIO_DDR_16
AW43 100_0402_1% AT30
VCCSA_DDR_02 VCCG1_01
AN38 Place on secondary side, underneath the package
BA35 AV30 2 1 x7 palceholder
BA47 VDDQ_26 VCCIO_DDR_15 AV40 CPU_VCCSA_SENSE M29
BP26 VDDQ_27 VCCIO_DDR_14 AV5036 CPU_VCCSA_SENSE CPU_VSSSA_SENSE N28 VCCSA_SENSE
BP48 VDDQ_28 VCCIO_DDR_13 AW3536 CPU_VSSSA_SENSE 2 1 VSSSA_SENSE
+VDDQC BA39 VDDQ_29 VCCIO_DDR_12 AW45 CPU POWER 4 OF 4
VDDQC VCCIO_DDR_11 1 1 1 1 1 1 1
100_0402_1%
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
AV32 @ @ @ @ @ @ @
VCCIO_DDR_10 RC3023
1.0V 100mA
CC1246
CC1247
CC1248
CC1249
CC1250
CC1251
CC1252
+VCCST V26 AV42 15 OF 20
Y26 VCCST_01 VCCIO_DDR_09 AW27
VCCST_02 VCCIO_DDR_08 SKYLAKE-Y_FCBGA1515 2 2 2 2 2 2 2
AW37 REV = 1 ?
+VCCSTG R26 VCCIO_DDR_07 AW47
VCCSTG_03 VCCIO_DDR_06 @
T26 AV34
VCCSTG_04 VCCIO_DDR_05 AV44
+VCCPLL_OC AE27 VCCIO_DDR_04 AW29 +CPU_VCCIO
AF27 VCCPLL_OC_01 VCCIO_DDR_03 AW39 RC3020 +CPU_VCCIO
VCCPLL_OC_02 VCCIO_DDR_02 AW49 100_0402_1%
VCCIO_DDR_01
1.0V 100mA +VCCPLL R27
VCCPLL_01
1 2 Place on secondary side, underneath the package
T27 AT24 x3 palceholder
VCCPLL_02 VCCIO_SENSE CPU_VCCIO_SENSE 34
AR24
VSSIO_SENSE CPU_VSSIO_SENSE 34
1 2 1 1 1
Place as close to the package as possible
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
CPU POWER 3 OF 4
@ @ @
100_0402_1%
CC1243
CC1244
CC1245
RC3021
14 OF 20 2 2 2
+CPU_VCCIO +CPU_VCCIO
SKYLAKE-Y_FCBGA1515
REV = 1 ?
@
1U_0201_6.3V6-K
22U_0603_6.3V6-M
1U_0201_6.3V6-K
+CPU_VCCSA
Sustain voltage for processor standby modes 1 1 1 Place on secondary side, underneath the package
@ x10 placeholder
Gated sustain voltage for processor standby modes
CC1152
CC1153
CC1224
+CPU_VCCST +VCCST
+CPU_VCCSTG +VCCSTG 2 2 2
2 1 1 1 1 1 1 1 1 1 1 1
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
R3011 0_0603_5% 2 1 @ @ @ @ @ @ @ @ @ @
CC1139
CC1140
CC1141
CC1142
CC1143
CC1144
CC1145
CC1154
CC1253
CC1254
1 R3012 0_0603_5% 1
0.1u_0201_10V6K
0.1u_0201_10V6K
2 2 2 2 2 2 2 2 2 2
CC1174
CC1175
2 2
Processor PLLs power rails +DDR_1.2V

C C
+DDR_1.2V +VCCPLL_OC Place on secondary side, underneath the package +CPU_VCCSA
Processor PLLs power rails x9
RC275 1 2 0_0402_5% 350mA Place as close to the package as possible
+CPU_VCCST +VCCPLL +CPU_VCCSA +CPU_VCCSA_DDR
1U_0201_6.3V6-K
2 1 1 1 1 1 1 1 1 1 1
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
R3013 0_0603_5% 1 2 1 1 1
system memory clk power
0.1u_0201_10V6K
CC1162
CC1163
CC1164
CC1165
CC1166
CC1167
CC1229
CC1230
CC1231
RC1501 0_0603_5% @
CC1178
+DDR_1.2V +VDDQC CC1195
CC1211
2 2 2 2 2 2 2 2 2 22U_0402_4V6-M
R3010 1 2 0_0603_5% 2 CD@ 2 2
1
0.1u_0201_10V6K
CC1173
+DDR_1.2V
+1.0VALW +CPU_VCCST
2 AON7408L_DFN8-5 Place on secondary side, underneath the package +CPU_VCCSA_DDR Place on secondary side, underneath the package
QC12 x9 for VCCSA_DDR
1
5 S1 2
D S2 1 1 1 1 1 1 1 1 1 1 1 1
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
1 3 @
S3
CC1232
CC1233
CC1234
CC1235
CC1236
CC1237
CC1238
CC1240
CC1239
CC1255
CC1256
CC222 CC1150
0.1u_0201_10V6K @ 22U_0402_4V6-M
G
2 2 2 2 2 2 2 2 2 2 2 2
V9B+ 2
RC69
4
1 2
+5VALW
1
6 RC70 CD@ CD@

100K_0402_5% 470_0603_5%
1
+CPU_VCCG1 +CPU_VCCG0
RC63
CC223 @ Place on secondary side, underneath the package
1 2 EN_VCCST# 2 0.01U_0201_25V6-K Place on secondary side, underneath the package x6
2
AO5804EL_SC89-6 2
6 x6
m
QC167A QC168A
47K_0402_5% 3
1 1 1 1 1 1 1
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
@ 1 1 1 1 1 1
EN_VCCST#
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
CC1957
CC1959
CC1961
CC1963
CC1965
CC1967
0_0402_5% 2
co
CC1969
CC1971
CC1974
CC1975
CC1977
CC1979
RC62 1 2 5
25 EC_VCCST_PWREN 2 2 2 2 2 2
QC167B
AO5804EL_SC89-6 AO5804EL_SC89-6 2 2 2 2 2 2
1
1 4
CC228
0.1u_0201_10V6K @
+CPU_VCCG0 CD@ CD@
2
B
x. +CPU_VCCG1 CD@

x6
CD@ CD@
x6 B
+1.0VALW +CPU_VCCSTG
AON7408L_DFN8-5
QC13 1 1 1 1 1 1
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
1 1 1 1 1 1
fi
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
0.1u_0201_10V6K
CC1958
CC1960
CC1962
CC1964
CC1966
CC1968
CC1970
CC1972
CC1973
CC1976
CC1978
CC1980
1 CD@
5 S1 2 2 2 2 2 2 2
D S2 3 2 2 2 2 2 2
1 S3
CC224
0.1u_0201_10V6K @
G
V9B+ 2
na
RC74
4
+3VALW
1 2
+5VALW
1
6 RC76
100K_0402_5% 470_0603_5%
1 1
When PCH is idle and processor is in C10 state, CC233
RC75
0.1u_0201_10V6K CC225 @
Vi
UC5 1 2 EN_VCCSTG# 2 0.01U_0201_25V6-K

2
2 AO5804EL_SC89-6 2
3
1 5 QC170A QC168B
8,25 PCH_SLP_S0# A VCC 47K_0402_5% 3
EC_SUS_VCCP 2 1
25,34 EC_SUS_VCCP B EN_VCCSTG#
0_0402_5% 5 @
3 4 RC77 1 2 5
GND Y
Slp_S3 enable QC170B
AO5804EL_SC89-6 AO5804EL_SC89-6
74LVC1G08SE-7_SOT353-5 4
1 4
CC229
0.1u_0201_10V6K @
RC1577 1 2 0_0402_5% 2
VCCST : Sustain voltage for processor in Standby modes

A VCCPLL : CPU PLL power rails A
VCCPLL_OC: CPU digital PLL power rails
VCCSTG : Gated version of VCCST
Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP(Power1)

Miray
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 1.0
5 4 3 2 1
5 4 3 2 1
+CPU_VCCPRIM +VCCMPHYGT_1P0 +3VALW_PCH

+1.0VALW
1 1 1522mA
@ RC269 1 2 0_0603_5% +VCCPGPPA
@ CC144 CC151
0.1u_0201_10V6K 0.1u_0201_10V6K 2 1
2 2 RC3028 1 2 0_0603_5% RC270 0_0603_5%
1
CC145 @
SKYLAKE_ULX?
UC1P 0.1u_0201_10V6K
2
+1.0VALW 1.0V 599mA +VCCPRIM_1P0 AH18
VCCPRIM_1P0_01 VCCPGPPA_02
AT1 +VCCPGPPA 3.3V 20mA
+VCCPRIM_1P0 AH19 AU2
VCCPRIM_1P0_02 VCCPGPPA_01
AK18
VCCPRIM_1P0_03 VCCPGPPB_02
AV1 +VCCPGPPB 3.3V 4mA +VCCPGPPB
2 1 AL18 AW2
VCCPRIM_1P0_04 VCCPGPPB_01
RC268 0_0603_5% 1 1 1 VCCPGPPC_02
AH1 +VCCPGPPC 3.3V 6mA 2 1
D
@ 1.1A +CPU_VCCPRIM AE18
VCCPRIM_CORE_01 VCCPGPPC_01
AJ2 1 RC295 0_0603_5%
D
CC141 CC169 CC170 AE19

VCCPRIM_CORE_02 VCCPGPPD_02
AF1 +VCCPGPPD 3.3V 8mA
0.1u_0201_10V6K 0.1u_0201_10V6K 0.1u_0201_10V6K AF18 AG2 CC149 @
2 2 2 VCCPRIM_CORE_03 VCCPGPPD_01
AF19
VCCPRIM_CORE_04 VCCPGPPE_02
AA2 +VCCPGPPE 3.3V 6mA 0.1u_0201_10V6K
AR16 AB1 2
VCCPRIM_CORE_05 VCCPGPPE_01
AT16
VCCPRIM_CORE_06 VCCPGPPF_02
AN2 +VCCPGPPF 1.8V 161mA
+VCCMPHYAON_1P0 AP1
VCCPGPPF_01
de-coupling +DCPDSW_1P0 AL2
DCPDSW_1P0_01 VCCPGPPG_02
AN15 +VCCPGPPG 3.3V 41mA +VCCPGPPC
2 1 AM1 AP13
RC271 0_0603_5% CD@ DCPDSW_1P0_02 VCCPGPPG_01 2 1
1 1
1.0V 22mA +VCCMPHYAON_1P0 V1
VCCMPHYAON_1P0_01 VCCPRIM_3P3_04
AC2 +VCCPRIM_3P3 1 RC278 0_0603_5%
CC158 CC173 W2 AD1
VCCMPHYAON_1P0_02 VCCPRIM_3P3_03 CC150 @
0.1u_0201_10V6K 0.1u_0201_10V6K
2 2 1.0V 836mA +VCCMPHYGT_1P0_R T1 AA15 +VCCPRIM_1P0 0.1u_0201_10V6K
T15 VCCMPHYGT_1P0_01 VCCPRIM_1P0_10 AA16 2
T16 VCCMPHYGT_1P0_02 VCCPRIM_1P0_09
VCCMPHYGT_1P0_03
LC33
+VCCAPLL_1P0 U2
VCCMPHYGT_1P0_04 VCCATS_02
AE15 +VCCATS 1.8V 6mA
@ AE16 +VCCPGPPD
VCCATS_01
1 2 5.76G 1.0V 88mA +VCCAMPHYPLL_1P0 V15
VCCAMPHYPLL_1P0_01
BLM15GG471SN1D_2P 1 1 V16
VCCAMPHYPLL_1P0_02 VCCRTCPRIM_3P3_02
AK19 +VCCRTCPRIM_3P3 3.3V 1mA 2 1
RC273 @ @ AL19 1 RC279 0_0603_5%
VCCRTCPRIM_3P3_01
1 2 0_0402_5% CC198 CC177 1.0V 26mA +VCCAPLL_1P0 AA18
VCCAPLL_1P0_01
22U_0402_4V6-M 0.1u_0201_10V6K AA19
VCCAPLL_1P0_02 VCCRTC_02
AR19 VCCRTC 3.0V 1mA CC152 @
5.76G 2 2 AT19 0.1u_0201_10V6K
+VCCPRIM_1P0 AH13 VCCRTC_01 2
VCCPRIM_1P0_05
AH15
VCCPRIM_1P0_06 DCPRTC_02
AT18 +DCPRTC RTC de-coupling
+VCCCLK1 AV18
DCPRTC_01
3.3V 71mA +VCCDSW_3P3 AL15
VCCDSW_3P3_01
+VCCPGPPE
2 1 AM13
VCCDSW_3P3_02 VCCCLK1_02
V18 +VCCCLK1 1.0V 35mA
RC286 0_0603_5% 1 Y18 2 1
VCCCLK1_01
3.3V 68mA +VCCHDA AT23
VCCHDA_01 1 RC280 0_0603_5%
@ CC168 +3V_SPI AV22
VCCHDA_02 VCCCLK2_02
0.1u_0201_10V6K Y19 CC155 @
2 AT15 VCCCLK2_01 0.1u_0201_10V6K
VCCSPI_01 2
1 3.3V 11mA AV15
VCCSPI_02 VCCCLK3_02
0.1u_0201_10V6K
Y23
CC1258 +VCCSRAM_1P0 AA21 VCCCLK3_01
VCCSRAM_1P0_01
C
LC36
+VCCCLK2 1.0V 565mA AA23
VCCSRAM_1P0_02 VCCCLK4_02
V21 +VCCCLK4 1.0V 33mA +VCCPGPPG C
@ 2 AK23 Y21
1 2 AL23 VCCSRAM_1P0_03 VCCCLK4_01 2 1
VCCSRAM_1P0_04
BLM15PX121SN1D_2P 1 1 AN23
VCCSRAM_1P0_05 VCCCLK5_02
R21 +VCCCLK5 1.0V 4mA 1 RC282 0_0603_5%
@ @ AR23 R23
RC274 CC194 CC185 VCCSRAM_1P0_06 VCCCLK5_01 CC157 @
1 2 0_0402_5% 22U_0402_4V6-M 0.1u_0201_10V6K 3.3V 75mA +VCCPRIM_3P3 AH21
VCCPRIM_3P3_01 VCCCLK6_02
R19 +VCCCLK6 0.1u_0201_10V6K
2 2 AK21 T19 1.0V 10mA 2
VCCPRIM_3P3_02 VCCCLK6_01
+VCCPRIM_1P0 AR21 PCH POWER BA13
+VCCCLK3 VCCPRIM_1P0_07 GPP_B0/CORE_VID0 VID0 34 +VCCPRIM_3P3
AT21 BB12
VCCPRIM_1P0_08 GPP_B1/CORE_VID1 VID1 34
2 1 1.0V 33mA +VCCAPLLEBB_1P0 R15
VCCAPLLEBB_1P0_01
2 1
RC288 0_0603_5% 1 R16 +CPU_VCCPRIM 1 1 RC283 0_0603_5%
@ VCCAPLLEBB_1P0_02 @
16 OF 20
CC186 SKYLAKE-Y_FCBGA1515 CC183 CC160 @
0.1u_0201_10V6K REV = 1 ? 0.1u_0201_10V6K 0.1u_0201_10V6K
2 RC3025 2 2
@
1 2 0_0402_5%
CPU_VCCPRIM_SENSE 34
+VCCCLK4 RC3024 +VCCRTCPRIM_3P3
LC35 1 2 0_0402_5%
@
1 2 CPU_VSSPRIM_SENSE 34 2 1
BLM15PX121SN1D_2P 1 1 1 1 RC285 0_0603_5%
RC287 @
1 2 0_0402_5% CC193 CC187 CC1176 CC184
22U_0402_4V6-M @ 0.1u_0201_10V6K 1U_0201_6.3V6-K 0.1u_0201_10V6K
m
2 2 2 2
co
+VCCCLK5 +VCCHDA
LC34 5.76G
@
1 2 2 1
BLM15PX121SN1D_2P 1 1 1 RC292 0_0402_5%
RC289 @ x.
1 2 0_0402_5% CC192 CC188 CC159 @
22U_0402_4V6-M @ LC37
0.1u_0201_10V6K 0.1u_0201_10V6K 1 2
2 2 2
B BLM15GG471SN1D_2P B
@
+VCCDSW_3P3
fi
+VCCCLK6
2 1
2 1 1 RC293 0_0603_5%
RC291 0_0603_5% 1
@ CC190
CC189 0.1u_0201_10V6K +1.8VALW
na
2
0.1u_0201_10V6K
2
+VCCATS
+VCCMPHYGT_1P0
Vi
2 1
+VCCMPHYGT_1P0_R RC284 0_0603_5%
1
2 1 CC1177
RC272 0_0603_5% 1 1 1 1U_0201_6.3V6-K
@ 2
CC175 CC176 CC180
22U_0402_4V6-M 1U_0201_6.3V6-K 0.1u_0201_10V6K
2 2 2
+VCCPGPPF
2 1
+VCCAMPHYPLL_1P0 RC281 0_0603_5%
LC32 1
@ @
1 2 CC156
BLM15PX121SN1D_2P 1 1 0.1u_0201_10V6K
RC290 @ 2
1 2 0_0402_5% CC191 CC178
22U_0402_4V6-M @ 0.1u_0201_10V6K
2 2 VCCRTC +DCPDSW_1P0 +DCPRTC
+VCCSRAM_1P0
1 1
0.1u_0201_10V6K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
0.1u_0201_10V6K
A 1 1 A
CC1180
CC153
2 1
CC154
CC1181
RC276 0_0603_5% 1 2 2
@ CC181 2 2
0.1u_0201_10V6K
2
+VCCAPLLEBB_1P0
2 1 Security Classification LC Future Center Secret Data Title

RC277 0_0603_5% 1 Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (Power2)
CC182
0.1u_0201_10V6K Size Document Number Rev
Miray
2 DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 1.0
5 4 3 2 1
5 4 3 2 1
? ?
SKYLAKE_ULX ? SKYLAKE_ULX SKYLAKE_ULX
UC1Q UC1R UC1S
A14 K23 BH20 AR50 AF33 R46

AA36 VSS_01 VSS_140 K33 BH32 VSS_141 VSS_278 AT27 AF58 VSS_279 VSS_414 R6
AA47 VSS_02 VSS_139 K43 BH42 VSS_142 VSS_277 AU59 AH16 VSS_280 VSS_413 T23
AA57 VSS_03 VSS_138 K53 BH52 VSS_143 VSS_276 AV24 AH33 VSS_281 VSS_412 T56
AC15 VSS_04 VSS_137 L61 BJ47 VSS_144 VSS_275 AW21 AH46 VSS_282 VSS_411 V13
AC27 VSS_05 VSS_136 N20 BL1 VSS_145 VSS_274 AY26 AH54 VSS_283 VSS_410 V36
AE10 VSS_06 VSS_135 R10 BL47 VSS_146 VSS_273 AY36 AK15 VSS_284 VSS_409 V47
AE43 VSS_07 VSS_134 R24 BM18 VSS_147 VSS_272 AY46 AK33 VSS_285 VSS_408 Y11
D
AE50 VSS_08 VSS_133 R40 BN6 VSS_148 VSS_271 BA1 AK7 VSS_286 VSS_407 Y27 D
AF16 VSS_09 VSS_132 R49 BP38 VSS_149 VSS_270 BA58 AL27 VSS_287 VSS_406 Y5
AF40 VSS_10 VSS_131 T13 BP60 VSS_150 VSS_269 BB22 AL43 VSS_288 VSS_405 BB26
AF62 VSS_11 VSS_130 T33 E16 VSS_151 VSS_268 BB32 AL50 VSS_289 VSS_404 BB36
AH24 VSS_12 VSS_129 T60 E26 VSS_152 VSS_267 BB42 AM64 VSS_290 VSS_403 BB46
AH40 VSS_13 VSS_128 V27 E36 VSS_153 VSS_266 BB52 AN24 VSS_291 VSS_402 BB59
AH49 VSS_14 VSS_127 V43 E46 VSS_154 VSS_265 BC47 AN59 VSS_292 VSS_401 BD38
AK1 VSS_15 VSS_126 V50 E56 VSS_155 VSS_264 BE12 AR15 VSS_293 VSS_400 BE31
AK24 VSS_16 VSS_125 Y15 J3 VSS_156 VSS_263 BE47 AR33 VSS_294 VSS_399 BF38
AK40 VSS_17 VSS_124 Y33 K15 VSS_157 VSS_262 BG12 AR44 VSS_295 VSS_398 BG17
AL16 VSS_18 VSS_123 Y9 K25 VSS_158 VSS_261 BG4 AR51 VSS_296 VSS_397 BG63
AL33 VSS_19 VSS_122 AA24 K35 VSS_159 VSS_260 BH22 AT54 VSS_297 VSS_396 BH26
AL46 VSS_20 VSS_121 AA40 K45 VSS_160 VSS_259 BH34 AU61 VSS_298 VSS_395 BH38
AL53 VSS_21 VSS_120 AA49 K55 VSS_161 VSS_258 BH44 AV52 VSS_299 VSS_394 BH48
AN18 VSS_22 VSS_119 AA59 M3 VSS_162 VSS_257 BH54 AW23 VSS_300 VSS_393 BH59
AN33 VSS_23 VSS_118 AC16 N22 VSS_163 VSS_256 BJ62 AY28 VSS_301 VSS_392 BK38
AP64 VSS_24 VSS_117 AC33 R30 VSS_164 VSS_255 BL29 AY38 VSS_302 VSS_391 BL33
AR2 VSS_25 VSS_116 AE2 R43 VSS_165 VSS_254 BL8 AY48 VSS_303 VSS_390 BM14
AR4 VSS_26 VSS_115 AE44 R50 VSS_166 VSS_253 BM20 BA11 VSS_304 VSS_389 BN29
AR47 VSS_27 VSS_114 AE51 T18 VSS_167 VSS_252 BP22 BA64 VSS_305 VSS_388 BP30
AR6 VSS_28 VSS_113 AF21 T36 VSS_168 VSS_251 BP44 BB24 VSS_306 VSS_387 BP52
AU55 VSS_29 VSS_112 AF54 T62 VSS_169 VSS_250 D6 BB34 VSS_307 VSS_386 C40
AV16 VSS_30 VSS_111 AF64 V30 VSS_170 VSS_249 E18 BB44 VSS_308 VSS_385 D8
AW17 VSS_31 VSS_110 AH27 V44 VSS_171 VSS_248 E28 BB54 VSS_309 VSS_384 E22
AY16 VSS_32 VSS_109 AH43 V51 VSS_172 VSS_247 E38 BD20 VSS_310 VSS_383 E32
AY32 VSS_33 VSS_108 AH50 Y16 VSS_173 VSS_246 E48 BE29 VSS_311 VSS_382 E42
AY42 VSS_34 VSS_107 AK11 Y36 VSS_174 VSS_245 E59 BF20 VSS_312 VSS_381 E52
AY52 VSS_35 VSS_106 AK27 Y7 VSS_175 VSS_244 J5 BG15 VSS_313 VSS_380 G14
BA5 VSS_36 VSS_105 AK5 AA27 VSS_176 VSS_243 K17 BG6 VSS_314 VSS_379 J7
BA9 VSS_37 VSS_104 AL21 AA43 VSS_177 VSS_242 K27 BH24 VSS_315 VSS_378 K21
BB28 VSS_38 VSS_103 AL36 AA50 VSS_178 VSS_241 K37 BH36 VSS_316 VSS_377 K31
BB38 VSS_39 VSS_102 AL47 AA61 VSS_179 VSS_240 K47 BH46 VSS_317 VSS_376 K41
BB48 VSS_40 VSS_101 AL59 AC18 VSS_180 VSS_239 L14 BH56 VSS_318 VSS_375 K51
BC17 VSS_41 VSS_100 AN19 AC36 VSS_181 VSS_238 N14 BK20 VSS_319 VSS_374 L59
BD56 VSS_42 VSS_99 AN36 AE21 VSS_182 VSS_237 N24 BL31 VSS_320 VSS_373 N18
BE33 VSS_43 VSS_98 AR10 AE46 VSS_183 VSS_236 R33 BM11 VSS_321 VSS_372 P54
BF56 VSS_44 VSS_97 AR27 AE8 VSS_184 VSS_235 R44 BM38 VSS_322 VSS_371 R2
BG2 VSS_45 VSS_96 AR40 AF23 VSS_185 VSS_234 R55 BP28 VSS_323 VSS_370 R4
C C
BG8 VSS_46 VSS_95 AR49 AF56 VSS_186 VSS_233 T21 BP46 VSS_324 VSS_369 R47
BH28 VSS_47 VSS_94 AR8 AG59 VSS_187 VSS_232 T40 C14 VSS_325 VSS_368 R8
BH40 VSS_48 VSS_93 AU57 AH30 VSS_188 VSS_231 T64 D62 VSS_326 VSS_367 T24
BH50 VSS_49 VSS_92 AV20 AH44 VSS_189 VSS_230 V33 E20 VSS_327 VSS_366 T58
BJ29 VSS_50 VSS_91 AW19 AH51 VSS_190 VSS_229 V46 E30 VSS_328 VSS_365 Y3
BK56 VSS_51 VSS_90 AY24 AK13 VSS_191 VSS_228 Y1 E40 VSS_329 VSS_364 AA33
BL35 VSS_52 VSS_89 AY34 AK3 VSS_192 VSS_227 Y24 E50 VSS_330 VSS_363 AA46
BM16 VSS_53 VSS_88 AY44 AK54 VSS_193 VSS_226 Y40 F62 VSS_331 VSS_362 AA55
BP36 VSS_54 VSS_87 BA53 AL24 VSS_194 VSS_225 AA30 J62 VSS_332 VSS_361 AB13
BP54 VSS_55 VSS_86 BB20 AL40 VSS_195 VSS_224 AA44 K19 VSS_333 VSS_360 AC21
D10 VSS_56 VSS_85 BB30 AL49 VSS_196 VSS_223 AA51 K29 VSS_334 VSS_359 AD13
E14 VSS_57 VSS_84 BB40 AM54 VSS_197 VSS_222 AA63 K39 VSS_335 VSS_358 AE4
E24 VSS_58 VSS_83 BB50 AN21 VSS_198 VSS_221 AC19 K49 VSS_336 VSS_357 AE49
E34 VSS_59 VSS_82 BC29 AN40 VSS_199 VSS_220 AC40 L57 VSS_337 VSS_356 AF15
E44 VSS_60 VSS_81 BD63 AR12 VSS_200 VSS_219 AE30 N16 VSS_338 VSS_355 AF36
E54 VSS_61 VSS_80 BE35 AR30 VSS_201 VSS_218 AE47 N26 VSS_339 VSS_354 AF60
J14 VSS_62 VSS_79 BF59 AR43 VSS_202 VSS_217 AF13 R18 VSS_340 VSS_353 AH23
J9 VSS_63 VSS_78 BG29 AP54 VSS_203 VSS_216 AU53 R36 VSS_341 VSS_352 BP1
AH47 VSS_64 VSS_77 AL30 AR18 VSS_204 VSS_215 AU63 AY40 VSS_342 VSS_351 A5
AJ59 VSS_65 VSS_76 AL44 AR36 VSS_205 VSS_214 AV54 V49 VSS_343 VSS_350 D1
AK16 VSS_66 VSS_75 AL51 AR46 VSS_206 VSS_213 AW25 Y13 VSS_344 VSS_349
AK36 VSS_67 VSS_74 AN16 AR59 VSS_207 VSS_212 AY30 AH36 VSS_345 BP62
AK9 VSS_68 VSS_73 AN27 BA3 VSS_208 VSS_211 AY50 V40 VSS_346 VSS_348
V24 VSS_69 VSS_72 BA7 VSS_209 VSS_210 VSS_347
GND 3 OF 3
VSS_70 VSS_71
GND 1 OF 3 GND 2 OF 3
m
19 OF 20
SKYLAKE-Y_FCBGA1515
17 OF 20 18 OF 20 REV = 1 ?
co
SKYLAKE-Y_FCBGA1515 SKYLAKE-Y_FCBGA1515 @
REV = 1 ? REV = 1 ?
@ @
x.
B B
fi
na
Vi
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (VSS)

Miray
5 4 3 2 1
5 4 3 2 1
UD1B +DDR_1.8V +DDR_0.6VS

UD1A
DDRA_DQS#[0..7] B2 A3
6 DDRA_DQS#[0..7] DDRA_DQ0 VSS1 VDD1_1
L8 P9 B5 A4
DDRA_DQS[0..7] G8 DM0 DQ0 N9 DDRA_DQ5 C5 VSS2 VDD1_2 A5
6 DDRA_DQS[0..7] DM1 DQ1 DDRA_DQ1 VSS3 VDD1_3
P8 N10 E4 A6
22U_0402_4V6-M
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
DDRA_DQ[0..31] D8 DM2 DQ2 N11 DDRA_DQ2 E5 VSS4 VDD1_4 A10
6 DDRA_DQ[0..31] DM3 DQ3 VSS5 VDD1_5 1 1 1 1 1
M8 DDRA_DQ6 F5 U3
DDRA_DQ[32..63] DQ4 M9 DDRA_DQ7 H2 VSS6 VDD1_6 U5
CD187
CD186
CD185
CD184
CD165
6 DDRA_DQ[32..63] DDRA_CAA0 R2 DQ5 M10 DDRA_DQ4 J12 VSS7 VDD1_7 U4
6 DDRA_CAA0 DDRA_CAA1 CA0 DQ6 DDRA_DQ3 VSS8 VDD1_8 2 2 2 2 2
P2 M11 K2 U6
6 DDRA_CAA1 DDRA_CAA2 N2 CA1 DQ7 F11 DDRA_DQ14 L6 VSS9 VDD1_9 U10 +DDR_1.2V
6 DDRA_CAA2 DDRA_CAA3 CA2 DQ8 DDRA_DQ12 VSS10 VDD1_10
N3 F10 M5
6 DDRA_CAA3 DDRA_CAA4 CA3 DQ9 DDRA_DQ8 VSS11
M3 F9 N4 A8 CD@
6 DDRA_CAA4 DDRA_CAA5 F3 CA4 DQ10 F8 DDRA_DQ9 N5 VSS12 VDD2_1 A9
E3 E11 R4 D4
6 DDRA_CAA6 DDRA_CAA7 E2 CA6 DQ12 E10 DDRA_DQ15 R5 VSS14 VDD2_3 D5 +DDR_1.8V
D2 E9 T2 D6
D 6 DDRA_CAA8 DDRA_CAA9 CA8 DQ14 DDRA_DQ10 VSS16 VDD2_5 D
C2 D9 T3 G5
6 DDRA_CAA9 CA9 DQ15 T8 DDRA_DQ24 T4 VSS17 VDD2_6 H5
+DDR_0.6VS K3 DQ16 T9 DDRA_DQ29 T5 VSS18 VDD2_7 H6
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
6 DDRA_CKE0 K4 CKE0 DQ17 T10 DDRA_DQ31 VSS19 VDD2_8 H12 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
6 DDRA_CKE1 CKE1 DQ18 DDRA_DQ30 VDD2_9
RPD1 T11 J5
1 4 DDRA_CAA0 J3 DQ19 R8 DDRA_DQ25 B6 VDD2_10 J6
CD167
CD168
CD169
CD159
CD160
CD172
2 3 DDRA_CAA1 6 DDRA_CLK0 J2 CK DQ20 R9 DDRA_DQ28 B12 VSSQ1 VDD2_11 K5
6 DDRA_CLK0# CK# DQ21 DDRA_DQ26 VSSQ2 VDD2_12 2 2 2 2 2 2
R10 C6 K6
68_0404_4P2R_1% B3 DQ22 R11 DDRA_DQ27 D12 VSSQ3 VDD2_13 K12 @ @
B4 ZQ0 DQ23 C11 DDRA_DQ17 E6 VSSQ4 VDD2_14 L5
ZQ1 DQ24 C10 DDRA_DQ16 F6 VSSQ5 VDD2_15 P4
RPD2
1 4 DDRA_CAA2 U12 DQ25 C9 DDRA_DQ18 F12 VSSQ6 VDD2_16 P5
2 3 DDRA_CAA3 U1 U12 DQ26 C8 DDRA_DQ22 G6 VSSQ7 VDD2_17 P6
T1 DNU_1 DQ27 B11 DDRA_DQ20 G9 VSSQ8 VDD2_18 U9
DNU_2 DQ28 VSSQ9 VDD2_19
1
68_0404_4P2R_1% B1 B10 DDRA_DQ21 H10 U8 +DDR_1.2V
243_0402_1%
243_0402_1%
A12 DNU_3 DQ29 B9 DDRA_DQ19 K10 VSSQ10 VDD2_20 +DDR_1.2V
RD1
RD100
A1 DNU_4 DQ30 B8 DDRA_DQ23 L9 VSSQ11 F2
RPD3
1 4 DDRA_CAA4 A2 DNU_5 DQ31 M6 VSSQ12 VDDCA_1 G2
2 3 DDRA_CAA8 A13 DNU_6 L10 DDRA_DQS0 M12 VSSQ13 VDDCA_2 H3
2
B13 DNU_7 DQS0 G10 DDRA_DQS1 N6 VSSQ14 VDDCA_3 L2 +DDR_1.2V
68_0404_4P2R_1% T13 DNU_8 DQS1 P10 DDRA_DQS3 P12 VSSQ15 VDDCA_4 M2
U2 DNU_9 DQS2 D10 DDRA_DQS2 R6 VSSQ16 VDDCA_5
U13 DNU_10 DQS3 T6 VSSQ17 A11
RPD4
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1 4 DDRA_CAA7 DNU_11 L11 DDRA_DQS#0 T12 VSSQ18 VDDQ_1 C12
DQS0# VSSQ19 VDDQ_2 1 1 1 1 1 1 1 1 1
2 3 DDRA_CAA6 DDRA_CS0# L3 G11 DDRA_DQS#1 E8
6 DDRA_CS0# DDRA_CS1# CS0# DQS1# DDRA_DQS#3 VDDQ_3
L4 P11 C3 E12
CD183
CD162
CD161
CD182
CD155
CD156
CD157
CD158
CD181
6 DDRA_CS1# CS1# DQS2# D11 DDRA_DQS#2 D3 VSSCA1 VDDQ_4 G12
68_0404_4P2R_1%
DDRA_ODT0 J8 DQS3# F4 VSSCA2 VDDQ_5 H8 2 2 2 2 2 2 2 2 @2
6 DDRA_ODT0 ODT G3 VSSCA3 VDDQ_6 H9
RPD5
1 4 DDRA_CAA9 C4 G4 VSSCA4 VDDQ_7 H11
2 3 DDRA_CAA5 K9 NC_1 J4 VSSCA5 VDDQ_8 J9 CD@
R3 NC_2 M4 VSSCA6 VDDQ_9 J10
68_0404_4P2R_1% NC_3 P3 VSSCA7 VDDQ_10 K8
VSSCA8 VDDQ_11 K11
RPD6 VDDQ_12 L12
2 3 DDRA_CKE0 K4E8E304EB-EGCE_FBGA178 VDDQ_13 N8
VDDQ_14 1
1 4 DDRA_CKE1 N12
VDDQ_15 R12 CD209
C @ VDDQ_16
C
80.6_0404_4P2R_1% U11 .047U_0201_6.3V6K
VDDQ_17 2
RPD7 +VREF_CA
H4
2 3 DDRA_CS0# VREF_CA J11 +VREF_DQA
1 4 DDRA_CS1# VREF_DQ 1
K4E8E304EB-EGCE_FBGA178 CD210
80.6_0404_4P2R_1% .047U_0201_6.3V6K
2
80.6_0402_1% 1 2 RD129 DDRA_ODT0
@
+DDR_0.6VS +DDR_1.8V +DDR_1.2V
UD2B
37.4_0402_1% 2 1 RD130 DDRA_CLK0 UD2A
B2 A3
37.4_0402_1% 2 1 RD131 DDRA_CLK0# L8 P9 DDRA_DQ33 B5 VSS1 VDD1_1 A4
G8 DM0 DQ0 N9 DDRA_DQ36 C5 VSS2 VDD1_2 A5
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6-K
1U_0201_6.3V6-K
+DDR_0.6VS P8 DM1 DQ1 N10 DDRA_DQ38 E4 VSS3 VDD1_3 A6 1 1 1 1 1 1 1 1 1 1
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
D8 DM2 DQ2 N11 DDRA_DQ32 E5 VSS4 VDD1_4 A10
DM3 DQ3 M8 DDRA_DQ39 F5 VSS5 VDD1_5 U3
C1955
RPD8
CD150
CD149
CD179
CD174
CD164
CD163
CD153
CD151
CD154
1 4 DDRA_CAB0 DQ4 M9 DDRA_DQ34 H2 VSS6 VDD1_6 U5 +DDR_1.2V
2 3 DDRA_CAB1 DDRA_CAB0 R2 DQ5 M10 DDRA_DQ35 J12 VSS7 VDD1_7 U4 2 2 2 2 2 2 2 2 2 2
6 DDRA_CAB0 DDRA_CAB1 CA0 DQ6 DDRA_DQ37 VSS8 VDD1_8 @
P2 M11 K2 U6
6 DDRA_CAB1 DDRA_CAB2 N2 CA1 DQ7 F11 DDRA_DQ45 L6 VSS9 VDD1_9 U10
68_0404_4P2R_1%
m
6 DDRA_CAB2 DDRA_CAB3 CA2 DQ8 DDRA_DQ43 VSS10 VDD1_10
N3 F10 M5 CD@
6 DDRA_CAB3 DDRA_CAB4 CA3 DQ9 DDRA_DQ44 VSS11
RPD9 M3 F9 N4 A8
1 4 DDRA_CAB2 6 DDRA_CAB4 DDRA_CAB5 F3 CA4 DQ10 F8 DDRA_DQ41 N5 VSS12 VDD2_1 A9 CD@
co
DDRA_CAB3 6 DDRA_CAB5 DDRA_CAB6 CA5 DQ11 DDRA_DQ42 VSS13 VDD2_2
2 3 E3 E11 R4 D4
6 DDRA_CAB6 DDRA_CAB7 E2 CA6 DQ12 E10 DDRA_DQ46 R5 VSS14 VDD2_3 D5
68_0404_4P2R_1% D2 E9 T2 D6
C2 D9 T3 G5
6 DDRA_CAB9 CA9 DQ15 T8 DDRA_DQ55 T4 VSS17 VDD2_6 H5
RPD10
DDRA_CAB4 DQ16 DDRA_DQ49 VSS18 VDD2_7
1
2
4
3 DDRA_CAB5 6
6
DDRA_CKE2
DDRA_CKE3
K3
K4 CKE0
CKE1
x. DQ17
DQ18
T9
T10
T11
DDRA_DQ48
DDRA_DQ50
T5
VSS19 VDD2_8
VDD2_9
H6
H12
J5
+DDR_1.2V
B
68_0404_4P2R_1% J3 DQ19 R8 DDRA_DQ54 B6 VDD2_10 J6 B
6 DDRA_CLK1 CK DQ20 VSSQ1 VDD2_11
1
J2 R9 DDRA_DQ53 B12 K5 RD173
6 DDRA_CLK1# CK# DQ21 DDRA_DQ51 VSSQ2 VDD2_12
RPD11 R10 C6 K6 8.2K_0402_1%
fi
1 4 DDRA_CAB6 B3 DQ22 R11 DDRA_DQ52 D12 VSSQ3 VDD2_13 K12
2 3 DDRA_CAB7 B4 ZQ0 DQ23 C11 DDRA_DQ58 E6 VSSQ4 VDD2_14 L5 RD172
ZQ1 DQ24 C10 DDRA_DQ60 F6 VSSQ5 VDD2_15 P4 10_0402_1%
2
68_0404_4P2R_1% U12 DQ25 C9 DDRA_DQ56 F12 VSSQ6 VDD2_16 P5 1 2 +VREF_DQA
U12 DQ26 DDRA_DQ57 VSSQ7 VDD2_17 6 DDR_SA_VREFDQ
U1 C8 G6 P6 +DDR_1.2V
RPD12 T1 B11 DDRA_DQ62 G9 U9 Trace width:20 mils
na

1
Space:20mils
1 4 DDRA_CAB8 B1 B10 DDRA_DQ63 H10 U8
243_0402_1%
243_0402_1%
DNU_3 DQ29 VSSQ10 VDD2_20 1

2 3 DDRA_CAB9 A12 B9 DDRA_DQ59 K10
RD101
RD102
A1 DNU_4 DQ30 B8 DDRA_DQ61 L9 VSSQ11 F2 CD207

68_0404_4P2R_1% A2 DNU_5 DQ31 M6 VSSQ12 VDDCA_1 G2 0.022U_0201_6.3V6-K
DNU_6 VSSQ13 VDDCA_2
1
A13 L10 DDRA_DQS4 M12 H3 +DDR_1.2V 2 RD174
RPD13
2
DNU_7 DQS0 DDRA_DQS5 VSSQ14 VDDCA_3

Vi
B13 G10 N6 L2 8.2K_0402_1%

DNU_8 DQS1 VSSQ15 VDDCA_4
1
2 3 DDRA_CKE2 T13 P10 DDRA_DQS6 P12 M2
1 4 DDRA_CKE3 U2 DNU_9 DQS2 D10 DDRA_DQS7 R6 VSSQ16 VDDCA_5 RD171
U13 DNU_10 DQS3 T6 VSSQ17 A11 24.9_0402_1%
2
80.6_0404_4P2R_1% DNU_11 L11 DDRA_DQS#4 T12 VSSQ18 VDDQ_1 C12
DDRA_CS0# L3 DQS0# G11 DDRA_DQS#5 VSSQ19 VDDQ_2 E8
2
DDRA_CS1# L4 CS0# DQS1# P11 DDRA_DQS#6 C3 VDDQ_3 E12
CS1# DQS2# D11 DDRA_DQS#7 D3 VSSCA1 VDDQ_4 G12
DDRA_ODT0 J8 DQS3# F4 VSSCA2 VDDQ_5 H8 +DDR_1.2V
+DDR_0.6VS ODT G3 VSSCA3 VDDQ_6 H9
C4 G4 VSSCA4 VDDQ_7 H11
K9 NC_1 J4 VSSCA5 VDDQ_8 J9
NC_2 VSSCA6 VDDQ_9
1
R3 M4 J10 RD169
37.4_0402_1% 2 1 RD132 DDRA_CLK1 NC_3 P3 VSSCA7 VDDQ_10 K8 8.2K_0402_1%
VSSCA8 VDDQ_11 K11
37.4_0402_1% 2 1 RD133 DDRA_CLK1# VDDQ_12 L12
K4E8E304EB-EGCE_FBGA178 VDDQ_13 RD6
N8 1
2
VDDQ_14 N12 1 2 +VREF_CA
VDDQ_15 6 DDR_SM_VREFCA +VREF_CA 16
@ R12 CD211
VDDQ_16
VDDQ_17
U11
2
.047U_0201_6.3V6K 5.11_0402_1% Trace width:20 mils
H4 +VREF_CA
1 Space:20mils
VREF_CA J11 +VREF_DQA CD20
VREF_DQ 0.022U_0201_6.3V6-K
A 1 A
1
2 RD170
K4E8E304EB-EGCE_FBGA178 CD212 8.2K_0402_1%
1
.047U_0201_6.3V6K
2 RD8
@
24.9_0402_1%
2
2
Issued Date 2015/11/09 Deciphered Date 2015/11/09 LPDDR3-CHA

Miray
5 4 3 2 1
5 4 3 2 1
UD3B +DDR_1.8V
DDRB_DQS#[0..7] UD3A
6 DDRB_DQS#[0..7]
B2 A3
DDRB_DQS[0..7] L8 P9 DDRB_DQ9 B5 VSS1 VDD1_1 A4 +DDR_0.6VS
6 DDRB_DQS[0..7] G8 DM0 DQ0 N9 DDRB_DQ15 C5 VSS2 VDD1_2 A5
DDRB_DQ[0..31] P8 DM1 DQ1 N10 DDRB_DQ10 E4 VSS3 VDD1_3 A6
6 DDRB_DQ[0..31] D8 DM2 DQ2 N11 DDRB_DQ11 E5 VSS4 VDD1_4 A10
DDRB_DQ[32..63] DM3 DQ3 M8 DDRB_DQ12 F5 VSS5 VDD1_5 U3
6 DDRB_DQ[32..63] DQ4 DDRB_DQ13 VSS6 VDD1_6
M9 H2 U5
22U_0402_4V6-M
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
DDRB_CAA0 R2 DQ5 M10 DDRB_DQ14 J12 VSS7 VDD1_7 U4
6 DDRB_CAA0 CA0 DQ6 VSS8 VDD1_8 1 1 1 1 1
+DDR_0.6VS DDRB_CAA1 P2 M11 DDRB_DQ8 K2 U6
6 DDRB_CAA1 DDRB_CAA2 N2 CA1 DQ7 F11 DDRB_DQ7 L6 VSS9 VDD1_9 U10 +DDR_1.2V
CD202
CD203
CD204
CD205
CD176
6 DDRB_CAA2 DDRB_CAA3 CA2 DQ8 DDRB_DQ2 VSS10 VDD1_10
RPD14 N3 F10 M5
DDRB_CAA0 6 DDRB_CAA3 DDRB_CAA4 CA3 DQ9 DDRB_DQ5 VSS11 2 2 2 2 2
4 1 M3 F9 N4 A8
3 2 DDRB_CAA1 6 DDRB_CAA4 DDRB_CAA5 F3 CA4 DQ10 F8 DDRB_DQ4 N5 VSS12 VDD2_1 A9
E3 E11 R4 D4
6 DDRB_CAA6 DDRB_CAA7 E2 CA6 DQ12 E10 DDRB_DQ6 R5 VSS14 VDD2_3 D5
68_0404_4P2R_1% CD@
D2 E9 T2 D6
D 6 DDRB_CAA8 DDRB_CAA9 CA8 DQ14 DDRB_DQ1 VSS16 VDD2_5 D
RPD16 C2 D9 T3 G5
4 1 DDRB_CAA2 6 DDRB_CAA9 CA9 DQ15 T8 DDRB_DQ35 T4 VSS17 VDD2_6 H5 +DDR_1.8V
3 2 DDRB_CAA3 K3 DQ16 T9 DDRB_DQ33 T5 VSS18 VDD2_7 H6
6 DDRB_CKE0 K4 CKE0 DQ17 T10 DDRB_DQ36 VSS19 VDD2_8 H12
6 DDRB_CKE1 CKE1 DQ18 DDRB_DQ32 VDD2_9
68_0404_4P2R_1% T11 J5
J3 DQ19 R8 DDRB_DQ34 B6 VDD2_10 J6
6 DDRB_CLK0 J2 CK DQ20 R9 DDRB_DQ38 B12 VSSQ1 VDD2_11 K5
RPD17 1 1 1 1 1 1
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
DDRB_CAA5 6 DDRB_CLK0# CK# DQ21 DDRB_DQ37 VSSQ2 VDD2_12
4 1 R10 C6 K6
3 2 DDRB_CAA4 B3 DQ22 R11 DDRB_DQ39 D12 VSSQ3 VDD2_13 K12
CD189
CD190
CD191
CD223
CD224
CD225
B4 ZQ0 DQ23 C11 DDRB_DQ43 E6 VSSQ4 VDD2_14 L5
68_0404_4P2R_1% ZQ1 DQ24 C10 DDRB_DQ45 F6 VSSQ5 VDD2_15 P4 2 2 2 2 2 2
U12 DQ25 C9 DDRB_DQ41 F12 VSSQ6 VDD2_16 P5
U1 U12 DQ26 C8 DDRB_DQ40 G6 VSSQ7 VDD2_17 P6
RPD18
4 1 DDRB_CAA6 T1 DNU_1 DQ27 B11 DDRB_DQ42 G9 VSSQ8 VDD2_18 U9 CD@
1
3 2 DDRB_CAA7 B1 B10 DDRB_DQ46 H10 U8 +DDR_1.2V
243_0402_1%
243_0402_1%
A12 DNU_3 DQ29 B9 DDRB_DQ47 K10 VSSQ10 VDD2_20
RD2
RD134
68_0404_4P2R_1% A1 DNU_4 DQ30 B8 DDRB_DQ44 L9 VSSQ11 F2 +DDR_1.2V
A2 DNU_5 DQ31 M6 VSSQ12 VDDCA_1 G2
A13 DNU_6 L10 DDRB_DQS1 M12 VSSQ13 VDDCA_2 H3
RPD19
2
4 1 DDRB_CAA8 B13 DNU_7 DQS0 G10 DDRB_DQS0 N6 VSSQ14 VDDCA_3 L2 +DDR_1.2V
3 2 DDRB_CAA9 T13 DNU_8 DQS1 P10 DDRB_DQS4 P12 VSSQ15 VDDCA_4 M2
U2 DNU_9 DQS2 D10 DDRB_DQS5 R6 VSSQ16 VDDCA_5
68_0404_4P2R_1% U13 DNU_10 DQS3 T6 VSSQ17 A11
DNU_11 L11 DDRB_DQS#1 T12 VSSQ18 VDDQ_1 C12
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
1U_0201_6.3V6-K
RPD15 DQS0# DDRB_DQS#0 VSSQ19 VDDQ_2
L3 G11 E8 1 1 1 1 1 1 1 1 1
DDRB_CKE0 6 DDRB_CS0# CS0# DQS1# DDRB_DQS#4 VDDQ_3
2 3 L4 P11 C3 E12
1 4 DDRB_CKE1 6 DDRB_CS1# CS1# DQS2# D11 DDRB_DQS#5 D3 VSSCA1 VDDQ_4 G12
CD199
CD198
CD201
CD200
CD193
CD194
CD195
CD196
CD171
J8 DQS3# F4 VSSCA2 VDDQ_5 H8
6 DDRB_ODT0 ODT G3 VSSCA3 VDDQ_6 H9 2 2 2 2 2 2 2 2 2
80.6_0404_4P2R_1%
C4 G4 VSSCA4 VDDQ_7 H11
RPD20 NC_1 VSSCA5 VDDQ_8
K9 J4 J9 CD@ CD@
2 3 DDRB_CS0# R3 NC_2 M4 VSSCA6 VDDQ_9 J10
1 4 DDRB_CS1# NC_3 P3 VSSCA7 VDDQ_10 K8
VSSCA8 VDDQ_11 K11
80.6_0404_4P2R_1% VDDQ_12 L12
80.6_0402_1% 1 2 RD150 DDRB_ODT0 K4E8E304EB-EGCE_FBGA178 VDDQ_13 N8
VDDQ_14 N12 1
VDDQ_15 R12
C @ VDDQ_16 CD213
C
+DDR_0.6VS U11
VDDQ_17 .047U_0201_6.3V6K
2
H4 +VREF_CA
VREF_CA J11 +VREF_DQB
37.4_0402_1% 2 1 RD148 DDRB_CLK0 VREF_DQ
1
37.4_0402_1% 2 1 RD146 DDRB_CLK0# K4E8E304EB-EGCE_FBGA178 CD214
.047U_0201_6.3V6K
2
@
+DDR_0.6VS +DDR_1.8V
+DDR_1.2V
UD4B
UD4A
B2 A3
L8 P9 DDRB_DQ18 B5 VSS1 VDD1_1 A4
RPD21
4 1 DDRB_CAB0 G8 DM0 DQ0 N9 DDRB_DQ17 C5 VSS2 VDD1_2 A5
3 2 DDRB_CAB3 P8 DM1 DQ1 N10 DDRB_DQ16 E4 VSS3 VDD1_3 A6
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
10U_0402_6.3V6M
1U_0201_6.3V6-K
1U_0201_6.3V6-K
D8 DM2 DQ2 N11 DDRB_DQ23 E5 VSS4 VDD1_4 A10 1 1 1 1 1 1 1 1 1 1
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
0.1U_0201_6.3V6-K
68_0404_4P2R_1% DM3 DQ3 M8 DDRB_DQ22 F5 VSS5 VDD1_5 U3
DQ4 M9 DDRB_DQ19 H2 VSS6 VDD1_6 U5 +DDR_1.2V
CD216
CD215
CD229
CD232
CD206
CD208
CD170
CD234
CD233
CD218
DDRB_CAB0 R2 DQ5 M10 DDRB_DQ20 J12 VSS7 VDD1_7 U4
RPD22 6 DDRB_CAB0
4 1 DDRB_CAB5 DDRB_CAB1 P2 CA0 DQ6 M11 DDRB_DQ21 K2 VSS8 VDD1_8 U6 2 2 2 2 2 2 2 2 2 2
3 2 DDRB_CAB4 6 DDRB_CAB1 DDRB_CAB2 N2 CA1 DQ7 F11 DDRB_DQ26 L6 VSS9 VDD1_9 U10
m
6 DDRB_CAB2 DDRB_CAB3 CA2 DQ8 DDRB_DQ28 VSS10 VDD1_10
N3 F10 M5 CD@
6 DDRB_CAB3 DDRB_CAB4 CA3 DQ9 DDRB_DQ29 VSS11
68_0404_4P2R_1% M3 F9 N4 A8
6 DDRB_CAB4 DDRB_CAB5 F3 CA4 DQ10 F8 DDRB_DQ24 N5 VSS12 VDD2_1 A9
co
RPD23 E3 E11 R4 D4
4 1 DDRB_CAB2 6 DDRB_CAB6 DDRB_CAB7 E2 CA6 DQ12 E10 DDRB_DQ31 R5 VSS14 VDD2_3 D5
DDRB_CAB1 6 DDRB_CAB7 DDRB_CAB8 CA7 DQ13 DDRB_DQ30 VSS15 VDD2_4
3 2 D2 E9 T2 D6
C2 D9 T3 G5
6 DDRB_CAB9 CA9 DQ15 T8 DDRB_DQ49 T4 VSS17 VDD2_6 H5
68_0404_4P2R_1%
DQ16 DDRB_DQ48 VSS18 VDD2_7
4
RPD24
1 DDRB_CAB7
6
6
DDRB_CKE2
DDRB_CKE3
K3
K4 CKE0
CKE1
x. DQ17
DQ18
T9
T10
T11
DDRB_DQ53
DDRB_DQ52
T5
VSS19 VDD2_8
VDD2_9
H6
H12
J5
+DDR_1.2V
B
3 2 DDRB_CAB6 J3 DQ19 R8 DDRB_DQ51 B6 VDD2_10 J6 B
6 DDRB_CLK1 CK DQ20 VSSQ1 VDD2_11
1
J2 R9 DDRB_DQ55 B12 K5 RD176
6 DDRB_CLK1# CK# DQ21 DDRB_DQ50 VSSQ2 VDD2_12
68_0404_4P2R_1% R10 C6 K6 8.2K_0402_1%
fi
B3 DQ22 R11 DDRB_DQ54 D12 VSSQ3 VDD2_13 K12
B4 ZQ0 DQ23 C11 DDRB_DQ58 E6 VSSQ4 VDD2_14 L5 RD177
RPD25
4 1 DDRB_CAB9 ZQ1 DQ24 C10 DDRB_DQ60 F6 VSSQ5 VDD2_15 P4 10_0402_1%
2
3 2 DDRB_CAB8 U12 DQ25 C9 DDRB_DQ61 F12 VSSQ6 VDD2_16 P5 1 2 +VREF_DQB
U12 DQ26 DDRB_DQ56 VSSQ7 VDD2_17 6 DDR_SB_VREFDQ
U1 C8 G6 P6 +DDR_1.2V
68_0404_4P2R_1% T1 DNU_1 DQ27 B11 DDRB_DQ62 G9 VSSQ8 VDD2_18 U9
na

1
B1 B10 DDRB_DQ63 H10 U8

243_0402_1%
243_0402_1%
RPD26 DNU_3 DQ29 VSSQ10 VDD2_20 1

A12 B9 DDRB_DQ59 K10
RD142
RD140
2 3 DDRB_CKE3 A1 DNU_4 DQ30 B8 DDRB_DQ57 L9 VSSQ11 F2 CD228

1 4 DDRB_CKE2 A2 DNU_5 DQ31 M6 VSSQ12 VDDCA_1 G2 0.022U_0201_6.3V6-K
DNU_6 VSSQ13 VDDCA_2
1
A13 L10 DDRB_DQS2 M12 H3 +DDR_1.2V 2 RD178
2
DNU_7 DQS0 DDRB_DQS3 VSSQ14 VDDCA_3

Vi
80.6_0404_4P2R_1% B13 G10 N6 L2 8.2K_0402_1%

DNU_8 DQS1 VSSQ15 VDDCA_4
1
T13 P10 DDRB_DQS6 P12 M2
U2 DNU_9 DQS2 D10 DDRB_DQS7 R6 VSSQ16 VDDCA_5 RD175
U13 DNU_10 DQS3 T6 VSSQ17 A11 24.9_0402_1%
2
+DDR_0.6VS DNU_11 L11 DDRB_DQS#2 T12 VSSQ18 VDDQ_1 C12
DDRB_CS0# L3 DQS0# G11 DDRB_DQS#3 VSSQ19 VDDQ_2 E8
2
DDRB_CS1# L4 CS0# DQS1# P11 DDRB_DQS#6 C3 VDDQ_3 E12
CS1# DQS2# D11 DDRB_DQS#7 D3 VSSCA1 VDDQ_4 G12
37.4_0402_1% 2 1 RD166 DDRB_CLK1 DDRB_ODT0 J8 DQS3# F4 VSSCA2 VDDQ_5 H8
ODT G3 VSSCA3 VDDQ_6 H9
37.4_0402_1% 2 1 RD154 DDRB_CLK1# C4 G4 VSSCA4 VDDQ_7 H11
K9 NC_1 J4 VSSCA5 VDDQ_8 J9
R3 NC_2 M4 VSSCA6 VDDQ_9 J10
NC_3 P3 VSSCA7 VDDQ_10 K8
VSSCA8 VDDQ_11 K11
VDDQ_12 L12
K4E8E304EB-EGCE_FBGA178 VDDQ_13 N8
VDDQ_14 1
N12
VDDQ_15 R12 CD230
@ VDDQ_16 U11 .047U_0201_6.3V6K
VDDQ_17 2
H4 +VREF_CA
VREF_CA J11 +VREF_DQB +VREF_CA 15
VREF_DQ
A 1 A
K4E8E304EB-EGCE_FBGA178 CD231
.047U_0201_6.3V6K
2
@
Issued Date 2015/11/09 Deciphered Date 2015/11/09 LPDDR3-CHB

Miray
5 4 3 2 1
5 4 3 2 1
EDP Panel
+3VS
2
R43
1K_0402_5%
@
number of pixel:1920X1080
JLVDS ME@
1
1 2 LCD_BKLT_CTRL +3VS_CMOS 31
4 PCH_BKLT_CTRL GND1
R185 0_0402_5% 1A GND2
32
30
R895 1 2 0_0402_5% USB20_P3_R 29 30
1 9 USB20_P3 29
1
USB20_N3_R
0.1u_0201_10V6K
R82
100K_0402_5%
@ R896 1 2 0_0402_5% 28
9 USB20_N3 28
C28
27
+3VS +3VS_LCDVCC_U +3VS_LCDVCC 26 27
2 C51 1 2 0.1u_0201_10V6K CPU_EDP_AUX-_C 25 26
4 CPU_EDP_AUX- CPU_EDP_AUX+_C 25
U9 4 CPU_EDP_AUX+ C50 1 2 0.1u_0201_10V6K 24
24
2
5 1 R2 1 2 0_0603_5% 23
IN OUT LCD_BKLT_CTRL 22 23
2 LCD_BKLT_EN 21 22
R6 GND EDP_HPD_OUT 20 21
1 1 20
PCH_LCD_VDDEN
0.1u_0201_10V6K
4.7U_0402_6.3V6M
1 2 0_0402_5% 4 3 19
4 PCH_LCD_VDDEN EN OCB 19
C23
C22
18
D SY6288C20AAC_SOT23-5 17 18 D
1 2 2 16 17
+3VS_LCDVCC 16
1
0813 change to SA000074R00
R83
100K_0402_5%
15
C2
0.1u_0201_10V6K
14 15
13 14
2 13
C42 1 2 0.1u_0201_10V6K CPU_EDP_TX0-_C 12
4 CPU_EDP_TX0- CPU_EDP_TX0+_C 12
4 CPU_EDP_TX0+ C43 1 2 0.1u_0201_10V6K 11
11
2
10
2 1 LCD_BKLT_EN C44 1 2 0.1u_0201_10V6K CPU_EDP_TX1-_C 9 10
25 EC_BKLT_EN 4 CPU_EDP_TX1- CPU_EDP_TX1+_C 9
R349 1K_0402_5% 4 CPU_EDP_TX1+ C45 1 2 0.1u_0201_10V6K 8
2 @ 1 7 8
4,25 PCH_BKLT_EN 7
R350 1K_0402_5% 1 6
6
1
V9B+
0.1u_0201_10V6K
R81
100K_0402_5%
@ 5
5
C29
+LCD_VDD 4
3 4
2 2 3
2
2
R235 1
1
2
100K_0402_5%
HIGHS_WS42301-S0131-HF
2 1 LVDS_VDD_EN#
1
R237
100K_0402_5% FPC:
1. pin to pin with EDP Panel, check the panel pin definition
2. check the HSYNC for Touch screen board 1106 symbol update
1
Q17
LSI1012XT1G_SC-89-3
PCH_LCD_VDDEN 2
1 Camera +3VS_CMOS
+3VS
1
0.1u_0201_10V6K
@ C209
3
C25
0.1U_0201_25V6-K
2 W=40 mils 500mA(Max: 117mA) W=40mils
2 1 2 EDP_HPD_OUT 2 1
4 PCH_EDP_HPD
R184 0_0402_5% RG20 0_0603_5%
LP2301ALT1G_SOT23-3 1 1
CG16
0.1u_0201_10V6K
CG17
10U_0603_6.3V6M
@
1
R80 QG7 3 1
D
100K_0402_5%
0817 change to SB00000ZI00 @ 2 2
1 1
0.1u_0201_10V6K
CG6
G
CG5
2
CD@
+LCD_VDD_Q +LCD_VDD 0.1u_0201_10V6K
V9B+ Q25 @
@ 2 2
MAX£º8.7V AO3401A_SOT23-3
MIN£º6.0V
C 3 1 R3 1 2 +3VS_LCDVCC RG51 @ 2 C
25 EC_CMOS_ON#
S
100K_0402_5%
0_0603_5% 1 1
1 1 CG9
CG10
1
R45 0.01U_0402_25V7K For EMI
G
0.1u_0201_10V6K
2
LVDS_VDD_EN# C200 C212 100K_0402_5% EMC_NS@

2 Close to R5 2 @
10U_0603_25V6-M 0.1U_0201_25V6-K @
2 2
CPU_EDP_AUX-_C
2
CPU_EDP_AUX+_C
1
R232
100K_0402_5%
@
2
NOTE
1. AC 19V/DC 8.2V
2. AO5800E for VDS concern
3. R235, R237 for VGS concern
4. C200 for voltage concern
m
co
B
x. B
fi
Reserve for other function

na
Vi
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 LCD

Miray
5 4 3 2 1
TMDS DDC ESD
5 4 3 2 1
CPU_HDMI_TX0+ CV255 1 2 0.1u_0201_10V6K HDMI_TX0+_C

4 CPU_HDMI_TX0+
CPU_HDMI_TX0- CV256 1 2 0.1u_0201_10V6K HDMI_TX0-_C +3VS +3VS 5V_HDMI_S0
4 CPU_HDMI_TX0-
CPU_HDMI_TX1+ CV257 1 2 0.1u_0201_10V6K HDMI_TX1+_C
4 CPU_HDMI_TX1+
CPU_HDMI_TX1- CV258 1 2 0.1u_0201_10V6K HDMI_TX1-_C
4 CPU_HDMI_TX1-
RP9 RP8
CPU_HDMI_TX2+ CV259 1 2 0.1u_0201_10V6K HDMI_TX2+_C 2.2K_0404_4P2R_5% 2.2K_0404_4P2R_5% HDMI_CLK+_CON
4 CPU_HDMI_TX2+ HDMI_CLK-_CON
3
4
3
4
CPU_HDMI_TX2- CV260 1 2 0.1u_0201_10V6K HDMI_TX2-_C
4 CPU_HDMI_TX2- D31 EMC_NS@
CPU_HDMI_CLK+ CV261 1 2 0.1u_0201_10V6K HDMI_CLK+_C 2 1 1 10 9
4 CPU_HDMI_CLK+
4 CPU_HDMI_CLK-
CPU_HDMI_CLK- CV262 1 2 0.1u_0201_10V6K HDMI_CLK-_C 2 2 9 8
2
1
2
1
1 6 HDMI_DDC_CLK_CON 4 4 7 7
D 4 HDMI_DDC_CLK D
5 5 6 6
5 Q153A
@ AO5804EL_SC89-6 3 3
1 2
R865 0_0402_5% 8
L13 4 3 HDMI_DDC_DAT_CON
HDMI_CLK-_C HDMI_CLK-_CON 4 HDMI_DDC_DATA
1 2
1 2 AZ1045-04F_DFN2510P10E-10-9
EMC@ Q153B HDMI_TX0+_CON
HDMI_CLK+_C 4 3 HDMI_CLK+_CON AO5804EL_SC89-6 HDMI_TX0-_CON
4 3
H-PLUG
EXC24CH900U_4P +3VS
@
1 2 HDMI_TX1+_CON
R866 0_0402_5% HDMI_TX1-_CON
@
1 2 D32 EMC_NS@
2
R867 0_0402_5% R862 1 1 10 9
L12 1M_0402_5%
HDMI_TX0-_C 1 2 HDMI_TX0-_CON 2 2 9 8
1 2
2
EMC@ 4 4 7 7
1
HDMI_TX0+_C 4 3 HDMI_TX0+_CON
4 3 5 5 6 6
EXC24CH900U_4P PCH_HDMI_HPD 1 6 HDMI_HPD_OUT
4 PCH_HDMI_HPD 3 3
@
1 2
2
R868 0_0402_5% Q160A R885 8
@ AO5804EL_SC89-6 20K_0402_5%
1 2
R869 0_0402_5% AZ1045-04F_DFN2510P10E-10-9
L14 HDMI_TX2-_CON
1
HDMI_TX1-_C 1 2 HDMI_TX1-_CON HDMI_TX2+_CON
1 2
EMC@
HDMI_TX1+_C 4 3 HDMI_TX1+_CON
4 3 HDMI_DDC_CLK_CON
CONN
C C
EXC24CH900U_4P HDMI_HPD_OUT
@
1 2
R870 0_0402_5% 5V_HDMI_S0 D34 EMC_NS@
@ 1 1 10 9
1 2
R871 0_0402_5% 2 2 9 8
L15
HDMI_TX2+_C 1 2 HDMI_TX2+_CON 4 4 7 7
1 2
250mA
EMC@ F1 5 5 6 6
HDMI_TX2-_C 4 3 HDMI_TX2-_CON 1 3 Q5 1 2
4 3 +5VS
AO3401A_SOT23-3 3 3
S
2
EXC24CH900U_4P 0.5A_6V_1206L050YRHF
@ CV263 8
1 2 SUSP# 0813 change to SP040005G00 0.1u_0201_10V6K
G
28 SUSP#
2
R872 0_0402_5% 1
@
AZ1045-04F_DFN2510P10E-10-9
5V_HDMI_S0
HDMI_DDC_DAT_CON
m
HDMI Type D
co
HDMI_CLK+_C R342 1 2470_0402_5%
HDMI_CLK-_C R344 1 2470_0402_5%

JHDMI ME@
CV264 1 2 0.1u_0201_10V6K
HDMI_TX0+_C HDMI_DDC_CLK_CON
HDMI_TX0-_C
R381 1
R382 1
2470_0402_5%
2470_0402_5%
5V_HDMI_S0
x. 19
+5V_POWER SCL
SDA
17
18 HDMI_DDC_DAT_CON
B HDMI_TX0+_CON 9 B
HDMI_TX1+_C R383 1 2470_0402_5% HDMI_TX0-_CON 11 TMDS_DATA0+ 15
HDMI_TX1+_CON 6 TMDS_DATA0- CEC 16
fi
HDMI_TX1-_C R384 1 2470_0402_5% HDMI_TX1-_CON 8 TMDS_DATA1+ DDC/CEC_GROUND 1 HDMI_HPD_OUT
HDMI_TX2+_CON 3 TMDS_DATA1- HOT_PLUG_DETECT
HDMI_TX2+_C R385 1 2470_0402_5% HDMI_TX2-_CON 5 TMDS_DATA2+ 2
TMDS_DATA2- Utility
HDMI_TX2-_C R389 1 2470_0402_5% 10
7 TMDS_DATA0_SHIELD
na
4 TMDS_DATA1_SHIELD
3 TMDS_DATA2_SHIELD
Q160B 20
13 GND0 21
AO5804EL_SC89-6 TMDS_CLOCK_SHIELD GND1
5 HDMI_CLK+_CON 12 22
+3VS HDMI_CLK-_CON TMDS_CLOCK+ GND2
Vi
14 23
TMDS_CLOCK- GND3
4
ALLTO_C11464-11929-L
0906 change new sysmbol
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 HDMI

Miray
5 4 3 2 1
5 4 3 2 1
USB30 R880 1
@
2 0_0402_5%
L68
USB20_P1_R 1 2 USB20_P1_CON
1 2
EMC@
USB20_N1_R 4 3 USB20_N1_CON
4 3
EXC24CH900U_4P
R881 1 2 0_0402_5%
@
R876 1 2 0_0402_5%
EXC24CH900U_4P
D USB30_RX_P1 4 3 USB30_RX_P1_CON D
9 USB30_RX_P1 4 3
EMC@
USB30_RX_N1 1 2 USB30_RX_N1_CON
9 USB30_RX_N1 1 2
L69
R877 1 2 0_0402_5%
@
R878 1 2 0_0402_5%
@
EXC24CH900U_4P
1 2USB30_TX_P1_C 4 3 USB30_TX_P1_CON
9 USB30_TX_P1 C186 4 3
0.1u_0201_10V6K EMC@
1 2USB30_TX_N1_C 1 2 USB30_TX_N1_CON
9 USB30_TX_N1 C185 1 2
L70
USB charger
0.1u_0201_10V6K
R879 1 2 0_0402_5%
@
+5V_USB30
2.2A
+5VALW
C187 1 2 0.1u_0201_10V6K
0.1u_0201_10V6K 2 1 C184
@ U8 1 2 100U_1206_6.3V6M
C15
1 12
IN OUT 10 USB20_P1_R
USB20_P1 3 DP_IN 11 USB20_N1_R
9 USB20_P1 USB20_N1 DP_OUT DM_IN
2 14
9 USB20_N1 DM_OUT GND
C C
9 STATUS#_U
STATUS#
4 ILIM_SEL
13 ILIM_SEL
9 USB_OC0# FAULT#
5 48.7K_0402_1% TI@
25 USB_CHG_EN EN 15 ILIM_LO R2048 1 2
EMC_NS@ CHG_MOD1 6 ILIM_LO 16 ILIM_HI R2047 1 2
USB_OC0# 25 CHG_MOD1 CHG_MOD2 CLT1 ILIM_HI
1 2 7
25 CHG_MOD2 CHG_MOD3 CLT2
C198 1000P_0402_50V7K 8 17 22.6K_0402_1%
25 CHG_MOD3 CLT3 GND_Pad
TPS2546RTER_QFN16_4X4
JUSB30 +5VALW
USB30_TX_P1_CON 9
1 StdA_SSTX+
+5V_USB30 USB30_TX_N1_CON VBUS TI@
8 ILIM_SEL
USB20_P1_CON StdA_SSTX- R2064 2 1
3
D+ 10K_0402_5%
7
USB20_N1_CON 2 GND_1 10
D- GND_2 STATUS#_U R2051 1 2 100K_0402_5%
USB30_RX_P1_CON 6 11
4 StdA_SSRX+ GND_3 12 @
PGND GND_4
pin number 6 7 8 4
USB30_RX_N1_CON 5 13
StdA_SSRX- GND_5
USB_CHG_EN 2 1
m
ALLTO_C190V2-10939-L
R2052 10K_0402_5%
pin name Ctl1 Ctl2 Ctl3 ILM_SEL
ME@
@
co
ILIM_SEL R2065 2 1
10K_0402_5%
S0 CDP
1105 change new sysmbol 1 1 1 1
Charge port
Pin5 Enable
x. S3 DCP
B H for all 0 1 1 0/1 B
USB type A
S4/S5 DCP
0 0 1 0/1
fi
S0 SDP1 0/1
+5V_USB30
Normal port 1 1 0
USB30_RX_P1_CON USB20_N1_CON
Pin5 Enable
USB30_RX_N1_CON
na
USB20_P1_CON
D33 EMC_NS@
H for S0/S3
L for S4/S5 S3 SDP1 0 0/1
1 1 10 9
1 0
2
2 2 9 8
EMC_NS@
D10
AZ5725-01F_DFN1006P2X2
EMC_NS@
D9
AZ5725-01F_DFN1006P2X2
EMC_NS@
D17
AZ5725-01F_DFN1006P2X2
Vi
S4/S5 Disable 0 0 0 0/1

2
4 4 7 7
5 5 6 6
1
3 3
1
AZ1045-04F_DFN2510P10E-10-9
USB30_TX_P1_CON
USB30_TX_N1_CON
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 SSD&USB30 Type C

Miray
5 4 3 2 1
5 4 3 2 1
SSD
SSD C1978 C1979 C1980 C1981 C1982 C1983 C1947 C1946 C1944 C1945
D +3VS +3.3V_NGFF D
PCIE
Stuff 0.22uF Stuff 0.22uF Stuff 0.22uF Stuff 0.22uF Stuff 0.22uF Stuff 0.22uF Stuff 0ohm Stuff 0ohm Stuff 0.22uF Stuff 0.22uF
SE00000X800 SE00000X800 SE00000X800 SE00000X800 SE00000X800 SE00000X800 SD02800008J SD02800008J SE00000X800 SE00000X800
MAX 1.5A
R23 1 2 0_0603_5%
SATA
Stuff 0.22uF Stuff 0.22uF Stuff 0.22uF Stuff 0.22uF Stuff 0.22uF Stuff 0.22uF Stuff 0.01uF Stuff 0.01uF Stuff 0.01uF Stuff 0.01uF
SE00000X800 SE00000X800 SE00000X800 SE00000X800 SE00000X800 SE00000X800 SE075103K8J SE075103K8J SE075103K8J SE075103K8J
0.1u_0201_10V6K
1 1 1
10U_0402_6.3V6M
C1019
4.7U_0402_6.3V6M
C207
Default stuff SATA option
C146
SDV rework to PCIE option and test SATA/PCIE signal and SSD
2 2 2
+3.3V_NGFF
JSSD
1 2
3 GND0 3.3V_1 4
5 GND1 3.3V_2 6
9 PCIE_PRX_DTX_N5 PERN3 NC1
PCIESSD@ 7 8
9 PCIE_PRX_DTX_P5 PERP3 NC2
PCIESSD@ 9 10 1 @
PCIE_PTX_C_DRX_N5 GND2 DAS/DSS#(IO)/LED1#(I)(0/3.3V) TP74
9 PCIE_PTX_DRX_N5 0.22U_0201_6.3V6-K 1 2 C1978 11 12
0.22U_0201_6.3V6-K 1 2 C1979 PCIE_PTX_C_DRX_P5 13 PETN3 3.3V_3 14
9 PCIE_PTX_DRX_P5 PETP3 3.3V_4
15 16
17 GND3 3.3V_5 18
9 PCIE_PRX_DTX_N6 PERN2 3.3V_6
PCIESSD@ 19 20
9 PCIE_PRX_DTX_P6 21 PERP2 NC3 22
PCIESSD@
0.22U_0201_6.3V6-K 1 2 C1980 PCIE_PTX_C_DRX_N6 23 GND4 NC4 24
C 9 PCIE_PTX_DRX_N6 C
0.22U_0201_6.3V6-K 1 2 C1981 PCIE_PTX_C_DRX_P6 25 PETN2 NC5 26
9 PCIE_PTX_DRX_P6 PETP2 NC6
27 28
GND5 NC7
1
29 30
9 PCIE_PRX_DTX_N7 31 PERN1 NC8 32 10K_0402_5%
PCIESSD@
9 PCIE_PRX_DTX_P7 PERP1 NC9 @ R608
PCIESSD@ 33 34
0.22U_0201_6.3V6-K 1 2 C1982 PCIE_PTX_C_DRX_N7 35 GND6 NC10 36
9 PCIE_PTX_DRX_N7 PCIE_PTX_C_DRX_P7 PETN1 NC11
9 PCIE_PTX_DRX_P7 0.22U_0201_6.3V6-K 1 2 C1983 37 38 DEVSLP R70 1 2 0_0402_5%
PCH_SATA_DEVSLP 9
2
39 PETP1 DEVSLP(O) 40
0.01U_0402_25V7K 1 2 C1947 SATA_PRX_C_DTX_P1 41 GND7 NC12 42
9 SATA_PRX_DTX_P1 PERN0/SATA-B+ NC13 @
0.01U_0402_25V7K 1 2 C1946 SATA_PRX_C_DTX_N1 43 44
9 SATA_PRX_DTX_N1 45 PERP0/SATA-B- NC14 46
0.01U_0402_25V7K 1 2 C1944 SATA_PTX_C_DRX_N1 47 GND8 NC15 48
9 SATA_PTX_DRX_N1 SATA_PTX_C_DRX_P1 PETN0/SATA-A- NC16 PCH_PLT_RST#_SSD
0.01U_0402_25V7K 1 2 C1945 49 50 R612 1 2 0_0402_5%
9 SATA_PTX_DRX_P1 51 PETP0/SATA-A+ PERST#(O)(0/3.3V)/NC 52 PCH_PLT_RST# 8,21,24,25
R613 1 2 0_0402_5%
GND9 CLKREQ#(IO)(0/3.3V)/NC PCIE_CLKREQ#1 8,9
53 54 R614 1 2 0_0402_5%
8 CLK_PCIE_SSD# 55 REFCLKN PEWAKE#(IO)(0/3.3V)/NC 56 PCIE_WAKE# 8,21
@
8 CLK_PCIE_SSD REFCLKP NC17
57 58
GND10 NC18
59 NC NC 60
61 NC NC 62
63 NC NC 64
65 NC NC 66
67 68 R615 1 2 0_0402_5%
SSD_SATA_PCIE_DET#_R 69 NC19 SUSCLK(32kHZ)(O)(0/3.3V) 70 SUSCLK 8,21
@
71 PEDET(NC-PCIE/GND-SATA) 3.3V_7 72
73 GND11 3.3V_8 74
+3.3V_NGFF
m
75 GND12 3.3V_9
GND13
77 76 EMC_NS@
co
GND14 GND15 1 2 PCH_PLT_RST#_SSD
C199 1000P_0402_50V7K
ARGOS_NASM0-M6701TS12
ME@
x.
B
0827 symbol update B
fi
na
+3.3V_NGFF +3.3V_NGFF
Vi
1
1
C208
R610
0.1u_0201_10V6K
10K_0402_5%
CD@
U57 2
1 6
SSD_SATA_PCIE_DET#_R 2 NC1 Vcc 5
2
3 A NC2 4
GND Y SSD_SATA_PCIE_DET# 9
74AUP1G04GF_SOT891-6_1X1
R616 1 2 0_0402_5%
@
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 SSD&USB30 Type C

Miray
5 4 3 2 1
Mini Card(WLAN/WiMAX)
5 4 3 2 1
+3VS_WLAN
R31 1 2 0_0603_5%
+3VS
22U_0603_6.3V6-M
1 1 1
C78
0.1u_0201_10V6K
0.1u_0201_10V6K
+3VS
C53
C79
2 2 2
+3VS_WLAN
D JW LAN ME@ D
1 2
GND1 3.3V_4
1
R890 1 2 0_0402_5% USB20_P4_R 3 4 R3015 R3019
9 USB20_P4 2 0_0402_5% USB20_N4_R 5 USB_D+ 3.3V_3 6
R892 1 1 @ TP52 49.9K_0402_1% 49.9K_0402_1%
9 USB20_N4 7 USB_D- LED1# 8
9 GND2 PCM_CLK/I2S_SCK 10
11 SDIO_CLK PCM_SYNC/I2S_WS 12
2
13 SDIO_CMD PCM_IN/I2S_SD_IN 14
15 SDIO_DAT0 PCM_OUT/I2S_SD_OUT 16 1 @ TP61
+3VS_WLAN 17 SDIO_DAT1 LED2# 18
19 SDIO_DAT2 GND11 20
21 SDIO_DAT3 UART_WAKE# 22 UART_RX_DEBUG_R R256 1 2 0_0402_5%
SDIO_WAKE# UART_RXD UART_RX_DEBUG 9
23
SDIO_RESET#
2
@ R2525
10K_0402_5% KEY E 24
25 PIN24~PIN31 NC PIN
26
27
29 28
1
W LAN_PCIE_W AKE# 31 30
0.1u_0201_10V6K 33 32 UART_TX_DEBUG_R R3014 1 2 0_0402_5%

2 PCIE_PTX_C_DRX_P3 GND3 UART_TXD UART_TX_DEBUG 9
C263 1 35 34
9 PCIE_PTX_DRX_P3 2 PCIE_PTX_C_DRX_N3 PETP0 UART_CTS
C264 1 37 36
9 PCIE_PTX_DRX_N3 PETN0 UART_RTS
39 38 R124 1 2 0_0402_5% EC_TX_R
0.1u_0201_10V6K 41 GND4 VENDOR_DEFINED3 40 R125 1 2 0_0402_5% BT_OFF#
9 PCIE_PRX_DTX_P3 PERP0 VENDOR_DEFINED2
43 42
9 PCIE_PRX_DTX_N3 45 PERN0 VENDOR_DEFINED1 44
47 GND5 COEX3 46
8 CLK_PCIE_W LAN REFCLKP0 COEX2
49 48
8 CLK_PCIE_W LAN# 51 REFCLKN0 COEX1 50
W LAN_CLKREQ# GND6 SUSCLK SUSCLK 8,20
53 52
8,9 W LAN_CLKREQ# PCIE_WAKE# CLKEQ0# PERSTO# PCH_PLT_RST# 8,20,24,25
1 @ 2 W LAN_PCIE_W AKE# 55 54 BT_OFF#
8,20 PCIE_WAKE# PEWAKE0# W_DISABLE2#
R120 0_0402_5% 57 56
GND7 W_DISABLE1# PCH_W LAN_OFF# 9
59 58 @ 1 TP68
61 RESERVED/PETP1 I2C_DATA 60 @ 1 TP82
63 RESERVED/PETN1 I2C_CLK 62 @ 1 TP111
65 GND8 ALERT# 64 EC_TX_R
67 RESERVED/PERP1 RESERVED 66
BT_OFF# R123 1 2 1K_0402_5% 69 RESERVED/PERN1 UIM_SWP/PERST1# 68 +3VS_WLAN
PCH_BT_OFF# 9 71 GND9 UIM_POWER_SNK/CLKREQ1# 70
73 RESERVED/REFCLKP1 UIM_POWER_SRC/GPIO1/PEWAKE1# 72
EC_TX_R R187 1 2 100_0402_1% 75 RESERVED/REFCLKN1 3.3V_2 74
EC_TX 25 GND10 3.3V_1
BT_OFF# R188 1 2 100_0402_1% 77 76
EC_RX 25 GND15 GND14
C C
ARGOS_NASE0-M6701-TS15
1
R192
100K_0402_5%
0827 symbol update
2
WLAN&BT Combo module circuits

BT on module BT on module
Enable Disable
* BT_CRTL H L
PCH_BT_ON# L H
m
B B
co
x.
fi
na
Vi
A A
Reserve
Issued Date 2015/11/09 Deciphered Date 2015/11/09 CONN(WLAN&KB&PWRB&UART)

THIS SHEET OF ENGINEERING DRAWINGIS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
Miray
AND TRADE SECRETINFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROMTHE CUSTODY OF THE COMPETENTDIVISIONOF R&D
DEPARTMENTEXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHERTHIS SHEETNOR THE INFORMATION IT CONTAINS D
Size Document Number Rev 1.0
MAY BE USED BY ORDISCLOSED TO ANY THIRD PARTY WITHOUT PRIORWRITTENCONSENTOF LC FUTURE CENTER.
5 4 3 2 Date: 1 Sheet
5 4 3 2 1
D D
ELCO_046809612X10846+
+3VALW
14
12 GND2
11 12
25 EC_BATTLOW_LED# 10 11
25 EC_BATTCHG_LED# 9 10
8 9
7 8
6 7
5 6
23 SLEEVE 4 5
23 HP_L_CON 3 4
23 HP_R_CON 2 3
23 HPOUT-JD 1 2
1 13
GND1
JIO
AUDIO_AGND
ME@
0111 symbol update

+3VALW
C201
0.1u_0201_10V6K
EMC_NS@
1
C C
m
co
x.
B B
fi
na
Vi
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCU

Size
Size Document
DocumentNumber Rev
Miray
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Number Rev
Date:
Sheet 22 of 38
5 4 3 2 1
5 4 3 2 1
CODEC
UA1
+5VS
1200mA
4.7U_0402_6.3V6M
10 20 +5VA
DC_DET AVDD1 33 +1.8V_SYSA 2 1 +5V_AUD
AVDD2 1
1 2 PCH_HDA_BCLK_R 5 RA20 0_0603_5%
7 PCH_HDA_BCLK BCLK
CA325
RA4 0_0402_5% 29 +1.8V_SYS 1 1 1 1 1
ALC3240-CG
CPVDD
10U_0603_6.3V6M
7 PCH_HDA_SYNC 9
10U_0402_6.3V6M
SYNC 2
4.7U_0402_6.3V6M
CA383
CA327
0.1u_0201_10V6K
CA320
0.1u_0201_10V6K
1 +3V_AUD
CA384
DVDD
CA326
1 2 PCH_HDA_SDIN0_R 7
7 PCH_HDA_SDIN0 4 SDATA-IN 8 +3V_AUD_IO 2 2 2@ 2 2
7 PCH_HDA_SDOUT RA3 22_0402_5% AUDIO_AGND +5V_AUD
SDATA-OUT DVDD-IO +5V_AUD 24
1
34 +5V_AUD
PVDD1
CA318
0.1u_0201_10V6K
27 DMIC_DATA RA22 1 2 0_0402_5% DMIC_DATA_R 2 39
D
1 2 DMIC_CLK_R 3 GPIO0/DMIC-DATA12 PVDD2 D
27 DMIC_CLK GPIO1/DMIC-CLK 2
RA11 22_0402_5%
1U_0201_6.3V6-K
SPKR_MUTE# 40 22 1 0908
HPOUT-JD 1 2 HPOUT-JD_R 12 PDB VREF
RA684 200K_0402_1% HP/LINE1-JD(JD1) 23 MIC2-VREFO +3VS
CA382
BEEP 11 MIC2-VREFO
13 PCBEEP 24 2 2 1 +3V_AUD
SLEEVE 14 MIC2-L(PORT-F-L)/RING2 LINE1-VREFO-L RA18 0_0603_5%
MIC2-R(PORT-F-R)/SLEEVE
1 1 5mA
27 AUDIO_AGND
CPVEE
1U_0201_6.3V6-K
CA330
0.1u_0201_10V6K
15 28
CA380
1 MIC2-CAP CBN
17 30 1
CA324 18 LINE1-R(PORT-C-R) CBP 2 2
LINE1-L(PORT-C-L) 1
1U_0201_6.3V6-K
4.7U_0402_6.3V6M 21
CA388
2 LDO1-CAP 1
4.7U_0402_6.3V6M
1U_0201_6.3V6-K
AUDIO_AGND 32
CA385
LDO2-CAP 2
CA328
SPK_L+ 35 6
SPK_L- SPK-OUT-LP LDO3-CAP 2
4.7U_0402_6.3V6M
36 1
SPK-OUT-LN 2
4.7U_0402_6.3V6M
+3V_AUD SPK_R- 37 16 RA5 1 2 0_0402_5%
SPK-OUT-RN VD33STB
CA329
SPK_R+ 38
SPK-OUT-RP 1
AUDIO_AGND RA6 1 2 0_0402_5% AUDIO_AGND
2
CA331
19 @
AVSS1
1
R4 HPOUT-L 25
HPOUT-L(PORT-I-L) AVSS2
31
2
+3VALW_PCH
CPU HDA BUS power
100K_0402_1% HPOUT-R 26 AUDIO_AGND
HPOUT-R(PORT-I-R) 41 +3VALW +3VL 2 1
GND(Thermal_Pad) RA27 0_0603_5%
HPOUT-JD_R
2
ALC3240-CG_MQFN40_5X5 +3V_AUD 1 2 +3V_AUD_IO

AUDIO_AGND
RA19 0_0402_5% 1mA
@
+5VS
2 1 +5VA
RA15 1 2 0_0402_5% SPKR_MUTE# RA21 0_0603_5%
25 EC_MUTE#
1 2 0_0402_5%
VD33STB:Power for combo jack depop circuit at system shutdown mode. 1 1 19mA
RA2
2.2U_0402_6.3V6M
2
CA317
0.1u_0201_10V6K
RA23
CA381
AVDD1:Analog power for mixers ,IO ports
C C
10K_0402_5%
RA8 1 2 0_0402_5% CA381 change to 2.2U_0402_10V 2 2
RA12 1 2 0_0402_5%
DVDD-IO:Digital power for HDA link
1
RA13 1 2 0_0402_5% DVDD:Digital power for digital I/0 circuit

AVDD2:Analog power for DACS ,ADCS AUDIO_AGND
AUDIO_AGND
DA1
PVDD1,PVDD2:Power supply for full-bridge left and right channel +1.8VS
25 EC_BEEP 3 CA323
RA16
0.1u_0201_10V6K
1 1 2 1 2 BEEP 2 1 +1.8V_SYS
RA25 0_0603_5%
7 PCH_BEEP
2
1K_0402_5% 131mA
BAT54CW_SOT323-3
2
RA24
10K_0402_5%
+1.8V_SYS 2 1 +1.8V_SYSA
RA26 0_0603_5%
26mA
1
m
@
co
CA378
470P_0201_25V7K
RA17 1 2 0_0402_5% 1
MIC2-VREFO
L75 EMC@ BLM15BX750SN1D_2P PCH_HDA_BCLK_R DMIC_CLK DMIC_DATA_R
SPK_L+ 1 2 SPK_L+_CON AUDIO_AGND
L76 BLM15BX750SN1D_2P 2
1 1 1
33P_0201_50V8-J
33P_0201_50V8-J
SPK_L- SPK_L-_CON
1 2
x. RA683
22P_0201_25V8
EMC_NS@
CA104
EMC_NS@
CA105
EMC@ D4006 D4009 EMC@
CA16
2.2K_0402_5%
2
B
RA28 1 2 0_0402_5% 2 2 2 B
AZ5725-01F_DFN1006P2X2
EMC_NS@
AZ5725-01F_DFN1006P2X2
EMC_NS@
1 1 SLEEVE
2
SLEEVE 22
2
@
fi
EMC@
1000P_0402_50V7K
CA152
EMC@
1000P_0402_50V7K
CA153
HPOUT-L 1 2 HP_L_CON
HP_L_CON 22
RA57 47_0402_1%
2 2
4 ohm ,0.7W HPOUT-R 1 2 HP_R_CON
HP_R_CON 22
1
RA59 47_0402_1%
HPOUT-JD
HPOUT-JD 22
1
0.418A RMS
na
HIGHS_WS33041-S0191-HF
@
RA29 1 2 0_0402_5%
4 6
4 GND2
Vi
EMC@ BLM15BX750SN1D_2P 3 5
SPK_R- L77 1 2 BLM15BX750SN1D_2P SPK_R-_CON 2 3 GND1
SPK_R+ 1 2 SPK_R+_CON 1 2
L78 EMC@ D4010 D4011 1
2
RA30 1 2 0_0402_5% JSPK ME@

AZ5725-01F_DFN1006P2X2
EMC_NS@
AZ5725-01F_DFN1006P2X2
EMC_NS@
1 1
2
@
EMC@
1000P_0402_50V7K
CA154
EMC@
1000P_0402_50V7K
CA155
0918 change new sysmbol

2 2
1
1
1
A A
SPK_L+ 1 2 EMC_NS@ 1 2 EMC_NS@

RA194 15_0402_5%
CA173 220P_0201_25V7-K
SPK_L- 1 2 EMC_NS@ 1 2 EMC_NS@
RA195 15_0402_5%
CA174 220P_0201_25V7-K
SPK_R+ 1 2 EMC_NS@ 1 2 EMC_NS@
LC Future Center Secret Data Title
RA196 15_0402_5%
CA175 220P_0201_25V7-K Security Classification
SPK_R- 1
RA197
2 EMC_NS@
15_0402_5%
1 2 EMC_NS@
Issued Date 2015/11/09 Deciphered Date 2015/11/09 AUDIO
CA176 220P_0201_25V7-K
RA194,RA195,RA196,RA197 will to be changed to 15ohm
Place Close To Codec
Miray
5 4 3 2 1
5 4 3 2 1
+3VS +3VS_TPM
20mA RTPM11 TPM@ 2 0_0603_5%

1
CTPM3
TPM 0.1u_0201_10V6K
TPM@
2
Vendor PN Describe
¹úÄÚ NATIONZ SA00007G500 S IC Z32H320TC-LPC-T28-233 TSSOP 28P TPM

+3VALW
D Nuvoton SA00007RJ00 S IC NPCT650LB1WX TSSOP 28P TPM1.2 UTPM1 D
WW 1.2
Nuvoton SA00007H110 S IC NPCT650LB1YX QFN 32P DISCRETE TPM RTPM11 1 2 0_0603_5% 1
2 VSB GND_4
32
31
+3VS_TPM
NUVOTON@ 3 NC_1 NC_7 30
WW 2.0 Nuvoton SA00007FW00 S IC NPCT650LAAWX TSSOP 28P TPM 2.0
+3VS_TPM 4
5
GPX/GPIO2
PP
GPIO1/SCL
SDA/GPIO0
29
28 RTPM2 1 TPM@ 2 10K_0402_5%
6 TEST LPCPD# 27
GPIO3/BADD SERIRQ EC_INT_SERIRQ 7,25
7 26
NC_2 NC_6
SDV Use WW2.0 Nuvoton
8 25 +3VS_TPM
9 VDD NC_5 24
2 @ 1 RTPM12
SIV need change to WW1.2 QFN
0_0402_5% 10 GND_1 LAD0/MISO 23 LPC_AD0 7,25
7 PM_CLKRUN#
11 NC_3 GND_3 22
+3VS_TPM 12 NC_4 VHIO_2 21
RESERVED LAD1/MOSI LPC_AD1 7,25
0_0402_5% 2 TPM@ 1 RTPM4 13 20
CLKRUN#/GPIO4/SINT# LFRAME#/SCS# LPC_FRAME# 7,25
14 19
15 VHIO_1 LCLK/SCLK 18 CLK_PCI_TPM 7
7,25 LPC_AD3 LAD3 LAD2/SPI_IRQ# LPC_AD2 7,25
16 17
GND_2 LRESET#/SPI_RST#/SRESET# PCH_PLT_RST# 8,20,21,25
33
GND_PAD
NPCT650LB1YX_QFN32_5X5
TPM@
+3VS_VDD1
+3VS +3VS_VDD1 +3VS +3VS_VDD2
NXU59
NXU58
1 1
0_0603_5% 2 Current@1 NXR2 19 9 0_0402_5% 1 Current@ 2 NXR6 EC_SMB_CLK0
0_0603_5% 2 Current@1 NXR1 19 9 0_0402_5% 1 Current@ 2 NXR4 EC_SMB_CLK0 VDD PIO0_10/I2C0_SCL
Current@
NXC3
1U_0402_10V6K
Current@
NXC4
0.01U_0201_25V6-K
C
VDD PIO0_10/I2C0_SCL EC_SMB_CLK0 25,26 0_0603_5% 2 Current@1 NXR8 1 21 8 0_0402_5% 1 Current@ 2 NXR7 EC_SMB_DAT0 C
0_0603_5% 2 Current@1 NXR3 1 21 8 0_0402_5% 1 Current@ 2 NXR5 EC_SMB_DAT0 VREFP PIO0_11/I2C0_SDA
VREFP PIO0_11/I2C0_SDA EC_SMB_DAT0 25,26 2 ISP2 100_0402_5% 1 Current@ 2 NXPR52 1
2 2 2 ISP1 100_0402_5% 1 Current@ 2 NXPR51 1 NXC2 Current@ PIO0_12 +CPU_VCCSA_R @ TC204
NXC1 Current@ PIO0_12 +LCD_VDD_R @ TC203 1
1 0.01U_0201_25V6-K PIO0_13/ADC_10 +5V_AUD_R
+3VS_VDD1 0.01U_0201_25V6-K PIO0_13/ADC_10 +1.0VALW_R 20 25
20 25 2 VREFN PIO0_14/ADC_2/ACMP_I3
2 VREFN PIO0_14/ADC_2/ACMP_I3 15
15 PIO0_15
PIO0_15 10
10 UART_RXD2 PIO0_16 +CPU_CORE_P_R
UART_RXD1 PIO0_16 +3VS_R 24 32
24 32 PIO0_0/ACMP_I1/TDO PIO0_17/ADC_9 +CPU_CORE_R
PIO0_0/ACMP_I1/TDO PIO0_17/ADC_9 +3.3V_NGFF_R 10K_0402_5% 1 NXR42 2 Current@ 16 31
10K_0402_5% 1 NXR41 2 Current@ 16 31 @1 1 NXPR47 2 Current@ 7 PIO0_1/ACMP_I2/CLKIN/TDI PIO0_18/ADC_8 30 +5VALW_P_R
@1 PIO0_1/ACMP_I2/CLKIN/TDI PIO0_18/ADC_8 +3VS_R TC200 270_0402_1% SWDIO2
TC197 270_0402_1% 1 NXPR44 2 Current@ SWDIO1 7 30 SWDIO/PIO_2/TMS PIO0_19/ADC_7 +5VALW_R
SWDIO/PIO_2/TMS PIO0_19/ADC_7 +3VS_WLAN_R @ 1 270_0402_1% 1 NXPR48 2 Current@ SWCLK2 6 29
@ 1 270_0402_1% 1 NXPR45 2 Current@ SWCLK1 6 29 TC201 +CPU_VCCSA_P_R SWCLK/PIO0_3/TCK PIO0_20/ADC_6 +3VALW_P_R
TC198 +LCD_VDD_Q_R SWCLK/PIO0_3/TCK PIO0_20/ADC_6 1.2V_P_R 4 28
4 28 PIO0_4/ADC_11/TRST PIO0_21/ADC_5 +3VALW_R
PIO0_4/ADC_11/TRST PIO0_21/ADC_5 +DDR_1.2V_R @ 1 270_0402_1% 1 NXPR50 2 Current@ nRESET2 3 27
@ 1 270_0402_1% 1 NXPR46 2 Current@ nRESET1 3 27 +3VS_VDD2 TC202 +3VS_LCDVCC_U_R PIO0_5/RESET PIO0_22/ADC_4 +5VS_R
TC199 V9B+_R PIO0_5/RESET PIO0_22/ADC_4 +1.0VALW_P_R 23 26
23 26 +3VS_LCDVCC_R PIO0_6/ADC_1/VDDCMP PIO0_23/ADC_3/ACMP_I4
715_SRN_R PIO0_6/ADC_1/VDDCMP PIO0_23/ADC_3/ACMP_I4 22 14
22 14 PIO0_7/ADC_0 PIO0_24
+3VS_VDD1 +3VS PIO0_7/ADC_0 PIO0_24 +3VS 13
13 PIO0_25
PIO0_25 18 12
18 12 PIO0_8/XTALIN PIO0_26
PIO0_8/XTALIN PIO0_26 11
11 PIO0_27 +3VS_VDD2
PIO0_27 5
1
1
NXPR43 5 1 1 NXPR49 PIO0_28/WKTCLKIN
17
@ 1 NXPR54 2 UART_RXD1 1 TC205 100K_0402_5% 17 PIO0_28/WKTCLKIN 100K_0402_5% PIO0_9/XTALOUT
Current@
NXC5
1U_0402_10V6K
Current@
NXC6
0.01U_0201_25V6-K
@ PIO0_9/XTALOUT 33
100K_0402_5% Current@ 33 Current@ VSS
VSS
@ 1 NXPR53 2 +LCD_VDD_Q_R1 TC206 2 2 @ 1 NXPR55 2 UART_RXD2 1 TC207
@ nRESET1 nRESET2 @
100K_0402_5% 100K_0402_5%
2
2
1 1
TC208
LPC824M201JHI33_HVQFN32_5X5
LPC824M201JHI33_HVQFN32_5X5 @ 1 NXPR56 2 +CPU_VCCSA_P_R 1
NXC7 NXC8 @
0.1U_0201_6.3V6-K 0.1U_0201_6.3V6-K Current@ 100K_0402_5%
Current@
2 2
m
Current@ Current@
co
1 2 715_SRN_R 34 +1.0VALW_P 0_0402_5% 1 Current@ 2 NXR13 +1.0VALW_P_R 23 +5V_AUD NXR27 1 2 +5V_AUD_R
+3VS_LCDVCC_U 0_0402_5% 1 Current@ 2 NXR25 +3VS_LCDVCC_U_R
32 715_SRN NXR9
+1.0VALW 0_0402_5% 1 Current@ 2 NXR14 +1.0VALW_R +3VS_LCDVCC 0_0402_5% 1 Current@ 2 NXR26 +3VS_LCDVCC_R
100K_0402_1%
200K_0402_1%
2
NXR28
2
NXR10 Current@
Current@ 100K_0402_1%
100K_0402_1% 35 1.2V_P 0_0402_5% 1 Current@ 2 NXR15 1.2V_P_R
NXR31 +3VALW_P_R
Current@
x. +DDR_1.2V 0_0402_5% 1 Current@ 2 NXR16 +DDR_1.2V_R
Current@ 33 +3VALW_P
+3VALW
0_0402_5%
0_0402_5%
1 Current@ 2
1 Current@ 2 NXR32 +3VALW_R
1
B B
1
+3VS_WLAN 0_0402_5% 1 Current@ 2 NXR17 +3VS_WLAN_R

Current_NS@
0_0402_5% 1 Current@ 2 NXR18 +3VS_R
+3VS +5VS_R 36,37 +CPU_CORE_P 0_0402_5% 1 2 NXR38 +CPU_CORE_P_R
NXR29 1 2
fi
NXR11 1 2 V9B+_R +5VS 0_0402_5% 1 2 NXR37 +CPU_CORE_R
V9B+ +CPU_CORE
+3.3V_NGFF 0_0402_5% 1 Current@ 2 NXR19 +3.3V_NGFF_R 100K_0402_1%
200K_0402_1% Current_NS@
2
0_0402_5% 1 Current@ 2 NXR20 +3VS_R NXR30
2
NXR12 +3VS Current@

Current@ 100K_0402_1% Current_NS@
100K_0402_1%
Current@ 36,37 +CPU_VCCSA_P 0_0402_5% 1 2 NXR40 +CPU_VCCSA_P_R
Current@ 1 2 NXR39 +CPU_VCCSA_R
0_0402_5%
na
+CPU_VCCSA
Current_NS@
1
1
Vi
NXR33 1 2 +5VALW_P_R
33 +5VALW_P
+LCD_VDD_Q_R 100K_0402_1%
NXR21 1 2
2
+LCD_VDD_Q Current@ NXR34
200K_0402_1% 100K_0402_1%
2
Current@ NXR22 Current@

100K_0402_1%
Current@
1
1
NXR35 1 2 +5VALW_R
+5VALW
+LCD_VDD_R 100K_0402_1%
NXR23 1 2
2
+LCD_VDD Current@ NXR36
200K_0402_1% 100K_0402_1%
2
Current@ NXR24 Current@

100K_0402_1%
Current@
1
1
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 TPM

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL Size Document Number Rev
Miray
5 4 3 2 1
PWR
5 4 3 2 1
+3VALW_EC
+3VALW_EC +3VALW_EC_VCCA
RE16 1 2 0_0402_5% CPU_PROCHOT# 5
@ 32,36 VR_HOT#
+3VALW
2 1 2 1
RE1 0_0603_5% 1 1 1 1 1 RE22 0_0603_5% 1 1
1
CE15
1U_0402_10V6K
CE11
0.1u_0201_10V6K
CE10
0.1u_0201_10V6K
CE9
0.1u_0201_10V6K
CE7
0.1u_0201_10V6K
CE3
0.1u_0201_10V6K
CE4
1000P_0402_50V7K
QE1
+3VL
2 1 LSI1012XT1G_SC-89-3
RE5 0_0603_5% @ 2 2 2 2 2 2 2 EC_PROCHOT# 2 0817 change to SB00000ZI00
2 1
3
RE23 0_0603_5% +3VALW_EC
CD@
8396
EC_AGND
KB_DEL# 2 @ 1
D RE726 10K_0402_5% D
KSI6 2 @ 1
+3VS RE727 10K_0402_5%
LID_PAD# 2 1
20MIL RE196 @ 10K_0402_5%
0.1u_0201_10V6K 2 1 CE13
EC change to 8586 SA00005WC0J

EC_SMB_CLK1RE728 2 1 4.7K_0402_5%
+3VALW_EC +3VALW_EC_VCCA
EC_SMB_DAT1 RE729 2 1 4.7K_0402_5%
S IC IT8586VG/FX VFBGA128P EMBEDDED CTRL
0.1u_0201_10V6K 2 1 CE1 VCOREVCC
20MIL 20MIL
EC_PWR_LED# 2 1
RE682 2.2K_0402_5%
EC_BATTCHG_LED# 4 1
EC_BATTLOW_LED# 3 2
RE188 1 2 0_0402_5%
RPE683
2.2K_0404_4P2R_5%
VBAT
D10
K10
UE1
for register keep
D4
D5
K5
K4
E4
E9
J4
J5
EC_ON 2 1
RE712 100K_0402_5%
VCC
AVCC
VCORE
VFSPI
VBAT
VSTBY_05
VSTBY_04
VSTBY_03
VSTBY_02
VSTBY_01
+3VS
C202 1 2 PCH_PLT_RST#_EC
EMC_NS@ 1000P_0402_50V7K EC_KBRST# H4 EC_I2C_DAT4 2 8396@ 1
7 EC_KBRST# EC_INT_SERIRQ KBRST#/GPB6 EC_PWR_LED#
G2 M5 RE721 4.7K_0402_5%
CPU_PECI 7,24 EC_INT_SERIRQ ALERT#/SERIRQ/GPM6 PWM0/GPA0 EC_BATTCHG_LED# EC_PWR_LED# 27 EC_I2C_CLK4
CC1 @ 2 1 7,24 LPC_FRAME# H1 N5 2 1
ECS#/LFRAME#/GPM5 PWM1/GPA1 EC_BATTLOW_LED# EC_BATTCHG_LED# 22
47P_0402_50V8J H2 M6 RE722 4.7K_0402_5%
7,24 LPC_AD3 EIO3/LAD3/GPM3 PWM2/GPA2 EC_BATTLOW_LED# 22 8396@
J1 N6
7,24 LPC_AD2 EIO2/LAD2/GPM2 PWM3/GPA3 EC_ON_1.8V 34,35
7,24 LPC_AD1
J2
EIO1/LAD1/GPM1 PWM PWM4/SMCLK5/GPA4
K6
EC_VCCST_PWREN PCH_THS_RST#_EC 27
LPC_FRAME# 2 @ 1
K1 J6 RE711 10K_0402_5%
7,24 LPC_AD0 EIO0/LAD0/GPM0 PWM5/SMDAT5/GPA5 EC_VCCST_PWREN 12
7 PCH_PCI_CLK
PCH_PCI_CLK K2
ESCK/LPCCLK/GPM4 LPC PWM6/SSCK/GPA6
M7
EC_VR_EN EC_BEEP 23
WRST# L1 K7
WRST# PWM7/RIG1#/GPA7 EC_ON_5V EC_VR_EN 36
L2 C2
8 EC_VCCST_PWRGD EC_RX ECSMI#/GPD4 TMRI0/GPC4 EC_SUSP EC_ON_5V 33
M2 E1
21 EC_RX SIN0/PWUREQ#/BBO/SMCLK2ALT/GPC7 TMRI1/GPC6 EC_SUSP 28
M1
PCH_PCI_CLK 21 EC_TX PCH_PLT_RST#_EC M4 SOUT0/LPCPD#/GPE6
EMC@ 2 1 8,20,21,24 PCH_PLT_RST# RE217 1 2 0_0402_5% G10 RE714 1 2 0_0402_5%
EC_SCI# ERST#/LPCRST#/GPD2 ADC0/GPI0 VR_CPU_PWROK 36
RE254 33_0402_5% N4 G13
4,9 EC_SCI# LID_PAD# ECSCI#/GPD3 ADC1/SMINT0/GPI1 BATT_TEMP NTC_V 26
2 F1 G12
27 LID_PAD# GA20/GPB5 ADC2/SMINT1/GPI2 BATT_TEMP 32
ADC ADC3/SMINT2/GPI3
F9 RE717 1 2 0_0402_5%
BAT_I 32
CE339 F13
18P_0402_50V8J ADC4/SMINT3/GPI4 F10 RE13 1 2 0_0402_5%
ADC5/DCD1#/GPI5 VR_ADP_I 32
IT8396
1 EMC@ F12
ADC6/DSR1#/GPI6 CHG_MOD2 19
J12 E13
26 KSI0 KSI0/STB# ADC7/CTS1#/GPI7 EC_CMOS_ON# 17
J13 EC_SMB_CLK0
26 KSI1 KSI1/AFD# 1 4
J9 D12 RE216 1 2 0_0402_5% EC_SMB_DAT0
26 KSI2 KSI2/INIT# DAC2/TACH0B/SMINT6/GPJ2 EC_SUS_VCCP 12,34 2 3
C H12 C13 RE718 1 2 0_0402_5% 8396@ C
26 KSI3 KSI3/SLIN# DAC3/TACH1B/SMINT7/GPJ3 EC_SENSOR_INT 9
26 KSI4
H9
KSI4 DAC DAC4/DCD0#/GPJ4
B13 EC_PROCHOT#
2.2K_0404_4P2R_5% RPE202
+3VALW_EC H10 C12 PCH_BKLT_EN 4,17
26 KSI5 KSI5 DAC5/RIG0#/GPJ5
H13
26 KSI6 KSI6 EC_RTCRST_ON
G9 A11
26 KSI7 KSI7 PS2CLK0/TMB0/CEC/GPF0
M8 B11
26 KSO0 KSO0/PD0 PS2DAT0/TMB1/GPF1 EC_PBTN_OUT# 8
J7 A10 RE11 1 2 0_0402_5%
26 KSO1 KSO1/PD1 SMCLK0/SMINT8/GPF2 EC_SMB_CLK0 24,26
1
PS2 Thermal
RE220
100K_0402_5%
N9 B10 RE12 1 2 0_0402_5%

26 KSO2 KSO2/PD2 SMDAT0/SMINT9/GPF3 EC_SMB_DAT0 24,26
1
DE23
26 KSO3
M9
KSO3/PD3 Int. K/B PS2CLK2/SMINT10/GPF4
D9 1 @TC195
Sensor
K8 B9 1
RB751V-40_SOD323-2 26 KSO4
J8 KSO4/PD4 Matrix PS2DAT2/SMINT11/GPF5
@TC196
@ 26 KSO5 KSO5/PD5
N10 A9
26 KSO6 KSO6/PD6 GPH3/ID3/YM EC_CAPS_LED# 26
2
M10 B8
26 KSO7 KSO7/PD7 GPH4/ID4/YP USB_CHG_EN 19
2
WRST#
26 KSO8
N11
KSO8/ACK# EXTERNAL SERIAL FLASH GPH5/ID5/DM
A8
CHG_MOD1 EC_SCI#
K9 B7 2 1
26 KSO9 KSO9/BUSY GPH6/ID6/DP CHG_MOD1 19
1 N12 RE206 10K_0402_5%
26 KSO10 KSO10/PE EC_SPI_CS0#
N13 A7 RE204 1 2 0_0402_5% RPE200
26 KSO11 KSO11/ERR# FSCE#/GPG3 EC_SPI_SI PCH_SPI_CS0# 7 EC_INT_SERIRQ
CE20
1U_0402_10V6K
M13 B6 RE205 1 2 0_0402_5% 1 4

26 KSO12 KSO12/SLCT FMOSI/GPG4 PCH_SPI_SI 7
2 26 KSO13
L12
KSO13 SPI Flash ROM FMISO/GPG5
A6 EC_SPI_SO
EC_SPI_CLK
RE208 1 2 0_0402_5% PCH_SPI_SO 7
EC_KBRST# 2 3
L13 B5 RE212 1 2 0_0402_5%
26 KSO14 KSO14 FSCK/GPG7 PCH_SPI_CLK 7
K12 10K_0404_4P2R_5%
26 KSO15 KSO15
26 KB_DEL# K13
J10 KSO16/SMOSI/GPC3 A4 EC_ACIN# VR_CPU_PWROK 2 1
27 EC_LID_OUT# KSO17/SMISO/GPC5 AC_IN#/GPB0
UART LID_SW#/GPB1
A3 LID_SW#
LID_SW# 27
EC_SENSOR_INT
RE720 10K_0402_5%
+3VL +3VALW_EC 2 1
RE10 @ 10K_0402_5%
EC_ONOFF_BTN# B4 A13 EC_SYS_PWROK
27 EC_ONOFF_BTN# PWRSW/GPB3 EGAD/GPE1 EC_SYS_PWROK 8
33,35 EC_ON
RE713 1 @ 2 0_0402_5% A2
XLP_OUT/GPB4 SM Bus EGCS#/GPE2
A12
EC_PCH_ACIN 8
BATT charger 32 EC_SMB_CLK1
EC_SMB_CLK1 B3
SMCLK1/GPC1 EGCLK/GPE3
B12 RE723 1 2 0_0402_5%
SUSPWRDNACK 8
EC_RSMRST#_R 2 1
1
EC_SMB_DAT1
RE221
100K_0402_5%
RE223
100K_0402_5%
MIRROR@
@ B2 RE7 10K_0402_5%
32 EC_SMB_DAT1 CPU_PECI SMDAT1/GPC2 EC_SYS_PWROK
1 2 B1 2 1
5 CPU_PECI_R SMCLK2/PECI/GPF6 EC_ON
RC12 43_0402_5% C1 D13 RE219 1 2 0_0402_5% RE181 10K_0402_5%
8 EC_PCH_PWROK EC_SMB_CLK3_R SMDAT2/PECIRQT#/GPF7 SMINT5/GPJ1 EC_SYSON
E8 E7 GPG2 2 1
CRX1/SIN1/SMCLK3/GPH1/ID1 SSCE0#/GPG2
Sensor EC_SMB_DAT3_R D7
CTX1/SOUT1/SMDAT3/GPH2/ID2 GPIO SSCE1#/GPG0
E6 CHG_MOD3
CHG_MOD3 19
RE3 10K_0402_5%
2
D6
DSR0#/GPG6 EC_SYSON PCH_ME_PROTECT 7
GPG2 20MIL BTN#/GPG1
A5
EC_SYSON 28,35
RPE2
RE202 1 2 0_0402_5% D1 EC_SUSP 1 4
m
+3VL CRX0/GPC0 EC_BKLT_EN 17 EC_PCH_PWROK
A1 D2 DDR_PWRGD 35 2 3
VSTBY0 CTX0/TMA0/GPB2
23 EC_MUTE#
EC_MUTE# E2
GPE4 WAKE UP RI1#/GPD0
N1
PCH_SLP_S3# 8
N3 10K_0404_4P2R_5%
RI2#/GPD1 PCH_SLP_S4# 8
1
EC_NOVO_BTN#_R
RE222
100K_0402_5%
UNMIRROR@
E12
co
TACH2/SMINT4/GPJ0 M12 EC_VCCST_PWREN 2 1
TACH1A/TMA1/GPD7 VCCIO_PWRGD PCH_SLP_S0# 8,12
N7 M11 RE14 10K_0402_5%
GINT/CTS0#/GPD5 TACH0A/GPD6 VCCIO_PWRGD 34
28 PCH_PWREN#
PCH_PWREN# N8
RTS1#/GPE5 GPIO L80LLAT/SMDAT4/GPE7
M3 EC_I2C_DAT4
EC_I2C_DAT4 9
EC_SUS_VCCP 2 1
RE218 1 2 EC_RSMRST#_R D8 N2 EC_I2C_CLK4 RE716 10K_0402_5%
8 EC_RSMRST# CLKRUN#/GPH0/ID0 L80HLAT/BAO/SMCLK4/GPE0 EC_I2C_CLK4 9
2
100_0402_5% PCH_BKLT_EN 1 2
RE52 100K_0402_5%
EC_CMOS_ON# 2 1
GPG2 EC_X1
B
*H MIRROR CODE EN
L MIRROR CODE DISABLE
2 @
RE724
1
10K_0402_5%
G1
F2 VCORE2
CK32K/GPJ6
Clock
x. RE730 @ 10K_0402_5%
BATT_TEMP 1 2
EC_X1 CE17 100P_0402_50V8J
VSS_01
VSS_02
VSS_03
VSS_04
VSS_05
VSS_06
EMC_NS@
fi AVSS
IT8396VG-192-AX_VFBGA128
RTC_RST# 8
H5
E10
E5
F4
F5
G4
G5
1
QE3
LSI1012XT1G_SC-89-3
na
EC_RTCRST_ON 2
2 EC_AGND
CE21
3
1
RE50
0.1u_0201_10V6K
1 8396@ EC_SMB_CLK3_R RE709 1 ECSH@ 2 0_0402_5% 100K_0402_5%
EC_SMB_DAT3_R RE710 1 ECSH@ 2 0_0402_5% EC_SMB_CLK3 9,26
EC_SMB_DAT3 9,26
Vi
0817 change to SB00000ZI00
2
EC DSW Signal
+3VALW_EC +3VL +3VALW_EC
+3VL
2
+3VL +3VALW_EC RE31 @ RE32

0_0402_5% 0_0402_5%
2
RE586
100K_0402_5%
@
KSI7 @1 TP131 TP136 1@
1
KSI6 @1 TP132 TP137 1@ @ RE183 EC_ONOFF_BTN# 2 1

1
RE262 WRST# @1 TP133 TP138 1@ RE197 100K_0402_5% RE186 10K_0402_5%

EC_ACIN# 2 1 EC_SMB_CLK1 @1 TP134 100K_0402_5% LID_SW# 2 @ 1
1
EC_SMB_DAT1 @1 TP135 DE40 RE189 10K_0402_5%

0_0402_5% 2 EC_NOVO_BTN#_R
2
0604
1
27 EC_NOVO_BTN#
For off-line programmingÉÕÂ¼EC code
1
QE15 3 EC_ONOFF_BTN#
LSI1012XT1G_SC-89-3 KSI-6 (pin-H13 --> I2C_DATA) 1
2 2 1 VR_ACIN 32 KSI-7 (pin-G9 --> I2C_CLK)
RE203 BAT54CW_SOT323-3 CE5
1K_0402_5%
SMDAT0/GPF3(pin-B10)
0.1u_0201_10V6K
A @ SMCLK0/GPF2(pin-A10) 2 A
@
3
0817 change to SB00000ZI00
Issued Date 2015/11/09 Deciphered Date 2015/11/09 ECIT8396

Miray
5 4 3 2 1
5 4 3 2 1
G-SENSOR
+3VS
+3VS
CG24 2 1 0.1u_0201_10V6K
CD@ +3VS
+3VS
1
2
RPG1
UG16 UG25
2.2K_0404_4P2R_5%
1 8 1 12 EC_SMB_CLK3
VCCA VCCB EC_SMB_DAT3 2 SDO SCx 11
EC_SMB_CLK3 2 7 MCU_I2C_RE_SCL SDx PS 10
9,25 EC_SMB_CLK3 MCU_I2C_RE_SCL 27
4
3
A1 B1 5 CSB
EC_SMB_DAT3 3 6 MCU_I2C_RE_SDA 6 INT1 9
9,25 EC_SMB_DAT3 A2 B2 MCU_I2C_RE_SDA 27 INT2 GND
3 8
4 5 7 VDDIO GNDIO 4
D GND OE +3VS VDD NC D
2
RG47 BMA222E_LGA12_2X2
NTSX2102GU8_XQFN8_1P2X1P4
100K_0402_5% 1 1
NEW symbol for Haydn 0604
CG3380
0.1u_0201_10V6K
CD@
CG3381
0.1u_0201_10V6K
CD@
1
2 2 0416 update
+3VS
1
2
RPG2
2.2K_0404_4P2R_5% When use ISH change RPG2/RPG1 to 1K
When use ECSH change RPG2/RPG1 to 2.2K
EC_SMB_CLK3
4
3
EC_SMB_DAT3
Keyboard Connector
CVILU_CF32322D0R0-NH R3060 1 @ 2 0_0402_5% KB_DEL#
KB_DEL# 25 +3VALW_CAPLED EC_CAPS_LED#
32 R3058 1 2 0_0402_5% KSO14 C117 1 2 EMC_NS@ 100P_0402_50V8J C133 1 2 EMC_NS@ 100P_0402_50V8J
32 31 R3056 1 2 0_0402_5% KSI6
33 31 30 R3057 1 @ 2 0_0402_5% KSO2 C89 1 2 EMC_NS@ 100P_0402_50V8J KSO1 C90 1 2 EMC_NS@ 100P_0402_50V8J
GND1 30 29
34 29 28 KSO15 C92 1 2 EMC_NS@ 100P_0402_50V8J KSO7 C93 1 2 EMC_NS@ 100P_0402_50V8J
GND2 28 27
27 26 KSI1 KSO6 C94 1 2 EMC_NS@ 100P_0402_50V8J KSI2 C95 1 2 EMC_NS@ 100P_0402_50V8J
26 25 KSI1 25
KSI7
25 24 KSI7 25
C KSI6 KSO8 C96 1 2 EMC_NS@ 100P_0402_50V8J KSO5 C97 1 2 EMC_NS@ 100P_0402_50V8J C
24 23 KSI6 25
KSO9
23 22 KSO9 25
KSI4 KSO13 C98 1 2 EMC_NS@ 100P_0402_50V8J KSI3 C99 1 2 EMC_NS@ 100P_0402_50V8J
22 21 KSI4 25
KSI5
21 20 KSI5 25 1 2 EMC_NS@ 1 2 EMC_NS@
KSO0 KSO12 C1971 100P_0402_50V8J KSO14 C109 100P_0402_50V8J
20 19 KSO0 25
KSI2
19 18 KSI2 25 1 2 EMC_NS@ 1 2 EMC_NS@
KSI3 KSO11 C119 100P_0402_50V8J KSI7 C110 100P_0402_50V8J
18 17 KSI3 25
KSO5
17 16 KSO5 25
KSO1 KSO10 C107 1 2 EMC_NS@ 100P_0402_50V8J KSI6 C122 1 2 EMC_NS@ 100P_0402_50V8J
16 15 KSO1 25
KSI0
15 14 KSI0 25
14 13 KSO2 25
KSO4
13 12 KSO4 25
THM
12 11 KSO7 25
KSO8
11 10 KSO8 25 1 2 EMC_NS@ 1 2 EMC_NS@
REMOTE1+ KSO6 KSI0 C121 100P_0402_50V8J KSO9 C1972 100P_0402_50V8J
Sensor
10 9 KSO6 25
1 KSO3
9 8 KSO3 25 1 2 EMC_NS@ 1 2 EMC_NS@
KSO12 KSO0 C124 100P_0402_50V8J KSI1 C120 100P_0402_50V8J
8 7 KSO12 25
Close U35 C451
7 6
KSO13
KSO13 25
+3VS +3VS_TSR 2200P_0402_50V7K KSO14
2 6 5 KSO14 25
REMOTE1- KSO11
5 4 KSO11 25
R122 1 2 0_0603_5% KSO10
4 3 KSO10 25
20mA 3 2
KSO15
KSO15 25 For EMC
2 1 +3VALW_CAPLED EC_CAPS_LED# 25
R3042 1 2 100_0402_5%
1 +3VS
Nuvoton thermal sensor

JKB ME@
0911 change symbol
m
Address 1001_100xb
+3VS_TSR
2
co
AZ5123-01F.R7G_DFN1006P2X2
2
EMC@
D13
D4013
EMC_NS@
AZ5123-01F.R7G_DFN1006P2X2
10mA U35
1 8 EC_SMB_CLK0
VDD SCL EC_SMB_CLK0 24,25
1
EC_SMB_DAT0
1 1 REMOTE1+ 2
D+ SDA
7
EC_SMB_DAT0 24,25
x.
C1934
1U_0402_6.3V6K
1
C180
0.1u_0201_10V6K
REMOTE1- 3 6 THM_ALERT#
B D- ALERT# B
2 2 THM_SHDN# 4 5
T_CRIT# GND
fi
NCT7718W_MSOP8
@
Touch Pad Connector

na
+3VS
+3VS_TP
+3VS_TSR
Vi
2
R222 HIGHS_FC5AF061-A201H
0_0402_5% 7 PM_I2C_SCL2
GND1 8 PM_I2C_SDA2
1
R625 R624 GND2 EMC_NS@ EMC_NS@ EMC_NS@

+3VL +3VALW
10K_0402_5% 10K_0402_5%
D3 D11 D12
@ @
1
+3VS_TP 6
6
2
PM_I2C_SCL2 5
THM_ALERT# 1 1 9 PM_I2C_SCL2 5
AZ5725-01F_DFN1006P2X2
AZ5725-01F_DFN1006P2X2
AZ5725-01F_DFN1006P2X2
PM_I2C_SDA2 4
2
2
9 PM_I2C_SDA2 4
C1020
4.7U_0402_6.3V6M
C181
0.1u_0201_10V6K
THM_SHDN# PCH_TP_INT# 1 2 3
5 PCH_TP_INT# 3
1
R627 R629 2
13.7K_0402_1% 13.7K_0402_1% 2 2 R338 0_0402_5% 2
1
@ 1
1
JTP
+3VS
ME@
2
1
Close to memory side
REMOTE1+ 1105 change new sysmbol
1
1
C RH101
1
C982 2 Q137
2
100P_0402_50V8J B 100K_0402_1%_TSM0B104F4251RZ RG48

2
2 @ E R628 100K_0402_5%
A REMOTE1- MMBT3904WH_SOT323-3 0_0402_5% A
3
PCH_TP_INT#
1
REMOTE1+/-:
1
Trace width/space:10/10 mil

Trace length:<8"

25
NTC_V
Issued Date 2015/11/09 Deciphered Date 2015/11/09 CONN(THM&FAN&RTN&SPKR&TP)

Miray
5 4 3 2 1
5 4 3 2 1
Touch
+3VS 500mA(Max: 300mA) +3VS_TOUCH
JCAM ME@
2 1 1
+3VS_DMIC DMIC_DATA 1
R22 0_0603_5% RA286 1 2 0_0402_5% 2
23 DMIC_DATA DMIC_CLK 2
1 1 RA287 1 2 0_0402_5% 3
23 DMIC_CLK MCU_I2C_RE_SDA 4 3
26 MCU_I2C_RE_SDA MCU_I2C_RE_SCL 4
5
26 MCU_I2C_RE_SCL 5
Touch Panel Poer USB20 Port6
C1968
0.1u_0201_10V6K
CD@
C31
0.1u_0201_10V6K
CD@
D D
6
2 2 7 6
8 7 ME@
9 8 JDEBUG
10 9 ISH_I2C0_SCL 1
10 9 ISH_I2C0_SCL ISH_I2C0_SDA 1
11 2
EC_LID_OUT# +3VS_TOUCH 11 9 ISH_I2C0_SDA ISH_I2C1_SCL 2
1 2 12 3
25 EC_LID_OUT# 12 9 ISH_I2C1_SCL ISH_I2C1_SDA 3
R3041 0_0402_5% 13 4
PCH_THS_RST#_R 13 9 ISH_I2C1_SDA 4
9 PCH_THS_RST# R127 1 2 0_0402_5% 14 5
15 14 ISH_GP0 6 5
25 PCH_THS_RST#_EC R128 1 @ 2 0_0402_5% 15 9 ISH_GP0 ISH_GP6 6
16 7
17 16 9 ISH_GP6 8 7
9 PM_I2C_SCL1 17 8
18 9
9 PM_I2C_SDA1 19 18 21 10 9
9 THS_IRQ 19 GND1 10
20 22 11
20 GND2 12 11
+3VS_TOUCH 13 12
I-PEX_20374-020E-31 14 13
+3VS 15 14
16 15 20
17 16 GND_PAD2 19
EMC@ 18 17 GND_PAD1
1 2 PCH_THS_RST#_R 18
C203 0.01U_0402_25V7K
2
U55 ELCO_006238018410846+
2 AZ5123-01F.R7G_DFN1006P2X2
EMC_NS@
1
1
3
EC_ONOFF_BTN# 2 1 EC_NOVO_BTN# 2 1
25 EC_ONOFF_BTN# 25 EC_NOVO_BTN#
C SW2000 SW2001 C
5
DMIC MPTCFG-T-Q-T-R_2P MPTCFG-T-Q-T-R_2P
500mA(Max: 20mA) 1 2 1 2
+3VS +3VS_DMIC DMIC_DATA C9103 220P_0402_50V7K C9104 220P_0402_50V7K
DMIC_CLK
0910 update symbol 0910 update symbol

2 1
R3040 0_0603_5%
2 C1938 C1937
2
2
47P_0402_50V8J 47P_0402_50V8J
CG3379 CD@
0.1u_0201_10V6K
@ @
1
1
1 LED300 R9289
EC_PWR_LED# 1 2 1 2
25 EC_PWR_LED# +3VALW
1 100_0402_5%
B1101BS--05P-000733_WHITE
3
C1939
220P_0402_50V7K 0918 change symbol
2
m
co
+3VL
U39
LID_SW# 4 3 1 2
25 LID_SW# Out1 Vdd
x. R219 0_0402_5%
2 0916 change to +3VL from +3VALW

LID_PAD# 1 2 1 2
25 LID_PAD# Out2 Gnd
0.1u_0201_10V6K
C204
B B
R223 0_0402_5%
1 HGDEDM011A_MAP4_1P1X0P9
2 2
fi
C196 C193
@
0.1u_0201_10V6K 0.1u_0201_10V6K
1 1
@
na
Vi
EC_PWR_LED#
EC_NOVO_BTN#
EC_ONOFF_BTN#
D1 D2 D5
AZ5123-01F.R7G_DFN1006P2X2
AZ5123-01F.R7G_DFN1006P2X2
AZ5123-01F.R7G_DFN1006P2X2
1
1
1
1
2
2
2
2
EMC@ EMC@ EMC@
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 Screw and Hole

Miray
5 4 3 2 1
5 4 3 2 1
+1.8VALW +1.8VS
+5VALW
Enable:
VIH=1.2V~5.5V
1 VIL=0~0.4V 1 AON7408L_DFN8-5 1
C226 Q12 C227
C112 +5VS
1U_0402_10V6K 0.1u_0201_10V6K @ @ 0.1u_0201_10V6K +5VALW +5VLP
U56
2 1 14
IN1_1 OUT1_2 1 2 1 2
2 13 C216 S1
IN1_2 OUT1_1 5 2
0.1u_0201_10V6K D S2
EC_SUSP 5VS_CT1 3
R264 1 2 0_0402_5% 3 12 S3
1
EN1 CT1 2 R231 R234
1
@ 100K_0402_5% 100K_0402_5%
4 11
R69
VBIAS GND @
470_0603_5%
3VS_CT2 V9B+
R265 1 2 0_0402_5% 5 10 R68
4
EN2 CT2 @
+3VALW +3VS
2
1 2 SUSP#
6 9 SUSP# 18
2
1 IN2_1 OUT2_2
7 8 1
0.01U_0201_25V6-K
C114
D D
IN2_2 OUT2_1 C215 6 6 6
1 100K_0402_5%
15 0.1u_0201_10V6K
2 GPAD Q163A 1 REV@ Q164A Q16A
@ C113
2 AO5804EL_SC89-6
C58
0.01U_0201_25V6-K
1U_0402_10V6K G5016KD1U_TDFN14_2X3 EC_SUSP
2 @ SUSP# 2 2 SUSP# 2
EC_SUSP 25
0907 change to G5016KD1U AO5804EL_SC89-6 2 AO5804EL_SC89-6
1 1 1
5VS_CT1 3VS_CT2
1000P_0402_50V7K
1000P_0402_50V7K
1 1
+5VALW +5VLP
C101
C102
@
+1.8VALW +DDR_1.8V
2 2
1
1 AON7408L_DFN8-5 1 R230 R236
C232 Q13 C238 100K_0402_5% 100K_0402_5%
0.1u_0201_10V6K @ @ 0.1u_0201_10V6K
+3VALW_PCH 2 1 2
2
5 S1 2 SYSON#
+3VALW +3VALW_PCH D S2 3
+3VALW S3
3
1
1
G
1 2 0_0603_5%
R72
R25 C219 Q16B
470_0603_5%
Q23 @ 0.1u_0201_10V6K V9B+ AO5804EL_SC89-6
R71
4
LP2301ALT1G_SOT23-3 @ @ 5
2 EC_SYSON 25,35
1 2
2
3 1
D
3 3 Q164B
100K_0402_5% 4
1 1 Q163B 1 REV@
C37 G
C30
0.01U_0201_25V6-K
C59
0.01U_0201_25V6-K
C C
2
0.1u_0201_10V6K SYSON# 5 5 SYSON#
@
2 2@ AO5804EL_SC89-6 2 AO5804EL_SC89-6
4 4
PCH_PWREN# 2 1
25 PCH_PWREN#
R11
@ 10K_0402_5% 1
C441
0.1u_0201_10V6K
1
R238 @
@ 2
470K_0402_5%
2
+3VALW +3VS
+3VALW +3VS
C1958 1 2 EMC_NS@
C9110 1 2 EMC_NS@
m
.1U_0402_10V6-K
.1U_0402_10V6-K
C1957 1 2 EMC_NS@
C9111 1 2 EMC_NS@
.1U_0402_10V6-K
.1U_0402_10V6-K
co For HDMI signal cross moat concern.

x.
B B
fi
na
Vi
+5VS +3VS +DDR_0.6VS

+DDR_1.2V
2
@ R257 @ R245 @ R247

2
22_0402_5% 22_0402_5% 22_0402_5% @ R246

22_0402_5%
R118
SUSP# 1 2 0_0402_5%
1
REV@ 6 3 6 3
REV@ REV@
REV@ Q165A Q165B Q166A Q166B
AO5804EL_SC89-6 AO5804EL_SC89-6 AO5804EL_SC89-6 AO5804EL_SC89-6
2 5 2 SYSON# R12 1 2 0_0402_5%
5
REV@ REV@
A 1 4 1 4 A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 POWER SWITCH

Size
Size DocumentNumber
Document Number Rev
Rev
Miray
Date:
Sheet 28 of 38
5 4 3 2 1
5 4 3 2 1
SH1 ME@ SH2 ME@

FD1 FD2 FD3 FD4 FD5 FD6
1 1
1 1
1
1
PAD_C7P0
SHIELDING_SUL-15A2M_5P8x1_1P SHIELDING_SUL-15A2M_5P8x1_1P
SH3 ME@ SH4 ME@
H1 H2 H3 H5 H18 1 1
HOLEA HOLEA HOLEA HOLEA HOLEA 1 1
SHIELDING_SUL-15A2M_5P8x1_1P SHIELDING_SUL-15A2M_5P8x1_1P
1
1
PAD_C7P0 PAD_C7P0 PAD_C7P0 PAD_C7P0 PAD_C7P0
PAD_C6P0D2P3
H7 H8 H16
HOLEA HOLEA HOLEA
1
PAD_C6P0D2P3 PAD_C6P0D2P3 PAD_C6P0D2P3
PAD_CT5P0D1P5
D D
H30
HOLEA
1
PAD_CT5P0D1P5
PAD_O1P8X1P5D1P8X1P5N
H31
HOLEA
1
PAD_O1P8X1P5D1P8X1P5N
PAD_C6P5D3P4
H12 H13 H14 H15
HOLEA HOLEA HOLEA HOLEA
1
PAD_C6P5D3P4 PAD_C6P5D3P4 PAD_C6P5D3P4 PAD_C6P5D3P4
PAD_C5P5D2P3
H19
HOLEA
1
PAD_C5P5D2P3
pad_s5p0
H20
HOLEA
C C
1
pad_s5p0
PAD_SHAPE3P9X2P8
H21
HOLEA
1
PAD_SHAPE3P9X2P8
pad_shape4p5x2p4
H24 H25 H26
HOLEA HOLEA HOLEA
1
pad_shape4p5x2p4 pad_shape4p5x2p4 pad_shape4p5x2p4
PAD_SHAPE4P0X2P1
H23 H27 H28 H29
HOLEA HOLEA HOLEA HOLEA
1
PAD_SHAPE4P0X2P1 PAD_SHAPE4P0X2P1 PAD_SHAPE4P0X2P1 PAD_SHAPE4P0X2P1
m
co
B
x. B
fi
na
Vi
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 Screw and Hole

Miray
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS E 1.0
5 4 3 2 1
5 4 3 2 1
8.31
Follow DXF update Hole
D D
C C
m
co
x.
B B
fi
na
Vi
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 HW_Change_List

Miray
5 4 3 2 1
5 4 3 2 1
+5VLP
Silergy Silergy
SY8286CRAC G971MF11U_SO8
D
Converter +5VALW Converter +1.8V D
AC Adapter FOR SYSTEM/LPDDR3

EN FOR SYSTEM PGOOD EN PGOOD
Silergy +3VLP
SY8286BRAC
Converter +3VALW
EN FOR SYSTEM PGOOD
TI
BQ24770RUYR V9B+ MPS
+1.2V
Battery Charger NB686GQ-Z
Switch Mode Converter
+0.6
FOR LPDDR3
C C
EN PGOOD
SMBus
MPS
NB682GD VCCIO for Premium only
Converter
Battery EN FOR CPU/PCH PGOOD
Li-ion
m
MPS
co
NB682GD PRIM_CORE for Premium only
x. Converter
B
EN FOR CPU/PCH PGOOD B
fi
Silergy
+5VALW SY8104ADC
na
Converter +1.0VALW
Vi
EN
FOR CPU/PCH PGOOD
CPU_CORE
Onsemi
NCP81206MNTXG GFX_CORE
Switch Mode
VCCSA
A A
EN
PGOOD
Issued Date 2015/11/09 Deciphered Date 2015/11/09 NVDC Charger

Miray
Date: Monday, March 07, 2016 Sheet 31 of 38
5 4 3 2 1
5 4 3 2 1
V_PATH
PQ106
AON7408L_DFN8-5
3
2
5 1
BGATE_L 4
D D
PQ101
AON6414AL_DFN8-5 PQ102
ADIN_1 AON7408L_DFN8-5 V_CHG
1 3 PR101
2 2
5 3 1 5 2 1
0.01_1206_1%
10U_0805_25V6K
10U_0805_25V6K
1000P_0402_50V7K
0.01U_0402_25V7K
1
@
PC101
PC102
0.1U_0402_25V6
BGATE_L4
1
PC131
PC132
PC133
2200P_0402_50V7K
2
2
2
PC103
715_ACP
PC104
1
4.7_0402_5%
0.1U_0402_25V6 EMC@ EMC@ EMC@
PR102
2
PR103 AGATE_R
1
1
430K_0402_1%
1
PR104 0.1U_0201_25V6-K
PC105
4.02K_0402_1%
2
V_PATH 1 2
ACDET
2
BATT+
PD102
3
AGATE
1
PR108 1 ADIN_1
0.1U_0201_25V6-K
0.1U_0201_25V6-K
68K_0402_1%
4.02K_0402_1%
2
1
2
PC108
PC109
PR109
CHG_VCC_R
2
2
BAT54CW _SOT323-3
PR110 V9B+
1
CHRG_GND CHRG_GND CHRG_GND 1 2
25 VR_ADP_I
10_0805_1% change from B2 size to B3 for H-Z limitation on 7/15
1
PC110
VR_ACIN
CMSRC
ACDET
100P_0402_50V8J
5
CHG_VCC
1
47U_B3_10VM_R45M
+3VL PQ103 +
10U_0805_16V6-K
10U_0805_16V6-K
1
PC113
C C
6
7
1
PC114 4 AON7506_DFN
PC115
PC111
25 BAT_I 2
1U_0603_25V6M
ACDET
CMSRC
IADP
ACOK
ACDRV
ACN
ACP
2
PC117 100P_0402_50V8J
2
BATT+
2
PR111 2 1 8 28
100K_0402_5% IBAT VCC
CHG_DH_R
PC118 100P_0402_50V8J
3
2
1
2 1 9 27 PQ104
VR_ACIN PMON PHASE PL101 AO4407AL_SO8 PF101 BATT+_2 JBATT1
6A
1
25 VR_ACIN 1 8
PC119 PR112 1.5UH_PCMB061H-1R5MS_6.5A_20% PR113 10A_24V_F1206HB10V024TM
2
10 26 CHG_DH 1 2 2 7 1
36 PSYS_CPU PROCHOT# HIDRV CHG_PAHSE 1 2 2 1 3 6 1 2 2 1
0.047U_0402_25V7K 0_0402_5% @
2
RTC_VCC
5 3 9
1
11 PU101 25 CHG_BTST
1 2CHG_BTST_R 0.01_1206_1% 4 3 GND1 10
SDA BTST PR114 @ 0_0402_5% EC_SMCA 5 4 GND2 11
BQ24770RUYR_QFN28_4X4
10U_0805_16V6-K
1000P_0402_50V7K
5 GND3
1
@ EC_SMDA 6 12
4
PR115 1 2 0_0402_5% CHG_VR_HOT# 12 24 REG_CHG 6 GND4
+3VL
1 2 7
PC120
25,36 VR_HOT# SCL REGN CHRG_GND 7
1
PC121 PQ105 8
PC122
2
@ 1U_0402_10V6K DFC in 7/21 8
EC_SMB_DAT1 PR116 1 2 0_0402_5% EC_SMB_DAT1_R 13 23 CHG_DL 4 AON7506_DFN @
2
CMPIN LODRV
SUYIN_125022HB008M200ZL
1
@ PR124
MBAT_PRES#_R
ME@
EC_SMB_CLK1 PR117 1 2 0_0402_5% EC_SMB_CLK1_R 14 22 EMC@ 100K_0402_5%
CMPOUT GND R_0402
29
BATPRES#
3
2
1
POWERPAD 2 BGATE_R
BATDRV#
BGATE 1 @
2
1
1
PC123 PC124 PR118 @ 0_0402_5% PR125 1 2 0_0402_5%
25 BATT_TEMP
CELL
0.1U_0201_25V6-K PC125 0.1U_0201_25V6-K
SRN
SRP
BAT
ILIM
CHRG_GND 1 2
2
PJ101
1
2 1 CHRG_GND 0.1U_0201_25V6-K CHRG_GND PC126
100_0402_1%
100_0402_1%
MBAT_PRES#_R 15
16
17
18
19
20
21
2 1 1000P_0402_50V7K
PR120
@
PR119
AC adapter 20V
PR121
2
JUMP_43X79 @
CHG_ILIM 1 2 REG_CHG
2
BGATE
PL102
BAT
HCB2012KF-121T50_0805
1
ADIN 1 2 PR122 300K_0402_1%
47K_0402_1% 25 EC_SMB_CLK1
PJP101 EMC@
CVILU_CI4205M1HR0-NH ADIN_1
ME@ PL103 PR123
PF102 HCB2012KF-121T50_0805 1 2
BATT+
2
1 1 2 ADIN_F 1 2
1 2 25 EC_SMB_DAT1
10_0402_5% CHRG_GND
2 3 F1206HI7000V024TM EMC@
7 3 4 Try to delete
G2 4
1
6 5 PC127 715_SRN
2.2_0805_5%
G1 5
1
0.1U_0201_25V6-K
2
PC128 PC129
PR127
m
0.1U_0201_25V6-K 0.1U_0201_25V6-K
B EMC@ EMC@ B
1
J101
co
1 2
10U_0805_25V6K
1
PC130
JUMPER
@
2
CHRG_GND
x.
715_SRN
715_SRN 24
V9B+
fi
0908
na
Vi
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 PWR_NVDC Charger

Miray
DEPARTMENTEXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHERTHIS SHEETNOR THE INFORMATION IT CONTAINS D 1.0
5 4 3 2 1
5 4 3 2 1
V9B+
2
PJ201
1
2A +3V_VIN +3VBS 1
PC201
2
2 1
1
0.1U_0603_25V7-M
1M_0402_5%
10U_0805_16V6-K
10U_0805_16V6-K
0.1U_0201_25V6-K
1
1
JUMP_43X79
PC202
PR201
+3VALW
PC203
PC204
@
1
21
2
GND4 PL201 PJ202
IN5
IN3
IN2
IN1
BS
+3VLX 6 20 +3VLX 1 2 +3VALW_P 2 1
LX LX3 1.5UH_PCMB061H-1R5MS_6.5A_20% 2 1
EMC@
7 19
5A
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
GND1 LX2
+3VLP
JUMP_43X79
1
8 18
100mA
GND2 GND3
1
D D
PR202
PC205
PC206
PC207
PC208
+3V_PWRGD @
9 17 4.7_0603_5%
2
PG LDO EMC_NS@
10 16
NC1 NC3
4.7U_0603_6.3V6K
2
1
OUT
NC2
EN2
EN1
PU201
PC209
FF
1+3V_SN
SY8286BRAC_QFN20_3X3 +3VALW_P
2
+3VALW_P 24
+3VALW
11
12
13
+3VALW_P 14
15
+3V_VIN PC210
@ 680P_0402_50V7K
PR203 1 2 0_0402_5% +3VALW_EN EMC_NS@
2
25,35 EC_ON 0908
PC211
PC212
1
0.1U_0201_25V6-K PR204 PR205
1M_0402_5% +3VALW_FB 1 2 1 2
@
2
1000P_0402_25V7-K 1K_0402_1%
+3VL
2
+3VLP
PJ203
2 1
2 1
JUMP_43X39
C C
+3VALW
2
PR206
100K_0402_5%
PR207 @
+3V_PWRGD 1 2
5A
1
V9B+ 0_0402_5% @
PR208
PJ204 PU202 +5V_PWRGD 1 2
2 1 +5V_VIN 5 9 PC213
2 1 4 IN1 PG 1 +5VBS 1 2 0_0402_5% @
3 IN2 BS
+5VALW
10U_0805_16V6-K
10U_0805_16V6-K
0.1U_0201_25V6-K
2 IN3
1
JUMP_43X79 EMC@ PR209 0.1U_0603_25V7-M

PC214
6A
IN4
SY8286CRAC_QFN20_3X3
1M_0402_5% 6
PC215
PC216
7 LX1 19 PL202 PJ205

@
2
8 GND1 LX2 20 +5VLX 1 2 +5VALW_P 2 1

18 GND2 LX3 2 1
2
21 GND3 @ 1.5UH_PCMB061H-1R5MS_6.5A_20%
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
PR210 GND4 14 +5VALW_OUT1 2+5VALW_P JUMP_43X79
OUT
1
EC_ON +5VALW_EN
+5VLP
1 2 12 PR214 0_0402_5% PR211
0_0402_5% +5V_VIN 11 EN1 13 +5VFB 4.7_0603_5%
PC217
PC218
PC219
PC220
PC221
PC222
@
m
100mA
EN2 FF EMC_NS@
@
2
15
10 LDO
co
2
@ +5VALWVCC 16 NC1 17
PR221 1 2 0_0402_5% NC2 VCC
1M_0402_5%
+5V_SN
4.7U_0603_6.3V6K
1
25 EC_ON_5V PC223
PC226
2+5VALWVCC
1
1
0.1U_0201_25V6-K PR213
PR212
+5VFB 1 2 1 2
PC224
@
x.
2
1
PC225 1000P_0402_25V7-K 1K_0402_1%
1U_0603_25V6M
2
680P_0402_50V7K
B B
PC227 EMC_NS@
2
1
fi
+5VALW_P
+5VALW_P 24
+5VALW
na
0908
Vi
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 3VALWP/5VALWP

Miray
5 4 3 2 1
A B C D
@
PR301 1 2 0_0402_5% +CPU_VCCIO_EN
12,25 EC_SUS_VCCP
PC301
1
0.1U_0201_25V6-K PJ303
1 2
@ +3VALW
2
JUMPER
@
VCCIO_GND
+CPU_VCCIO
3A
6
7
C1
C0
LP#
EN
2 MODE
V9B+
1 PGND PL301 PJ301 1
NB682GD-Z_QFN13_2X3 8 +CPU_VCCIO_LX 1 2 +CPU_VCCIO_P 2 1

2A
PJ302 SW 1UH_PH041H-1R0MS_3.8A_20% 2 1
2 1 +CPU_VCCIO_IN 1
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
2 1 VIN 9 JUMP_43X79
10U_0805_16V6-K
10U_0805_16V6-K
0.1U_0603_25V7-M
AGND
BST
1
VOUT
PR302 @
0.1U_0201_25V6-K
PR303
3V3
1
1
JUMP_43X39
PG
EMC@ 4.7_0603_5%
PC303
PC304
PC305
PC302
PC306
PC307
PC308
PC309
@ PU301 VCCIO_BS 1 2 EMC_NS@
2
2
13
12
11
10
+3VALW 0_0603_5% @
2
+3VALW
VCCIO_SN
2
PR304
PR305
VCCIO_3V3
100K_0402_5%
1 2
1
PC310
5.1_0603_5% 680P_0402_50V7K
1
25 VCCIO_PWRGD
EMC_NS@
2
1
PC311 PR306
4.7U_0603_6.3V6K CPU_VCCIO_SENSE_R 1 2
2
5.1_0603_5%
VCCIO_GND PR307 1 2 0_0402_5%

CPU_VCCIO_SENSE 12
VCCIO_GND PR308 1 2 0_0402_5%

CPU_VSSIO_SENSE 12
+CPU_VCCPRIM_P
+3VALW
2
PR309
5.1_0603_5%
PR310
4.7U_0603_6.3V6K
1 2
1
5.1_0603_5%
PC312
1
+3VALW
VCCPRIM_SENSE_R
VCCPRIM_3V3
2
2
PR311
2
100K_0402_5% 2
@ VCCPRIM_GND
V9B+
1
PR312
1 2
PJ304
2A 0_0603_5%
VCCPRIM_BS
0.1U_0603_25V7-M
2 1 +CPU_VCCPRIM_IN @
1.1A
2 1 PU302
12
11
13
10
+CPU_VCCPRIM
PC316
10U_0805_16V6-K
10U_0805_16V6-K
0.1U_0201_25V6-K
1
JUMP_43X39 EMC@ 9
PC313
PC314
PC315
VOUT
3V3
PG
AGND
1 BST
1
VIN PL302 PJ305
@
2
8 +CPU_VCCPRIM_LX 1 2 +CPU_VCCPRIM_P 2 1
NB682GD-Z_QFN13_2X3 SW 1UH_PH041H-1R0MS_3.8A_20% 2 1
2
+3VALW PGND 7 JUMP_43X79
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
MODE
1
PR313
1
LP#
EN
4.7_0603_5%
C1
C0
@
EMC_NS@
PC317
PC318
PC319
PC320
2
PR314
2
3
6
100K_0402_5%
2
VCCPRIM_SN
@
1 2 VID1_R
1
13 VID1 PR315 0_0402_5%

+3VALW
@
1 2 VID0_R
1
13 VID0 PR316 0_0402_5% PC321
680P_0402_50V7K
EMC_NS@
2
2
PR318
VCCPRIM_SENSE_R PR317 1 20_0402_5%
100K_0402_5%
CPU_VCCPRIM_SENSE 13
VCCPRIM_GND PR319 1 20_0402_5%

1
PJ306 CPU_VSSPRIM_SENSE 13
+3VALW
1 2
@
EC_ON_1.8V 1 2 +CPU_VCCPRIM_EN JUMPER
PR320 0_0402_5%
@
PC322
1
0.1U_0201_25V6-K VCCPRIM_GND
@
2
m
3 3
co
x.
V9B+
PU303 PC323
3.27A
PR321
+1.0VALW
PJ307 0.1U_0603_25V7-M
2 1 +1.0VALW _IN 4 6 +1.0VALW _BS 1 2 1 2
fi
2 1 IN BS 0_0603_5%
0.1U_0201_25V6-K
@ PL303 PJ308
10U_0805_16V6-K
10U_0805_16V6-K
1
JUMP_43X39 EMC@ +1.0VALW _EN 2 5 +1.0VALW _LX 1 2 +1.0VALW _P 2 1

PC324
EN LX 2 1
1
@ 1UH_PH041H-1R0MS_3.8A_20%
PC325
PC330
2
3 1 JUMP_43X79
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
2
GND FB
1
PR322
1
1
4.7_0603_5% @
na
SY8104ADC_TSOT23-6 EMC_NS@
PC326
PC327
PC328
PC329
@
2
2
1 2
2
25,35 EC_ON_1.8V PR323 0_0402_5%

+1.0VALW_SN
PR325
1M_0402_5%
1
90.9K_0402_1%
0.1U_0201_25V6-K
1
PC332
PR324
PC331
+1.0VALW _P
1
220P_0402_50V7K +1.0VALW _P 24
Vi
+1.0VALW
1
PC333
2
680P_0402_50V7K
2
EMC_NS@
2
0908
+1.0VALW _FB
1
PR326
4
133K_0402_1% 4
2
Issued Date 2015/11/09 Deciphered Date 2015/11/09 1.35VS/+0.675VS

Miray
DEPARTMENTEXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHERTHIS SHEETNOR THE INFORMATION IT CONTAINS D 1.0
A B C D
A B C D
V9B+
@ 2A
PJ401
2 1 +1.2V_IN
2 1
10U_0805_16V6-K
10U_0805_16V6-K
0.1U_0201_25V6-K
1
1
JUMP_43X79 EMC@
PC401
6A
PC402
PC403
2
2
PC404
PU401 PR401
0.1U_0603_25V7-M PL401
1 10 BST_1.2V 1 2 2 1 0.68UH_PCMB061H-R68MS_9A_20%
VIN BST 0_0603_5% @ PJ402
+DDR_1.2V
PR402 9 LX_1.2V 1 2 1.2V_P 2 1
1
6 CPU_DRAMPG_CNTL 1 2 S3_1.2V 16 SW 2 1 1
@ EN1
NB686GQ-Z_QFN16_3X3
0_0402_5% @ 25,28 EC_SYSON 1 2 S5_1.2V 15 13 1.2V_FB @ 220P_0402_50V7K JUMP_43X79
1A
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
PR403 0_0402_5% EN2 FB 2 1 2 1 @
1
25 DDR_PWRGD 1M_0402_5% @ PC405
PC406
PC407
PC408
PC409
EMC_NS@
2.2_0805_5%
2 1 DDR_PWRGD 12 6 1.2V_P PR407
PR406
PG VDDQ +0.6VSP
2
@ PC410 PR405 100K_0402_1%
2
PC411 @ 0.1U_0201_25V6-K DDR_3V3 3
3V3
1
0.1U_0201_25V6-K 5
2
VTT
1
499_0402_1%
1U_0603_25V6M
4
1.2V_SN
@
PR408
2
AGND
2
8 PR410
4.7_0402_5%
2 VTTS
PR409
PC412
102K_0402_1%
+3VALW
PGND 7 VTTREF
1200P_0402_50V7-K
2
2
VTTREF
22U_0603_6.3V6-M
1
Mode 14 11
EMC_NS@
1
1
MODE OTW#
PC414
PC413
1.2V_FB PJ404
1U_0402_6.3V6K
2
2
PJ403 1.2V_GND PR411 2 1
+0.6VSP +DDR_0.6VS
2
2 1
1
1 2
PC415
0_0402_5%
1
JUMPER @ PR412 JUMP_43X79
2
@ 100K_0402_1% @
1
1.2V_GND
1.2V_GND 1.2V_GND
2
1.2V_GND
1.2V_P
+DDR_1.2V 1.2V_P 24
2 2
0908
+5VALW
TP Pin connect to GND 600mA

+1.8VALW
1
PC417
1U_0402_6.3V6K
600mA 2
PU402
PJ405 6 PJ406
VPP
+3VALW 2 1 1.8VALW_VIN 5 3 +1.8VALW_P 2 1
2 1 9 VIN VO1 4 2 1
TP VO2
JUMP_43X39 8 @ JUMP_43X39
VEN
1
1.8VALW_FB
m
@ 7 2 PC418 @
POK ADJ
1
PC416 PR415 220P_0402_50V7K
GND
22U_0603_6.3V6-M
4.7U_0603_6.3V6K 30K_0402_1%
1
co
G971MF11U_SO8
2
PC419
1
2
1
PR413
x. 100K_0402_5%
1
@ PR419
PR416 @ 23.7K_0402_1%
2
2 1 1.8VALW_EN
25,33 EC_ON
3 3
0_0402_5% +3VALW
2
fi
PR417
1
2 1 PC422
25,34 EC_ON_1.8V
0.1U_0201_25V6-K
0_0402_5%
2
@
na
Vi
4 4
Issued Date 2015/11/09 Deciphered Date 2015/11/09 1.2VS/+0.6VS

Miray
A B C D
5 4 3 2 1
+VCCST
+5VS +5VS V9B+
1
PR501 PR502
2.2_0603_5% 2.2_0603_5%
1
PC501
1K_0402_1%
45.3_0402_1%
1
1
PR503
1U_0402_10V6-K
75_0402_1%
100_0402_1%
@
PR504
PR505
PR506
2
2
D D
2.2U_0603_10V7K
2.2U_0603_10V7K
2
2
2
32 PSYS_CPU
PC502
PC503
1
VR_VRMP
1
VR_PVCC
PC504
VR_VCC
0.01U_0402_25V7K
PR510
2
10_0402_1%
CPU_SVID_DAT_R 2 1
CPU_SVID_DAT 11
20K_0402_1% PU501 NCP81206MNTXG_QFN52_6X6 PR512
18
13
12
1 PR511 2 50 36 CPU_SVID_DAT_R 0_0402_5%
PSYS SDIO 38 CPU_SVID_CLK_R CPU_SVID_ALRT#_R 2 1
PVCC
VCC
VRMP
PR518 SCLK 37 CPU_SVID_ALRT#_R CPU_SVID_ALRT# 11
PR513
2 1 VR_EN 41 ALERT# 49.9_0402_1%
25 EC_VR_EN EN CPU_SVID_CLK_R 2 1
39 CPU_SVID_CLK 11
0_0402_5% @
DRON DRON 37
42
25 VR_CPU_PWROK VR_RDY
35
25,32 VR_HOT# VRHOT# PR514 PC505
26 Vcore_BST 1 2 1 2
VCORE PORTION
BST3 23.2K_0402_1%
2.7K_0402_1% 1500P_0402_50V7-K 2.2_0603_5% 0.22U_0603_16V7K 1 PR519 2 SW3
1 PR520 2 2 1 PC506 Vcore_COMP 30 25
COMP_1a HG3 HG3 37
15.8K_0402_1%
1 2 2 PR515 1Vcore_ILIM 31 PH501
22K_0402_1%
PC507 15P_0402_50V8J 1 2 ILIM_1a 24 1 PR516 2 2 1
SW3 SW3 37 +CPU_CORE_P 24,37
2.21K_0402_1% 1000P_0402_50V7K PC511
1 PR521 2 Vcore_VSP 28 100K_0402_1%_TSM0B104F4251RZ
11 CPU_VCC_SENSE VSP_1a
1 2 1 2 23
LG3/ICCMAX_1b LG3 37 1 2
PC509 PR522 PC508 1000P_0402_50V7K 1K_0402_1% 7.87K_0402_1%
2
1000P_0402_50V7K 2.21K_0402_1% 1 PR517 2 Vcore_VSN 29 1 PR523 2 PC510 2200P_0402_50V7K

470P_0402_50V7K VSN_1a
1 2 2 1 Vcore_IOUT 34 33 Vcore_CSP 1 2
11 CPU_VSS_SENSE
1
330P_0402_50V7K PC512 PC513 IOUT_1a CSP_1a PC514 1500P_0402_50V7-K

2 PR524 1 27 32
40.2K_0402_1% TSENSE_1ph CSN_1a
C C
Vcore_TSENSE
VCCGT PORTION 7 GT_CSSUM
130K_0402_1%
1 PR526 2 SW1
CSSUM_2ph
1
PR525
0_0402_5% 6 GT_CSCOMP PR527 1 2 75K_0402_1% 1 2 PR528
CSCOMP_2ph
MOSFET
470P_0402_50V7K 143K_0402_1%
100K_0402_1%_TSM0B104F4251RZ
@ 2 1 PC515 1 2
PH502 1 2 PC516
2
2 PR529 1 GT_IOUT 1 220K_0402_5%_ERTJ0EV224J 330P_0402_50V7K

30.9K_0402_1% IOUT_2ph 5 GT_ILIM 2 1 1 2 +CPU_VCCGT
ILIM_2ph
1
88.7K_0402_1% PR530 15.8K_0402_1% PC517 330P_0402_50V7K @

12.4K_0402_1%
.1U_0402_10V6-K
1
1 PR532 2 8 GT_CSREF 1 2
Place close to
PH503
PR531
PC518
CSREF_2ph
GT_DIFFOUT 2 14 GT_BST 1 2 PR533
0.22U_0603_16V7K
2
470P_0402_50V7K 2200P_0402_50V7K DIFFOUT_2ph/ICCMAX_2ph BST1 PR534 2.2_0603_5% 10_0402_1%
0.01U_0402_25V7K
2
1 PR535 2 1 2 1 PR536 2 1 2 GT_COMP 4
PC522
49.9_0402_1% PC519 13.7K_0402_1% PC520 COMP_2ph 15
PC523
HG1 HG1 37
1
1 2 1 2
PR537 PC521 10P_0402_50V8J
1
1K_0402_1% GT_FB 3 16 PC524
SW1 37
2
FB_2ph SW1
0.047U_0402_16V7K
2
17
LG1/ROSC LG1 37
PR539
m
PR538
2 1
1 2 GT_VSP 51 14K_0402_1%
11 CPU_VCCGT_SENSE VSP_2ph 10 GT_CSP1 1 2 SW1
co
0_0402_5% 1K_0402_1% CSP1_2ph PR540
2
PC525 1 PR541 2 GT_VSN 52 PR542 1.2K_0402_1%

1000P_0402_50V7K VSN_2ph 9 GT_CSP2 1 2
1 2 CSP2_2ph +5VS
11 CPU_VSSGT_SENSE
1
PC526 2200P_0402_50V7K 22 0_0402_5% @

BST2
x. GT_TSENSE 11 21
B TSENSE_2ph HG2 B
20 PR544
fi
1.5K_0402_1% 0.015U_0402_25V7-K SW2 51.1K_0402_1%
1 PR543 2 2 1 PC527 SA_COMP 47 40 1 2
COMP_1b PWM/ADDR_VBOOT 26.1K_0402_1%
1
PC528
2
15P_0402_50V8J
10.7K_0402_1%
2 PR546 1 SA_ILIM 46
VCCSA PORTION 1 PR545 2
VCCSA_Phase 37
ILIM_1b PWM 37
1
PR547
na
PH504
0_0402_5% 1 2 22K_0402_1%
1000P_0402_50V7K PC529 1 PR548 2 2 1
+CPU_VCCSA_P 24,37
100K_0402_1%_TSM0B104F4251RZ
@ 825_0402_1% 11K_0402_1%
1 PR549 2 SA_VSP 49 19 Vcore_ICCMAX 1 PR550 2 100K_0402_1%_TSM0B104F4251RZ
12 CPU_VCCSA_SENSE
2
VSP_1b LG2/ICCMAX_1a
Vi
2 PR552 1 1 2 1K_0402_1% 1 2
1
PC530 825_0402_1% PC531 1000P_0402_50V7K 1 PR553 2 SA_VSN 48 PC532 1000P_0402_50V7K

12.4K_0402_1%
.1U_0402_10V6-K
VSN_1b
1
44 SA_CSP 1 2
PH505
PR551
PC533
1000P_0402_50V7K CSP_1b
IOUT_1b
1 2 PC534 560P_0402_50V7-K
12 CPU_VSSSA_SENSE
1
EPAD
330P_0402_50V7K PC535 45
2
CSN_1b
2
43
53
SA_Iout
1
1
470P_0402_50V7K PR554
PC536 30.9K_0402_1%
2
2
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 PWR_CPU_CORE

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL Size Document Number Rev
Miray
5 4 3 2 1
5 4 3 2 1
+CPU_CORE
change from B2 size to B3 for H-Z limitation on 7/15
PJ601
V9B+
CPU_VIN 2 1
TDC=12A
2 1
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
Imax=24A
1 JUMP_43X79
10U_0805_16V6-K
10U_0805_16V6-K
0.1U_0402_25V7-K
1
1
@
PC682
PC606
PC607
PC608
PC609
PC610
PC611
PC612
PC613
PC614
PC615
47U_B3_10VM_R45M
LL=4.7mohm
EMC@ +
PC601
PC602
PC603
+CPU_CORE
PC604
2
2
OCP=37A
@
PQ601 2 @ @
2
1
36 HG3
@
D PL601 D
PJ604
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
7 1 2 +CPU_CORE_P 2 1
2 1
1
PC616
PC617
PC618
PC619
PC620
PC621
PC622
PC623
PC624
PC625
PC671
6 0.15UH_CMME061H-R15MS_23A_20%
1 JUMP_43X118
36 LG3
1
PR601
2
4.7_0603_5% + PC684 @ @
EMC_NS@ 220U_B15G_2.5VM_R30M @ @ @ @
AON6996_DFN8-7
2 @
3
4
5
2
CPU_SN
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
1
PC678
PC680
PC681
PC683
PC679
36 SW3
1
PC626
1200P_0402_50V7-K
2
EMC_NS@
2
+CPU_CORE_P
+CPU_CORE +CPU_CORE_P 24,36
0908
NC PC609,PC671,PC623,PC618,PC625 for DFC
11/5: NC PC617,PC622,PC615 for cost down
PR602 PC627
1 2 1 2
TDC=4A
Imax=4.1A
PJ602
V9B+
2.2_0603_5% 0.22U_0603_16V7K VCCSA_IN 2 1
2 1
JUMP_43X39 LL=14mohm
OCP=10A
VCCSA_BST
<BOM Structure>
10U_0805_16V6-K
10U_0805_16V6-K
0.1U_0402_25V7-K
5
1
2.2_0603_5% PU601 PQ602
PC628
PC629
PC630
PR603 1 AON7408L_DFN8-5
2
1 2 +VCCSA_VCC 4 BST
C
+5VS VCC 8 VCCSA_HG 4
C
@ EMC@
+CPU_VCCSA
1 2 VCCSA_PWM 2 DRVH
36 PWM PR604 0_0402_5% PWM 7 VCCSA_Phase
1U_0402_10V6K
1 2 VCCSA_EN 3 SW PL602
36 DRON EN
1
10_0402_5% PR605 5 VCCSA_LG 0.47UH_PCMB041B-R47MS_6A_20% PJ605

PC631
9 DRVL 1 2 2 1
1
2
3
FLAG 6 2 1
2
GND JUMP_43X79
NCP81253MNTBG_DFN8_2X2 @
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
5
1
PR606
PC632
PC633
PC634
PC635
PC636
PC637
PC638
PC639
PC672
PC673
4.7_0603_5%
EMC_NS@
2
4
@ @ @ @
2
PQ604
VCCSA_SN
+CPU_VCCSA_P 24,36
AON7408L_DFN8-5
NC PC632 for DFC
1
2
3
11/5: NC PC633,PC635,PC673 for cost down
1
PC640
1200P_0402_50V7-K
VCCSA_Phase 36
EMC_NS@
2
m
+CPU_VCCSA_P
co
+CPU_VCCSA
0908
x.
B
PJ603 +CPU_VCCGT B
V9B+
GT_VIN 2 1
2 1
fi
1 JUMP_43X79
@
TDC=11A
47U_B3_10VM_R45M
+
10U_0805_16V6-K
10U_0805_16V6-K
0.1U_0402_25V7-K
1
Imax=24A
PC605
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
PC647
PC648
PC649
1
2
LL=4.2mohm
PC641
PC642
PC643
PC644
PC645
PC646
PC650
PC651
PC652
PC653
PC654
PC655
PC656
na
2
PQ603
OCP=37A
EMC@
2
+CPU_VCCGT
2
1
36 HG1
@
PL603
Vi
7 1 2
0.15UH_CMME061H-R15MS_23A_20%
6 1
36 LG1
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
1
PR607 + PC685
1
4.7_0603_5%
PC657
PC658
PC659
PC660
PC661
PC662
PC663
PC664
PC665
PC666
PC667
PC668
220U_B15G_2.5VM_R30M
AON6996_DFN8-7 EMC_NS@
2 @
3
4
5
2
2
@ @ @
VCCGT_SN
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
22U_0603_6.3V6-M
NC PC654,PC657,PC660,PC675,PC676 for DFC
1
PC670
36 SW1
1
1200P_0402_50V7-K
11/5: NC PC661,PC669 for cost down
PC669
PC674
PC675
PC677
PC676
EMC_NS@
2
2
@
@ @
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 PWR_CPU_Core

Miray
5 4 3 2 1
5 4 3 2 1
D D
C C
m
co
x.
B B
fi
na
Vi
A A
Issued Date 2015/11/09 Deciphered Date 2015/11/09 IMVP8

Miray
5 4 3 2 1

Lenovo Yoga 710-11ISK - LCFC Miray NM-A771 Rev 1.0

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Lenovo Yoga 710-11ISK - LCFC Miray NM-A771 Rev 1.0

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A B C D E

INTEL SKYLAKE Mobile ULT Platform

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/09 Deciphered Date 2015/11/09 Cover Page

LCFC-Miary Block diagram

Micro HDMI Conn. DDI-Port1

eDP-Port[0:1] USB 2.0-Port1

SATA Gen3 Port 1

PCIe Port3 20*16.5*0.91 I2C-Port1 Touch Screen

I2C SMBUS Sub-board

(ECIT8586_VFBGA128) Audio SUB

ALS Charger Sensor+DMIC_R SUB

Sensor SUB Int.KB LID PAD DMIC_L SUB

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/09 Deciphered Date 2015/11/09 Block Diagram

State +5VLP +CPU_VCCPRIM +CPU_VCCGT

S0 O O O O O BOM Configuration Table

Full ON HIGH HIGH HIGH ON ON ON ON ON

S1(Power On Suspend) LOW HIGH HIGH ON ON ON ON LOW X76&VGA Configuration Table

DS3 (Suspend to RAM) LOW LOW HIGH ON LOW ON OFF OFF

S4 (Suspend to Disk) LOW LOW LOW ON ON OFF OFF OFF

S5 (Soft OFF) LOW LOW LOW ON ON OFF OFF OFF

EC_SMB_DAT3 +3VS +3VS +3VS

EC_SMB_DAT0 +3VS +3VS

EC_SMB_CLK4 PCH V PCB

Thermal Sensor 1001_100xb

EC0 5--8 Reserve PCIE SSD 9

Issued Date 2015/11/09 Deciphered Date 2015/11/09 Notes List

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (DDI,EDP)

RC155 1 2 49.9_0402_1% BN17

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (XDP,JATG)

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (DDR)

PCH_SPI_CS0# RC64 1 2 0_0402_5% SPI_CS0#

RC61 RC60 V7 LPC BG10 LPC_AD1 24,25

B12 CL_DATA BJ10 CLKOUT0 RC173 1 2 22_0402_5%

for signal SMB_ALERT#:

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (RTC&AUDIO&SATA&SMBUS)

1 2 10K_0402_5% AC_PRESENT 11 OF 20 TP71

CC101 1000P_0402_50V7K VCCST_PWRGD 1 2 0_0402_5% 1K_0402_5% RC66

0_0402_5% RC1491 BAT54CW_SOT323-3 45.3K_0402_1%

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (Clock,PM)

The signal has a weak internal pull-down. +3VALW_PCH

0 = Disable ¡°No Reboot¡± mode. (Default)

1 = enable boot to LPC,

21 PCIE_PRX_DTX_N3 C22 C18 10K_0804_8P4R_5%

20 SATA_PRX_DTX_N1 B25 AM3

RPC29 GPP_C19/I2C1_SCL BF11

PCH_I2C_SDA2 GPP_A18/ISH_GP0 ISH_GP0 27

AT7 GPP_F6/I2C3_SDA GPP_A22/ISH_GP4 BD4 THS_IRQ PCH_THS_RST# 27

PCH_I2C_SCL1 PM_I2C_SCL1 BJ4

RPC38 RPC24 RC160 0_0402_5%

PCH_I2C_SCL2 1 6 PCH_I2C_SCL0 RC2533 1 2 0_0402_5% EC_I2C_CLK4

@ TC142 1 CPU_CFG0 G52 BL64

G32 CSI2_DN3 CSI2_CLKN3 B39 100_0402_1%

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (OTHER)

+CPU_CORE +CPU_VCCGT +CPU_VCCGT

Security Classification LC Future Center Secret Data Title

Issued Date 2015/11/09 Deciphered Date 2015/11/09 MCP (Power)

PCIe Port3 2016.50.91 I2C-Port1 Touch Screen