IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 7, NO.
3, JULY 1992
Switching Frequency Optimal PWM Control of a
Three-Level Inverter
Jurgen K. Steinke, Member, IEEE
Abstract-A pulse-width modulation (PWM) method for the
control of a three-level inverter is described. Switching fre-
quency optimal-PWM method (SFO-PWM) works with a con-
stant carrier frequency not synchronized with fundamental
stator frequency. SFO-PWM gives an optimal utilization of
mean thyristor switching frequency permitted, therefore PWM
carrier frequency may be chosen to a value of two times the
permitted mean thyristor switching frequency. The signal pro-
cessing structure is simple. Many applications of three-level-
inverters work with a dc-link neutral point not stabilized from
the power input converter. A neutral-point potential control is
described, which is capable of stabilizing potential by varying
the switching sequences of the three-level inverter itself. Re-
sults from computer simulation and practical experience show
the good performance of SFO-PWM.
I. INTRODUCTION
T HE most common method for controlling output volt-
ages of a voltage source inverter is pulse-width mod-
ulation (PWM). Usually the total stator frequency range
is not covered by only one PWM method. At low stator
frequencies, a free-running PWM with constant sampling
frequency is applied. In the middle frequency range and,
depending on permitted mean thyristor switching fre-
quency, up to high stator frequencies, synchronized PWM
is used. At very high stator frequencies, full block wave-
forms are applied. Nabae et al. [ l ] reported about syn-
chronized PWM for three-level inverter control: This pa-
per presents a simple online calculation scheme for free-
running PWM pulse patterns for this inverter type. Be-
cause of achieving the highest sampling frequency pos-
sible without overloading the inverter, the presented
method is called Switching Frequency Optimal PWM
control (SFO-PWM). The optimal utilization of the in-
verters switching capability results in the lowest torque
ripple achievable for a three-level inverter fed induction
machine with the inverter controlled by PWM.
Free-running PWM gives good results if sampling fre-
quency is much higher than the fundamental frequency of
the output voltage. For two-level inverters a common
method to get the pulse patterns for a free-running PWM
is to compare three time-dependent phase reference volt-
ages with a triangular carrier signal. The moment of
Manuscript received February 14, 1990; revised February 25, 1992. This
paper was presented at the 1989 European Conf. on Power Electronics and
Applications, Aachen, Germany, Oct. 9-12.
The author is with Asea Brown Boveri, ABB Drives AG, Ch-5300 Turgi,
Switzerland.
IEEE Log Number 9200722.
0885-8993/92$03.00 0 1992 IEEE
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487
equality of a phase reference voltage and the carrier signal
is the phase switching instant (Fig. 1). The sample period
Tspmay be defined as the time interval between two suc-
cessive peak values (a positive and a negative one) of the
carrier signal. The mean values of phase output and phase
reference voltage taken over one sample period match only
then, when the amplitude of the carrier signal is equal to
that value of phase reference voltage, which represents
half of the dc-link voltage.
In a free-running PWM the carrier signal has a constant
frequency not synchronized with fundamental stator fre-
quency. Mean thyristor switching frequency is constant
in this case. Working with a conventional two-level in-
verter, carrier frequency fc may be chosen to be equal to
maximum thyristor switching frequency fTmax permitted.
Within each period T, of camer signal each thyristor of
the inverter is switched on and off once. The phase output
voltage is switched from + to - within a sample period
with positive slope of carrier signal and switched from -
+
to within a sample period with negative slope of carrier
signal.
FREQUENCY
11. SWITCHING OPTIMALPWM METHOD
A. Fundamental Principles of SFO-PWM
Working with a three-level inverter there are two
thyristor pairs within each phase of the inverter (Fig. 2):
T l / T 3 and T2/T4. The simplest approach for control-
ling the three-level inverter is to apply the same control
as for a two-level inverter. This would lead to switching
both thyristor pairs within each sample period. The carrier
frequency has to be chosen equal to permitted thyristor
switching frequency and the amplitude of the carrier sig-
nal has to be equal to half dc-link voltage 2E ( Vd = 4 E ) .
In this paper, a PWM control method called switching
frequency optimal PWM (SFO-PWM) is described. By
using two carrier signals for modulation (Fig. 3), only one
thyristor pair of each phase of the inverter is switched per
sample period. The mean switching load of the thyristor
pairs is balanced. Therefore, the mean thyristor switching
frequency in SFO-PWM is only one half of carrier fre-
quency. Carrier frequency may be set to f, = 2fTmax.
Looking at phase b of the inverter, for exampIe, the
output voltage VbM of the phase may be switched from
0 to +2E or +2E to 0 by switching the thyristor pair
(T1 /T3)b. When thyristor pair (T2/T4), is switched, the
phase output voltage may be switched from 0 to -2E or
-2E to 0. If the phase reference voltage for a sample
 488 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 7, NO. 3, JULY 1992

carrier period TO
L+

T-

time

L- Lsarnple period TSP4

0 switchingfrom (T1a off/T2a on) to (T1a on/ T2a off)

0 switching from (Tla on/ T2a off) to Crla offR2a on)
Fig. 1 . Camer signal and reference voltage for two-level inverter PWM
control.

L+

L- L
Fig. 2. Circuit diagram of a three-level inverter.

~ ~ ,carrier signal
1 ~ .
Va
1 ,
I
,,
I ,
age in a steady state. Therefore the phase reference volt-
age is positive within one half of the fundamental period
and negative within the other half. This balances the mean
load of all thyristor pairs. The described simple funda-
mental idea is the basis of SFO-PWM, which has a very
simple signal processing structure. This simple structure
also makes it possible to add a neutral-point potential con-
. .. trol. With the potential control not engaged, the switching
transformation sequences within a sample period are similar to those re-
into the
interval[-Vdh.+Vd14] ceived from control methods called space-vector modu-
lation [2] or space-vector approximation [3], [4].
I I ,

B. Basic Signal Processing Structure

-Vd4 IL T s p
Fig. 3 . Carrier signals and reference voltages for three-level inverter
control.
period is positive, only thyristor pair (T1 /T3), has to be
switched. If the phase reference voltage is negative, only
pair (T2/T4), has to change its switching state within the
sample period. Therefore switching instants resulting from
comparing the positive carrier signal with the reference
voltages lead to switching of thyristor pairs (T1 /T3) while
switching instants resulting from comparison of the neg-
ative carrier signal with the reference voltages leads to
switching of thyristor pairs (T2/T4). In drive applica-
tions, the phase reference voltage is a sinusoidal ac volt-
Instead of using two carrier signals it is also possible
to work with only one carrier with an amplitude of a
quarter of dc-link voltage ( E = Vd/4). This is achieved
by subtracting E from the positive carrier and the positive
reference voltages and adding E to the negative camer
and the negative reference voltages (Fig. 3). Fig. 4 shows
the basic structure of SFO-PWM. The first main block is
“sign identification and shift” block. In an initial step,
sign of each phase reference voltage is determined. Three
sign signals are sent to the second main block “phase out-
put signal control.” If, for example, the sign of i?b is pos-
itive, the phase output signal control sets thyristor pair
(T1/T3)b to the constant state (Tlb off, T3bon) and con-
nects thyristor pair (T2/T4)b to the output Tb of the pulse-
width modulator. If the sign is negative, thyristor pair
(T2/T4)b is switched to the constant switching state (T2b

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STEINKE: SWITCHING FREQUENCY OPTIMAL PWM CONTROL
identifica- PWM
tion and
shift
Fig. 4. Basic SFO-PWM structure
on, T4b off) and thyristor pair (Tl/T3)b is connected to
the PWM Output Tb.
C. Preprocessing the Phase Reference Voltages
1) Symmetry About the Zero Axis: Phase reference
voltages from induction machine control are normally free
from a zero sequence voltage system. Often, a voltage
space vector v, represents the phase reference voltages.
v, = 2 / 3 (U,, + avbr + a'v,,); a = exp ( j 2 7 ~ / 3 ) .
v, represents the voltage space vector that leads controlled
machine values to their setpoint values within the next
sample period. Using space-vector representation of the
output voltages of a three-level inverter, Fig. 5 shows the
range of output voltages that may be covered by PWM.
If working with three phase-reference voltages instead of
a voltage space vector, it is not possible to utilize the
whole output range with the phase reference voltage sys-
tem being free from a zero sequence voltage system [ 5 ] .
The whole range may be utilized, if the zero sequence
voltage system is added to the three-phase reference volt-
ages that makes the absolute values of the maximum and
the minimum phase reference voltage equal to each other.
If the original system of phase reference voltages does not
contain a zero sequence voltage system, half of the ref-
erence voltage with the lowest absolute value within the
three has to be added to each one of them. After this trans-
formation, the condition U , max = - v, m,n is fulfilled. A
zero sequence voltage system has no influence on ma-
chine voltage because normal induction machines do not
have a neutral terminal connected to the inverter.
2) Sign Equality of the Three-phase Reference
Voltages: A premise to the fundamental idea of SFO-
PWM was the assumption that it is sufficient to take the
average of thyristor switching frequency over a complete
fundamental period. Working only with the basic struc-
ture of SFO-PWM, within one half of fundamental period
one thyristor pair switches with double mean switching
frequency, whereas during the remaining half it does not
switch at all. If the fundamental frequency is very low,
averaging over a complete fundamental period must not
be applied for evaluation of the mean thyristor switching
load. In induction machine control, low fundamental fre-
quencies cause the machine voltages to be small. Refer-
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489
liil
Fig. 5 . Output voltage operating range of a three-level inverter.
Fig. 6 . Resulting carrier signal for three-level inverter PWM control in the
low-voltage operating mode.
ence voltage space vectors are always included inside the
half voltage hexagon of the inverters output range (Fig.
5 ) . After transformation of the phase reference voltages
to U , max = - U , min, each of the phase reference voltages
is within the voltage interval [ - E * -
+ E ] . By adding
the zero sequence voltage system ( E , E , E ) , each of the
new reference voltages is now positive. Subtracting ( E ,
E , E ) from the reference voltage system leads to three
negative reference voltages. Applying basic SFO pro-
cessing, positive reference voltages lead to a constant state
of thyristor pairs (T2/T4) and negative reference volt-
ages lead to a constant state of thyristor pairs (Tl/T3).
If addition and subtraction of ( E , E , E ) alternate with
equal intervals of addition and subtraction, and if syn-
chronization with fc exists, fundamental frequency now
has no influence on the intervals of double and zero
switching frequency. The interval length of addition and
subtraction of ( E , E , E ) has to be an even multiple of a
sample period. The carrier signal has to be inverted when
changing from addition to subtraction or vice versa. These
two conditions for getting optimal results were derived in
[ 5 ] .Fig. 6 shows the resulting camer signal. Fig. 7 shows
a complete block diagram of phase reference voltage pre-
processing. Operating mode with addition or subtraction
of an ( E , E , E ) system will be called the "low-voltage
mode," whereas the operating mode without addition or
subtraction of an ( E , E , E ) voltage system will be called
the "normal mode."
 490 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 7, NO. 3, JULY 1992

transformation
three phase
reference

operating
operating range
determination

Fig. 7. Block diagram of a phase reference voltage preprocessing unit.

I l l ’ -
A I I I I

-
Fig. 8. Block diagram of the simulated drive system

111. RESULTSFROM COMPUTER

SIMULATION TABLE I
IMPORTANT PARAMETERS OF INVERTER AND MOTOROF THE
pI Complete system consisting of a machine control, SIMULATED DRIVESYSTEM
SFOnPWM, three-level inverter and a squirrel cage in- Inverter
duption motor was simulated (Fig. 8). The parameters of
fit inverter and induction machine were taken from the Cd = 13.8 mF dc-link capacity
Vd = 3500 V nominal dc-link voltage
ppv locomotive Re 4/4 Serie 460 for “Bahn 2000”-
fT = 200 Hz GTO switching frequency
project of the Switzerland railways (SBB) (see Table I).
Motor
The machine control applied was described in [ 5 ] . The
b p i 9 structure was derived from direct self-control [ 6 ] - VN = 2640 v nominal voltage
[I$], Total stator flux linkage and torque are calculated 1, = 315 A nominal current
from measured values of machine currents and speed. PN = 1200 kW nominal power
f s N = 54 Hz nominal stator frequency
Machine voltages are derived from dc-link voltages u d l nN = 1595 rpm nominal speed
and trd2 and the actual switching state of the inverter. Ma- TN = 7180 Nm nominal shaft torque
chine control calculates the reference voltage space vec- T, = 25860 Nm breakdown torque
tor that leads torque and stator flux to their setpoint val- U = 5.9% leakage factor
p = 2 number of pole pairs
ups within the next sample period. Figs. 9-12 show the
performance of the simulated system. Carrier frequency
yas get to 400 Hz (T, = 2.5 ms, Tsp= 1.25 ms). In Fig.
of torque operation changes from operation with the ( E ,
9 pimulated curves at steady-state operation withp n =
E , E ) shift to operation without the shift. Fig. 12 shows
Or2fsNand T = OST, are shown. The switching state sig- the dynamic performance at p n = 0.75fN. Torque
nals of phase thyristors (Fig. 9(d)) indicate operation with
changes are also very rapid.
alternating addition or subtraction of the ( E , E , E ) sys-
tem, In Fig. 10 simulated curves at steady-state operation
withp * n = 0.75fNand T = 0.5TB are shown. Switching IV. CONTROL
OF DC-LINKNEUTRAL-POINT
THE

st#@ signals of phase thyristors show normal operation POTENTIAL

without an ( E , E , E ) shift. Fig. 11 shows the dynamic Figs. 9-12 also document the variation of the neutral-
wflormance at p n = 0.2fN. During the rapid change point potential. In a steady state using SFO-PWM there

II 1

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 ~

STEINKE: SWITCHING FREQUENCY OPTIMAL PWM CONTROL 48 1

.
I .

81

-1.1
-05
-1 0

-2 0
h m r in mr

(e)
Fig. 9. Simulation results a t p . n = 0.2hN,T = 0.5TB. (a) Torque. (b)
Current of phase a. (c) Machine voltage of phase a . (d) Switching state
signals of phase a thyristor pairs. (e) Voltage difference AV, of ideal and
real dc-link neutral-point potential.

L I I

0 12,5 25 37.5
time in ms-

‘1
10

21
-2 0
timeinms

(e)
Fig. 10. Simulation results a t p . n = O.75hN, T = 0.5TB.(a) Torque. (b)
Current of phase a. (c) Machine voltage of phase a . (d) Switching state
signals of phase a thyristor pairs. (e) Voltage difference Avd of ideal and
real dc-link neutral-point potential.

ni

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 492 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. I , NO. 3, JULY 1992

05

-051

Hi

--1.5
'.OI
(e)
Fig. 11. Simulation results at p . n = 0.2f+,, T +0.5TB + -0.5TB +

+0.5TB. (a) Torque. (b) Current of phase a. (c) Machine voltage of phase
a. (d) Switching state signals of phase a thyristor pairs. (e) Voltage differ-
ence AV, of ideal and real dc-link neutral-point potential.

i!; t l m e i n mr

-a 5 !

I
o 12,5 25 37.5 50 62,5
l i m e inrns-
(d)

(e)
Fig. 12. Simulation results a t p . n = O . 7 5 f s N , T +0.5TB+ -0.5TB -+

+0.5TB.(a) Torque. (b) Current of phase a. (c) Machine voltage of phase

a. (d) Switching state signals of phase a thyristor pairs. (e) Voltage differ-
ence Avd of ideal and real dc-link neutral-point potential.

II 1

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STEINKE: SWITCHING FREQUENCY OPTIMAL PWM CONTROL
is no mean potential deviation (Fig. 9(e) and Fig. 10(e)).
Fig. 1l(e) and Fig. 12(e) show that dynamic changes may
cause a drift of mean potential. Also, in reality the non-
ideal switching of the inverter can lead to a drifting mean
potential. Therefore, a potential control has to be estab-
lished. Because of the natural stability of neutral-point
potential this control has to work quite seldom. Potential
control for normal operating mode and low-voltage op-
erating mode differ.
A . Neutral-Point Potential Control for the Low-Voltage
Operating Mode
Within the half-voltage hexagon of the inverters' op-
erating range, SFO-PWM can operate in the low-voltage
mode (i.e., addition or subtraction of the zero sequence
voltage system (E, E , E ) to or from the phase reference
voltage system). Fig. 13 shows that changing from addi-
tion to subtraction of the ( E , E , E ) system inverts the
current flowing from the neutral point. In normal steady-
state operation, uniform intervals of addition and subtrac-
tion alternate. If a mean deviation of neutral-point poten-
tial is being built up, correction may easily be obtained
by expanding one kind of interval by two sample periods.
The choice of whether or not to expand an interval of ad-
dition or an interval of subtraction depends on the sign of
potential deviation and the sign of neutral-point current
appointed to these intervals. Fig. 13 shows operation of
potential control. In steady-state operation, potential con-
trol is not very often in action. Therefore its influence on
mean thyristor switching frequency is negligible.
B. Neutral-Point Potential Control for the Normal
Operating Mode
Fig. 10(e) shows that potential deviation consists of a
component alternating with sample frequency and another
component alternating with three times the fundamental
frequency. In steady-state operation, the component with
a frequency of three times the fundamental frequency is
dominant. In normal SFO-PWM operation, each phase
output terminal is connected to the dc-link neutral point
for a part of each sample period. Consequently, each
phase influences the neutral-point potential within one
sample period. Within each sample period the neutral-
point potential varies, but after a time interval of one third
of the fundamental period, deviation is nearly the same as
on the beginning of the interval. If within one sample pe-
riod connection time of one phase output terminal with
neutral is now omitted, a mean deviation of the potential
will result.
In normal operation, phase output voltage is modulated
either between -2E and 0 or 0 and +2E. With potential
control in action, one of the three-phase output voltages
is modulated between -2E and + 2 E with minimum con-
nection time to the neutral point. The decision of which
phase has to be switched like this is made by comparing
the sign of potential deviation and phase currents. The
phase current of the phase, chosen for control action, has
II1
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493
(a)
time inms -
(b)
Fig. 13. Simulation results a t p . n = O.Zf,,, T = 0.5TB;action of neutral-
point potential control. (a) Switching state signals of phase a thyristor pairs.
(b) Voltage difference Avd of ideal and real dc-link neutral-point potential.
I
I
0 5 10
I
15
I
20 25
t i m e in ms-
4 q n l (a)
:+/
-20
(b)
Fig. 14. Simulation results at p . n = 0.75f,,, T = 0.5TB;action of neu-
tral-point potential control. (a) Switching state signals of phase a thyristor
pairs. (b) Voltage difference Avd of ideal and real dc-link neutral-point
potential.
to increase the absolute value of neutral-point potential
deviation if the phase were connected to neutral. Fig. 14
shows simulated curves with the potential control in ac-
tion. In normal operation potential control only checks
neutral-point potential. Control is activated when a pre-
defined limit is reached. This limit must have a value
higher than the amplitude of the ac component of potential
deviation in steady-state operation. Under this condition,
influence on mean thyristor frequency is negligible.
A complete block diagram of neutral-point potential
control is shown in Fig. 15. Within the SFO control struc-
ture, it replaces the last block of the phase reference volt-
age preprocessing unit (Fig. 7). Potential control for nor-
mal operating mode uses three-phase control signals (acont,
b,,,,, cCont).Their value is 1 if no potential correction has
to be done. If correction has to take place, one of the
three-phase control signals is set to 0.5. The phase control
signals are also sent to the phase output signal control
unit. If one control signal is 0.5, the phase switching sig-
nal of the appointed phase is connected to both of its
thyristor pairs.
 494 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. I , NO. 3, JULY 1992

tor operating range wlthout (E, E,E)-shfi

Fig. 15. Block diagram of neutral-point potential control.

TABLE I1
IMPORTANT OF INVERTERAND MOTOROF THE
PARAMETERS
EXPERIMENTAL
DRIVESYSTEM

Inverter

C, = 8.25 mF dc-link capacity

Vd = 490 V nominal dc-link voltage
fT = 200 Hz GTO switching frequency
Motor

VN = 364.8 V nominal voltage

IN = 43.5 A nominal current
PN = 21.12 kW nominal power
f r N = 48 Hz nominal stator frequency
nN = 1405 rpm nominal speed
TN = 143 Nm nominal shaft torque
T, = 416 Nm breakdown torque
U = 9.406% leakage factor
p = 2 number of pole pairs

V . RESULTSFROM PRACTICAL
~XPERIENCE
SFO control was explained before by using block dia-
grams for processing of analog signals to make the prin-
ciple easy to explain. In practice, SFO control was im-
plemented on a TMS 320C25 signal processor. The
processor calculates the switching instants for a sample
period at its beginning. Using the internal timer of the
TMS 320C25, interrupts are generated at the switching
instants. Output of the control signals for the inverter is
managed by interrupt service subroutines. The control was
applied on an experimental drive system consisting of a
three-level GTO inverter, a 22-KW ac motor and a dc-
load machine. Important parameters of the experimental
drive system are shown in Table 11. Figs. 16-18 show the
curves of the machine values taken from experimental
setup. They show the real performance to be as good as
the simulated performance if one is looking at the current
and torque of the induction machine. Only the perfor-
mance of the potential control for the neutral-point is
slightly bader. The reason for this are measurement prob-
lems for potential deviation. Measured values are v d and
v d 2 . Because of potential control, the difference Avd of
Vd, and v d 2 is very small compared to v d l and vd2. There-
fore, small measurement errors of v d l or v d 2 caused by
electromagnetical disturbances lead to a relatively high
error of AVd. Nevertheless, potential control works also
very well.
The operating point for Fig. 16 w a s p n = 0.208&,
T = 0.27TB. The amplitude of the phase output voltage
v, shows operation in the half voltage hexagon of the in-
verters output voltage range (Fig. 5). The switching state
signal of this phase indicates that SFO-PWM is operating
in the low-voltage mode. The curves from Fig. 17 were
-
taken at p n = O.781AN, T = 0.27TB. The amplitude of
phase output voltage shows operation not within the half
voltage hexagon. The phase-switching state signal shows
the typical pattern for normal operating mode, i.e.,
switching of only one thyristor pair of a phase during one
half of the stator period and switching of the other thyris-
tor pair during the second half. Fig. 18, taken at p n =
0.2O8hNshows the good dynamic performance of the sys-

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 STEINKE: SWITCHING FREQUENCY OPTIMAL PWM CONTROL

150

100
so
0
-50.
time rnms -is

f
# +
0
0
-#
-5 0 125 25 325 50
llme I" ms _c

t i m e in m i

(e)
Fig. 16. Experimental results a t p . n = O.208kN,T = 0.27TB. (a) Torque.
(b) Current of phase a. (c) Machine voltage of phase a . (d) Switching state
signals of phase a thyristor pairs. (e) Voltage difference Au,, of ideal and
real dc-link neutral-point potential.

+
0

0 12.5 25 325
limeinms -50

I
05
0
-45-
-10-

(e)
Fig. 17. Experimental results a t p . n = 0.781hN, T = 0.27TB.(a) Torque.
(b) Current of phase a . (c) Machine voltage of phase a. (d) Switching state
signals of phase a thyristor pairs. (e) Voltage difference Au,, of ideal and
real dc-link neutral-point potential.

II1 I

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 496
-3/4
-4h t i
I 625
(c)
Fig. 18. Experimental results a t p . n = 0.208f,N, T +0.51TB 0.51TB
+ +0.51TB. (a) Torque. (b) Current of phase a . (c) Machine voltage of
phase a . (d) Switching state signals of phase a thyristor pairs.
tem. At the beginning with T = +0.51TB, the amplitude
of the machine phase voltage shows operation within the
half voltage hexagon of the output voltage range. The
phase-switching state signal shows that SFO-PWM is al-
ready in a normal operating mode. After the change of
torque to T = -0.51TB, the operating mode of SFO-PWM
changes to the low-voltage mode. After the following step
change of torque to T = +0.51TB, operating mode turns
back to normal mode.
VI. CONCLUSIONS
SFO-PWM is a PWM method with optimal utilization
of the thyristors’ switching frequency. Frequency of the
PWM carrier signal may be chosen to be two times the
mean thyristor switching frequency permitted. The sig-
nal-processing structure of SFO-PWM is very simple. Re-
sults from computer simulation and experimental setup
show the good performance of a drive system working
with SFO-PWM.
A very important demand on a control of a three-level
inverter is the capability of neutral-point stabilization. The
integration of a neutral-point potential control into the
signal processing structure is shown. The performance of
potential control has been evaluated by computer simu-
lations and experimental setup.
REFERENCES
A. Nabae, T. Takahashi, and H. Akagi, “A new neutral-point-clamped
PWM inverter,” IAS Annu. Meet. 1980, Conf. Rec. Cincinnati, OH,
Sept. 28-Oct. 3, 1980, pp. 761-766.
J. Holtz, S . Stadtfeld, and P. Lammert, “An economic very high power
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Jiirgen K. Steinke (M’87) was born in Bochum,
Germany, in 1957. He received the M.S. degree
in electrical engineering in 1981 and the Ph.D.
degree in electrical engineering in 1986, both from
the University of Bochum (Ruhr-Universi~t).
Germany. His doctoral dissertation included the-
oretical and practical aspects of the design of GTO
thyristor gate drive circuits and snubber circuits.
Since 1986 he worked as a senior research en-
gineer at the Institute for Generation and Appli-
cation of Electrical Enerev (Ruhr-Universitat
1-
Bochum), were he worked on three-level inverter control and the control
of ac machines. In 1990 he joined ABB Transportation Systems Ltd., Turgi,
Switzerland, were he worked as a member of technical staff on drive con-
trol for mass transit vehicles. In 1991 he changed over to ABB Drives AG,
Turgi, Switzerland, where he is a member of the technical staff and man-
ager of the development group for the control of large ac drives.
Dr. Steinke is member of the German Association of Electrical Engi-
neers (VDE) and the European Power Electronics and Drives Association
(EPE).