IPHONE 7PLUS SCH 051-00542 BRD 820-00249-A Intel

8 7 6 5 4 3 2 1
CK
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. APPD
REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
5 0006232160 ENGINEERING RELEASED 2016-05-16
D111/121 MLB - Carrier

LAST_MODIFICATION=Mon May 16 22:31:09 2016
D D
<CSA> DATE PAGE <CSA> CONTENTS SYNC DATE
PAGE CONTENTS SYNC
<CSA_PAGE1> <SYNC_DATE1> <CSA_PAGE46> <SYNC_DATE46>
1 TABLE OF CONTENTS <SYNC_MASTER1> 46 LARGE FORM FACTOR SPECIFIC <SYNC_MASTER46>
2 SYSTEM:BOM TABLES <SYNC_MASTER2> 47 I2C MAP: AP, TOUCH, HOMER, I2C5 <SYNC_MASTER47>
3 SYSTEM:EEEE CALLOUTS <SYNC_MASTER3> 48 I2C MAP AOP <SYNC_MASTER48>
4 SYSTEM:MECHANICAL COMPONENTS <SYNC_MASTER4> 49 I2C TABLE <SYNC_MASTER49>
5 SYSTEM:TESTPOINTS, BOARDID <SYNC_MASTER5> 50 spare <SYNC_MASTER50>
6 spare <SYNC_MASTER6> 51 spare <SYNC_MASTER51>
7 SOC:JTAG,USB,XTAL <SYNC_MASTER7> 52 MLB UNIQUE <SYNC_MASTER52>
8 SOC:PCIE <SYNC_MASTER8> 53 CELL,WIFI,NFC <SYNC_MASTER53>
9 SOC:MIPI AND ISP <SYNC_MASTER9> 54 PAGE1 <SYNC_MASTER54>
10 SOC:LPDP <SYNC_MASTER10> 55 BASEBAND <SYNC_MASTER55>
11 SOC:SERIAL <SYNC_MASTER11> 56 BASEBAND MEMORY/DEBUG <SYNC_MASTER56>
12 SOC:GPIO & UART <SYNC_MASTER12> 57 BASEBAND POWER <SYNC_MASTER57>
13 SOC:AOP <SYNC_MASTER13> 58 BASEBAND PMIC <SYNC_MASTER58>
14 SOC:POWER (1/3) <SYNC_MASTER14> 59 TRANSCEIVERS <SYNC_MASTER59>
15 SOC:POWER (2/3) <SYNC_MASTER15> 60 ET MODULATOR <SYNC_MASTER60>
16 SOC:POWER (3/3) <SYNC_MASTER16> 61 TDD TRANSMIT <SYNC_MASTER61>
C <CSA_PAGE17> <SYNC_DATE17> <CSA_PAGE62> <SYNC_DATE62>
C
17 NAND <SYNC_MASTER17> 62 FDD TRANSMIT <SYNC_MASTER62>
18 SYSTEM POWER:PMU (1/3) <SYNC_MASTER18> 63 PRIMARY RECEIVE <SYNC_MASTER63>
19 SYSTEM POWER:PMU (2/3) <SYNC_MASTER19> 64 LOWER ANTENNA & COUPLERS <SYNC_MASTER64>
20 SYSTEM POWER:PMU (3/3) <SYNC_MASTER20> 65 DIVERSITY RECEIVE ASM'S <SYNC_MASTER65>
21 SYSTEM POWER:CHARGER <SYNC_MASTER21> 66 DIVERSITY RECEIVE LNA'S <SYNC_MASTER66>
22 SYSTEM POWER:BATTERY CONN <SYNC_MASTER22> 67 UPPER ANTENNA FEEDS <SYNC_MASTER67>
23 SYSTEM POWER:BOOST <SYNC_MASTER23> 68 GNSS <SYNC_MASTER68>
24 SENSORS <SYNC_MASTER24> 69 TEST POINTS & SIM <SYNC_MASTER69>
25 B2B FILTERS: UTAH <SYNC_MASTER25> 70 spare <SYNC_MASTER70>
26 CAMERA:STROBE DRIVER <SYNC_MASTER26> 71 spare <SYNC_MASTER71>
27 Accessory: Buck Circuit <SYNC_MASTER27> 72 spare <SYNC_MASTER72>
28 TRINITY:FF SPECIFIC <SYNC_MASTER28> 73 spare <SYNC_MASTER73>
29 B2B:FOREHEAD <SYNC_MASTER29> 74 page1 <SYNC_MASTER74>
30 B2B:NEVADA <SYNC_MASTER30> 75 NFC <SYNC_MASTER75>
31 AUDIO:CALTRA CODEC (1/2) <SYNC_MASTER31> 76 page1 <SYNC_MASTER76>
32 AUDIO:CALTRA CODEC (2/2) <SYNC_MASTER32> 77 METROCIRC <SYNC_MASTER77>
33 AUDIO:SPEAKER AMP 2 <SYNC_MASTER33> 78 UAT MATCH & TUNER <SYNC_MASTER78>
B 34
<CSA_PAGE34>
AUDIO:SPEAKER AMP 1 <SYNC_MASTER34>
<SYNC_DATE34>
79
<CSA_PAGE79>
WIFI_MLB SCHEMATIC <SYNC_MASTER79>
<SYNC_DATE79>
B
35 ARC:DRIVER <SYNC_MASTER35> 80 PERENNIAL <SYNC_MASTER80>
36 ARC:MAGGIE <SYNC_MASTER36> 81 WIFI FRONT-END [77] <SYNC_MASTER81>
37 DISPLAY & MESA:POWER <SYNC_MASTER37> <SYNC_MASTER82>
38 B2B:ORB & MESA <SYNC_MASTER38> <SYNC_MASTER83>
39 B2B FILTERS: DISPLAY & TOUCH <SYNC_MASTER39> <SYNC_MASTER84>
40 TRISTAR 2 <SYNC_MASTER40> <SYNC_MASTER85>
41 B2B:DOCK FLEX <SYNC_MASTER41> <SYNC_MASTER86>
42 spare <SYNC_MASTER42> <SYNC_MASTER87>
43 spare <SYNC_MASTER43> <SYNC_MASTER88>
44 B2B FILTERS: RIGHT BUTTON FLEX <SYNC_MASTER44> <SYNC_MASTER89>
45 B2B FF SPECIFIC <SYNC_MASTER45> <SYNC_MASTER90>
A TABLE OF CONTENTS A
DRAWING TITLE
SCH,MLB,D111
SCH 051-00542 Schematic & PCB Callouts System Block Diagram DRAWING NUMBER
051-00542
SIZE
D
Apple Inc.
BRD 820-00249 REVISION
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
051-00542 1 SCH,MLB,D111/121 SCH CRITICAL ?

TABLE_5_ITEM <rdar://problem/16684269> R
NOTICE OF PROPRIETARY PROPERTY: BRANCH

5.0.0
MCO 056-01585 THE INFORMATION CONTAINED HEREIN IS THE

TABLE_5_ITEM
820-00249 1 PCBF,MLB,D111/121 PCB CRITICAL ? PROPRIETARY PROPERTY OF APPLE INC.

THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
1 OF 53
SHEET
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
IV ALL RIGHTS RESERVED 1 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
NAND BOM Options TABLE_5_HEAD

Active Diode Alternate TABLE_ALT_HEAD
ACC BUCK Alternates TABLE_ALT_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
PART NUMBER PART NUMBER
TABLE_5_ITEM
335S00169 1 NAND,H,32GB,16nm,MLC U1701 CRITICAL NAND_32G TABLE_ALT_ITEM TABLE_ALT_ITEM
TABLE_5_ITEM
376S00106 376S00047 ALTERNATE Q2101 DIODES INC. ACT DIODE 371S00087 371S00064 ALTERNATE D2700 DIODE,SHOTTKY,30V,200MA,0201
335S00182 1 NAND,H,128GB,16nm,TLC U1701 CRITICAL NAND_128G TABLE_ALT_ITEM
TABLE_5_ITEM
152S00558 152S00557 ALTERNATE L2700 IND,MLD,0.47UH,2.5A,80Mohm,1608
335S00156 1 NAND,H,256GB,3Dv3,TLC U1701 CRITICAL NAND_256G

TABLE_5_ITEM
DDR PLL Alternate
138S0867 6 CAP,X5R,10UF,20%,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1719,C1721,C1733 CRITICAL NAND_32G TABLE_ALT_HEAD
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

PART NUMBER
TABLE_5_ITEM
138S00003 6 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1719,C1721,C1733 CRITICAL NAND_128G
D 138S00003 6 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1719,C1721,C1733 CRITICAL NAND_256G

TABLE_5_ITEM
155S00095 155S00068 ALTERNATE FL1501 FERR BD,100OHM,25%,100MA,2OHM,01005

TABLE_ALT_ITEM
TABLE_ALT_HEAD
Power Inductor Alternates
TABLE_ALT_HEAD
PART NUMBER PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
PART NUMBER
TABLE_ALT_ITEM
335S00201 335S00169 ALTERNATE U1701 T,15nm,MLC,32GB TABLE_ALT_ITEM
TABLE_ALT_ITEM
152S00118 152S00075 ALTERNATE ALL IND,PWR,SHLD,1.2 UH,3.0A,0.080 OHM,2016
335S00209 335S00169 ALTERNATE U1701 S,16nm,MLC,32GB TABLE_ALT_ITEM
TABLE_ALT_ITEM
152S00077 152S00397 ALTERNATE ALL IND,PWR,SHLD,1.0 UH,2.25A,0.150 OHM,2016 updated 11/12
335S00195 335S00182 ALTERNATE U1701 SS,1Ynm,TLC,128GB TABLE_ALT_ITEM
TABLE_ALT_ITEM
152S00121 152S00081 ALTERNATE ALL IND,PWR,SHLD,0.47 UH,3.8A,0.048 OHM,2012
335S00180 335S00182 ALTERNATE U1701 T,15nm,TLC,128GB TABLE_ALT_ITEM
TABLE_ALT_ITEM
152S00123 152S1936 ALTERNATE ALL IND,PWR,SHLD,15 UH,0.72A,0.900 OHM,3225
335S00179 335S00182 ALTERNATE U1701 SD,15nm,TLC,128GB TABLE_ALT_ITEM
TABLE_ALT_ITEM
152S00402 152S00366 ALTERNATE ALL IND,MULT,1UH,1.2A,0.320 OHM,0603 updated 11/12
335S00148 335S00183 ALTERNATE U1701 SD,3Dv2,TLC,256GB TABLE_ALT_ITEM
TABLE_ALT_ITEM
152S00297 152S1843 ALTERNATE ALL CYNTEC 2012 1UH reverted 11/13
335S00190 335S00183 ALTERNATE U1701 SS,3Dv3,TLC,256GB TABLE_ALT_ITEM
152S00365 152S00297 ALTERNATE ALL CYNTEC 2012 1UH
#22686038:See Radar TABLE_ALT_ITEM
152S00398 152S00204 ALTERNATE ALL IND,PWR,0.22UH,20%,6.7a,23MOHM,2012 For Chestnut inductor; so it doesn't interfere with PMU inducotr Buck 7 alts
TABLE_ALT_ITEM
Except BUCK5 LX (BUCK5 LX is Taiyo only)

152S00120 152S00077 ALTERNATE ALL For Chestnut inductor only
TABLE_ALT_ITEM
152S00117 152S00074 ALTERNATE L1806,L1810,L1814,L1816,L1817 IND,PWR,SHLD,1.0 UH,3.0A,0.060 OHM,2016
CAYMAN DDR Alternates

PART NUMBER ALTERNATE FOR
PART NUMBER
BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
Global R/C Alternates

C 339S00254 339S00253 ALTERNATE ALL DDR-H, 2G, B1
TABLE_ALT_ITEM

TABLE_ALT_HEAD
C
PART NUMBER
TABLE_ALT_ITEM
339S00255 339S00253 ALTERNATE ALL DDR-S, 2G, B1 TABLE_ALT_ITEM
TABLE_ALT_ITEM
118S0764 118S0717 ALTERNATE ALL RES, 3.92K, 0.1%, 0201
339S00257 339S00253 ALTERNATE ALL DDR-H, 3G, B1 TABLE_ALT_ITEM
TABLE_ALT_ITEM
138S0702 138S0657 ALTERNATE ALL CAP, X5R, 4.3UF, 4V, 0610
339S00258 339S00253 ALTERNATE ALL DDR-S, 3G, B1 TABLE_ALT_ITEM
TABLE_ALT_ITEM
138S00006 138S0835 ALTERNATE ALL CAP, 3-TERM, 4.3UF, 4V, 0402
339S00256 339S00253 ALTERNATE ALL DDR-M, 3G, B1 TABLE_ALT_ITEM
138S00005 138S00003 ALTERNATE ALL CAP,X5R,15UF,6.3V,0.65MM,0402,TAIYO
TABLE_ALT_ITEM
138S00048 138S00003 ALTERNATE ALL CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERA
TABLE_ALT_ITEM
138S0648 138S0652 ALTERNATE ALL CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO
TABLE_ALT_ITEM
132S0400 132S0436 ALTERNATE ALL CAP,X5R,0.22UF,6.3V,01005,TDK
Magnesium Alternates TABLE_ALT_HEAD

138S00024 138S0986 ALTERNATE ALL CAP,CER,3-TERM,7.5UF,20%,4V,0402,TAIYO/TDK
TABLE_ALT_ITEM
TABLE_ALT_ITEM
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: 138S0706 138S0739 ALTERNATE ALL CAP,CER,1UF,20%,10V,X5R,0201,MURATA
PART NUMBER
TABLE_ALT_ITEM
TABLE_ALT_ITEM
138S0945 138S0739 ALTERNATE ALL CAP,CER,1UF,20%,10V,X5R,0201,KYOCERA

338S00173 338S00203 ALTERNATE U2402 Larger Wafer (-29 flow) Magnesium
TABLE_ALT_ITEM
132S0436 132S0400 ALTERNATE ALL CAP,CER,X5R,0.22UF,20%,6.3V,20%
Carbon Alternates 138S00117 138S00071 ALTERNATE ALL CAP,X5R,4UF,0201,6.3V,20%, KYOCERA

TABLE_ALT_ITEM
New in Carrier, per #25737217
TABLE_ALT_HEAD

PART NUMBER
TABLE_ALT_ITEM
338S00087 338S00226 ALTERNATE U2401,U2404 Updated version of Carbon
B Phosphorous Alternates Global Ferrite Alternates TABLE_ALT_HEAD

B
TABLE_ALT_HEAD PART NUMBER
PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: TABLE_ALT_ITEM
PART NUMBER
155S00067 155S0581 ALTERNATE ALL FERR, 240OHM, 0.38OHM DCR, 0201
TABLE_ALT_ITEM
TABLE_ALT_ITEM
338S00230 338S00188 ALTERNATE U2403 ST version of Phosphorous

155S0581 155S00067 ALTERNATE ALL FERR, 240OHM, 0.38OHM DCR, 0201
TABLE_ALT_ITEM
155S00012 155S00168 ALTERNATE ALL FLTR, 65 OHMS, 0605

TABLE_ALT_ITEM
155S00194 155S0610 ALTERNATE ALL FERR BD, 150OHM, TDK
UT LDO Alternates
TABLE_ALT_ITEM
155S0885 155S0610 ALTERNATE ALL FERR BD, 150OHM, TY

TABLE_ALT_ITEM
TABLE_ALT_HEAD
152S00489 152S00456 ALTERNATE ALL FERR BD, 0.47UH, TY

PART NUMBER
TABLE_ALT_ITEM
353S00889 353S00015 ALTERNATE U2501 ST, LDO REG, 2.925V, CSP 0.65x0.65
Mamba LDO Alternates TABLE_ALT_HEAD

Global Varistor Alternates
PART NUMBER
TABLE_ALT_HEAD

PART NUMBER
TABLE_ALT_ITEM
353S00932 353S00576 ALTERNATE U3801 ST, LDO REG, 2.75V

TABLE_ALT_ITEM
377S0168 377S0140 ALTERNATE ALL VARISTOR, 6.8V, 100PF, 01005
EEPROM Alternate TABLE_ALT_HEAD
A PART NUMBER ALTERNATE FOR

PART NUMBER
SYNC_MASTER=sync SYNC_DATE=04/28/2016
A
PAGE TITLE
TABLE_ALT_ITEM
335S00234 335S00233 ALTERNATE U1101 IC,EEPROM,16KX8,1.8V,I2C,WLCSP4,ONSEMI
SYSTEM:BOM TABLES
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0
THE INFORMATION CONTAINED HEREIN IS THE

PROPRIETARY PROPERTY OF APPLE INC.
2 OF 53
SHEET
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8 7 6 5 4 3 2 1
D111 EEEE CALLOUTS

TABLE_5_HEAD

TABLE_5_ITEM
825-6838 1 EEEE CODE FOR 639-01824 EEEE_GY4R CRITICAL EEEE_D111_BEST

TABLE_5_ITEM
825-6838 1 EEEE CODE FOR 639-01825 EEEE_GY4T CRITICAL EEEE_D111_SUPREME

TABLE_5_ITEM
825-6838 1 EEEE CODE FOR 639-01826 EEEE_GY4V CRITICAL EEEE_D111_EXTREME
D D
TABLE_ALT_HEAD

PART NUMBER
TABLE_ALT_ITEM
138S00049 138S00032 ALTERNATE ALL CAP,CER,X5R,2,2UF,20%6.3V,20%, KYOCERA
TABLE_ALT_ITEM
138S0831 138S00032 ALTERNATE ALL CAP,CER,X5R,2,2UF,20%,6.3V,20%,MURATA
C C
B B
A SYNC_DATE=02/24/2016 A
PAGE TITLE
SYSTEM:EEEE CALLOUTS
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

3 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
Current as of D11 MCO 056-01585 rev. 63

LCM
TESTPOINTS
O O Contained in radio_mlb pages
NORTH_SCREW_EXPOSED
#25046211
POWER TP0420
1
POWER GROUND
45 39 PP_LCM_BL_CAT1_CONN TP0409
1
A LCM BACKLIGHT SINK1
BS0415
2.70R1.80-NSP
1
O 1
5%
C0413
220PF
2 10V
1
5%
C0414
56PF
2 25V
1
2%
C0415
18PF
2 16V
1 C0416
4PF
+/-0.1PF
2 16V
TP-P55
ROOM=TEST
A
45 39 PP_LCM_BL_CAT2_CONN
TP-P55
ROOM=TEST
TP0410
1
A LCM BACKLIGHT SINK2
D NEO Stiffener
C0G-CERM
01005
NP0-C0G-CERM
01005
CERM
01005
NP0-C0G
01005 41 40 21
PP5V0_USB TP0421
1
A
TP-P55
ROOM=TEST
D
UP_RFFE
TP-P55
ROOM=TEST
VBUS
PP_LCM_BL_ANODE_CONN TP0411
1 LCM BACKLIGHT SOURCE
BS0401 BS0402 BS0403 TP0415
1
45 39
TP-P55
A
2.70R1.80-NSP STDOFF-2.9OD0.888H-SM STDOFF-2.9OD0.81H-SM 22 21 PP_BATT_VCC A VBATT ROOM=TEST
1 CHASSIS_GND_BS401 1 CHASSIS_GND_BS402 1 CHASSIS_GND_BS403 TP-P55
4 44 4 4 ROOM=TEST
TP0422
1 PP_LCM_BL34_CAT1_CONN
TP0417
1 LCM BACKLIGHT SINK3
A
46 45 A
TP-P55 TP-P55
PTH per Rev63 for 1.8mm Drill ROOM=TEST ROOM=TEST
TP0408 PP_LCM_BL34_CAT2_CONN
TP0419
1
53
PP_VDD_MAIN 1 46 45 A LCM BACKLIGHT SINK4
28 27 26 25 23 21 19 18 10 9
46 41 40 39 37 35 34 33 31 30 A VDD_MAIN TP-P55
44 4 CHASSIS_GND_BS401 TP-P55
ROOM=TEST ROOM=TEST
1 C0401 1 C0402 1 C0403 1 C0404 1 C0405 1 C0406 FD0408 TP0418

220PF 220PF 100PF 56PF 18PF 4PF FID PP_LCM_BL34_ANODE_CONN 1 LCM BACKLIGHT SOURCE (3/4)
5% 5% 5% 5% 2% +/-0.1PF 46 45 A
0P5SM1P0SQ-NSP
2 10V
C0G-CERM 2 10V
C0G-CERM 2 16V
NP0-C0G 2 25V
NP0-C0G-CERM 2 16V
CERM 2 16V
NP0-C0G 1 TP-P55
01005 01005 01005 01005 01005 01005 Note: Fiducial used as test point ROOM=TEST
ROOM=TEST
4 CHASSIS_GND_BS402
1 C0407
220PF
1 C0408
220PF
1 C0409
100PF
1 C0410
56PF
1 C0411
18PF
1 C0412
4PF
FIDUCIALS
5% 5% 5% 5% 2% +/-0.1PF
2 10V
C0G-CERM
01005
2 10V
C0G-CERM
01005
2 16V
NP0-C0G
01005
2 25V
NP0-C0G-CERM
01005
2 16V
CERM
01005
2 16V
NP0-C0G
01005 DFU FD0410
FID
PMU_TO_AP_FORCE_DFU TP0414
1
0P5SM1P0SQ-NSP
1
20 12 A ROOM=ASSEMBLY
CHASSIS_GND_BS403 TP-P55
C
4
ROOM=TEST FORCE DFU
FD0409 C
1 C0417 1 C0418 1 C0419 1 C0420 1 C0421 1 C0422 FID
220PF 220PF 100PF 56PF 18PF 4PF 0P5SM1P0SQ-NSP
5% 5% 5% 5% 2% +/-0.1PF 1
10V
2 C0G-CERM
01005
2 10V
C0G-CERM
01005
16V
2 NP0-C0G
01005
2 25V
NP0-C0G-CERM
01005
2 16V
CERM
01005
2 16V
NP0-C0G
01005 E75 FD0405
ROOM=ASSEMBLY
41 40 90_TRISTAR_DP1_CONN_P TP0402 FID

1
Front Shields TP-P55
ROOM=TEST
A 0P5SM1P0SQ-NSP
1
ROOM=ASSEMBLY
FD0406
41 40 90_TRISTAR_DP1_CONN_N TP0403
1
FID
0P5SQ-SMP3SQ-NSP
A 1
1 TP-P55 ROOM=ASSEMBLY
ROOM=TEST
SH0401
SM
41 40 90_TRISTAR_DP2_CONN_P TP0404
1
FD0404
A FID
TP-P55 0P5SQ-SMP3SQ-NSP
SHLD-UP-FRT-D11 ROOM=TEST 1
ROOM=ASSEMBLY
41 40 90_TRISTAR_DP2_CONN_N TP0405
1 FD0403
A FID
ROOM=TEST 1
ROOM=ASSEMBLY
1
SH0403 41 40 PP_TRISTAR_ACC1 TP0406
1 FD0402
SM A FID
ROOM=TEST ACCESSORY ID AND POWER 1
ROOM=ASSEMBLY
SHLD-LOWER-FRT-D11 PP_TRISTAR_ACC2 TP0407
BS0404 41 40
1
A FD0401
2.70R1.80-NSP TP-P55 FID
1 ROOM=TEST 0P5SQ-SMP3SQ-NSP
1
B TP0416
1
ROOM=ASSEMBLY
B
A TP IS TO HELP WITH USB SI FD0400
TP-P55 FID
ROOM=TEST IN THE FACTORY FIXTURE. 0P5SQ-SMP3SQ-NSP
Back Shields TP0412
1
ROOM=ASSEMBLY
TRISTAR_CON_DETECT_L 1
41 40 A FOR DIAGS
TP-P55
ROOM=TEST
1 FD0407
SH0400
SM
AMUX FID
0P5SM1P0SQ-NSP
1
PMU_AMUX_AY TP0413
1
SHLD-SOFT-UP-BK-D11
20 A ANALOG MUX A OUTPUT ROOM=TEST
TP-P55
ROOM=TEST
#25244799 1
R0413 FD0411
100k to 200k FID
200K 0P5SQ-SMP3SQ-NSP
1% 1
1/32W
MF
1 PMU_AMUX_BY TP0423
1 2 01005
20 A ROOM=SOC ANALOG MUX B OUTPUT
SH0402 TP-P55 Note: Fiducial used as test point
SM BS0405 ROOM=TEST
STDOFF-2.9OD0.888H-SM
SHLD-SOFT-LOWER-BK-D11 1 MOJAVE
BS0406
STDOFF-2.9OD1.9ID-0.85H-SM MESA_TO_BOOST_EN TP0400
1
38 37 A
1 TP-P55
ROOM=TEST
A 38 37 PP16V0_MESA TP0401
1
A SYNC_MASTER=sync SYNC_DATE=04/28/2016
A
TP-P55 PAGE TITLE
CLIP-COAX-RETENTION-D11
ROOM=TEST
SYSTEM:MECHANICAL COMPONENTS
CL0401
SM
1
DRAWING NUMBER
051-00542
SIZE
D
Apple Inc.
REVISION
R
5.0.0

TOP SIDE I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

IV ALL RIGHTS RESERVED
SHEET
4 OF 53
4 OF 81
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D D
BOOTSTRAPPING:BOARD REV
BOARD ID
BOOT CONFIG
12 BOARD_REV3
R0509 1ROOM=SOC 2
1.00K
MAKE_BASE=TRUE PP1V8 7 8 9 11 12 13 16 17 18 25 29
01005 MF 1/32W 30 39 46 47 48 52
NOSTUFF 5%
12 BOARD_REV2
R0505 1ROOM=SOC 2
1.00K
BOARD_REV[3:0]
01005 MF 1/32W
5% FLOAT=LOW, PULLUP=HIGH
NOSTUFF
12 BOARD_REV1
R0508 1ROOM=SOC 2
1.00K 1111 Pre-Proto w/D520 (non enclosure)
01005 MF 1/32W 1110 PROTO1
5%
1101 PROTO2
NOSTUFF
1100 PROTO2v5
12 BOARD_REV0 R0504 ROOM=SOC
1 2 1.00K
1011 EVT
01005 MF 5% 1/32W
xxxx SPARE
SELECTED --> 1000 CARRIER
C xxxx SPARE C
0010 DVT
BOARD_ID4=No connect xxxx SPARE
0000 PVT
11 BOARD_ID3 R0502 1ROOM=SOC 2 1.00K

01005 MF 5% 1/32W
BOARD_ID[4:0]
FLOAT=LOW, PULLUP=HIGH
11 BOARD_ID2 R0503 ROOM=SOC
1 2 1.00K
01000 D10 MLB
0=EUREKA, 1=KAROO 01005 MF 5% 1/32W
01001 D10 DEV
01010 D11 MLB
11 BOARD_ID1 R0501 ROOM=SOC
1 2 1.00K
01011 D11 DEV
01005 MF 5% 1/32W
0=FORM FACTOR A, 1=FORM FACTOR B 01100 D101 MLB
01101 D101 DEV
BOARD_ID0=No connect SELECTED --> 01110 D111 MLB
01111 D111 DEV
0=MLB, 1=DEV
0=FORM FACTOR A, 1=FORM FACTOR B
0=EUREKA, 1=KAROO
MAKE_BASE=TRUE
12 BOOT_CONFIG2
BOOT_CONFIG1=No connect
BOOT_CONFIG0=No connect
B BOOT_CONFIG[2:0]
FLOAT=LOW, PULLUP=HIGH
B
000 SPI0
001 SPI0 TEST MODE
010 NVME0_X2
011 NVME0 X2 TEST
SELECTED --> 100 NVME0 X1
101 NVME0 X1 TEST
110 SLOW SPI0 TEST
111 FAST SPI0 TEST
A SYNC_MASTER=ffspecific SYNC_DATE=09/03/2015 A
PAGE TITLE
SYSTEM:TESTPOINTS, BOARDID
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

5 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
C C
B B
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

6 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SOC - USB, JTAG, XTAL VDD18_USB: 1.71-1.89V @20mA MAX
PP1V8 5 7 8 9 11 12 13 16 17 18 25 29
30 39 46 47 48 52
1 C0700
0.1UF
20%
2 6.3V
X5R-CERM
01005
ROOM=SOC
D D
VDD11_XTAL:1.06-1.17V @TBD mA MAX
FL0700
240-OHM-25%-0.20A-0.9DCR
PP1V1_XTAL 1 2 PP1V1 15 18
01005
1 C0704 ROOM=SOC 1 C0705
0.1UF 2.2UF
20% 20%
2 6.3V 2 6.3V
X5R-CERM X5R-CERM
01005 0201-1
ROOM=SOC ROOM=SOC
VDD18_AMUX: 1.62-1.98V @1mA MAX

PP3V3_USB 19 30
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 30 29
PP1V8 1 C0701 3.14-3.46V @20mA MAX
0.1UF
20%
6.3V
2 X5R-CERM
01005
ROOM=SOC
CKPLUS_WAIVE=PWRTERM2GND
PP0V9_SOC_FIXED 8 9 10 15 18
VDD11_XTAL CG50
VDD33_USB CG26
VDD_FIXED_USB CC25
VDD18_USB CE25
tbd - tbd V @5mA MAX
VDD12_UH1_HSIC0 CL20
VDD18_AMUX AJ60
C C
U0700
CAYMAN-2GB-20NM-DDR-M
CSP
SYM 1 OF 16
CM22 UH1_HSIC0_DATA ANALOGMUX_OUT N64 AP_TO_PMU_AMUX_OUT 20

NC
CM20 UH1_HSIC0_STB
NC
Dev ONLY
USB_DP CM26 90_USB_AP_DATA_P 40
CL31 JTAG_SEL USB_DM CL26 90_USB_AP_DATA_N 40
CL29 JTAG_TRST*
NC
CG37 JTAG_TDO
NC
CJ35 JTAG_TDI USB_VBUS CH26 USB_VBUS_DETECT 21
NC
40 SWD_DOCK_BI_AP_SWDIO CK33 JTAG_TMS
40 SWD_DOCK_TO_AP_SWCLK CH37 JTAG_TCK USB_ID CJ26NC
20 13 PMU_TO_SYSTEM_COLD_RESET_L CM14 COLD_RESET*
BJ3 CFSB USB_REXT CK26 AP_USB_REXT

40 37 20 13 PMU_TO_AOP_TRISTAR_ACTIVE_READY
1
PP0701 BJ2 TST_CLKOUT R0700
B P2MM-NSM
SM
PP
1
20 AP_TO_PMU_TEST_CLKOUT
1%
200 B
1/32W
BL65 S3E_RESET* MF
17 AP_TO_NAND_RESET_L 2 01005
ROOM=SOC
BJ4 HOLD_RESET WDOG CK35 AP_TO_PMU_WDOG_RESET 20
BL3 TESTMODE
XI0 CM42 XTAL_AP_24M_IN

XO0 CL42 XTAL_AP_24M_OUT 1
R0701 CRITICAL
ROOM=SOC
511K
1%
1/32W
Y0700
1.60X1.20MM-SM
MF
2 01005
R0702 24.000MHZ-30PPM-9.5PF-60OHM
ROOM=SOC 0.00
1 2 SOC_24M_O 1 3
0% 2 4
1/32W 1
MF
01005
C0702
12PF
1 C0703
ROOM=SOC 5% 12PF
16V 5%
2 CERM 2 16V
01005 CERM
ROOM=SOC 01005
ROOM=SOC
A
PAGE TITLE
SOC:JTAG,USB,XTAL
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

7 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SOC - PCIE INTERFACES

R0804 VDD12_PCIE_REFBUF:1.08-1.26V @40mA MAX
0.00
1 2 PP1V2_SOC_PCIE_REFBUF
0%
1/32W
MF
1 C0802
01005 0.1UF
ROOM=SOC 20%
2 6.3V
X5R-CERM
01005 VDD_FIXED_PCIE_xxx:0.855-0.990V @225mA MAX
ROOM=SOC
PP0V9_SOC_FIXED 7 9 10 15 18
D R0803 1 C0803 1 C0800 1 C0806 D

0.00 0.1UF 1.0UF 2.2UF
PP0V9_SOC_FIXED_PCIE_REFBUF 1 2 20% 20% 20%
VDD12_PCIE: 1.14-1.26V @10mA MAX 2 6.3V 2 6.3V 2 6.3V
PP1V2_SOC 0% X5R-CERM X5R X5R-CERM
19 16 10
1 C0804 1/32W 01005 0201-1 0201-1
BW55
CC49
CC53
CC62
CC47
VDD12_PCIE CE58
CE49
CA55
CA60
CE55
CE60
MF ROOM=SOC ROOM=SOC ROOM=SOC
1 1 0.1UF 01005
C0805
2.2UF
C0801
0.1UF
20%
2 6.3V
ROOM=SOC
20% 20% X5R-CERM
6.3V 01005
VDD12_PCIE_REFBUF
VDD_FIXED_PCIE_CLK
VDD_FIXED_PCIE_ANA
VDD_FIXED_PCIE_REFBUF
6.3V
2 X5R-CERM 2 X5R-CERM ROOM=SOC
0201-1 01005
ROOM=SOC ROOM=SOC
PP1V8 5 7 9 11 12 13 16 17 18 25 29
30 39 46 47 48 52
1
R0805 U0700
100K CSP
5%
1/32W
MF
2 01005 SYM 2 OF 16
ROOM=SOC BC64 BE66
17 PCIE_NAND_BI_AP_CLKREQ_L PCIE_CLKREQ0* PCIE_CLKREQ3* AP_PCIE_CLKREQ3_L 52
17 90_PCIE_AP_TO_NAND_REFCLK_P CJ48 PCIE_REF_CLK0_P PCIE_REF_CLK3_P CL64 90_AP_PCIE3_REFCLK_P 52
17 90_PCIE_AP_TO_NAND_REFCLK_N CK48 PCIE_REF_CLK0_N PCIE_REF_CLK3_N CM64 90_AP_PCIE3_REFCLK_N 52
PCIE LINK 3
#24557655:replace with 20% caps. SI no negative impact
C C0807 20%1 2 GND_VOID=TRUE

0.22UF C
ROOM=SOC 6.3V
X5R 01005 CM46 CM61
17 90_PCIE_NAND_TO_AP_RXD_P 90_PCIE_NAND_TO_AP_RXD_C_P PCIE_RX0_P PCIE_RX3_P 90_AP_PCIE3_RXD_C_P 52
1 2 GND_VOID=TRUE
17 90_PCIE_NAND_TO_AP_RXD_N C0808 0.22UF 90_PCIE_NAND_TO_AP_RXD_C_N CL46 PCIE_RX0_N PCIE_RX3_N CL61 90_AP_PCIE3_RXD_C_N 52
PCIE LINK 0
ROOM=SOC 20% 6.3V

X5R 01005
D10 NAND is now Gen3 (was Gen2). Caps intentionally 0.22uF
1 2 GND_VOID=TRUE
C0809
ROOM=SOC 20% 6.3V
0.22UF
X5R 01005 CK44 CK63
17 90_PCIE_AP_TO_NAND_TXD_P 90_PCIE_AP_TO_NAND_TXD_C_P PCIE_TX0_P PCIE_TX3_P 90_AP_PCIE3_TXD_C_P 52
1 2 GND_VOID=TRUE
17 90_PCIE_AP_TO_NAND_TXD_N C0810
ROOM=SOC 20% 6.3V
0.22UF 90_PCIE_AP_TO_NAND_TXD_C_N CJ44 PCIE_TX0_N PCIE_TX3_N CJ63 90_AP_PCIE3_TXD_C_N 52
X5R 01005 BJ65 BJ66

17 PCIE_AP_TO_NAND_RESET_L PCIE_PERST0* PCIE_PERST3* AP_PCIE_RESET3_L 52
1
1
R0802 R0806
LINK0 LINK3
100K
100K 5%
5% 1/32W
1/32W MF
MF 2 01005
2 01005 ROOM=SOC
ROOM=SOC BG66 BE65
NC PCIE_CLKREQ1* PCIE_CLKREQ2* AP_PCIE_CLKREQ2_L 52
CL54 PCIE_REF_CLK1_P PCIE_REF_CLK2_P CK59 90_AP_PCIE2_REFCLK_P 52

NC
CM54 PCIE_REF_CLK1_N PCIE_REF_CLK2_N CJ59 90_AP_PCIE2_REFCLK_N 52
NC
PCIE LINK 2
WLAN RX PP's are now managed on Page 52
CK52 PCIE_RX1_P PCIE_RX2_P CK56 90_AP_PCIE2_RXD_C_P 52
NC
PCIE LINK 1
CJ52 PCIE_RX1_N PCIE_RX2_N CJ56 90_AP_PCIE2_RXD_C_N 52

NC
B B
LINK 1 USED ON AP_DEV ONLY
CM50 PCIE_TX1_P PCIE_TX2_P CM57 90_AP_PCIE2_TXD_C_P 52

NC
CL50 PCIE_TX1_N PCIE_TX2_N CL57 90_AP_PCIE2_TXD_C_N 52
NC
BG64 PCIE_PERST1* PCIE_PERST2* BE64 AP_PCIE_RESET2_L 52
NC
LINK1 LINK2
1
R0801
100K
5%
CH57 1/32W
PCIE_EXT_REF_CLK_P MF
CG57 01005
PCIE_EXT_REF_CLK_N 2 ROOM=SOC
PCIE_REXT CG63 AP_PCIE_RCAL

1
R0800
3.01K
1%
1/32W
MF
01005
2 ROOM=SOC
A
PAGE TITLE
SOC:PCIE
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

8 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SOC - MIPI & ISP INTERFACES
D 0.825-0.94V @25mA MAX 1.62-1.98V @7mA MAX

D
18 15 10 8 7 PP0V9_SOC_FIXED PP1V8 5 7 8 11 12 13 16 17 18 25 29
30 39 46 47 48 52
1 C0902 1 C0900 1 C0901 1 C0903

0.1UF 2.2UF 2.2UF 0.1UF
20% 20% 20% 20%
2 6.3V 2 6.3V 2 6.3V 2 6.3V
G13
G17
G10
G15
G19
G21
G6
X5R-CERM X5R-CERM X5R-CERM X5R-CERM
01005 0201-1 0201-1 01005
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
VDD_FIXED_MIPI
VDD18_MIPI
U0700
CSP
45 90_MIPI_NH_TO_AP_DATA0_P A18 MIPI0C_DPDATA0 SYM 3 OF 16 ISP_I2C0_SCL N65 I2C_ISP_UT_SCL 48
45 90_MIPI_NH_TO_AP_DATA0_N B18 MIPI0C_DNDATA0 ISP_I2C0_SDA N66 I2C_ISP_UT_SDA 48
45 90_MIPI_NH_TO_AP_DATA1_P B20 MIPI0C_DPDATA1 ISP_I2C1_SCL U64 I2C_ISP_NV_SCL 30 46
45 90_MIPI_NH_TO_AP_DATA1_N C20 MIPI0C_DNDATA1 ISP_I2C1_SDA R65 I2C_ISP_NV_SDA 30 46
NC
C24 MIPI0C_DPDATA2 ISP_I2C2_SCL U65 I2C_ISP_NH_SCL 48
B24 MIPI0C_DNDATA2 ISP_I2C2_SDA U66 I2C_ISP_NH_SDA 48
NC
C NC
A26
B26
MIPI0C_DPDATA3 ISP_I2C3_SCL W64 NC
Dev ONLY R0906
C
NC MIPI0C_DNDATA3 ISP_I2C3_SDA W66 NC
33.2
1 2 AP_TO_UT_CLK 25
B22 NOSTUFF
90_MIPI_NH_TO_AP_CLK_P MIPI0C_DPCLK 1%
45
90_MIPI_NH_TO_AP_CLK_N A22 MIPI0C_DNCLK

1/32W
MF
1 C0906
45
01005 100PF
ROOM=SOC 5%
MIPI0C_REXT E24 MIPI0C_REXT SENSOR_INT AA64NC Spare 2 35V
NP0-C0G
01005
R0900 1
4.02K
1% B4
1/32W 39 90_MIPI_AP_TO_LCM_DATA0_P MIPID_DPDATA0 SENSOR0_CLK B50 AP_TO_UT_CLK_R
MF
01005 2 39 90_MIPI_AP_TO_LCM_DATA0_N A4 MIPID_DNDATA0 SENSOR1_CLK A48 NC_AP_TO_NV_CLK_R 30 D11/111 ONLY R0907
ROOM=SOC 33.2
SENSOR2_CLK C48 AP_TO_NH_CLK_R 1 2 AP_TO_NH_CLK 29
B5 NOSTUFF
90_MIPI_AP_TO_LCM_DATA1_P MIPID_DPDATA1 1%
39
90_MIPI_AP_TO_LCM_DATA1_N C5 MIPID_DNDATA1
1/32W
MF
1 C0907
39
01005 100PF
ROOM=SOC 5%
C9 A50 2 35V
NP0-C0G
46 NC_MIPI_AP_TO_LCM_DATA2_P MIPID_DPDATA2 SENSOR0_RST AP_TO_UT_SHUTDOWN_L 25 01005
46 NC_MIPI_AP_TO_LCM_DATA2_N B9 MIPID_DNDATA2 SENSOR1_RST E50 NC_AP_TO_NV_SHUTDOWN_L 30 D11/111 ONLY
D11/111 ONLY SENSOR2_RST AA65 AP_TO_NH_SHUTDOWN_L 29
Radar 20511449
46 NC_MIPI_AP_TO_LCM_DATA3_P A11 MIPID_DPDATA3 SENSOR3_RST AE64 TP_SENSOR3_RST 1
PP SM PP0902
P2MM-NSM <--- Needed for Cayman debug; this pin cannot be input
46 NC_MIPI_AP_TO_LCM_DATA3_N B11 MIPID_DNDATA3 SENSOR4_RST AC65 ROOM=SOC
NC
39 90_MIPI_AP_TO_LCM_CLK_P B7 MIPID_DPCLK SENSOR0_ISTRB E52 NC_SENSOR0_ISTRB

39 90_MIPI_AP_TO_LCM_CLK_N A7 MIPID_DNCLK SENSOR1_ISTRB D50 NC
BN4 SENSOR0_XSHUTDOWN C50 NC

B 26
36
AP_TO_STROBE_DRIVER_HWEN
SPI_AP_TO_MAGGIE_CS_L BR2
DISP_TOUCH_BSYNC0
DISP_TOUCH_BSYNC1 SENSOR1_XSHUTDOWN B48 AP_TO_MUON_BL_STROBE_EN 37 46
B
BR4 DISP_TOUCH_EB MIPI1C_REXT E16
NC
MIPID_REXT E11 MIPID_REXT MIPI1C_DPDATA0 B12

MIPI1C_DNDATA0 C12
R0901 1
4.02K
1% MIPI1C_DPDATA1 B16 Dev only
1/32W
MF MIPI1C_DNDATA1 C16
01005 2
ROOM=SOC
MIPI1C_DPCLK B14
MIPI1C_DNCLK A14
Per Radar 21221938
A 53
28 27 26 25 23 21 19 18 10 4
46 41 40 39 37 35 34 33 31 30
PP_VDD_MAIN SYNC_MASTER=sync SYNC_DATE=04/28/2016
A
PAGE TITLE
1 C0904
220PF
1 C0905
220PF
1 C0908
220PF
1 C0909
220PF
1 C0910
220PF
SOC:MIPI AND ISP
DRAWING NUMBER SIZE
5% 5% 5% 5% 5%
2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM Apple Inc.
051-00542 D
01005 01005 01005 01005 01005 REVISION
ROOM=SOC
R
5.0.0
AC return path for LCM MIPI which is referenced to GND and VDD_MAIN NOTICE OF PROPRIETARY PROPERTY: BRANCH
Radar 21203307 THE INFORMATION CONTAINED HEREIN IS THE
9 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
VDD12_PLL_LPDP:1.14-1.26V @3mA MAX
PP1V2_SOC VDD12_LPDP:1.14-1.26V @60mA MAX
19 16 8
1 C1013 1 C1001 1 C1004 1 C1005 1 C1002 CKPLUS_WAIVE=PWRTERM2GND

2.2UF 2.2UF 0.1UF 0.01UF 15PF
20% 20% 20% 10% 5%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R 2 16V
NP0-C0G-CERM
G25
G28
G30
G55
G58
G60
G62
VDD12_PLL_LPDP G23
0201-1 0201-1 01005 01005 01005
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
Desense for Wifi frequencies
VDD12_LPDP_TX
VDD12_LPDP_RX
U0700
CSP
30 90_LPDP_RX_D0_P A54 LPDPRX_RX_D0_P LPDP_TX0P B27 NC
90_LPDP_RX_D0_N B54 LPDPRX_RX_D0_N SYM 4 OF 16 Dev ONLY
30 LPDP_TX0N C27 NC
30 90_LPDP_RX_D1_P B56 LPDPRX_RX_D1_P LPDP_TX1P A29 NC

30 90_LPDP_RX_D1_N C56 LPDPRX_RX_D1_N LPDP_TX1N B29 NC
C C
LPDP Lanes swapped between D10 and D11
25 90_LPDP_RX_D2_P A61 LPDPRX_RX_D2_P LPDP_TX2P B31 NC

25 90_LPDP_RX_D2_N B61 LPDPRX_RX_D2_N LPDP_TX2N C31 NC
D11/111 ONLY
25 90_LPDP_RX_D3_P B63 LPDPRX_RX_D3_P LPDP_TX3P A33 NC

25 90_LPDP_RX_D3_N C63 LPDPRX_RX_D3_N LPDP_TX3N B33 NC
A64 LPDPRX_RX_D4_P
GND ON MLB; other on Dev B64 LPDPRX_RX_D4_N
30 AP_LPDP_AUX0 D54 LPDPRX_AUX_D0_P LPDP_AUX_P D33 NC

E56 LPDPRX_AUX_D1_P LPDP_AUX_N E33 NC
NC
D11/111 ONLY 25 AP_LPDP_AUX2 D61 LPDPRX_AUX_D2_P
E63 LPDPRX_AUX_D3_P LPDP_CAL_DRV_OUT E35 NC
NC
D64 LPDPRX_AUX_D4_P LPDP_CAL_VSS_EXT E31 NC
NC
B59 LPDPRX_BYP_CLK_P EDP_HPD BN3 NC

C59 LPDPRX_BYP_CLK_N Reserved for PanelID[1:0] on ap_dev board
GND ON MLB; other on Dev DP_WAKEUP AP2 NC
Reserved for PanelID[1:0] on ap_dev board
B B
18 15 9 8 7 PP0V9_SOC_FIXED A57 LPDPRX_RCAL_P
R1001 1
300
1%
1/32W
MF
01005-1 2
ROOM=SOC B57 LPDPRX_RCAL_N
AP_LPDPRX_RCAL_NEG
C1006 1
D57 LPDPRX_EXT_C
100PF NC
5%
16V
NP0-C0G 2
01005
ROOM=SOC
#24401637:Unconnect LPDPRX_EXT_C
A 53
28 27 26 25 23 21 19 18 9 4
46 41 40 39 37 35 34 33 31 30
PP_VDD_MAIN
A
PAGE TITLE
1 C1010 1 C1011 SOC:LPDP
33PF 33PF
5% 5% DRAWING NUMBER SIZE
2 16V 2 16V
NP0-C0G-CERM
01005
NP0-C0G-CERM
01005 Apple Inc.
051-00542 D
ROOM=SOC ROOM=SOC REVISION
AC return path for LCM LPDP which is referenced to GND and VDD_MAIN
R
5.0.0

10 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SOC - SERIAL INTERFACES
D D
R1103
33.2
32 I2S_AP_TO_CODEC_MCLK 1 2 I2S_AP_TO_CODEC_MCLK_R BV65 I2S0_MCK I2C0_SCL CK7 I2C0_AP_SCL 47
1%
1/32W
32 I2S_AP_TO_CODEC_MSP_BCLK BY66 I2S0_BCLK U0700 I2C0_SDA CG12 I2C0_AP_SDA 47
MF 32 I2S_AP_TO_CODEC_MSP_LRCLK BU64 I2S0_LRCK CAYMAN-2GB-20NM-DDR-M

01005 BR64
ROOM=SOC 32 I2S_CODEC_TO_AP_MSP_DIN I2S0_DIN CSP I2C1_SCL AG64 I2C1_AP_SCL 47
32 I2S_AP_TO_CODEC_MSP_DOUT BU65 I2S0_DOUT I2C1_SDA AG66 I2C1_AP_SDA 47

SYM 6 OF 16
I2C2_SCL U3 I2C2_AP_SCL 47
I2S1/2/3 MCLK NC #24559456
NC
D48 I2S1_MCK I2C2_SDA U4 I2C2_AP_SDA 47
53 I2S_AP_TO_BT_BCLK E48 I2S1_BCLK

53 I2S_AP_TO_BT_LRCLK A46 I2S1_LRCK I2C3_SCL AE66 I2C3_AP_SCL 47
53 I2S_BT_TO_AP_DIN C46 I2S1_DIN I2C3_SDA AE65 I2C3_AP_SDA 47
53 I2S_AP_TO_BT_DOUT E46 I2S1_DOUT
BU66 I2S2_MCK
NC
36 35 34 33 32 I2S_MAGGIE_TO_AP_L26_CODEC_BCLK BR66 I2S2_BCLK
36 35 34 33 32 I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK BN64 I2S2_LRCK
36 I2S_MAGGIE_TO_AP_DIN BN65 I2S2_DIN
36 I2S_AP_TO_MAGGIE_DOUT BJ64 I2S2_DOUT
CH11 I2S3_MCK SPI4_SCLK CJ12NC

NC
I2S_BB_TO_AP_BCLK CM7 I2S3_BCLK SPI4_MISO CG22NC
C 53
53 I2S_BB_TO_AP_LRCLK CK9 I2S3_LRCK SPI4_MOSI CM9 NC

C
53 I2S_BB_TO_AP_DIN CG18 I2S3_DIN
53 I2S_AP_TO_BB_DOUT CJ9 I2S3_DOUT
I2C5_SCL CH16 I2C5_SCL 11 47
I2C5_SDA CJ14 I2C5_SDA 11 47
5 BOARD_ID2 CB2 SPI0_MISO GPIO_42 CH20NC PP1V8 5 7 8 9 11 12 13 16 17 18 25 29

30 39 46 47 48 52
5 BOARD_ID1 BY4 SPI0_MOSI GPIO_43 CH22NC
BOARD_ID0 BY3 SPI0_SCLK 1 1
5 BOARD_ID3
NC
CB4 SPI0_SSIN
R1113
10K
R1114
10K
5% 5%
1/32W 1/32W
MF MF
01005 01005
N2 2 ROOM=SOC 2 ROOM=SOC
SPI_CODEC_MAGGIE_TO_AP_MISO SPI1_MISO
R1116 36 32
36 32 SPI_AP_TO_CODEC_MAGGIE_MOSI N3 SPI1_MOSI PMU_SCLK AH65 SPI_PMGR_TO_PMU_SCLK 20

0.00
36 32 SPI_AP_TO_CODEC_MAGGIE_SCLK 1 2 SPI_AP_TO_CODEC_MAGGIE_SCLK_R N4 SPI1_SCLK PMU_MISO AH66 SPI_PMU_TO_PMGR_MISO 20
Route as daisy-chain. No T's allowed.
0% 32 SPI_AP_TO_CODEC_CS_L R3 SPI1_SSIN PMU_MOSI AK64 SPI_PMGR_TO_PMU_MOSI 20
1/32W
MF
01005 DWI_CLK AK65 DWI_PMGR_TO_BACKLIGHT_CLK 37 46
ROOM=SOC
C44 DWI_DO AM64 DWI_PMGR_TO_BACKLIGHT_DATA 37 46
SPI_TOUCH_TO_AP_MISO SPI2_MISO
R1101 39
39 SPI_AP_TO_TOUCH_MOSI B44 SPI2_MOSI

0.00
39 SPI_AP_TO_TOUCH_SCLK 1 2 SPI_AP_TO_TOUCH_SCLK_R A44 SPI2_SCLK DROOP AE3 PMU_TO_AP_PRE_UVLO_L 20
0% 39 SPI_AP_TO_TOUCH_CS_L D44 SPI2_SSIN GPU_TRIGGER BY2 PMU_TO_AP_THROTTLE_GPU_L 20

1/32W
MF
01005
ROOM=SOC SOCHOT AG4 AP_TO_PMU_SOCHOT_L 20
38 SPI_MESA_TO_AP_MISO B42 SPI3_MISO

A42 CLK32K_OUT AM66 AP_TO_CUMULUS_CLK32K
B 38
38
SPI_AP_TO_MESA_MOSI
SPI_AP_TO_MESA_SCLK E44
SPI3_MOSI
SPI3_SCLK
39
B
0.00
38 MESA_TO_AP_INT C42 SPI3_SSIN NAND_SYS_CLK BN66 AP_TO_NAND_SYS_CLK_R 1 2 AP_TO_NAND_SYS_CLK 17
R1118 0%
1/32W
MF
01005
ROOM=SOC
I2C5
See Radar#25316444 for Details
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 30 29
PP1V8
1
A1
C1101
1.0UF
20% VCC
6.3V
2 X5R
0201-1
ROOM=SOC U1101
B1 SCL WLCSP SDA A2 I2C5_SDA
A I2C5_SCL
11 47
11 47 To Cayman SYNC_MASTER=sync SYNC_DATE=04/28/2016

A
PAGE TITLE
VSS
ROOM=SOC SOC:SERIAL
B2
CRITICAL
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

11 OF 53
SHEET
8 7 6 5 4 3 2 . 1
8 7 6 5 4 3 2 1
D D
SOC - GPIO INTERFACES
BB64 GPIO_0
NC
27 AP_TO_ACC_BUCK_VSEL BC65 GPIO_1 U0700
36 AP_TO_MAGGIE_CRESETB_L BB66 GPIO_2 CAYMAN-2GB-20NM-DDR-M
#24557547:Delete R1204 44 20 BUTTON_VOL_UP_L AY65 GPIO_3 CSP
DEV ONLY AY66 GPIO_4
NC
53 AP_TO_BB_RESET_L AV65 GPIO_5 SYM 5 OF 16 TMR32_PWM0 AG2 NC
36 MAGGIE_TO_AP_CDONE AV67 GPIO_6 TMR32_PWM1 AH4 PROX_BI_AP_AOP_INT_PWM_L 13 29
RESERVERD FOR SSHB ID ON DEV BOARD AT67 GPIO_7 TMR32_PWM2 AH3 NC_BB_TO_AP_RESET_ACT_L 53 D101/D111 ONLY
NC
D101/D111 ONLY 53 NC_AP_TO_BB_IPC_GPIO2 AT66 GPIO_8
NC_AP_TO_GNSS_WAKE AT64 GPIO_9 UART0_RXD CL5 UART_AP_DEBUG_RXD
C D101/D111 ONLY 53
53 AP_TO_BB_TIME_MARK AP66 GPIO_10 UART0_TXD CJ7 UART_AP_DEBUG_TXD

40
40
C
D101/D111 ONLY 53 NC_AP_TO_GNSS_TIME_MARK AP65 GPIO_11
53 BB_TO_AP_RESET_DETECT_L AH64 GPIO_12 UART1_CTS* E39 UART_BT_TO_AP_CTS_L 53
29 25 18 17 16 13 11 9 8 7 5 PP1V8 33 AP_TO_SPKAMP2_RESET_L
AE4 GPIO_13 UART1_RTS* D39 UART_AP_TO_BT_RTS_L 53
52 48 47 46 39 30
1
NOSTUFF 29 ALS_TO_AP_INT_L
AC3 GPIO_14 UART1_RXD C39 UART_BT_TO_AP_RXD 53
R1210
10K 53 AP_TO_NFC_FW_DWLD_REQ AE2 GPIO_15 UART1_TXD B39 UART_AP_TO_BT_TXD 53
Nostuff per #24511702 5% BB2
1/32W 17 AP_TO_NAND_FW_STRAP GPIO_16
MF 39 TOUCH_TO_AP_INT_L BB4 GPIO_17 UART2_CTS* AM4 NC_AP_UART2_CTS_L 53
01005
2 ROOM=SOC BOOT_CONFIG0 BC3 GPIO_18 UART2_RTS* AK3 NC_AP_UART2_RTS_L 53
NC D101/D111 ONLY; for GNSS
20 PMU_TO_AP_THROTTLE_CPU_L BC4 GPIO_19 UART2_RXD AK4 NC_AP_UART2_RXD 53
#24608280 BE2 GPIO_20 UART2_TXD AH2 NC_AP_UART2_TXD 53

NC
53 AP_TO_BBPMU_RADIO_ON_L BE4 GPIO_21
D10/D11 ONLY NC_AP_TO_ICEFALL_FW_DWLD_REQ BE3 GPIO_22 UART3_CTS* AA4 UART_NFC_TO_AP_CTS_L 53
39 AP_TO_LCM_RESET_L BG2 GPIO_23 UART3_RTS* W2 UART_AP_TO_NFC_RTS_L 53
36 AP_BI_HOMER_BOOTLOADER_ALIVE CJ11 GPIO_24 UART3_RXD W4 UART_NFC_TO_AP_RXD 53
BOOT_CONFIG1 CL9 GPIO_25 UART3_TXD U2 UART_AP_TO_NFC_TXD 53

NC
20 4 PMU_TO_AP_FORCE_DFU CH14 GPIO_26
Dev only NC_DFU_STATUS CK11 GPIO_27 UART4_CTS* D37 UART_WLAN_TO_AP_CTS_L 53
5 BOOT_CONFIG2 CG20 GPIO_28 UART4_RTS* C37 UART_AP_TO_WLAN_RTS_L 53
BOARD_ID4 AA2 GPIO_29 UART4_RXD B37 UART_WLAN_TO_AP_RXD 53

NC
53 AP_TO_NFC_DEV_WAKE AA3 GPIO_30 UART4_TXD A37 UART_AP_TO_WLAN_TXD 53
20 PMU_TO_AP_BUF_RINGER_A D42 GPIO_31

53 AP_TO_BT_WAKE E42 GPIO_32 UART5_RTXD BG4 SWI_AP_BI_TIGRIS 21
53 AP_TO_WLAN_DEVICE_WAKE A41 GPIO_33

5 BOARD_REV3 C41 GPIO_34
5 BOARD_REV2 E41 GPIO_35
B 5 BOARD_REV1 A39 GPIO_36 B
5 BOARD_REV0 AT4 GPIO_37 UART6_RXD CG16 UART_ACCESSORY_TO_AP_RXD 40
39 AP_TO_TOUCH_MAMBA_RESET_L AT2 GPIO_38 UART6_TXD CG14 UART_AP_TO_ACCESSORY_TXD 40
53 AP_TO_BB_MESA_ON AV3 GPIO_39

53 AP_TO_BB_COREDUMP AY2 GPIO_40 UART7_RXD AP3 UART_HOMER_TO_AP_RXD 36
53 AP_TO_BB_IPC_GPIO1 AY3 GPIO_41 UART7_TXD AM2 UART_AP_TO_HOMER_TXD 36
20 PMU_TO_AP_BUF_POWER_KEY_L BU2 REQUEST_DFU1

20 PMU_TO_AP_BUF_VOL_DOWN_L BU3 REQUEST_DFU2
#25120460:REQUEST_DFU Assignment
A
PAGE TITLE
SOC:GPIO & UART

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

12 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SOC - AOP
D D
PP1V8
5 7 8 9 11 12 16 17 18 25 29 30
39 46 47 48 52
1
NOSTUFF
R1304
1.00K
5%
1/32W
U0700 MF
01005
CAYMAN-2GB-20NM-DDR-M 2
CSP ROOM=SOC
CM16 SYM 7 OF 16
20 AOP_TO_PMU_SLEEP1_REQUEST AOP_DDR_REQ CFSB_AOP CH35 PMU_TO_SYSTEM_COLD_RESET_L 7 20
20 15 PMU_TO_AOP_SLEEP1_READY CM29 AOP_DDR_RESET*

AWAKE_REQ CM31 AOP_TO_PMU_ACTIVE_REQUEST 20
#24512059: Remove R1300 PU 24 SPI_AOP_TO_COMPASS_CS_L CK12 AOP_FUNC_0 AWAKE_RESET* CJ37 PMU_TO_AOP_TRISTAR_ACTIVE_READY 7 20 37 40
24 COMPASS_TO_AOP_INT CK16 AOP_FUNC_1

Use internal pullup in SOC (AOP side). CK18 AOP_PDM_CLK0 CM37 AOP_TO_MESA_BLANKING_EN 38
29 12 PROX_BI_AP_AOP_INT_PWM_L AOP_FUNC_2
CJ29 AOP_PDM_DATA0 CH41 AOP_TO_WLAN_CONTEXT_B 53
24 ACCEL_GYRO_TO_AOP_DATARDY AOP_FUNC_3
CG31 AOP_PDM_DATA1 CK39 AOP_TO_WLAN_CONTEXT_A 53
24 SPI_AOP_TO_ACCEL_GYRO_CS_L AOP_FUNC_4
24 ACCEL_GYRO_TO_AOP_INT CH31 AOP_FUNC_5 RT_CLK32768 CM33 PMU_TO_AOP_CLK32K 20
C 24 SPI_AOP_TO_PHOSPHORUS_CS_L CK20
CJ31
AOP_FUNC_6
AOP_SWD_TCK_OUT CL14 SWD_AP_TO_MANY_SWCLK 17 36 53
C
39 23 20 LCM_TO_MANY_BSYNC AOP_FUNC_7
40 TRISTAR_TO_AOP_INT CK27 AOP_FUNC_8
AOP_SWD_TMS0 CL16 HOMER_TO_AOP_WAKE_INT 36
36 AOP_TO_MAGGIE_EN CK24 AOP_FUNC_9
AOP_SWD_TMS1 CG35 SWD_AOP_BI_BB_SWDIO 53 BB_SWDIO has pullup in Radio_MLB pages
24 PHOSPHORUS_TO_AOP_INT_L CK29 AOP_FUNC_10
SWD_TMS2 BU4 SWD_AP_BI_NAND_SWDIO
24
SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L CK22 AOP_FUNC_11
17
SWD_TMS3 BV3 SWD_AP_BI_HOMER_SWDIO 36

24 BOT_ACCEL_GYRO_TO_AOP_DATARDY CM12 AOP_FUNC_12
35 34 33 32 AUDIO_TO_AOP_INT_L CK31 AOP_FUNC_13
48 AOP_TO_MESA_I2C_ISO_EN CG33 AOP_FUNC_14
Plan to use internal pullup in AOP. Radar 21210869 20 PMU_TO_AOP_IRQ_L CJ33 AOP_FUNC_15
48 I2C_AOP_SCL CM11 AOP_I2C0_SCL

48 I2C_AOP_SDA CJ24 AOP_I2C0_SDA
SPI_IMU_TO_AOP_MISO CJ18 AOP_SPI_MISO

R1305 24
24
SPI_AOP_TO_IMU_MOSI CJ27 AOP_SPI_MOSI

#25756894:North Carbon R1 49.9 2 CJ16
24 SPI_AOP_TO_IMU_SCLK_R1 1 SPI_AOP_TO_IMU_SCLK AOP_SPI_SCLK
1%
1/32W CK14
MF 53 UART_BB_TO_AOP_RXD AOP_UART0_RXD
01005 CJ20
ROOM=SOC 53 UART_AOP_TO_BB_TXD AOP_UART0_TXD
R1306 36 MAGGIE_TO_AOP_INT CJ22 AOP_UART1_RXD

49.9 2 36 UART_AOP_TO_MAGGIE_TXD CL11 AOP_UART1_TXD
#25756894:South Carbon R2 24 SPI_AOP_TO_IMU_SCLK_R2 1
1% 39 UART_TOUCH_TO_AOP_RXD CG29 AOP_UART2_RXD
1/32W CH29
MF 39 UART_AOP_TO_TOUCH_TXD AOP_UART2_TXD
01005
ROOM=SOC
CL35
B R1303 32
32
I2S_CODEC_XSP_TO_AOP_BCLK
I2S_CODEC_XSP_TO_AOP_DIN CJ39
AOP_I2S_BCLK
AOP_I2S_DIN
B
33.2 CM35
36 35 34 33 I2S_AOP_TO_MAGGIE_L26_MCLK 1 2 I2S_AOP_TO_MAGGIE_L26_MCLK_R AOP_I2S_MCK
1% 32 I2S_CODEC_XSP_TO_AOP_LRCLK CK37 AOP_I2S_LRCK DOCK_ATTENTION CG41 AOP_TO_SPKAMP1_ARC_RESET_L 34 35
1/32W
MF CG39
01005 32 I2S_AOP_TO_CODEC_XSP_DOUT AOP_I2S_DOUT DOCK_CONNECT CL37 MESA_TO_AOP_FDINT 38
ROOM=SOC
DOCK_CONNECT can be GPIO, but input only. Radar 21680759
A
PAGE TITLE
SOC:AOP
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

13 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SOC - CPU, GPU & SOC RAILS

PP_CPU_VAR
PP1401 SM
1 PP_GPU_VAR 14 18
14 18
P2MM-NSM PP
PP_SOC_VAR 18
ROOM=SOC
1.06V @17.4A MAX 0.80V @4.1A MAX
0.9V @tbd A MAX
0.625V @tbd A MAX PP1402
P2MM-NSM
SM
PP
1 PP_CPU_VAR 14 18 1 C1436 1 C1444 1 C1403 0.67V @TBDA MAX
ROOM=SOC 10UF OMIT
10UF 10UF 20%
20% 20%
1
2 6.3V
CERM-X5R
2 6.3V
CERM-X5R
2 6.3V
CERM-X5R XW1403
SHORT-20L-0.05MM-SM
1 C1401 1 C1408 1 C1434 C1449 0402-9 0402-9 0402-9 1 2 BUCK2_PP_SOC_FB 18
D 20%
15UF
20%
15UF
20%
15UF 2.2UF
20%
6.3V
ROOM=SOC ROOM=SOC ROOM=SOC
ROOM=SOC
NO_XNET_CONNECTION
D
2 6.3V
X5R
6.3V
2 X5R 2 6.3V
X5R 2 X5R-CERM
0402-1 0402-1 0402-1 0201-1
ROOM=SOC
XW1401
SHORT-20L-0.05MM-SM
1.03V @12.9A MAX
AD10 AB13 1 2 BUCK1_PP_GPU_FB 18 ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
OMIT 0.92V @10.7A MAX
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
AD15 U0700 AB17
ROOM=SOC
NO_XNET_CONNECTION 0.80V @TBD A MAX C1465 C1438 C1440 C1442
CAYMAN-2GB-20NM-DDR-M 0.67V @TBD A MAX 4.3UF 1UF 7.5UF 0.47UF
C1404 C1411 C1417 C1422 C1427 C1430 AD19
CSP
AB21
PP_GPU_VAR 14 18
20%
4V
20%
4V
20%
4V
20%
6.3V
7.5UF 7.5UF 7.5UF 4.3UF 4.3UF 4.3UF AD23 AB25 CERM CERM CERM CERM
20% 20% 20% 20% 20% 20% 1 1 0402 0402 0402 0402
4V
CERM
4V
CERM
4V
CERM
4V
CERM
4V
CERM
4V
CERM
AF13 SYM 8 OF 16 AB43 1 C1414 C1466
2.2UF
C1448
2.2UF
1 3 1 3 1 3 1 3
0402 0402 0402 0402 0402 0402 AF17 AB47 15UF 20% 20%
1 3 1 3 1 3 1 3 1 3 1 3 20% 6.3V 6.3V
AJ23 AB51 2 6.3V 2 X5R-CERM 2 X5R-CERM 2 4 2 4 2 4 2 4
X5R 0201-1 0201-1
AL21 AB55 0402-1
2 4 2 4 2 4 2 4 2 4 2 4 AL8 AD40
AN10 AD45
AN19 AD49
AN23 AD53
AR13 AF55 ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC

AR17 AJ40 C1402 C1409 C1452 C1454 C1416 C1421 C1426 C1432
4.3UF 4.3UF 4.3UF 4.3UF 7.5UF 7.5UF 7.5UF 7.5UF
C1405 C1412 C1418 C1423 C1428 C1431 AR21 AJ49 20%
4V
20%
4V
20%
4V
20%
4V
20%
4V
20%
4V
20%
4V
20%
4V AD28 BK45
4.3UF
20%
4.3UF
20%
1UF
20%
1UF
20%
1UF
20%
1UF
20%
AU10 AJ53 CERM
0402
CERM
0402
CERM
0402
CERM
0402
CERM
0402
CERM
0402
CERM
0402
CERM
0402 AD32 U0700 BK49
4V 4V 4V 4V 4V 4V AU15 J25 1 3 1 3 1 3 1 3 1 3 1 3 1 3 1 3 CAYMAN-2GB-20NM-DDR-M
CERM CERM CERM CERM CERM CERM AF60 BK53
0402 0402 0402 0402 0402 0402 AW13 J30 CSP
1 3 1 3 1 3 1 3 1 3 1 3 AJ28 BM55
AW17 J38 2 4 2 4 2 4 2 4 2 4 2 4 2 4 2 4 AJ32 BP15
AW21 J43 SYM 9 OF 16
2 4 2 4 2 4 2 4 2 4 2 4 AJ36 BP19
BA10 VDD_CPU J47
AL6 BP23
BA23 J51
AN28 BP28
C BD21
BD8
L15
L19
AN32 BP32 C
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC AN36 BP36
BF10 L23 C1410 C1415 C1420 C1425 C1429 C1456 C1457 AN40 BP40
C1406 C1413 C1419 C1424 C1460 C1461 BF23 L28 1UF
20%
1UF
20%
1UF
20%
0.47UF
20%
0.47UF
20%
0.47UF
20%
0.47UF
20% AN45 BP45
0.47UF 0.47UF 0.47UF 0.47UF 7.5UF 7.5UF BH13 VDD_GPU L32 4V 4V 4V 6.3V 6.3V 6.3V 6.3V
20% 20% 20% 20% 20% 20% CERM CERM CERM CERM CERM CERM CERM AN49 BP49
6.3V 6.3V 6.3V 6.3V 4V 4V BH17 L36 0402 0402 0402 0402 0402 0402 0402
CERM CERM CERM CERM CERM CERM 1 3 1 3 1 3 1 3 1 3 1 3 1 3 AN53 BP53
0402 0402 0402 0402 0402 0402 BH21 L40
1 3 1 3 1 3 1 3 1 3 1 3 AN58 BP58
BK10 L45
2 4 2 4 2 4 2 4 2 4 2 4 2 4 AR25 BT13
BK15 L49
2 4 2 4 2 4 2 4 2 4 2 4 AR30 BT17
AJ10 L53
AR34 BT21
P13
AR38 BT25
T15
AR43 BT30
OMIT T36
AR47 BT34
T40
XW1402
SHORT-20L-0.05MM-SM T53
AR51 BT38
18 BUCK0_PP_CPU_FB 2 1 AR55 BT43
V13
1.06V @1.0A MAX ROOM=SOC
AW30 BT47
NO_XNET_CONNECTION V25
0.80V @TBDA MAX AW34 BT51
V34
AW38 BT55
V38
AW43 VDD_SOC BW10
18 PP_CPU_SRAM_VAR AF8 V51 VDD_SOC
AW47 CA13
AN15 V55
ROOM=SOC ROOM=SOC
ROOM=SOC
AW51 CA17
AR8 Y28
C1407 C1435 C1433 1 C1458 AU19
AW55 CA21
7.5UF 7.5UF 7.5UF 10UF VDD_CPU_SRAM AW60 CA25
20% 20% 20% 20% AW8
4V 4V 4V 2 6.3V BD25 CA30
CERM CER CERM CERM-X5R BA15
0402 0402 0402 0402-9 BD30 CA34
1 3 ROOM=SOC
BA19
1 3 1 3 BD34 CA38
BH8
B 2 4 2 4
BD38 CA43 B
2 4 BD43 CA47
BD47 CE13
BD51 CE17
AF43
BD55 CE45
AF47
BD6 J13
AF51
BD60 J21
P17 VDD_CPU_SENSE BK23 AP_VDD_CPU_SENSE 20
BF28 J34
P21
P25 VSS_CPU_SENSE BK21 TP_AP_VSS_CPU_SENSE 1 SM PP1403 1
SM
PP PP1408
P2MM-NSM
BF32 P55
PP
P2MM-NSM ROOM=SOC
BF36 T10
P30 ROOM=SOC BF45 T60
P34 VDD_GPU_SENSE AJ45 AP_VDD_GPU_SENSE 20
BF49 V30
P38
1.03V @1.44A MAX P43 VDD_SOC_SENSE AL47 TP_VDD_SOC_SENSE 1 PP1410 1
SM
PP PP1409
P2MM-NSM
BF53 Y10
0.92V @1.50A MAX PP SM BF58 Y36
P47 VDD_GPU_SRAM P2MM-NSM ROOM=SOC
0.80V @TBD A MAX ROOM=SOC BK28 Y60
18 PP_GPU_SRAM_VAR
P51 VSS_SENSE AJ47 TP_VSS_SENSE 1
PP SM PP1411
P2MM-NSM BK32 BF40
Y15 ROOM=SOC BK36 J60
ROOM=SOC ROOM=SOC
Y19
BK40 AW25
Y23
C1439 C1437 1 C1459 Y40
7.5UF 7.5UF 10UF
20% 20% 20% Y45
4V 4V 2 6.3V
CER CERM CERM-X5R Y49
0402 0402 0402-9
1 3 ROOM=SOC Y53
1 3
2 4
2 4
A
PAGE TITLE
SOC:POWER (1/3)
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

14 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SOC - POWER SUPPLIES

DDR IMPEDANCE CONTROL
18 15 7 PP1V1
1.06-1.17V @0.85A MAX
PP1V1 1 1 1 1
18 15 7
R1501 R1502 R1503 R1504 1 R1505 1 R1506
D 1
C1506 1
C1528 1
C1518 1
C1519 1
C1514 1
C1522 1%
240
1%
240
1%
240
1%
240 240
1%
240
1%
D
10UF 10UF 2.2UF 2.2UF 2.2UF 2.2UF 1/32W 1/32W 1/32W 1/32W 1/32W 1/32W
20% 20% 20% 20% 20% 20% MF MF MF MF MF MF
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 2 01005 2 01005 2 01005 2 01005 01005 01005
2 CERM-X5R 2 CERM-X5R 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC 2 ROOM=SOC 2 ROOM=SOC
0402-9 0402-9 0201-1 0201-1 0201-1 0201-1
BE1 DDR0_RREF CD3 DDR0_RREF
BJ1 U0700 DDR1_RREF BY64 DDR1_RREF
BL1 CAYMAN-2GB-20NM-DDR-M DDR2_RREF K3 DDR2_RREF
TBD-TBDV @1.9A MAX BM8 CSP DDR3_RREF K65 DDR3_RREF
18 10 9 8 7 PP0V9_SOC_FIXED BP6
SYM 11 OF 16
BT8 VDDIO11_DDR0 DDR0_ZQ BN2 DDR0_ZQ
BW6 DDR3_ZQ AA66 DDR3_ZQ
C1502 C1527 C1503 CA8
4.3UF 1UF 7.5UF AB30 BK6
20%
4V
20%
4V
20%
4V AB34 U0700 BM13
CC6 DDR0_RET* CF3 PMU_TO_AOP_SLEEP1_READY 13 20
CERM CERM CERM CAYMAN-2GB-20NM-DDR-M CD1 DDR1_RET* CB65

0402 0402 0402 AB38 BM17
1 3 1 3 1 3 CSP CH1 DDR2_RET* K4
AD58 BM21
AF25 BM25 DDR3_RET* K64 FL1501
2 4 2 4 2 4 SYM 10 OF 16 1.06 - 1.17V @4mA MAX 100OHM-25%-0.12A
AF30 BM30
VDDIO11_PLL_DDR0 CE8 PP1V1_DDR_PLL 1 2 PP1V1 7 15 18
AF34 BM34
VDDIO11_PLL_DDR1 BW60 01005
AF38 BM38
AF62 BM43 VDDIO11_PLL_DDR2 J8 1 C1508 1 C1509 1 C1523 1 C1510 ROOM=SOC
VDDIO11_PLL_DDR3 P58 0.22UF 0.22UF 0.22UF 0.22UF

AJ58 BM47 BE67 20% 20% 20% 20%
AL25 BM51 BH60 2 6.3V 2 6.3V 2 6.3V 2 6.3V
X5R X5R X5R X5R
1 C1501 AL30 BP10 BJ67 01005-1
ROOM=SOC
01005-1
ROOM=SOC
01005-1
ROOM=SOC
01005-1
ROOM=SOC
10UF AL34 BP60 BK62
20%
2 6.3V AL38 BW15 BL67
CERM-X5R
0402-9 AL43 BW19 BM60 VDDIO11_DDR1
ROOM=SOC
C AL51
AL55
BW23
BW28
BP62
BT60 CG3
(CURRENT INCLUDED IN VDD2) C
VDDIO11_RET_DDR0 PP1V1_SDRAM 15 18 19
AL60 BW32 BW62 VDDIO11_RET_DDR1 CD65
AR60 BW36 CD67 VDDIO11_RET_DDR2 H4
AU28 BW40 CH67 VDDIO11_RET_DDR3 H64
AU32 BW45
AU36 BW49
AU40 BW53
AU45 BW58 DDR0_SYS_ALIVE CF4 SYSTEM_ALIVE 17 20 21
VDD_FIXED VDD_FIXED
AU49 BW8 DDR1_SYS_ALIVE CB64
AU53 CC10 DDR2_SYS_ALIVE H3
AB8
AU58 CC15 DDR3_SYS_ALIVE H65
AC1
AU6 CC19
AE1
BA28 CC23
AH1
BA32 CC28
E1
BA36 CC32 AM3
K1 VDDIO11_DDR2
BA40 CC45 AM65
L6
BA45 G32 BB3
P8
BA49 G36 BB65
T6
BA53 J17 BR1
V8
BA58 J23 BR67
Y6
BH25 J55 BV1
BH30 J62 BV67
BH34 L10 BY1
BH38 L58 BY67
BH43 L60 C2 1.06 - 1.17V @1.74A MAX
BH47 T32 C66 PP1V1_SDRAM 15 18 19
B BH51 T58 AB60 VDD2 CJ2

B
BH55 T8 AC67 CJ66 1 C1512 1 C1513 1 C1507 1 C1529 1 C1511 1 C1515
BK58 Y58 AD62 CK2 10UF 10UF 2.2UF 2.2UF 2.2UF 2.2UF
20% 20% 20% 20% 20% 20%
Y8 AE67 CK66 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
CERM-X5R CERM-X5R X5R-CERM X5R-CERM X5R-CERM X5R-CERM
AH67 D2 0402-9 0402-9 0201-1 0201-1 0201-1 0201-1
0.797-0.945V @9 mA MAX E67 D66
AW23 VDD_FIXED_CPU VDDIO11_DDR3
K67 N1
0.765-0.840V @60mA MAX P60 N67
19 PP0V8_AOP CC36 T62 R1
CE30 VDD_LOW V60 R67
1 CE40 Y62 W1
C1504
2.2UF W67
20%
6.3V
2 X5R-CERM
0201-1
ROOM=SOC
A
PAGE TITLE
SOC:POWER (2/3)
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

15 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SOC - POWER SUPPLIES

1.70-1.95V @134mA MAX
A12 AL23 B1 BL66 CA15 CH5 D20 L38 PP1V8_SDRAM AM1
A16 U0700 AL28 B3 U0700 BM10 CA19 U0700 CH52 D22 U0700 L43
46 41 40 37 36 32 21 20 18 16
53 48 47
AM67 U0700
CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M CAYMAN-2GB-20NM-DDR-M 1 1 1 1
A2
CSP
AL32 B35
CSP
BM15 CA23
CSP
CH54 D24
CSP
L47 C1615
2.2UF
C1605
2.2UF
C1608
2.2UF
C1612
2.2UF
BB1 CAYMAN-2GB-20NM-DDR-M
A20 AL36 B41 BM19 CA28 CH56 D26 L51 20% 20% 20% 20% BB67 CSP
A24 AL40 B46 BM23 CA32 CH59 D27 SYM 16 OF 16 L55 6.3V 6.3V 6.3V 6.3V C3 VDD1
2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM
D A27
SYM 13 OF 16
AL45 B52
SYM 14 OF 16
BM28 CA36
SYM 15 OF 16
CH61 D29 L62 0201-1
ROOM=SOC
0201-1
ROOM=SOC
0201-1
ROOM=SOC
0201-1
ROOM=SOC C65 SYM 12 OF 16
D
A31 AL53 B65 BM32 CA40 CH63 D3 L8 CK3
A35 AL58 B67 BM36 CA45 CH64 D31 M1 CK65
A5 AL62 BA13 BM40 CA49 CH65 D35 M2
A52 AN13 BA17 BM45 CA53 CH66 D4 M3
A56 AN17 BA21 BM49 CA58 CH7 D41 M4 CKPLUS_WAIVE=PWRTERM2GND
1.62-1.98V @43mA MAX CKPLUS_WAIVE=PWRTERM2GND
A59 AN21 BA30 BM53 CA6 CH9 D46 M64 29 25 18 17 13 12 11 9 8 7 5 PP1V8 AJ62 VDD18_EFUSE1 CG7
52 48 47 46 39 30
A63 AN25 BA34 BM58 CA62 CJ1 D5 M65 AN62 VDD18_EFUSE2 G34
1 1 1 1
A66 AN30 BA38 BM6 CB1 CJ3 D52 M66 C1602
10UF
C1607
2.2UF
C1610
2.2UF
C1614
2.2UF
AU62 VDDIO18_GRP1
A9 AN34 BA43 BM62 CB3 CJ4 D56 M67 20% 20% 20% 20% BA62
AA1 AN38 BA47 BN1 CB66 CJ41 D59 P10 6.3V 6.3V 6.3V 6.3V BF62
2 CERM-X5R 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM
AA67 AN43 BA51 BN67 CB67 CJ42 D63 P15 0402-9 0201-1 0201-1 0201-1
AB10 AN47 BA55 BP13 CC13 CJ46 D65 P19 G40
AB15 AN51 BA60 BP17 CC17 CJ5 D67 P23 G45
AB19 AN55 BA8 BP21 CC21 CJ50 D7 P28 G49 VDDIO18_GRP2
AB23 AN60 BC1 BP25 CC30 CJ54 D9 P32 G53
AB28 AN8 BC2 BP30 CC34 CJ57 E12 P36
AB32 AP1 BC66 BP34 CC38 CJ61 E14 P40 AD6
AB36 AP4 BC67 BP38 CC43 CJ64 E18 P45 AJ6
AB40 AP64 BD10 BP43 CL22 CJ65 E2 P49 AN6
VDDIO18_GRP3
AB45 AP67 BD23 BP47 T30 CJ67 E20 P53 BA6
AB49 AR10 BD28 BP51 CC8 CK4 E22 P6 BF6
AB53 AR15 BD32 BP55 CD2 CK41 E26 P62
AB58 AR19 BD36 BP8 CD4 CK42 E27 R2 CE19
AB6 AR28 BD40 BR3 CD64 CK46 E29 R4 CE23 VDDIO18_GRP4
AB62 AR32 BD45 BR65 CD66 CK5 E3 R64
AC2 AR36 BD49 BT10 CE10 CK50 E37 R66 1.62-1.98V @10mA MAX CE28
PP1V8_SDRAM
C AC4 AR40 BD53 BT15 CE15 CK54 E4 T13
46 41 40 37 36 32 21 20 18 16
53 48 47
CE32 C
1 1
AC64 AR45 BD58 BT19 CE47 CK57 E5 T25 C1603
2.2UF
C1601
0.1UF
CE34
AC66 AR49 BD62 BT23 CE53 CK61 E54 T34 20% 20% CE36 VDDIO18_GRP10
AD13 AR53 BF21 BT28 CE6 CK64 E57 T38 6.3V 6.3V CE43
VSS VSS VSS VSS VSS VSS VSS VSS 2 X5R-CERM 2 X5R-CERM
AD17 AR58 BF25 BT32 CE62 CL1 E59 T51 0201-1 01005 CE38
ROOM=SOC ROOM=SOC
AD21 AR6 BF30 BT36 CF1 CL12 E61 T55
AD25 AR62 BF34 BT40 CF2 CL18 E64 U1 1.62-1.98V @2mA MAX AR23 VDD18_TSADC0
AD30 AT1 BF43 BT45 CF64 CL24 E65 U67 BK19 VDD18_TSADC1
AD34 AT3 BF47 BT49 CF65 CL27 E66 V10 AF21 VDD18_TSADC2
AD43 AT65 BF51 BT53 CF66 CL3 E7 V15 J36 VDD18_TSADC3
AD47 AU13 BF55 BT58 CF67 CL33 E9 V28 CE21 VDD18_TSADC4
AD51 AU17 BF8 BT6 CG1 CL39 F1 V32 BF60 VDD18_TSADC5
AD55 AU21 BG1 BT62 CG11 CL4 F2 V36
AD60 AU25 BG3 BU1 CG2 CL41 F3 V40 1.62-1.98V @1mA MAX CG9 VDD18_FMON
AD8 AU30 BG65 BU67 CG24 CL44 F4 V53
AF10 AU34 BG67 BV2 CG27 CL48 F64 V58 1.62-1.98V @1mA MAX CC40 VDD18_LPOSC
AF15 AU38 BH10 BV4 CG4 CL52 F65 V6
AF19 AU43 BH15 BV64 CG42 CL56 F66 V62 TBD-TBDV @30mA MAX AU23
19 PP1V2_REF VDD12_CPU_UVD
AF23 AU47 BH19 BV66 CG44 CL59 F67 W3 T28 VDD12_GPU_UVD
AF28 AU51 BH23 BW13 CG46 CL63 G38 W65 1 C1611 Y38 VDD12_SOC_UVD
AF32 AU55 BH28 BW17 CG48 CL65 G43 Y13 2.2UF
20%
AF36 AU60 BH32 BW21 CG5 CL67 G47 Y17 2 6.3V BA25
X5R-CERM VDD12_PLL_CPU
AF40 AU8 BH36 BW25 CG52 CL7 G51 Y21 0201-1
ROOM=SOC
AF45 AV1 BH40 BW30 CG54 CM18 G8 Y25 Y32
AF49 AV2 BH45 BW34 CG56 CM2 H1 Y30 R1602 VDD12_PLL_CPU:1.14-1.26V @13mA MAX AD36
AF53 AV4 BH49 BW38 CG59 CM24 H2 Y43 0.00 AD38 VDD12_PLL_SOC
19 10 8 PP1V2_SOC 1 2 PP1V2_PLL_CPU
B AF58 AV64 BH53 BW43 CG61 CM27 H66 Y47 0%
1/32W
Y34 B
AF6 AV66 BH58 BW47 CG64 CM39 H67 Y51 MF
01005
1 C1606
AG1 AW10 BH6 BW51 CG65 CM4 J10 Y55 ROOM=SOC 0.1UF
AG3 AW15 BH62 CE51 CG66 CM41 J15 BF38 20%
2 6.3V
AG65 AW19 BK13 BY65 CG67 CM44 J19 J58 X5R-CERM
01005
AG67 CH50 BK17 C11 CH12 CM48 J28 ROOM=SOC
AJ21 AW28 AL49 C14 CH18 CM5 J32

AJ25 AW32 BK25 C18 CH2 CM52 J40 R1601 VDD12_PLL_SOC:1.14-1.26V @31mA MAX
AJ30 AW36 BK30 C22 CH24 CM56 J45 0.00 PP1V2_PLL_SOC
1 2
AJ34 AW40 BK34 C26 CH27 CM59 J49 0%
1 1/32W
AJ38 AW45 BK38 C29 CH3 CM63 J53 C1604
2.2UF
MF
01005
1 C1609 1 C1613
AJ43 AW49 BK43 C33 CH33 CM66 J6 20% ROOM=SOC 0.1UF 0.1UF
AL10 AW53 BK47 C35 CH39 D1 K2 6.3V 20% 20%
X5R-CERM 2 2 6.3V 2 6.3V
AJ51 AW58 BK51 C4 CH4 D11 K66 0201-1 X5R-CERM X5R-CERM
ROOM=SOC 01005 01005
AJ55 AW6 BK55 C52 CH42 D12 L13 ROOM=SOC ROOM=SOC
AJ8 AW62 BK60 C54 CH44 D14 L17

AK1 AY1 BK8 C57 CH46 D16 L21
AK2 AY4 BL2 C61 CH48 D18 L25
AK66 AY64 BL4 C64 L30
AK67 AY67 BL64 C7 L34
CA10
A
PAGE TITLE
SOC:POWER (3/3)
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

16 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
315mA MAX
R1703
24.9
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 30 29
PP1V8 1 2 PP1V8_NAND_AVDD
1%
1/32W
MF
01005 1 1
ROOM=NAND C1726
2.2UF
C1710
0.1UF
20% 20%
6.3V 6.3V
2 X5R-CERM 2 X5R-CERM
0201-1 01005
ROOM=NAND ROOM=NAND
17 NAND_AGND
PROBE POINTS
D D
1 1 1 1
C1701
15UF
C1707
15UF
C1729
15UF
C1730
15UF 17 8 90_PCIE_AP_TO_NAND_REFCLK_P 1
SM
PP1701
PP
20% 20% 20% 20% P2MM-NSM
6.3V 6.3V 6.3V 6.3V ROOM=NAND
2 X5R 2 X5R 2 X5R 2 X5R
0402-1
ROOM=NAND
0402-1
ROOM=NAND
0402-1
ROOM=NAND
0402-1
ROOM=NAND
17 8 90_PCIE_AP_TO_NAND_REFCLK_N 1
SM
PP PP1702
P2MM-NSM
ROOM=NAND
1 C1739 1 C1741 1 C1743 1 C1745 1 C1747

1.0UF 1.0UF 1.0UF 1.0UF 1.0UF
20% 20% 20% 20% 20%
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
X5R X5R X5R X5R X5R
0201-1 0201-1 0201-1 0201-1 0201-1
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
1 1 1 1 1
C1708 C1711 C1717 C1723 C1712
100PF
220PF 22PF 68PF 39PF 5%
5% 5% 5% 5% 16V
2 10V
C0G-CERM 2 16V
CERM 2 16V
NP0-C0G 2 16V
NP0-C0G 2 NP0-C0G
01005 01005 01005 01005 01005
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
19 PP0V9_NAND
1007mA MAX
1
C1704 1
C1702 1
C1705 1 C1722 1 C1727
15UF 15UF 15UF 15UF 15UF
20% 20% 20% 20% 20%
6.3V 6.3V 6.3V 6.3V 6.3V
2 X5R 2 X5R 2 X5R 2 X5R 2 X5R
C 0402-1
ROOM=NAND
0402-1
ROOM=NAND
0402-1
ROOM=NAND
0402-1
ROOM=NAND
0402-1
ROOM=NAND #24543147:10uF for 32GB
1230mA MAX (1us peak power) C
PP3V0_NAND 19
OMIT OMIT OMIT OMIT OMIT OMIT
1 C1737 1 C1738 1 C1740 1 C1742 1 C1744 1 C1746

1 C1748 1 C1713 1 C1716 1 C1719 1 C1721 1 C1733
15UF 15UF 15UF 15UF 15UF 15UF
1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 20% 20% 20% 20% 20% 20%
20% 20% 20% 20% 20% 20% 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1
X5R X5R X5R X5R X5R X5R
0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
1 C1703 1 C1706 1 C1709 1 C1714 1 C1720 1 C1728

1 C1749 1 C1750 1 C1751 1 C1752 1 C1753 1 C1754
1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF
220PF 22PF 100PF 220PF 100PF 68PF 20% 20% 20% 20% 20% 20%
5% 5% 5% 5% 5% 5% 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
2 10V
C0G-CERM 2 16V
CERM 2 16V 2 10V
C0G-CERM 2 16V 2 16V
NP0-C0G
X5R
0201-1
X5R
0201-1
X5R
0201-1
X5R
0201-1
X5R
0201-1
X5R
0201-1
01005 01005 NP0-C0G 01005 NP0-C0G 01005
01005 01005 ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
PP1V8
1 C1715 1 C1718 1 C1731 1 C1732 1 C1734 1 C1735 1 C1736
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 30 29 220PF 22PF 68PF 39PF 100PF 220PF 100PF
5% 5% 5% 5% 5% 5% 5%
1 2 10V 2 16V 2 16V 2 16V 2 16V 2 10V 2 16V
C1724
0.01UF
C0G-CERM
01005
CERM
01005
NP0-C0G
01005
NP0-C0G
01005
NP0-C0G
01005
C0G-CERM
01005
NP0-C0G
01005
10% ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
6.3V
2 X5R NAND_VREF
OG10
01005
OD10
OB10
OA10
OF10
OG0
OD0
OB0
OA0
OF0
M4
C3
R3
R7
R5
K4
K6
E5
A3
A7
A5
F2
J5
J7
J1
J9
ROOM=NAND
PCI_AVDD_CLK1
PCI_AVDD_CLK2
PCI_AVDD_H
PCI_VDD1
PCI_VDD2
AVDD1
VREF
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VCC
VCC
VCC
VCC
VCC
VCC
1 C1725
B 0.01UF
10%
B
2 6.3V
X5R
01005
ROOM=NAND U1701
THGBX6T1T82LFXF
VLGA
11 AP_TO_NAND_SYS_CLK D2 CLK_IN EXT_D0 G3 PMU_TO_NAND_LOW_BATT_BOOT_L 20
VER-1 J3
H8 EXT_D1 AP_TO_NAND_FW_STRAP 12
17 8 90_PCIE_AP_TO_NAND_REFCLK_P PCIE_REFCLK_P H2
H6 EXT_D2 NC
17 8 90_PCIE_AP_TO_NAND_REFCLK_N PCIE_REFCLK_M ROOM=NAND E3
EXT_D3 NC
G9 BOMOPTION=OMIT_TABLE E7
8 PCIE_NAND_BI_AP_CLKREQ_L PCIE_CLKREQ* EXT_D4 NC
CRITICAL F6
M6 EXT_D5 NC
PCIE_NAND_RESREF PCI_RESREF C7
EXT_D6 NC
1 90_PCIE_AP_TO_NAND_TXD_P M8 PCIE_RX0_P EXT_D7 B8 SYSTEM_ALIVE
R1704
3.01K
8
8 90_PCIE_AP_TO_NAND_TXD_N K8 PCIE_RX0_M
15 20 21
1% EXT_NCE G1 PCIE_AP_TO_NAND_RESET_L 8
1/32W N5
MF NC PCIE_RX1_P F4 ROOM=NAND 0.00 R1702
01005 N3 EXT_NRE SWD_AP_BI_NAND_SWDIO_R 1 2 SWD_AP_BI_NAND_SWDIO 13
2 ROOM=NAND NC PCIE_RX1_M 1/32W 0% 01005 MF
C5 ROOM=NAND 0.00 R1707
P8 EXT_NWE SWD_AP_NAND_SWCLK_R 1 2 SWD_AP_TO_MANY_SWCLK 13 36 53
8 90_PCIE_NAND_TO_AP_RXD_P PCIE_TX0_P 1/32W 0% 01005 MF
8 90_PCIE_NAND_TO_AP_RXD_N N7 PCIE_TX0_M EXT_RNB G5
NC
M2 PCIE_TX1_P EXT_CLE H4
NC NC
K2 PCIE_TX1_M
NC EXT_ALE D4
7 AP_TO_NAND_RESET_L F8 RESET*
A NC
D8 TRST*
A
NAND_ZQ D6 ZQ PAGE TITLE
NAND
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
R1701
34.8
DRAWING NUMBER
051-00542
SIZE
D
B2
B4
B6
OE10
G7
L3
L5
L7
P2
P4
P6
OC0
OC10
0.5% OE0 Apple Inc.
1/32W REVISION
MF
01005
2 ROOM=NAND
17 NAND_AGND
R
5.0.0

17 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
L1806 Voltages per Cayman Power Spec, Sec. 2.2, rev 0.9.2, #24557869
U1801 1.0UH-20%-3.6A-0.060OHM
D2333A1 BUCK0_LX0 1 2 PP_CPU_VAR 14
WLCSP
19 VDD_MAIN_SNS M8 VDD_MAIN_SNS B4 NO_XNET_CONNECTION=1 PIQA20161T-SM CRITICAL
SYM 2 OF 4 0.625V - 1.06V
N7 VDD_MAIN ROOM=PMU
BUCK0_LX0
C4
ROOM=PMU 1 C1818 1 C1825 1 C1831 1 C1837 1 C1842 1 C1844
H6 VDD_MAIN_E D4 15UF 15UF 15UF 15UF 15UF 15UF
20% 20% 20% 20% 20% 20%
F11 VDD_MAIN_N A4 L1807 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R
R13 VDD_MAIN_SW
0.22UH-20%-6.7A-0.023OHM 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1
BAT/USB
53
PP_VDD_MAIN
13.4A MAX
28 27 26 25 23 21 19 10 9 4
1 2 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
H14 A6 BUCK0_LX1
BUCK0
46 41 40 39 37 35 34 33 31 30 VDD_MAIN_W
H13 VDD_MAIN_W B6 PINA20121T-SM CRITICAL
1 C1846 1 C1850 1 C1853 1 C1857 BUCK0_LX1
C6
NO_XNET_CONNECTION=1
ROOM=PMU
10UF 10UF 10UF 10UF
20% 20% 20% 20% D6
2 6.3V 2 6.3V 2 6.3V 2 6.3V
D CERM-X5R
0402-9
CERM-X5R
0402-9
CERM-X5R
0402-9
CERM-X5R
0402-9
A5
B5
L1808
0.22UH-20%-6.7A-0.023OHM 1 C1819 1 C1826 1 C1832 1 C1838 1 C1843 1 C1845 1 C1872 D
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU VDD_BUCK0_01 15UF 15UF 15UF 15UF 15UF 15UF 220PF
C5 2 1 20% 20% 20% 20% 20% 20% 5%
A8 BUCK0_LX2
D5 PINA20121T-SM 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 10V
C0G-CERM
B8 NO_XNET_CONNECTION=1 CRITICAL 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1 01005
BUCK0_LX2 ROOM=PMU
A9 C8 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
1 C1875 1 C1847 1 C1851 1 C1854 1 C1858 B9
VDD_BUCK0_23
D8
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF 2.2UF
20% C9 L1809
2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V D9 0.22UH-20%-6.7A-0.023OHM
X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM
0201-1 0201-1 0201-1 0201-1 0201-1 A10 BUCK0_LX3 1 2
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
A17 B10 PINA20121T-SM CRITICAL
BUCK0_LX3 NO_XNET_CONNECTION=1 ROOM=PMU
B17 C10
VDD_BUCK1_01
C17 D10
D17
1 C1876 1 C1848 1 C1852 1 C1855 1 C1859 BUCK0_FB F10BUCK0_PP_CPU_FB
2.2UF 2.2UF 2.2UF 2.2UF 2.2UF A13
14
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V B13
L1810
X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM 1.0UH-20%-3.6A-0.060OHM
BUCK INPUT
0201-1 0201-1 0201-1 0201-1 0201-1 C13 VDD_BUCK1_23
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU B18 BUCK1_LX0 1 2 PP_GPU_VAR 14
D13 PIQA20161T-SM
C18 NO_XNET_CONNECTION=1 CRITICAL
BUCK1_LX0 0.67V - 0.92V
H1 D18
ROOM=PMU 1 C1813 1 C1820 1 C1827 1 C1833 1 C1839 1 C1865
13.4A MAX
1.03V for overdrive only
H2 VDD_BUCK2 A18 L1811 20%
15UF
20%
15UF
20%
15UF
20%
15UF
20%
15UF
20%
15UF
BUCK1
1 C1877 1 C1849 1 C1856 H3
0.22UH-20%-6.7A-0.023OHM 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V
X5R X5R X5R X5R X5R X5R
2.2UF 2.2UF 2.2UF A16 BUCK1_LX1 1 2 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1
20% 20% 20% T2 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM VDD_BUCK3 B16 NO_XNET_CONNECTION=1 PINA20121T-SM CRITICAL
0201-1 0201-1 0201-1 T3 BUCK1_LX1 ROOM=PMU
C16
ROOM=PMU ROOM=PMU ROOM=PMU
M1 D16
M2 VDD_BUCK4 L1812 1 C1814 1 C1821 1 C1828 1 C1834 1 C1866 1 C1873
M3
0.22UH-20%-6.7A-0.023OHM
C A14 BUCK1_LX2 2 1 20%
15UF
20%
15UF
20%
15UF
20%
15UF
20%
15UF
5%
220PF C
B1 PINA20121T-SM 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 10V
C0G-CERM
B14 CRITICAL 0402-1 0402-1 0402-1 0402-1 0402-1 01005
C1 VDD_BUCK5 BUCK1_LX2 NO_XNET_CONNECTION=1 ROOM=PMU
C14 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
D1
D14
K18
VDD_BUCK6
L1813
K19
0.22UH-20%-6.7A-0.023OHM
A12 BUCK1_LX3 1 2
U6 PINA20121T-SM
VDD_BUCK7 B12 NO_XNET_CONNECTION=1 CRITICAL
V6 BUCK1_LX3 ROOM=PMU
C12
F18 D12
VDD_BUCK8
F19
BUCK1_FB F12BUCK1_PP_GPU_FB 14
L18
L19
VDD_BUCK9 L1814
D10/D101:#24681501,TY ONLY, D11/D11: Both Vendor
1.0UH-20%-3.6A-0.060OHM
G1 BUCK2_LX0 1 2 PP_SOC_VAR
4.7A MAX
CRITICAL L1803 14
BUCK2
BUCK2_LX0 G2 PIQA20161T-SM CRITICAL
1.0UH-3.6A-0.06OHM ROOM=PMU 0.67V/0.80V
G3
15 10 9 8 7 PP0V9_SOC_FIXED 2 1 BUCK5_LX0 B2
L1815
1 C1822 1 C1829 1 C1835 1 C1841 1 C1864 1 C1871
MEKK2016T-SM C2 0.47UH-20%-3.8A-0.048OHM 15UF 15UF 15UF 15UF 15UF 220PF
BUCK5_LX0 20% 20% 20% 20% 20% 5%
BUCK5
C1867 C1840 C1801 C1803 C1807 ROOM=PMU

3.2A MAX
1 1 1 1 1 NO_XNET_CONNECTION=1 D2 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 6.3V 2 10V

J1 BUCK2_LX1 2 1 X5R X5R X5R X5R X5R C0G-CERM
220PF 15UF 15UF 15UF 15UF A2 0402-1 0402-1 0402-1 0402-1 0402-1 01005
5% 20% 20% 20% 20% OMIT BUCK2_LX1 J2 NO_XNET_CONNECTION=1 PIQA20121T-SM CRITICAL ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
2 10V 2 6.3V 2 6.3V 2 6.3V 2 6.3V ROOM=PMU
C0G-CERM
01005
X5R
0402-1
ROOM=PMU
X5R
0402-1
ROOM=PMU
X5R
0402-1
ROOM=PMU
X5R
0402-1
ROOM=PMU
XW1802
SHORT-20L-0.05MM-SM
J3
ROOM=PMU
2 1 BUCK5_FB F5 BUCK5_FB
BUCK2_FB J5 BUCK2_PP_SOC_FB 14
CRITICAL L1804
ROOM=SOC NO_XNET_CONNECTION=1
L1816 ROOM=PMU
1.0UH-20%-3.6A-0.060OHM
(pending vendor qual)

1UH-20%-2.1A-0.12OHM
B 19 PP1V25_BUCK 2 1 BUCK6_LX0 J18
R2 BUCK3_LX0 1 2 PP1V8_SDRAM 16 20 21 32 36 37 40 41
46 47 48 53
B
R3 PIQA20161T-SM CRITICAL
1.7A MAX
BUCK3
BUCK3_LX0
BUCK6
BUCK6_LX0 NO_XNET_CONNECTION=1
C1816 C1823 C1860
1.5A MAX
PIQA20121T-SM J19 OMIT 1 1 1

R1
1 C1811 1 C1804 1 C1808 ROOM=PMU
BUCK3_FB R7
XW1804 15UF
20%
15UF
20% 5%
220PF
220PF 15UF 15UF OMIT SHORT-20L-0.05MM-SM
2 6.3V 2 6.3V 2 10V
5%
2 10V
20%
2 6.3V
20%
2 6.3V
XW1807
SHORT-20L-0.05MM-SM
BUCK3_FB
1 2 X5R
0402-1
X5R
0402-1
C0G-CERM
01005
C0G-CERM X5R X5R ROOM=SOC ROOM=PMU ROOM=PMU ROOM=PMU
01005 0402-1 0402-1 2 1 BUCK6_FB H16 BUCK6_FB
ROOM=PMU ROOM=PMU ROOM=PMU U2
ROOM=SOC NO_XNET_CONNECTION=1 VBUCK3_SW
V2
CRITICAL L1805 L1817
1.0UH-20%-2.25A-0.086OHM
1.0UH-20%-3.6A-0.060OHM
14 PP_CPU_SRAM_VAR 2 1 BUCK7_LX0 U7
N1 BUCK4_LX0 1 2 PP1V1_SDRAM 15 19
MCFE2016T-SM V7 BUCK7_LX0
4.7A MAX
1.5A MAX
N2 PIQA20161T-SM CRITICAL
BUCK4
0.80V - 1.06V BUCK4_LX0
BUCK7
1 C1868 1 C1805 1 C1809 ROOM=PMU

N3
ROOM=PMU 1 C1830 1 C1836 1 C1802 1 C1874 1 C1861
220PF 15UF 15UF OMIT 15UF 15UF 15UF 15UF 220PF
5%
2 10V
20%
2 6.3V
20%
2 6.3V
XW1803 L1818 20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
5%
2 10V
C0G-CERM X5R X5R SHORT-20L-0.05MM-SM 0.47UH-20%-3.8A-0.048OHM X5R X5R X5R X5R C0G-CERM
01005 0402-1 0402-1 2 1 BUCK7_FB R8 BUCK7_FB 0402-1 0402-1 0402-1 0402-1 01005
ROOM=PMU ROOM=PMU ROOM=PMU L1 BUCK4_LX1 2 1 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
BUCK4_LX1 L2 PIQA20121T-SM CRITICAL
CRITICAL L1801 L3
NO_XNET_CONNECTION=1 ROOM=PMU
OMIT
1UH-20%-2.1A-0.12OHM XW1805
2 1 SHORT-20L-0.05MM-SM
14 PP_GPU_SRAM_VAR BUCK8_LX0 G18 1 2
PIQA20121T-SM BUCK8_LX0 BUCK4_FB K5 BUCK4_FB
G19
0.80V - 0.92V
C1869 C1806 C1810 ROOM=PMU NO_XNET_CONNECTION=1 ROOM=SOC
1.5A MAX
1 1 1
BUCK8
220PF 15UF 15UF OMIT

5%
2 10V
20%
2 6.3V
20%
2 6.3V
XW1801
SHORT-20L-0.05MM-SM VBUCK4_SW
U5
C0G-CERM X5R X5R V5
01005 0402-1 0402-1 2 1 BUCK8_FB H15 BUCK8_FB
ROOM=PMU ROOM=PMU ROOM=PMU
A CRITICAL L1802 T1 PP1V8 A

1.0UH-20%-1.5A-0.161OHM BUCK3_SW1
5 7 8 9 11 12 13 16 17 25 29 30
39 46 47 48 52
U1 PAGE TITLE
PP2V8_UT_AF_VAR 1 2 BUCK9_LX0 M18
30 25
BUCK9_LX0 SYSTEM POWER:PMU (1/3)
SWITCH OUTPUTS
0603 M19
0.75A MAX
1 C1870 1 C1862 1 C1863 DRAWING NUMBER SIZE

BUCK9
220PF 15UF 15UF OMIT BUCK3_SW2 U3 PP1V8_TOUCH 38 39 47

Apple Inc.
051-00542 D
5%
2 10V
20%
2 6.3V
20%
2 6.3V
XW1806
SHORT-20L-0.05MM-SM
BUCK3_SW3 V3 PP1V8_MAGGIE_IMU 24 36 REVISION
C0G-CERM
01005
X5R
0402-1
X5R
0402-1 2 1 BUCK9_FB P16 BUCK9_FB
R
5.0.0
ROOM=PMU ROOM=PMU ROOM=PMU NOTICE OF PROPRIETARY PROPERTY: BRANCH
U4 PP1V1 7 15 THE INFORMATION CONTAINED HEREIN IS THE
BUCK4_SW1 PROPRIETARY PROPERTY OF APPLE INC.
V4 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
18 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
53 46
27 26 25 23 21 19 18 10 9 4
41 40 39 37 35 34 33 31 30 28
PP_VDD_MAIN ADELYN LDO SPECS
1 1 1 1 1
OMIT C1901
15UF
C1910
10UF
C1914
10UF
C1911
10UF
C1907
10UF
XW1901
SHORT-20L-0.05MM-SM
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
LDO# ADJ.RANGE, LOW ADJ.RANGE, HI ACCURACY MAX.CURRENT LDO# ADJ.RANGE, LOW ADJ.RANGE, HI ACCURACY MAX.CURRENT
18 VDD_MAIN_SNS 2 1 2 X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 CERM-X5R
0402-1 0402-9 0402-9 0402-9 0402-9 LDO1 (Ca) 1.2-2.475V 2.4-3.675V +/-1.4% 50mA 1.2-2.475V 2.4-3.675V
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU LDO11 (Cb) +/-30mV 250mA
NO_XNET_CONNECTION
OMIT LDO2 (Ca) 1.2-2.475V 2.4-3.675V +/-2.5% 50mA LDO12 (E) 1.8V +/-5% 10mA
XW1902
SHORT-20L-0.05MM-SM LDO3 (Ca) 1.2-2.475V 2.4-3.675V +/-2.5% 50mA
LDO13 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA
20 PMU_PRE_UVLO_DET 2 1
ROOM=PMU
D
LDO4 (D) 0.7-1.2V +/-2.5% 60mA LDO14 (Gb) 0.7-1.4V +/-3.0% 400mA D
LDO5 (F) 2.5-3.6V(tbc) +/-75mV 1000mA
LDO15 (Ca) 1.2-2.475V 2.4-3.675V +/-2.5% 50mA
1.2-2.475V 2.4-3.675V 250mA
LDO6 (Cb) +/-2.5% (500/100mA in bypass)
LDO16 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA
LDO7 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA
LDO17 (Ca) 1.2-2.475V 2.4-3.675V +/-2.5% 50mA
53 46
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN LDO8 (Cb) 1.2-2.475V 2.4-3.675V +/-30mV 250mA
41 40 39 37 35 34 33 31 30 28 LDO18 (Gb) 0.7-1.4V +/-3.0% 400mA
LDO9 (Cb) 1.2-2.475V 2.4-3.675V +/-25mV 250mA
LDO19 (Gb) 0.7-1.4V +/-3.0% 400mA
38 37 32 30 25 23 PP_VDD_BOOST LDO10 (Ga) 0.7-1.2V +/-4.5% 1150mA
LDO_RTC 2.5V +/-2.0% 10mA
1 C1915 1 C1912 BUF_1V2 1.2V +/-5.0% 10mA
15UF 15UF
20% 20%
2 6.3V
X5R 2 6.3V
X5R U1801
0402-1
ROOM=PMU
0402-1
ROOM=PMU D2333A1
WLCSP
SYM 1 OF 4
VLDO1 T12 PP3V3_USB 7 30 LDO1
VLDO2 U11 PP1V8_VA 32 33 34 35 LDO2
VLDO3 T10 PP3V0_ALS_APS_CONVOY 25 29 30 LDO3
R12 VDD_LDO1
VLDO4 T16 PP0V8_AOP 15 LDO4
V11 VDD_LDO2_15
VLDO5_0 U9 PP3V0_NAND 17 LDO5
R10 VDD_LDO3_17
VLDO5_1 U10
18 15 PP1V1_SDRAM R16 VDD_LDO4
VLDO6 T14 PP_ACC_VAR 27 40 LDO6
V9
1 C1908 1 C1913
LDO INPUT
V10 VDD_LDO5 VBYPASS R15
2.2UF 2.2UF
20% 20% R14 VDD_LDO6_BYP
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM VLDO7 T17 PP3V0_TRISTAR_ANT_PROX 29 40 41 53 LDO7
P19 VDD_LDO7_8
C 0201-1
ROOM=PMU
0201-1
ROOM=PMU R19 VDD_LDO9
VLDO8 P18 PP2V9_NH_AVDD 29 LDO8 C
VLDO9 R18 PP1V8_HAWKING 44 LDO9
R9 VDD_LDO10
V13 VDD_LDO11_13 VLDO9_FB P17
18 PP1V25_BUCK V16 VDD_LDO14
VLDO10 T9 PP0V9_NAND 17 LDO10
T19 VDD_LDO16
VLDO11 U13NC LDO11
V17 VDD_LDO18
VLDO12 P7 PP1V8_ALWAYS 20 21 LDO12
LDO
V18 VDD_LDO19
VLDO13 U14 PP3V0_MESA 38 LDO13
U19 VDD_LDO19
VLDO14 U16 PP1V2_SOC 8 10 16 LDO14
VLDO15 U12 PP1V8_MESA 38 48 LDO15
G15 VPP_OTP VLDO16 T18NC #24989262 1/20W R1901 MF NOSTUFF LDO16
1% 0.00 0201
VLDO17 T11 PP_LDO17 2 1 LDO17
U1801
D2333A1 PP1V2_UT_DVDD LDO18
New for ADELYN

VLDO18 U17 25
WLCSP VLDO19 U18 PP1V2_NH_NV_DVDD 29 30 LDO19

SYM 4 OF 4
A1 G17
A11 G4
NC J6 TP_DET VBUF_1V2 P8 PP1V2_REF 16 VBUF_1V2
A15 H17
H8 H18
A19 H19
P13 H4
VPUMP R5
1 C1918 1 C1933 1 C1923 1 C1926 1 C1935 1 C1930 1 C1932
A3 J17 2.2UF 1.0UF 2.2UF 2.2UF 1.0UF 2.2UF 0.22UF
20% 20% 20% 20% 20% 20% 20%
P14 J4 2 6.3V
X5R-CERM 2 6.3V
X5R 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R 2 6.3V
X5R-CERM 2 6.3V
X5R
A7 J8 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 01005-1
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
B11 K1
B15 K17
B19 K2 1 C1916 1 C1921 1 C1922 1 C1925 1 C1927 1 C1904 1 C1919
B B3 K3
PMU_VPUMP 2.2UF
20% 2.2UF 2.2UF 1.0UF 2.2UF 2.2UF 2.2UF
20%
B
B7 K4 1 C1902 2 6.3V
X5R-CERM
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
6.3V
2 X5R-CERM
C11 K8 47NF 0201-1 X5R-CERM X5R-CERM X5R X5R-CERM X5R-CERM 0201-1
20% ROOM=PMU
0201-1 0201-1 0201-1 0201-1 0201-1
C15 L17 2 6.3V ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
X5R-CERM
C19 L4 01005
ROOM=PMU
C3 L8 #24989262:OTP-AO LDO17 default off,50mA Iout_max
C7 M17
D11 M4 VPUMP: 10nF min. @4.6V
D15 N17
D19 N18
D3 N19
D7 N4
VSS VSS
E1 P1
E10 P2
53 46
E11 P3 27 26 25 23 21 19 18 10 9 4
41 40 39 37 35 34 33 31 30 28
PP_VDD_MAIN
E12 P4
E13 P15 1 C1905 1 C1909
E14 R17 33PF 220PF
5% 5%
E15 R4 2 16V
NP0-C0G-CERM 2 10V
C0G-CERM
E16 T5 01005 01005
ROOM=PMU ROOM=PMU
E17 T15
E18 T4
E19 T6
E2 T7
E3 T8
E4 U15 PMU_VSS_RTC
A E5 T13
20
SYNC_MASTER=sync
A
U15 = PMU XTAL GND
SYNC_DATE=04/28/2016
E6 PAGE TITLE
U8
E7 V1 SYSTEM POWER:PMU (2/3)
E8 V12 DRAWING NUMBER SIZE
E9 V19
Apple Inc.
051-00542 D
F1 V8 REVISION
F17
R
5.0.0
F2 NOTICE OF PROPRIETARY PROPERTY: BRANCH
F3 THE INFORMATION CONTAINED HEREIN IS THE

F4 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
19 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
BUTTON PULL-UP RESISTORS

1
PP SM PP2001
P2MM-NSM
ROOM=SOC
PP1V8_SDRAM 16 18 20 21 32 36 37 40 41 46
47 48 53
1
PP SM PP2002
P2MM-NSM 1
NOSTUFF
ROOM=SOC R2008
100K
5%
1 PP SM PP2003
P2MM-NSM
1/32W
MF
46 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM PP1V8_ALWAYS 19 20 21 ROOM=PMU 01005
53 48 47 2 ROOM=PMU
BUTTON_RINGER_A 20 44
D 1
R2006 1
R2005 1
R2012 U1801 PP1V8_ALWAYS 19 20 21
D
100K 100K 10K D2333A1
5%
1/32W
5%
1/32W
5%
1/32W
WLCSP
1
NOSTUFF
MF
01005
MF
01005
MF
01005 7 AP_TO_PMU_WDOG_RESET P9 RESET_IN1
SYM 3 OF 4
IREF K6 PMU_IREF
R2007
220K
2 ROOM=PMU 2 ROOM=PMU 2 ROOM=PMU 5%
40 TRISTAR_TO_PMU_HOST_RESET P10 RESET_IN2 1/32W
RESETS
NO_XNET_CONNECTION MF
AP_TO_PMU_SOCHOT_L
REFS
11 P11 RESET_IN3 VREF J7 PMU_VREF 01005
2 ROOM=PMU
13 7 PMU_TO_SYSTEM_COLD_RESET_L M5 RESET* 1 1 BUTTON_POWER_KEY_L
C2006
0.22UF
R2011
200K
20 44
1 C2001 NC P12 SHDN

20% 1%
1000PF Active high with int 200k PD 6.3V 1/20W
10% 2 X5R MF
13 AOP_TO_PMU_SLEEP1_REQUEST R11 SLEEP1_REQ 0201 201 PP1V8_SDRAM 16 18 20 21 32 36 37 40 41 46
2 10V
X5R ROOM=PMU 2 ROOM=PMU 47 48 53
01005 15 13 PMU_TO_AOP_SLEEP1_READY L11 SLEEP1_RDY
ROOM=PMU
13 AOP_TO_PMU_ACTIVE_REQUEST L12 ACTIVE_REQ
1
NOSTUFF
40 37 13 7 PMU_TO_AOP_TRISTAR_ACTIVE_READY J12 ACTIVE_RDY PRE_UVLO* N10 PMU_TO_AP_PRE_UVLO_L 11 R2015
220K
5%
13 PMU_TO_AOP_CLK32K M9 SLEEP_32K 1/32W
MF
D101/D111 ONLY: TCXO_RF Supplies 32K NC M10 OUT_32K VDROOP0* G6 PMU_TO_AP_THROTTLE_CPU_L 12 01005
COMPARATOR
2 ROOM=PMU
SYSTEM_ALIVE VDROOP1* G7 PMU_TO_AP_THROTTLE_GPU_L 11 44 20 BUTTON_VOL_DOWN_L
21 17 15 H5 SYS_ALIVE
39 23 13 LCM_TO_MANY_BSYNC HIGH=FORCE PWM MODE L13 FORCE_SYNC
NC L10 CRASH* VDROOP0_DET F6 AP_VDD_CPU_SENSE 14
13 PMU_TO_AOP_IRQ_L G5 IRQ* VDROOP1_DET F7 AP_VDD_GPU_SENSE 14 NOTE:VDROOP_DET filtering is now inside Adelyn

R2020 47 =I2C_PMU_SCL N13 SCL
33.2
47 =I2C_PMU_SDA 1 2 I2C_PMU_SDA_R M13 SDA PRE_UVLO_DET N8 PMU_PRE_UVLO_DET 19
1%
1/32W
#24825674: Add R2020 to meet timing spec MF
01005 11 SPI_PMGR_TO_PMU_SCLK N6 SCLK
PMGR
ROOM=PMU
11 SPI_PMGR_TO_PMU_MOSI N5 MOSI
IBAT L7 NC
SPI_PMU_TO_PMGR_MISO P5 MISO
C 11
VBAT M7 NC C
ADC
BRICK_ID H7 TRISTAR_TO_PMU_USB_BRICK_ID 20 40
7 AP_TO_PMU_AMUX_OUT J14 AMUX_A0
PMU_ADC_IN
ADC_IN K7 20
20 PMU_ADC_IN J15 AMUX_A1
NC J16 AMUX_A2
FOREHEAD NTC 44 12 BUTTON_VOL_UP_L K16 AMUX_A3 BUTTON1 M12 BUTTON_VOL_DOWN_L 20 44
NC K15 AMUX_A4 BUTTON2 N12 BUTTON_POWER_KEY_L 20 44

1
LCM_TO_CHESTNUT_PWR_EN K14 AMUX_A5 BUTTON3 M11 BUTTON_RINGER_A
BUTTONS
39 37 20 44
AMUX
TRISTAR_TO_PMU_USB_BRICK_ID J13 AMUX_A6 BUTTON4 N11 NC Reserved for MENU key on dev board
C2007 1 R2001 40 20
36 PP1V2_MAGGIE K13 AMUX_A7

100PF BUTTONO1 H11 PMU_TO_AP_BUF_VOL_DOWN_L 12
5% 10KOHM-1% FOREHEAD_NTC_RETURN 4 PMU_AMUX_AY K12 AMUX_AY
16V 2 01005 BUTTONO2 J11 PMU_TO_AP_BUF_POWER_KEY_L 12 Button for two-finger reset: 20711463 and 21196187
NP0-C0G
01005 2 ROOM=PMU 53 BBPMU_TO_PMU_AMUX1 L14 AMUX_B0 BUTTONO3 K11 PMU_TO_AP_BUF_RINGER_A 12
ROOM=PMU
53 BBPMU_TO_PMU_AMUX2 L15 AMUX_B1
NC L16 AMUX_B2
GPIO1 F16 TIGRIS_TO_PMU_INT_L 21
TBD ACC_BUCK_TO_PMU_AMUX M16 AMUX_B3
27
PMUGPIO_TO_WLAN_CLK32K M15 AMUX_B4

GPIO2 F15 BB_TO_PMU_PCIE_HOST_WAKE_L 53 R2000
1.00K
1 C2013 53 20
37 CHESTNUT_TO_PMU_ADCMUX M14 AMUX_B5

GPIO3 G14 PMU_TO_BBPMU_RESET_R_L 1 2 PMU_TO_BBPMU_RESET_L 53
REAR CAMERA NTC 1000PF GPIO4 F14 WLAN_TO_PMU_HOST_WAKE 53 5%

10% 7 AP_TO_PMU_TEST_CLKOUT N16 AMUX_B6 1/32W
2 10V
X5R GPIO5 F13 NFC_TO_PMU_HOST_WAKE 53 MF
01005 53 BBPMU_TO_PMU_AMUX3 N15 AMUX_B7 01005
1 GPIO6 G13 PMU_TO_NAND_LOW_BATT_BOOT_L 17 ROOM=PMU
ROOM=PMU 4 PMU_AMUX_BY N14 AMUX_BY
PLACE_NEAR=U1801:2mm GPIO7 G12 NC_PMU_TO_GNSS_EN 53
1
C2008
100PF
R2002 FOREHEAD_NTC R6 TDEV1
GPIO8 H12 PMUGPIO_TO_WLAN_CLK32K 20 53
5% 10KOHM-1% RCAM_NTC_RETURN GPIO9 G11 PMU_TO_BT_REG_ON 53

16V OMIT REAR_CAMERA_NTC M6 TDEV2
NP0-C0G 2 01005 GPIO10 G10 NC_GNSS_TO_PMU_HOST_WAKE
XW2002
GPIO
53
NTC
01005 ROOM=PMU RADIO_PA_NTC P6 TDEV3
ROOM=PMU 2 SHORT-20L-0.05MM-SM GPIO11 F9 PMU_TO_WLAN_REG_ON 53
ROOM=SOC 1 2 AP_NTC L5 TDEV4
GPIO12 G9 BT_TO_PMU_HOST_WAKE 53
OMIT NC L6 TDEV5
PMU_TCAL GPIO13 F8 PMU_TO_CODEC_DIGLDO_PULLDN 32
B XW2003
SHORT-20L-0.05MM-SM
G16 TCAL
GPIO14 G8 PMU_TO_ACC_BUCK_SW_EN 27 B
ROOM=SOC 1 2 GPIO15 H9 PMU_TO_BB_USB_VBUS_DETECT 53
#24511807: Stuff for Carrier
PMU_XTAL1 V14 XTAL1
PMU_TO_NFC_EN R2009
XTAL
GPIO16 H10 53
OMIT PMU_XTAL2 V15 XTAL2 0.00
RADIO PA NTC XW2004 GPIO17 J9 PMU_TO_AP_FORCE_DFU_R 1 2 PMU_TO_AP_FORCE_DFU 4 12
SHORT-20L-0.05MM-SM GPIO18 J10 PMU_TO_BOOST_EN 23 RS 0%

1/32W
1 ROOM=SOC 1 2 PMU_VDD_RTC N9 VDD_RTC GPIO19 K9 PMU_TO_LCM_PANICB 39 RS MF
01005
GPIO20 K10 PMU_TO_HOMER_RESET_L
C2009 1
R2003 OMIT 1 C2002 GPIO21 L9 =I2C_CHESTNUT_SCL
36
100PF
5% 10KOHM-1%
XW2005
SHORT-20L-0.05MM-SM
0.22UF
20%
37 47 RS
16V PA_NTC_RETURN 2 6.3V Sequencer controllable

NP0-C0G 2 01005 ROOM=SOC 1 2 X5R GPIO21 = I2C SCL is for Chestnut dark current mitigation RS = requires sequencer
01005 ROOM=PMU 0201
ROOM=PMU 2 ROOM=PMU
CRITICAL
1 1
C2011
100PF
R2010
3.92K
Y2001
32.768KHZ-20PPM-12.5PF
AP NTC 5%
16V
0.1%
1/20W 1 2
2 NP0-C0G MF
01005 0201
1 ROOM=PMU 2 ROOM=PMU 1 1.60X1.00-SM 1
C2003
22PF
ROOM=PMU C2004
22PF
5% 5%
C2010 1 R2004 16V
CERM 2
16V
2 CERM
100PF 01005 01005
5% 10KOHM-1% AP_NTC_RETURN ROOM=PMU ROOM=PMU
16V 2 01005 19 PMU_VSS_RTC
NP0-C0G
01005 2 ROOM=PMU
ROOM=PMU XW2001
SHORT-20L-0.05MM-SM
1 2
ROOM=PMU
OMIT
A A
NOTE:100PF CAPS ARE THE SAMPLING CAPS FOR PMU ADC SYNC_MASTER=sync
PAGE TITLE
SYSTEM POWER:PMU (3/3)

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

20 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TIGRIS CHARGER
D D
PP_VDD_MAIN 4 9 10 18 19 23 25 26 27 28 30
31 33 34 35 37 39 40 41 46 53
1 C2113 1 C2114
10UF 10UF
20% 20%
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R
0402-9 0402-9
ROOM=CHARGER ROOM=CHARGER
TIGRIS_LDO
TIGRIS_PMID
C 1 C2104 1 C2115 C
1 C2103 1 C2109 1 C2111 1 C2112 220PF 2.2UF
D2
C2
A2
B2
5% 20%
100PF 4.2UF 4.2UF 100PF 2 10V 2 6.3V
A2
A3
B1
B2
B3
5% 10% 10% 5% C0G-CERM X5R-CERM
VDD_MAIN
VDD_MAIN
VDD_MAIN
VDD_MAIN
2 35V
NP0-C0G 2 16V
X5R-CERM 2 16V
X5R-CERM 2 35V
NP0-C0G
01005 0201-1
S CRITICAL
01005
ROOM=CHARGER
0402-1
ROOM=CHARGER
0402-1
ROOM=CHARGER
01005
ROOM=CHARGER
ROOM=CHARGER ROOM=CHARGER
Q2101
28
TO TRINITY A1
CSD68827W
NO_XNET_CONNECTION G BGA
#25112685,Remove Snub ROOM=CHARGER
F5
PMID U2101 LDO
G4 C2105
A5 SN2400AB0 G5
0.047UF C2106 1 C2102 1
D
41 40 4 PP5V0_USB VBUS WCSP BOOT TIGRIS_BOOT 1 2 330PF 220PF
B5 10% 5%
A4 16V 10V 2
C1
C2
C3
VBUS CER-X7R 2
1 C2101 1 C2110 D5
VBUS
ROOM=CHARGER
CRITICAL
BUCK_SW
B4
ROOM=CHARGER 10%
16V 01005
ROOM=CHARGER
C0G-CERM
01005
ROOM=CHARGER
4.2UF 330PF C5 BUCK_SW X5R
20 19 PP1V8_ALWAYS 10% 10% VBUS D4 0201
2 16V
X5R-CERM 2 16V
CER-X7R E5 BUCK_SW
0402-1 01005 VBUS C4
1 ROOM=CHARGER ROOM=CHARGER BUCK_SW TIGRIS_BUCK_LX
R2101 47 =I2C_TIGRIS_SDA
G3
SDA A1
100K E4 BAT
5% 47 =I2C_TIGRIS_SCL SCL B1
1/32W BAT
MF E3 D1
2 01005 20 17 15 SYSTEM_ALIVE SYS_ALIVE BAT
ROOM=CHARGER C1
F4 BAT PP_BATT_VCC 4 22
R2103 40 TRISTAR_TO_TIGRIS_VBUS_OFF
F4: 100 kOhm pullup to VLDO (regulated output voltage)
VBUS_OVP_OFF
E1
100 G2 BAT_SNS VBATT_SENSE
20 TIGRIS_TO_PMU_INT_L 1 2
ROOM=CHARGER
TIGRIS_TO_PMU_INT_R_L INT
E2
22
1 C2108 1 C2117 1 C2118
5% F1 ACT_DIODE TIGRIS_ACTIVE_DIODE 330PF 2.2UF 2.2UF
#24558610: Change to 100ohm 1/32W TIGRIS_VBUS_DETECT VBUS_DET 10% 20% 20%
MF G1 NOSTUFF 2 16V
CER-X7R 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
01005 F3 HDQ_HOST SWI_AP_BI_TIGRIS 12
R2102 1 01005 0201-1 0201-1
PGND
PGND
PGND
PGND
TEST F2
R2104 HDQ_GAUGE TIGRIS_TO_BATTERY_SWI_1V8 100K ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER
30.1K 2 5%
7 USB_VBUS_DETECT 1 1/32W
B B
A3
B3
D3
C3
ROOM=CHARGER 47 46 41 40 37 36 32 20 18 16 PP1V8_SDRAM MF
1% 01005
ROOM=CHARGER 2
53 48
1/32W
MF
01005
1
R2105 Q2102
40.2K RV3C002UN
1% DFN
1
1/32W
MF
G
2 01005
TIGRIS_TO_BATTERY_SWI 22
3
D
S
SYM_VER_1
A
PAGE TITLE
SYSTEM POWER:CHARGER
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

21 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
BATTERY CONNECTOR
THIS ONE ON MLB ---> 516S00172 (matches d10 mlb MCO rev 27)
C C
XW2201
SHORT-20L-0.05MM-SM
1 2 VBATT_SENSE 21
ROOM=BATTERY_B2B
PLACE_NEAR=J2201:2mm
J2201
RCPT-BATT-SHORT
F-ST-SM
11
7 8
R2201 1 5 PP_BATT_VCC 4 21
100
TIGRIS_TO_BATTERY_SWI 1 2 TIGRIS_BATTERY_SWI_CONN 3 2
21
5% 4 6
1 C2202 1 C2203 1 C2204
1/32W 56PF 100PF 220PF
MF
01005
1 C2201 5%
2 25V
5%
2 16V
5%
2 10V
ROOM=BATTERY_B2B 56PF 9 10 NP0-C0G-CERM
01005
NP0-C0G
01005
C0G-CERM
01005
5%
2 25V
NP0-C0G-CERM 12 ROOM=BATTERY_B2B ROOM=BATTERY_B2B ROOM=BATTERY_B2B
01005 ROOM=BATTERY_B2B
ROOM=BATTERY_B2B
CRITICAL
ALLOW_APPLE_PREFIX
B B
A
PAGE TITLE
SYSTEM POWER:BATTERY CONN

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

22 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
BOOST
C C
When VDD_MAIN < 3.4, boosts to 3.4

Otherwise tracks VDD_MAIN
53 PP_VDD_MAIN A3 B3
28 27 26 25 21 19 18 10 9 4 VIN VOUT PP_VDD_BOOST 19 25 30 32 37 38
46 41 40 39 37 35 34 33 31 30
A4 VIN U2301 VOUT B4
1
C2309 1 C2301 L2301 ROOM=BOOST SN61280D 1 C2302 1 C2303 1 C2304 1 C2307 1 C2308 1 C2306
10UF 0.47UH-20%-4.2A-0.048OHM C3 SW
20% 4.7UF DSBGA 15UF 15UF 15UF 15UF 15UF 220PF
6.3V 20% 1 2 SYS_BOOST_LX C4 SW 20% 20% 20% 20% 20% 5%
2 CERM-X5R 2 6.3V
X5R-CERM1 PIUA20121T-SM ROOM=BOOST 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 10V
C0G-CERM
0402-9 402 A1 0402-1 0402-1 0402-1 0402-1 0402-1 01005
ROOM=BOOST 20 PMU_TO_BOOST_EN EN
ROOM=BOOST ROOM=BOOST ROOM=BOOST ROOM=BOOST ROOM=BOOST ROOM=BOOST ROOM=BOOST
47 =I2C_BOOST_SCL B2 SCL
1
R2301 C2
511K 47 =I2C_BOOST_SDA SDA
1%
1/32W B1
MF VSEL
2 01005
C1 BYP*
39 20 13 LCM_TO_MANY_BSYNC A2 GPIO
HIGH=FORCE PWM MODE PGND
AGND
D2
D3
D4
D1
Control details from Radar 19634006
B B
A
PAGE TITLE
SYSTEM POWER:BOOST
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

23 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CARBON - ACCEL & GYRO MAGNESIUM - COMPASS

INVENSENSE, MPU-6800: C2403=0.1UF D
D
24 PP1V8_MAGGIE_IMU_FILT
36 24 18 PP1V8_MAGGIE_IMU
BOMOPTION=CARBON_1 BOMOPTION=CARBON_1
1 C2401 1 C2408
1 C2418 1 C2402 1 C2415 0.1UF 2.2UF
20%
2.2UF 0.1UF 0.1UF
C4
20%
20% 20% 20% 2 6.3V 2 6.3V
X5R-CERM
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
X5R-CERM
01005 0201-1 VDD
0201-1 01005 01005 ROOM=MAGNESIUM ROOM=MAGNESIUM
36 24 18
PP1V8_MAGGIE_IMU ROOM=CARBON ROOM=CARBON ROOM=CARBON
BOMOPTION: CARBON_1 U2402
HSCDTD601A-19A
#25765850:Update Carbon APN
16
1
BOMOPTION=CARBON_1
C2 VPP LGA
BOMOPTION=CARBON_1
SDO B4 SPI_IMU_TO_AOP_MISO
1 R2401 VDD VDDIO
NC 13 24
100K B1 RSV SDA/SDI A4 SPI_AOP_TO_IMU_MOSI

5%
1/32W U2401 NC
B3 RSV
13 24
MF MPU-6900-21 NC SCL/SCK A3 SPI_AOP_TO_IMU_SCLK_R1 13 24

2 01005 D1 RSV
ROOM=SOC LGA NC
SPI_AOP_TO_ACCEL_GYRO_CS_L 5 NC
D2 RSV CSB A2 SPI_AOP_TO_COMPASS_CS_L 13
13 CS SPC 2 SPI_AOP_TO_IMU_SCLK_R1 13 24 114K INT PU
8 FSYNC SDI 3 SPI_AOP_TO_IMU_MOSI 13 24 BOMOPTION=CARBON_1 24 PP1V8_MAGGIE_IMU_FILT D4 RST* TRG/SE C3 NC
GYRO_CHARGE_PUMP 14 REGOUT SDO 4 SPI_IMU_TO_AOP_MISO 13 24
1 C2419 1.09M INT PU
ROOM=MAGNESIUM
114K INT PD
DRDY A1 COMPASS_TO_AOP_INT
5PF 13
+/-0.1PF CRITICAL
13 ACCEL_GYRO_TO_AOP_INT 7 INT DRDY 6 ACCEL_GYRO_TO_AOP_DATARDY 13 2 16V
NP0-C0G
01005
VSS
ROOM=CARBON ROOM=CARBON
PP2404
1
C1
BOMOPTION=CARBON_1 CRITICAL SMPP
1 C2403 P2MM-NSM
ROOM=MAGNESIUM
0.1UF 9 GND
10 GND
11 GND
12 GND
13 GND
15 GND
10%
2 6.3V
X6S
PP2401
1 SM
C 0201
ROOM=CARBON
PP
P2MM-NSM
ROOM=MAGNESIUM
C
PP2402
1 PP SM
#25782019:Add 0ohm P2MM-NSM
ROOM=MAGNESIUM
R2404 PP2403
PP1V8_MAGGIE_IMU 1
0.00 2 24 PP1V8_MAGGIE_IMU_R 1 SMPP
36 24 18
0% P2MM-NSM
1/32W
MF
1 C2448 1 C2442 1 C2445 ROOM=MAGNESIUM
01005 2.2UF 0.1UF 0.1UF #25740540:PP for South Carbon MOSI

ROOM=BOT_CARBON 20% 20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
0201-1 01005 01005
24
PP1V8_MAGGIE_IMU_R
ROOM=BOT_CARBON ROOM=BOT_CARBON ROOM=BOT_CARBON 1
PP SM PP2440
P2MM-NSM
ROOM=HOMER
16
1
R2441
100K
VDD VDDIO
5%
1/32W U2404
MF MPU-6900-21
2 01005
ROOM=SOC LGA
13
SPI_AOP_TO_BOT_ACCEL_GYRO_CS_L 5 CS SPC 2 SPI_AOP_TO_IMU_SCLK_R2 13
8 FSYNC SDI 3 SPI_AOP_TO_IMU_MOSI 13 24
NOSTUFF
BOT_GYRO_CHARGE_PUMP 14 REGOUT SDO 4 SPI_IMU_TO_AOP_MISO 13 24

1 C2449
OMIT 5PF
+/-0.1PF
XW2404
SHORT-20L-0.05MM-SM
7 INT DRDY 6 BOT_ACCEL_GYRO_TO_AOP_DATARDY 13 2 16V
NP0-C0G
01005
1 2 BOT_ACCEL_GYRO_TO_XW_INT ROOM=BOT_CARBON
NC ROOM=BOT_CARBON
ROOM=BOT_CARBON CRITICAL
B 1 C2443
XW2404 to balance Via/Cu at INT pin
B
0.1UF
9 GND
10 GND
11 GND
12 GND
13 GND
15 GND
10%
2 6.3V
X6S
0201
ROOM=BOT_CARBON
PHOSPHORUS #24593845
BOSCH (APN:338S00188): nostuff C2420/C2421/C2422/C2423 and R2403 PU
ST (APN:338S00230): stuff C2420-C2423, C2420R2422 with 155S00017, stuff R2403 PU
C2420=4pF(131S0253),C2405=3pF(131S0251) per #25691124
R2422
PP1V8_MAGGIE_IMU_FILT 1
0.00 2
24 PP1V8_MAGGIE_IMU 18 24 36
NOSTUFF NOSTUFF NOSTUFF NOSTUFF
0%
1 C2413 1 C2405 1 C2420 1 C2421 1/32W
MF
1 C2422 1 C2423 1 C2414
0.1UF 0.1UF 4PF 20PF 01005 20PF 5.6PF 2.2UF
20% 20% +/-0.1PF 5% ROOM=PHOSPHORUS 5% +/-0.1PF 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 16V
NP0-C0G 2 16V
NP0-C0G-CERM 2 16V
NP0-C0G-CERM 2 16V
NP0-C0G-CERM 2 6.3V
X5R-CERM
01005 01005 01005 01005 01005 01005 0201-1
ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS
24
PP1V8_MAGGIE_IMU_FILT nostuff due to layout
8
NOSTUFF
1 VDD VDDIO
BOSCH: Internal PU R2403
100K U2403
A 5%
1/32W
MF 24 13 SPI_AOP_TO_IMU_MOSI 3 SDI
BMP284AA
LGA SDO 5 SPI_IMU_TO_AOP_MISO 13 24
A
01005 4 SCK PAGE TITLE
2 ROOM=SOC 24 13 SPI_AOP_TO_IMU_SCLK_R1
13 SPI_AOP_TO_PHOSPHORUS_CS_L 2 CS* IRQ 7 PHOSPHORUS_TO_AOP_INT_L 13 SENSORS
GND DRAWING NUMBER SIZE
051-00542 D
1
Apple Inc.
REVISION
R
5.0.0

24 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
UTAH POWER Scrub voltage selection IO FILTERS

NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM
IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC.
VENDOR ALSO RECOMMENDS CIN = COUT FOR STABILITY
U2501 FL2504 D
D LP5907UVX2.925-S
DSBGA
150OHM-25%-200MA-0.7DCR
38 37 32 30 23 19 PP_VDD_BOOST A1 VIN VOUT A2 PP2V9_UT_AVDD_CONN 45 46 9 AP_TO_UT_CLK 1 2 AP_TO_UT_CLK_CONN 45
01005
1 C2527 B1 VEN
ROOM=RCAM_B2B
See Page46: D11x C2507 is 4UF 1 C2502 1 C2504 1 C2512 ROOM=RCAM_B2B 1 C2513
2.2UF 0.22UF 220PF 100PF 56PF
20% GND 10% 5% 5% 5%
2 6.3V
X5R-CERM 2 6.3V
CER-X5R 2 10V
C0G-CERM 2 16V
NP0-C0G 2 25V
NP0-C0G-CERM
B2
0201-1 01005 01005 01005 01005
ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B
NOSTUFF
L2501 FL2501
33-OHM-25%-1500MA 150OHM-25%-200MA-0.7DCR
1 2
30 18 PP2V8_UT_AF_VAR PP2V8_UT_AF_VAR_CONN 45 9 AP_TO_UT_SHUTDOWN_L 1 2 AP_TO_UT_SHUTDOWN_CONN_L 45
0201 01005 1
ROOM=RCAM_B2B 1 C2505 1 C2501 ROOM=RCAM_B2B C2514
220PF
2.2UF 220PF 5%
20% 5% 10V
2 6.3V
X5R-CERM 2 10V
C0G-CERM 2 C0G-CERM
0201-1 01005 01005
ROOM=RCAM_B2B
ROOM=RCAM_B2B ROOM=RCAM_B2B
L2502 FL2503
33-OHM-25%-1500MA 150OHM-25%-200MA-0.7DCR
30 29 19 PP3V0_ALS_APS_CONVOY 1 2 PP3V0_UT_SVDD_CONN 45 26 UT_AND_NV_TO_STROBE_DRIVER_STROBE 1 2 UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN 30 45
0201 01005
ROOM=RCAM_B2B 1 C2519 1 C2518 ROOM=RCAM_B2B 1 C2515
2.2UF 220PF 220PF
20% 5% 5%
2 6.3V
X5R-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM
C 0201-1
ROOM=RCAM_B2B
01005
ROOM=RCAM_B2B
01005
ROOM=RCAM_B2B C
L2503
33-OHM-25%-1500MA
19 PP1V2_UT_DVDD 1 2 PP1V2_UT_VDD_CONN 45
0201
ROOM=RCAM_B2B 1 C2506 1 C2508 1 C2510 1 C2503 1 C2521
2.2UF 2.2UF 2.2UF 220PF 15PF
20% 20% 20% 5% 5%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 10V
C0G-CERM 2 16V
NP0-C0G-CERM
0201-1 0201-1 0201-1 01005 01005
ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B
L2504
33-OHM-25%-1500MA
1 2
29 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 30
PP1V8 PP1V8_UT_CONN 45
0201
ROOM=RCAM_B2B 1 C2509
1.0UF
1 C2511
220PF
LPDP FILTERS
AC return path for LPDP which is referenced to GND and VDD_MAIN
20% 5%
2 6.3V
X5R 2 10V
C0G-CERM
0201-1 01005
ROOM=RCAM_B2B
ROOM=RCAM_B2B 53
28 27 26 23 21 19 18 10 9 4
46 41 40 39 37 35 34 33 31 30
PP_VDD_MAIN
1 C2522 1 C2528 1 C2529
33PF 33PF 33PF
5% 5% 5%
2 16V
NP0-C0G-CERM 2 16V
NP0-C0G-CERM 2 16V
NP0-C0G-CERM
01005 01005 01005
B ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B

B
10 90_LPDP_RX_D2_P 90_LPDP_UT_TO_AP_D2_P
MAKE_BASE=TRUE
C2523
ROOM=RCAM_B2B
1 2 0.1UF 90_LPDP_UT_TO_AP_D2_CONN_P 45
20% 6.3V
X5R-CERM 01005
10 90_LPDP_RX_D2_N 90_LPDP_UT_TO_AP_D2_N
MAKE_BASE=TRUE
C2524
ROOM=RCAM_B2B
1 2 0.1UF 90_LPDP_UT_TO_AP_D2_CONN_N 45
20% 6.3V
X5R-CERM 01005
10 90_LPDP_RX_D3_P 90_LPDP_UT_TO_AP_D3_P
MAKE_BASE=TRUE
C2525
ROOM=RCAM_B2B
1 2 0.1UF 90_LPDP_UT_TO_AP_D3_CONN_P 45
20% 6.3V
X5R-CERM 01005
10 90_LPDP_RX_D3_N 90_LPDP_UT_TO_AP_D3_N
MAKE_BASE=TRUE
C2526 1 2 0.1UF 90_LPDP_UT_TO_AP_D3_CONN_N 45
ROOM=RCAM_B2B 20% 6.3V

X5R-CERM 01005
C2530
0.1UF
10 AP_LPDP_AUX2 LPDP_UT_BI_AP_AUX 1 2 LPDP_UT_BI_AP_AUX_CONN 45
MAKE_BASE=TRUE
20%
6.3V
X5R-CERM
01005
1 C2520
ROOM=RCAM_B2B 56PF
5%
2 25V
A NP0-C0G-CERM
01005 SYNC_MASTER=sync SYNC_DATE=04/28/2016 A
ROOM=RCAM_B2B PAGE TITLE
B2B FILTERS: UTAH

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

25 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
STROBE DRIVERS INSIDE NEO SIP MODULE

D10/sip_neo
D M2600
D
53 46
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN NEO
41 40 39 37 35 34 33 31 30 28 SIP
C2609 1 C2610 1 C2613 1 SYM 1 OF 3
10UF 10UF 220PF B8 ROOM=STROBE
20% 20% 5% VDD D9
6.3V 6.3V 10V D2 LED1 PP_STROBE_DRIVER1_COOL_LED
CERM-X5R 2 CERM-X5R 2 C0G-CERM 2 VDD D10
44 45
0402-9 0402-9 01005 D3 CRITICAL LED1
ROOM=STROBE ROOM=STROBE ROOM=STROBE VDD
D6
C9 LED2 PP_STROBE_DRIVER1_WARM_LED 44 45
9 AP_TO_STROBE_DRIVER_HWEN HWEN1 D7
LED2
C8
25 UT_AND_NV_TO_STROBE_DRIVER_STROBE STB1
C10
NTC STROBE_MODULE_NTC 44
D8
53 46 37 BB_TO_STROBE_DRIVER_GSM_BURST_IND GSM1
B9
48 =I2C_STROBE1_SDA SDA1
B10
48 =I2C_STROBE1_SCL SCL1
C C
PP_VDD_MAIN
M2600
53 46
27 26 25 23 21 19 18 10 9 4
41 40 39 37 35 34 33 31 30 28
NEO
SIP
C2611 1 C2612 1 C2614 1 SYM 2 OF 3
10UF 10UF 220PF
20% 20% 5% B18 VDD
6.3V 2 6.3V 2 10V 2 LED1 B11 PP_STROBE_DRIVER2_COOL_LED 44 45
CERM-X5R CERM-X5R C0G-CERM B19 VDD
0402-9 0402-9 01005 LED1 B12
ROOM=STROBE2 ROOM=STROBE2 ROOM=STROBE D13 VDD
A2
GND
M2600 GND C14
LED2 B14 PP_STROBE_DRIVER2_WARM_LED 44 45 A3 NEO C15
C12 HWEN0 GND GND
LED2 B15 A4 SIP C16
GND SYM 3 OF 3 GND
C13 STB0 A5 C17
GND GND
NTC C11 A6 C18
GND GND
B13 GSM0 A7 C19
GND GND
A8 C20
46 =I2C_STROBE2_SDA D12 SDA2 GND GND
A9 D1
GND GND
46 =I2C_STROBE2_SCL D11 SCL2 A10 D4
GND GND
A11 D5
GND GND
A12 D14
GND GND
A13 D15
GND GND
A14 D16
GND GND
A15 D17
GND GND
A16 D18
GND GND
A17 D19
GND GND
B A18
A19
GND GND E1 B
GND GND E2
A20 E3
GND GND
B2 E4
GND GND
B3 E5
GND GND
53 46 B4 E6
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN GND GND
41 40 39 37 35 34 33 31 30 28 B5 E7
GND GND
B6
1 C2617 1 C2618 B7
GND GND E8
220PF 220PF GND GND E9
5% 5% B16
2 10V 2 10V GND GND E10
C0G-CERM C0G-CERM B17
01005 01005 GND GND E11
ROOM=STROBE2 ROOM=STROBE2 B20 E12
GND GND
C1 E13
AC return path for plane edge termination, which occurs near the Strobe modules. GND GND
C2 E14
GND GND
C3 E15
GND GND
C4 E16
GND GND
C5 E17
GND GND
C6 E18
GND GND
GND1S
GND2S
C7
GND1
GND2
GND GND E19
A1
B1
E20
D20
CDS_LIB=apple
A
PAGE TITLE
CAMERA:STROBE DRIVER
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

26 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ACCESSORY BUCK
#25761020:Add Bypass 0ohm
NOSTUFF
R2711
1
0.00 2
D 1%
1/20W
D
MF
0201
ROOM=ACC_BUCK From PMU LDO6
U2710 1 C2704 1 C2705

TPS22915
DSBGA-COMBO 2.2UF 2.2UF
20% 20%
53 PP_VDD_MAIN
28 26 25 23 21 19 18 10 9 4 A2 VIN VOUT A1
PP_VDD_MAIN_ACC_BUCK_VIN 2 6.3V 2 6.3V
46 41 40 39 37 35 34 33 31 30 X5R-CERM X5R-CERM
0201-1 0201-1
20 PMU_TO_ACC_BUCK_SW_EN B2 ON ROOM=PMU ROOM=PMU
B1 GND
1 C2700
1 1
From PMU GPIO14 R2700 R2710 2.2UF
20%
K
5%
100K
1%
100K 2 6.3V
X5R-CERM
D2700
SOD962-2
1/32W 1/32W 0201-1
MF MF ROOM=ACC_BUCK PMEG3002ESF
2 01005
ROOM=ACC_BUCK 2 01005 A ROOM=ACC_BUCK
ROOM=ACC_BUCK
FET Changes per #25687842 4/12/2016
A2
Q2700
VIN PMCM4401VPE
U2700 WLCSP
CRITICAL
FAN53612-1.55V-1.95V
L2700 #25370332: For EMC
WLCSP
0.47UH-20%-2.52A-0.08OHM #25919133: C2707 on P46
A2
B2 B1 1 2 46 PP_ACC_BUCK_VAR
S
ACC_BUCK_EN EN SW ACC_BUCK_SW B1 B2
PIGA1608-SM
AP_TO_ACC_BUCK_VSEL A1 VSEL C1 ROOM=ACC_BUCK
12 FB ACC_BUCK_FB 27
OMIT To Tristar on Pg40
A1 G
C From AP GPIO1 1
R2701
GND 1 C2702 1 C2703 1 C2701 XW2700 ROOM=TRISTAR C
1 C2710 10UF 220PF 0.1UF SHORT-20L-0.05MM-SM PP_ACC_VAR
C2
100K 20% 5% 20% 1 2
19 27 40
5% 0.22UF 2 6.3V
CERM-X5R 2 10V
C0G-CERM 2 6.3V
X5R-CERM
27 ACC_BUCK_FB
1/32W 10%
MF
2 01005
2 6.3V
CER-X5R
01005 1
0402-9
ROOM=ACC_BUCK
01005
ROOM=ACC_BUCK
01005
ROOM=ACC_BUCK
ROOM=ACC_BUCK
PLACE_NEAR=Q2700:2mm
Q2701 1 C2708
ROOM=ACC_BUCK
PMCM4401VPE 4UF
ROOM=ACC_BUCK R2705
10K WLCSP 20%
5% #25172498 2 OMIT 2 6.3V
CER-X5R
1/32W 1 0201
MF
01005 2
R2702 XW2707 ROOM=TRISTAR
ROOM=ACC_BUCK 198K A2 SHORT-20L-0.05MM-SM
0.1% ROOM=TRISTAR
S
1/32W B1 B2 1 NO_XNET_CONNECTION=1
TF
2 01005 #25741319: Change to 4UF
ROOM=ACC_BUCK
ACC_BUCK_TO_PMU_AMUX ACT_DIODE_TO_COMP_SENSE
A1 G
20
PMU_AMUX_B3 FOR NOW ROOM=TRISTAR 1

R2704
ACT_DIODE_TO_COMP_OUT
200K
0.1%
1/32W
TF
2 01005
ROOM=ACC_BUCK
ACT_DIODE_TO_COMP_POS
40 27 19 PP_ACC_VAR
C2706 1
0.22UF
5
10%
6.3V VCC
CER-X5R 2
01005 U2701
ROOM=ACC_BUCK
NCS2200AMUT1
UDFN
4 IN+
VOUT 6
B ACT_DIODE_TO_COMP_NEG 3 IN- B
2
NC NC #25987909: To Resistor Divider
1
R2706 VEE
1
200K R2703
1
ROOM=ACC_BUCK
0.1%
1/32W 200K
TF 0.1%
2 01005 1/32W
TF
ROOM=ACC_BUCK
2 01005
ROOM=ACC_BUCK
A SYNC_MASTER=sync SYNC_DATE=04/28/2016 A
PAGE TITLE
Accessory: Buck Circuit

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

27 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
A3 GND
M2800 GND M5
A4 TRINITY_BLUE M7
GND SIP GND
A5 GND SYM 6 OF 6 GND N1
A6 GND GND N2
A7 GND GND N3
B1 GND GND N5
B4 GND GND N7
B7 GND GND P1
C1 GND GND P2
C2 GND GND P3
C3 GND GND P4
C4 GND GND P5
C5 GND GND P6
C6 GND GND P7
C7 GND GND Q1
D1 GND GND Q3
M2800 M2800 D4 GND GND Q4
TRINITY_BLUE TRINITY_BLUE D7 Q5
SIP SIP GND GND
SYM 1 OF 6 SYM 4 OF 6 E1 GND GND Q7
53 46
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN
L4 VDD_T TIG L6 TIGRIS_BUCK_LX 21
53 46
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN
D5 VDD1_2 BL1_1 F6 BL_SW1_LX 37
E2 GND GND R1
C
41 40 39 37 35 34 33 31 30 28
M4
N4
VDD_T TIG M6
41 40 39 37 35 34 33 31 30 28
D6 VDD1_2 BL1_1 G6
H6
E3 GND GND R3 C
VDD_T TIG N6 F2 BL1_1 E4 R4
VDDX_1 J6 GND GND
G2 BL1_1 E5 R5
VDDX_1 GND GND
H2 VDDX_1 BL1_2 B5 BL_SW2_LX 37
E6 GND GND R7
J2 VDDX_1 BL1_2 B6 E7 GND GND S1
F1 GND GND S3
F3 GND GND S4
F4 GND GND S5
F5 GND GND S7
F7 GND GND T1
M2800 M2800 G1 GND GND T3
TRINITY_BLUE TRINITY_BLUE G3 T4
SIP SIP GND GND
SYM 2 OF 6 SYM 5 OF 6 G4 GND GND T5
V2 VDD_A ARC X2 ARC1_LX 35
D2 VDD2_2 BL2_1 Q6 BL34_SW1_LX 46
G5 GND GND T7
V3 VDD_A ARC X3 D3 VDD2_2 BL2_1 R6
G7 GND GND U1
BL2_1 S6
Q2 VDDX_1 H1 GND GND U2
BL2_1 T6
R2 VDDX_1 H3 GND GND U3
S2 VDDX_1 BL2_2 B2 BL34_SW2_LX 46
H4 GND GND U4
T2 VDDX_1 BL2_2 B3 H5 GND GND U5
H7 GND GND U6
J1 GND GND U7
J3 GND GND V1
M2800 J4 GND GND V4
TRINITY_BLUE J5 GND GND V7
SIP J7 GND GND W1
V5 SYM 3 OF 6 X5 K1 W2
VDD_S SPK SPEAKERAMP1_LX 34 GND GND
B V6 VDD_S SPK X6 K2 GND GND W3 B
K3 GND GND W4
K4 GND GND W5
K5 GND GND W6
K6 GND GND W7
K7 GND GND X1
L1 GND GND X4
L2 GND GND X7
L3 GND GND Y1
L5 GND GND Y2
L7 GND GND Y3
M1 GND GND Y4
M2 GND GND Y5
M3 GND
A2 GND1S
Y6 GND2S
A1 GND1
Y7 GND2
PAGE TITLE
TRINITY:FF SPECIFIC
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

28 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
NEW HAMPSHIRE POWER PROX, ALS, & CONVOY POWER

FL2901 FL2913
150OHM-25%-200MA-0.7DCR
33-OHM-25%-1500MA
1 2 30 25 19 PP3V0_ALS_APS_CONVOY 1 2 PP3V0_ALS_CONVOY_CONN 45
17 16 13 12 11 9 8 7 5
52 48 47 46 39 30 25 18
PP1V8 PP1V8_NH_IO_CONN 45
01005
0201
ROOM=FOREHEAD 1 C2914 1 C2902 ROOM=FOREHEAD 1 C2917 1 C2926
2.2UF 220PF
0.1UF 220PF 20% 5%
20% 5% 2 6.3V 2 10V
2 6.3V
X5R-CERM 2 10V
C0G-CERM
X5R-CERM
0201-1
C0G-CERM
01005
01005 01005 ROOM=FOREHEAD
ROOM=FOREHEAD ROOM=FOREHEAD
ROOM=FOREHEAD
D FL2902 D
33-OHM-25%-1500MA
30 19 PP1V2_NH_NV_DVDD 1 2 PP1V2_NH_DVDD_CONN 45
0201
ROOM=FOREHEAD 1 C2916 1 C2915 1 C2903
20%
2.2UF 0.1UF
20% 5%
220PF FL2910
150OHM-25%-200MA-0.7DCR
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 10V
C0G-CERM
0201-1 01005 01005 1 2
ROOM=FOREHEAD ROOM=FOREHEAD 53 41 40 19 PP3V0_TRISTAR_ANT_PROX PP3V0_PROX_CONN 45
ROOM=FOREHEAD
01005
ROOM=FOREHEAD 1 C2927 1 C2908
FL2903 20%
2.2UF
5%
220PF
10-OHM-750MA #24511567: Remove C2918
2 6.3V 2 10V
X5R-CERM C0G-CERM
19 PP2V9_NH_AVDD 1 2 PP2V9_NH_AVDD_CONN 45
0201-1 01005
01005-1
ROOM=FOREHEAD 1 C2909 1 C2901 1 C2904
2.2UF 0.1UF 220PF
20% 20% 5%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 10V
C0G-CERM
0201-1 01005 01005
ROOM=FOREHEAD ROOM=FOREHEAD ROOM=FOREHEAD
NEW HAMPSHIRE I/O 1 C2932

FL2907
150OHM-25%-200MA-0.7DCR
SPEAKER2 5%
2 10V
220PF
C0G-CERM
01005
1 2 ROOM=FOREHEAD
9 AP_TO_NH_CLK AP_TO_NH_CLK_CONN 45
01005
1 C2910 46 45 33 SPEAKERAMP2_TO_SPEAKER_OUT_POS
C
C ROOM=FOREHEAD
5%
56PF NO_XNET_CONNECTION=1
2 25V
NP0-C0G-CERM
1 C2935
01005 220PF
5%
ROOM=FOREHEAD 2 10V
C0G-CERM
FL2908 01005
150OHM-25%-200MA-0.7DCR ROOM=FOREHEAD
1 2 SPEAKERAMP2_TO_SPEAKER_OUT_NEG 33 45 46
9 AP_TO_NH_SHUTDOWN_L AP_TO_NH_SHUTDOWN_CONN_L
01005
ROOM=FOREHEAD 1 C2911 NO_XNET_CONNECTION=1
C2931 1
220PF
5% 220PF
2 10V
C0G-CERM
5%
10V 2
01005 C0G-CERM
ROOM=FOREHEAD
01005
ROOM=FOREHEAD
R2903
0.00
33 SPEAKER_TO_SPEAKERAMP2_VSENSE_P 1 2 SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P 45
0% NO_XNET_CONNECTION=1
1/32W
MF 1 C2933
CONVOY I/O 01005
ROOM=FOREHEAD 5%
2 10V
220PF
C0G-CERM
01005
FL2905 ROOM=FOREHEAD
100 R2904
33 PDM_ADARE_TO_CONVOY_CLK 1 2 PDM_ADARE_TO_CONVOY_CLK_CONN 45
0.00
5% SPEAKER_TO_SPEAKERAMP2_VSENSE_N 1 2 SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N
1/32W
MF
1 C2905 33
0% NO_XNET_CONNECTION=1
45
01005 56PF 1/32W

ROOM=FOREHEAD 5%
2 25V
MF
01005
1 C2934
NP0-C0G-CERM
01005 ROOM=FOREHEAD 220PF
5%
2 10V
B FL2906
ROOM=FOREHEAD C0G-CERM
01005 B
ROOM=FOREHEAD
150OHM-25%-200MA-0.7DCR
33 PDM_CONVOY_TO_ADARE_DATA 1 2 PDM_CONVOY_TO_ADARE_DATA_CONN 45
01005
ROOM=FOREHEAD 1 C2906
56PF
5%
2 25V
NP0-C0G-CERM
01005
ROOM=FOREHEAD MIC3 FL2914
150OHM-25%-200MA-0.7DCR
32 PP_CODEC_TO_FRONTMIC3_BIAS 1 2 PP_CODEC_TO_FRONTMIC3_BIAS_CONN 45
01005
ROOM=FOREHEAD 1 DZ2905
PROX/ALS I/O #25170697: R2915 to 240ohm/C2921 to 220pF
2
6.8V-100PF
01005
ROOM=FOREHEAD
R2915
PROX_BI_AP_AOP_INT_PWM_L 1
240 2 PROX_BI_AP_AOP_INT_PWM_L_CONN
FL2904
13 12 45 150OHM-25%-200MA-0.7DCR
1%
1/32W
MF
1 C2921 31 FRONTMIC3_TO_CODEC_AIN4_N 1 2 FRONTMIC3_TO_CODEC_AIN4_CONN_N
45
01005 220PF 01005

5%
ROOM=FOREHEAD
2 10V
C0G-CERM
ROOM=FOREHEAD 1 DZ2906
01005 6.8V-100PF
01005
2
FL2911 FL2909
150OHM-25%-200MA-0.7DCR 150OHM-25%-200MA-0.7DCR
A 12 ALS_TO_AP_INT_L 2 1 ALS_TO_AP_INT_CONN_L
01005
45 31 FRONTMIC3_TO_CODEC_AIN4_P 2
01005
1
FRONTMIC3_TO_CODEC_AIN4_CONN_P 45
A
1 C2924 ROOM=FOREHEAD 1 DZ2907 PAGE TITLE
ROOM=FOREHEAD 56PF
6.8V-100PF
01005
ROOM=FOREHEAD
B2B:FOREHEAD
5% 2 DRAWING NUMBER SIZE
2 25V
NP0-C0G-CERM
01005
ROOM=FOREHEAD Apple Inc.
051-00542 D
REVISION
R
5.0.0

29 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
THIS PAGE UNIQUE TO LARGE FORM FACTOR
NEVADA POWER NEVADA CONNECTOR OTHER FORM FACTOR SPECIFIC PAGES:
4 - Mechanical
NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM THIS ONE ---> 516S00152 RCPT (USED ON MLB) 46 - FF Specific
IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC. 516S00151 PLUG
ROOM=NEVADA
J3001
AA26D-S022VA1
F-ST-SM
U3001 24 23
LP5907UVX2.925-S
DSBGA
D
38 37 32 25 23 19 PP_VDD_BOOST A1 VIN VOUT A2 PP2V9_NV_AVDD_CONN 30
30 I2C_NV_SDA_CONN 2 1 90_LPDP_NV_TO_AP_D0_CONN_N 30 D
PP2V8_UT_AF_VAR B1 VEN
ROOM=NEVADA 1 C3006 1 C3007 1 C3009 30 I2C_NV_SCL_CONN 4 3 90_LPDP_NV_TO_AP_D0_CONN_P 30
30 25 18
4UF 0.22UF 220PF 45 30 25 UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN 6 5
GND 20% 10% 5%
1 C3002 2 6.3V
CER-X5R 2 6.3V
CER-X5R 2 10V
C0G-CERM 30 AP_TO_NV_SHUTDOWN_CONN_L 8 7 90_LPDP_NV_TO_AP_D1_CONN_N 30
B2
2.2UF 0201 01005 01005 30 UT_TO_NV_SYNC_J3001_CONN 10 9 90_LPDP_NV_TO_AP_D1_CONN_P 30
20% ROOM=NEVADA ROOM=NEVADA ROOM=NEVADA
2 6.3V 30 PP1V8_NV_IO_CONN 12 11
X5R-CERM
0201-1 30 LPDP_NV_BI_AP_AUX_CONN 14 13 AP_TO_NV_CLK_CONN 30
ROOM=NEVADA 16 15
30 PP3V3_NV_SVDD_CONN 18 17 PP2V9_NV_AVDD_CONN 30
30 PP1V8_NV_AF_CONN 20 19
22 21
L3003
33-OHM-25%-1500MA
30 PP1V2_NV_VDD_CONN 26 25
29 19 PP1V2_NH_NV_DVDD 1 2 PP1V2_NV_VDD_CONN 30
0201
ROOM=NEVADA 1 C3016 1 C3019 1 C3021 1 C3001 1 C3028
2.2UF 2.2UF 2.2UF 220PF 15PF
20% 20% 20% 5% 5%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 10V
C0G-CERM 2 16V
NP0-C0G-CERM
0201-1 0201-1 0201-1 01005 01005
ROOM=NEVADA ROOM=NEVADA ROOM=NEVADA ROOM=NEVADA ROOM=NEVADA
GPIO FILTERS
NOSTUFF
L3005 FL3002
33-OHM-25%-1500MA D11: STUFF L3001, L3004. NOSTUFF L3005, L3006 150OHM-25%-200MA-0.7DCR
30 25 18 PP2V8_UT_AF_VAR 1 2 D12: NOSTUFF L3001, L3004. STUFF L3005, L3006 45 UT_TO_NV_SYNC_J2501_CONN 1 2 UT_TO_NV_SYNC_J3001_CONN 30
C 0201
ROOM=NEVADA 1 C3029
01005
ROOM=NEVADA 1 C3027 C
100PF 100PF
5% 5%
2 16V
NP0-C0G 2 16V
NP0-C0G
L3001 01005 01005
33-OHM-25%-1500MA ROOM=RCAM_B2B ROOM=NEVADA
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 29
PP1V8 1 2 PP1V8_NV_AF_CONN 30
0201
ROOM=NEVADA 1 C3017 UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN 25 30 45
220PF
5%
2 10V
1 C3011
C0G-CERM
01005
100PF
5%
ROOM=NEVADA 2 16V
NP0-C0G
01005
L3002 ROOM=NEVADA
33-OHM-25%-1500MA
1 2 PP1V8_NV_IO_CONN
FL3001
30 150OHM-25%-200MA-0.7DCR
0201
NC_AP_TO_NV_SHUTDOWN_L AP_TO_NV_SHUTDOWN_L 1 2 AP_TO_NV_SHUTDOWN_CONN_L
ROOM=NEVADA 1 C3020 1 C3026 9
MAKE_BASE=TRUE
01005
30
1.0UF
20% 5%
220PF ROOM=NEVADA 1 C3012
2 6.3V
X5R 2 10V
C0G-CERM
220PF
5%
0201-1 01005 10V
2 C0G-CERM
ROOM=NEVADA ROOM=NEVADA 01005
L3004 ROOM=NEVADA
33-OHM-25%-1500MA
19 7 PP3V3_USB 1 2 PP3V3_NV_SVDD_CONN 30
R3002 CKPLUS_WAIVE=I2C_PULLUP
0.00
0201 46 9 I2C_ISP_NV_SCL 1 2 I2C_NV_SCL_CONN 30
ROOM=NEVADA 1 C3018 1 C3030 MAKE_BASE=TRUE
0%
1 C3013
B NOSTUFF 5%
220PF 2.2UF
20%
1/32W
MF
01005 56PF B
2 10V 2 6.3V 5%
L3006 C0G-CERM
01005
X5R-CERM
0201-1
ROOM=NEVADA
2 25V
NP0-C0G-CERM
33-OHM-25%-1500MA ROOM=NEVADA ROOM=NEVADA
01005
ROOM=NEVADA
29 25 19 PP3V0_ALS_APS_CONVOY 1 2
0201
ROOM=NEVADA R3001
0.00 CKPLUS_WAIVE=I2C_PULLUP
46 9 I2C_ISP_NV_SDA 1 2 I2C_NV_SDA_CONN 30
MAKE_BASE=TRUE
0%
1/32W
MF
1 C3014
01005 56PF
ROOM=NEVADA 5%
2 25V
LPDP FILTERS NP0-C0G-CERM
01005
ROOM=NEVADA
53 46 41
26 25 23 21 19 18 10 9 4 PP_VDD_MAIN FL3004
40 39 37 35 34 33 31 28 27
R3003 150OHM-25%-200MA-0.7DCR
1 C3003 1 C3004 1 C3032 1 C3033 NC_AP_TO_NV_CLK_R AP_TO_NV_CLK_R 1
33.2 2 AP_TO_NV_CLK 1 2 AP_TO_NV_CLK_CONN
33PF 33PF 33PF 33PF 9
MAKE_BASE=TRUE
30
5% 5% 5% 5% 1% 01005
2 16V
NP0-C0G-CERM 2 16V
NP0-C0G-CERM 2 16V
NP0-C0G-CERM 2 16V
NP0-C0G-CERM 1/32W
MF
1 C3005 1 C3008 ROOM=NEVADA 1 C3015
01005 01005 01005 01005 01005 100PF 100PF 56PF
ROOM=NEVADA ROOM=NEVADA ROOM=NEVADA ROOM=NEVADA ROOM=SOC 5% 5% 5%
2 16V
NP0-C0G 2 16V
NP0-C0G 2 25V
NP0-C0G-CERM
C3031 01005 01005 01005
0.1UF ROOM=NEVADA ROOM=NEVADA ROOM=NEVADA
1 2 NOSTUFF NOSTUFF
10 AP_LPDP_AUX0 LPDP_NV_BI_AP_AUX LPDP_NV_BI_AP_AUX_CONN 30
MAKE_BASE=TRUE
ROOM=NEVADA 20%
6.3V
1 C3010 NEAR SOC NEAR B2B
X5R-CERM 56PF
01005 5%
2 25V
NP0-C0G-CERM
01005
A ROOM=NEVADA
A
10 90_LPDP_RX_D0_P 90_LPDP_NV_TO_AP_D0_P C3022 1 2 0.1UF 90_LPDP_NV_TO_AP_D0_CONN_P 30
PAGE TITLE
MAKE_BASE=TRUE
ROOM=NEVADA 20%
X5R-CERM
6.3V
01005
GND_VOID=TRUE
B2B:NEVADA
10 90_LPDP_RX_D0_N 90_LPDP_NV_TO_AP_D0_N
MAKE_BASE=TRUE
C3023
ROOM=NEVADA
1 2 0.1UF 90_LPDP_NV_TO_AP_D0_CONN_N 30
DRAWING NUMBER
051-00542
SIZE
D
20% 6.3V GND_VOID=TRUE Apple Inc.
X5R-CERM 01005 REVISION
R
5.0.0
10 90_LPDP_RX_D1_P 90_LPDP_NV_TO_AP_D1_P
MAKE_BASE=TRUE
C3024
ROOM=NEVADA
1 2 0.1UF 90_LPDP_NV_TO_AP_D1_CONN_P 30 NOTICE OF PROPRIETARY PROPERTY: BRANCH
20% 6.3V GND_VOID=TRUE THE INFORMATION CONTAINED HEREIN IS THE

X5R-CERM 01005 PROPRIETARY PROPERTY OF APPLE INC.
10 90_LPDP_RX_D1_N 90_LPDP_NV_TO_AP_D1_N
MAKE_BASE=TRUE
C3025 1 2 0.1UF 90_LPDP_NV_TO_AP_D1_CONN_N 30
THE POSESSOR AGREES TO THE FOLLOWING:
PAGE
30 OF 53
ROOM=NEVADA 20% 6.3V GND_VOID=TRUE II NOT TO REPRODUCE OR COPY IT
X5R-CERM 01005 III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CALTRA AUDIO CODEC (ANALOG INPUTS & OUTPUTS)
D CRITICAL
D
ROOM=CODEC
U3101
WLCSP-1
41 LOWERMIC1_TO_CODEC_AIN1_P L2 AIN1+ SYM 1 OF 3 AOUT1+ L9 NC
WAS FOR RECEIVER; REPLACED BY SPEAKER IN D1xy
41 LOWERMIC1_TO_CODEC_AIN1_N L1 AIN1- AOUT1- M9 NC
CS42L71
AOUT2+ L8 NC
AOUT2- M8 NC
HPOUTA K10NC
41 LOWERMIC4_TO_CODEC_AIN2_P K3 AIN2+ HPOUTB K11NC
41 LOWERMIC4_TO_CODEC_AIN2_N L3 AIN2-
HS3 M5
HS4 M4
HS3_REF L10
HS4_REF M10
44 REARMIC2_TO_CODEC_AIN3_P K2 AIN3+
44 REARMIC2_TO_CODEC_AIN3_N K1 AIN3-
HSIN+ D1 NC
HSIN- E1 NC
29 FRONTMIC3_TO_CODEC_AIN4_P J3 AIN4+
For Borealis
29 FRONTMIC3_TO_CODEC_AIN4_N J4 AIN4-
C HPDETECT J9 NC C
NC F1 AIN5+
NC G1 AIN5-
NC F2 AIN6+ ROOM=CODEC
NC F3 AIN6- C3107
100PF
1 2
5%
16V
NP0-C0G
44 HAWKING_TO_CODEC_AIN7_P G2 AIN7+
R3104
20.0
01005
1 2 90_MIKEYBUS_DATA_P 40
44 HAWKING_TO_CODEC_AIN7_N G3 AIN7-
5%
1/32W
MF
NC A4 DMIC1_CLK DP J12 90_MIKEYBUS_CALTRA_DATA_P 01005
ROOM=CODEC
NC B4 DMIC1_DATA DN H12 90_MIKEYBUS_CALTRA_DATA_N
NC C4 DMIC2_CLK
MBUS_REF G10 MIKEYBUS_REFERENCE 41
R3103
20.0
NC C3 DMIC2_DATA 1 2 90_MIKEYBUS_DATA_N 40
5%
NC A3 DMIC3_CLK 1/32W
MF
NC B3 DMIC3_DATA 1
R3101 01005
ROOM=CODEC
C3106
100PF
100
NC A2 DMIC4_CLK 5% 1 2
1/32W
NC B2 DMIC4_DATA MF
01005
2ROOM=CODEC 5%
B 33 PDM_CODEC_TO_SPKAMP2_CLK A9 PDM_CLK
16V
NP0-C0G
01005
B
ROOM=CODEC
33 PDM_CODEC_TO_SPKAMP2_DATA B9 PDM_DATA
53
27 26 25 23 21 19 18 10 9 4
46 41 40 39 37 35 34 33 30 28
PP_VDD_MAIN
A 1 C3112 1 C3113 SYNC_MASTER=sync SYNC_DATE=04/28/2016
A
PAGE TITLE
220PF 220PF
5%
2 10V
C0G-CERM
5%
2 10V
C0G-CERM
AUDIO:CALTRA CODEC (1/2)
01005 01005 DRAWING NUMBER SIZE
ROOM=CODEC ROOM=CODEC
Apple Inc.
051-00542 D
AC return path for Mikeybus which is referenced to GND and VDD_MAIN REVISION
Radar 21203307
R
5.0.0

31 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CALTRA AUDIO CODEC (POWER & I/O)

35 34 33 19 PP1V8_VA
1 C3209
2.2UF
D
20%
2 6.3V
X5R-CERM D
0201-1
ROOM=CODEC
CODEC_AGND 32
38 37 30 25 23 19 PP_VDD_BOOST
1 C3212 1 C3214 1 C3205
0.1UF 0.1UF 2.2UF
20% 20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
01005 01005 0201-1 46 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM
ROOM=CODEC ROOM=CODEC ROOM=CODEC 53 48 47
1
46 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM R3201
53 48 47 1.00K
5%
1 C3211 1 C3213 1 C3215 1/32W
MF
10UF 0.1UF 0.1UF
20% 20% 20% 2 01005
ROOM=CODEC
2 6.3V
CERM-X5R 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM D3
0402-9 01005 01005 1 CODEC_RESET_L H3 RESET* JTAG_TMS NC
ROOM=CODEC ROOM=CODEC ROOM=CODEC PP1V2_VD_FILT R3202 JTAG_TCK D4
NC
100K D2
5% JTAG_TDI
1 C3217 1 C3221 1/32W
MF
U3101 JTAG_TDO C2
NC
NC
1.0UF 1.0UF 01005 2 NC K8 WAKE* WLCSP-1
SYM 3 OF 3
VD G12
VD D12
VPROG_CP H11
VP_MBUS H10
20% 20%
VD_FILT E12
VCP J11
VP M7
ROOM=CODEC D11
VD_FILT C1
VL A5
2 6.3V 2 6.3V
VA J1
X5R X5R 35 34 33 13 AUDIO_TO_AOP_INT_L K9 INT* CS42L71 TSTO NC
0201-1 0201-1 ROOM=CODEC B10
TSTO NC
ROOM=CODEC ROOM=CODEC CRITICAL D5
11 SPI_AP_TO_CODEC_CS_L C9 CS* TSTO NC
C 36 11 SPI_AP_TO_CODEC_MAGGIE_SCLK C8 CCLK TSTO D6
E5
NC C
TSTO NC
C3203 36 11 SPI_AP_TO_CODEC_MAGGIE_MOSI B8 MOSI TSTO E6
NC
4.7UF PP_CODEC_TO_LOWERMIC1_BIAS M6 MIC1_BIAS FLYP K12NC E7
LOWERMIC1_TO_CODEC_BIAS_FILT_RET 1 2
41
LOWERMIC1_BIAS_FILT_IN K7 MIC1_BIAS_FILT
U3101 36 11 SPI_CODEC_MAGGIE_TO_AP_MISO A8 MISO TSTO NC
41
WLCSP-1 TSTO K4
NC
20% SYM 2 OF 3 11 I2S_AP_TO_CODEC_MCLK C12 MCLK
6.3V CS42L71
X5R-CERM1 ROOM=CODEC TSTI C10
402
ROOM=CODEC CRITICAL 36 35 34 33 11 I2S_MAGGIE_TO_AP_L26_CODEC_BCLK C6 ASP_SCLK TSTI D10
C3204 36 35 34 33 11 I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK C5 ASP_LRCK/FSYNC TSTI D7
4.7UF 41 PP_CODEC_TO_LOWERMIC4_BIAS L6 MIC2_BIAS D9
1 2 LOWERMIC4_BIAS_FILT_IN 36 35 34 33 I2S_MAGGIE_TO_L26_CODEC_DOUT B5 ASP_SDIN TSTI
41 LOWERMIC4_TO_CODEC_BIAS_FILT_RET J7 MIC2_BIAS_FILT FLYC L12NC E8
36 35 34 33 I2S_L26_CODEC_TO_MAGGIE_DIN B6 ASP_SDOUT TSTI
20% TSTI E9
6.3V
X5R-CERM1 13 I2S_CODEC_XSP_TO_AOP_BCLK B11 XSP_SCLK TSTI G11
402
ROOM=CODEC 13 I2S_CODEC_XSP_TO_AOP_LRCLK C11 XSP_LRCK/FSYNC TSTI H4
C3201 13 I2S_AOP_TO_CODEC_XSP_DOUT A11 XSP_SDIN/DAC2B_MUTE TSTI M1
4.7UF 44 PP_CODEC_TO_REARMIC2_BIAS K6 MIC3_BIAS
REARMIC2_TO_CODEC_BIAS_FILT_RET 1 2 REARMIC2_BIAS_FILT_IN 13 I2S_CODEC_XSP_TO_AOP_DIN A10 XSP_SDOUT
45 L5 MIC3_BIAS_FILT
20% 11 I2S_AP_TO_CODEC_MSP_BCLK B7 MSP_SCLK GND A1
6.3V FLYN M12NC
X5R-CERM1 11 I2S_AP_TO_CODEC_MSP_LRCLK C7 MSP_LRCK/FSYNC GND A12
402
ROOM=CODEC 11 I2S_AP_TO_CODEC_MSP_DOUT D8 MSP_SDIN GND B12
C3202 +VCP_FILT J10NC 11 I2S_CODEC_TO_AP_MSP_DIN A7 MSP_SDOUT GND E2
4.7UF 29 PP_CODEC_TO_FRONTMIC3_BIAS J6 MIC4_BIAS E3
GND
FRONTMIC3_TO_CODEC_BIAS_FILT_RET 1 2 FRONTMIC3_BIAS_FILT_IN K5 MIC4_BIAS_FILT 20 PMU_TO_CODEC_DIGLDO_PULLDN H5 DIGLDO_PULLDN E4
GND
20% J5 DIGLDO_PDN E10
6.3V GND
2
X5R-CERM1
402
1 C3223 1 C3224 GND F4
ROOM=CODEC 1.0UF 1.0UF GND F5
XW3203 20%
2 6.3V
20%
2 6.3V F6
B SHORT-20L-0.05MM-SM
ROOM=FOREHEAD
X5R
0201-1
X5R
0201-1 GNDCP L11
GND
GND F7
B
1NO_XNET_CONNECTION ROOM=CODEC ROOM=CODEC
GND F8
OMIT F9
GND
GND F10
1 C3222 1 C3225 GND G4
1.0UF 1.0UF GND G5
20% 20%
2 6.3V 2 6.3V GND G6
X5R X5R
0201-1 0201-1 GND G7
ROOM=CODEC ROOM=CODEC
-VCP_FILT M11NC GND G8
F12 GND G9
LP_FILT+ CALTRA_LP_FILTP H6
GND
GND H7
1 C3220 GND H8
0.1UF GND H9
20%
2 6.3V
X5R-CERM
01005 GND J8
NC M3 HS_BIAS_FILT ROOM=CODEC
NC M2 HS_BIAS_FILT_REF FILT+ H1 CALTRA_FILTP
1 C3208
10UF
20%
2 6.3V
CERM-X5R
0402-9
GNDHS
ROOM=CODEC
GNDD
GNDD
GNDD
GNDD
GNDP
GNDA
FILT- H2
A A
A6
B1
E11
F11
L4
L7
J2
PAGE TITLE
CODEC_AGND 32
AUDIO:CALTRA CODEC (2/2)
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
XW3202
SHORT-10L-0.1MM-SM
R
REVISION
5.0.0
2 1 NOTICE OF PROPRIETARY PROPERTY: BRANCH
ROOM=CODEC THE INFORMATION CONTAINED HEREIN IS THE

32 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
SPEAKER AMPLIFIER 2 (North)
53
27 26 25 23 21 19 18 10 9 4
46 41 40 39 37 35 34 31 30 28
PP_VDD_MAIN PP1V8_VA 19 32 34 35
C3327 1 C3326 1 C3328 1 C3313 1 C3329 1 1 C3315 1 C3316

10UF 2.2UF 0.1UF 2.2UF
10UF 10UF 10UF 20%
6.3V 2
20%
6.3V 2
20% 20%
20%
10V
20%
6.3V 2
20%
6.3V 2 CERM-X5R X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
X5R-CERM 2 CERM-X5R CERM-X5R 0402-9 0201-1 01005 0201-1
0402-8
ROOM=SPKAMP2
0402-9
ROOM=SPKAMP2
0402-9
ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2
A5
F5
CRITICAL
L3302 VP VA
C 1.2UH-20%-3.0A-0.080OHM C
1 2 SPEAKERAMP2_LX A2 SW U3301 VBST_B A1 PP_SPKR2_VBOOST
PIQA20161T-SM B2 SW CS35L26-A1 VBST_B B1
ROOM=SPKAMP2
WLCSP
1 C3312 1 C3311 1 C3324 1 C3325 1 C3306 1 C3308
47 =I2C_SPKAMP2_SDA D6 SDA VBST_A C1 220PF 0.1UF 10UF 10UF 10UF 10UF
ROOM=SPKAMP2 5% 10% 20% 20% 20% 20%
VBST_A D1 2 10V
C0G-CERM 2 16V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM
47 =I2C_SPKAMP2_SCL E6 SCL CRITICAL 01005 0201 0402-8 0402-8 0402-8 0402-8
ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2 ROOM=SPKAMP2
35 34 32 13 AUDIO_TO_AOP_INT_L A7 INT*
12 AP_TO_SPKAMP2_RESET_L A6 RESET*
1
1 C3319
R3301 34 SPKAMP1_TO_SPKAMP2_SYNC F6 ALIVE/SYNC ISNS+ F1 SPEAKERAMP2_ISENSE_P
10%
0.01UF
100K ISNS- E1 SPEAKERAMP2_ISENSE_N
5% 29 PDM_ADARE_TO_CONVOY_CLK SPEAKERAMP2_AD0_or_PDM_CLK1 E5 AD0/PDM_CLK1 2 6.3V
X5R
1/32W MAKE_BASE=TRUE 01005
MF
2 01005 1 36 35 34 13 I2S_AOP_TO_MAGGIE_L26_MCLK B7 MCLK ROOM=SPKAMP2
ROOM=SPKAMP2
R3304 VSNS+ E2 SPEAKER_TO_SPEAKERAMP2_VSENSE_P 29
NO_XNET_CONNECTION
100K 36 35 34 32 11 I2S_MAGGIE_TO_AP_L26_CODEC_BCLK C7 SCLK
5% VSNS- E3 SPEAKER_TO_SPEAKERAMP2_VSENSE_N 29
1/32W
MF 36 35 34 32 11 I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK C6 LRCK/FSYNC
2 01005
ROOM=SPKAMP2
36 35 34 32 I2S_MAGGIE_TO_L26_CODEC_DOUT D7 SDIN SPEAKERAMP2_TO_SPEAKER_OUT_POS
OUT+ D2 29 45 46
36 35 34 32 I2S_L26_CODEC_TO_MAGGIE_DIN B6 SDOUT OUT- C2 SPEAKERAMP2_TO_SPEAKER_OUT_NEG 29 45 46
31 PDM_CODEC_TO_SPKAMP2_CLK F7 PDM_CLK0 C3331 1 1 C3323

1000PF 1000PF
31 PDM_CODEC_TO_SPKAMP2_DATA E7 PDM_DATA0 FILT+ F4 SPEAKERAMP2_FILT 10% 10% Pg46: Compass Compensation Coil
10V 2 2 10V
X5R X5R
29 PDM_CONVOY_TO_ADARE_DATA D5 PDM_DATA1 AD1 F3 01005 01005
GNDP GNDA ROOM=SPKAMP2 ROOM=SPKAMP2
1 C3318
1UF
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
B 10%
2 10V
X5R B
402-1
ROOM=SPKAMP2
A
PAGE TITLE
AUDIO:SPEAKER AMP 2
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

33 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SPEAKER AMPLIFIER 1
(South)
D D
#25112685,Remove C3414
53
27 26 25 23 21 19 18 10 9 4
46 41 40 39 37 35 33 31 30 28
PP_VDD_MAIN PP1V8_VA 19 32 33 35
C3407 1 C3405 1 C3424 1 1 C3425 1 C3426

10UF 10UF 10UF 0.1UF 2.2UF
20% 20% 20% 20% 20%
10V 6.3V 6.3V 2 6.3V 2 6.3V
X5R-CERM 2 CERM-X5R 2 CERM-X5R 2 X5R-CERM X5R-CERM
0402-8 0402-9 0402-9 01005 0201-1
ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1
A5
F5
C VP VA C
A2 A1
TO TRINITY 28 SPEAKERAMP1_LX
B2
SW U3402 VBST_B
B1
PP_SPKR1_VBOOST
SW CS35L26-A1 VBST_B
D6 WLCSP C1
1 C3427 1 C3428 1 C3403 1 C3404 1 C3431 1 C3432
48 =I2C_SPKAMP1_SDA SDA VBST_A 220PF 0.1UF 10UF 10UF 10UF 10UF
ROOM=SPKAMP1 D1 5% 10% 20% 20% 20% 20%
E6 VBST_A 2 10V
C0G-CERM 2 16V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM
48 =I2C_SPKAMP1_SCL SCL CRITICAL 01005 0201 0402-8 0402-8 0402-8 0402-8
A7 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1 ROOM=SPKAMP1
35 33 32 13 AUDIO_TO_AOP_INT_L INT*
PULLED LOW ON PG 35
A6
35 13 AOP_TO_SPKAMP1_ARC_RESET_L RESET*
SPKAMP1_TO_SPKAMP2_SYNC
F6
ALIVE/SYNC ISNS+
F1
SPEAKERAMP1_ISENSE_P
1 C3430
33
E1 0.01UF
E5 ISNS- SPEAKERAMP1_ISENSE_N 10%
MAKE_BASE=TRUE SPEAKERAMP1_AD0 AD0/PDM_CLK1 2 6.3V
X5R
B7 01005
36 35 33 13 I2S_AOP_TO_MAGGIE_L26_MCLK MCLK ROOM=SPKAMP1
E2 NO_XNET_CONNECTION
C7 VSNS+ SPEAKER_TO_SPEAKERAMP1_VSENSE_P 41
36 35 33 32 11 I2S_MAGGIE_TO_AP_L26_CODEC_BCLK SCLK E3
VSNS- SPEAKER_TO_SPEAKERAMP1_VSENSE_N 41
C6
36 35 33 32 11 I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK LRCK/FSYNC
D7
36 35 33 32 I2S_MAGGIE_TO_L26_CODEC_DOUT SDIN D2
OUT+ SPEAKERAMP1_TO_SPEAKER_OUT_POS 41
B6 C2
36 35 33 32 I2S_L26_CODEC_TO_MAGGIE_DIN SDOUT OUT- SPEAKERAMP1_TO_SPEAKER_OUT_NEG 41
F7
NC PDM_CLK0
E7
PDM_DATA0 FILT+
F4
SPEAKERAMP1_FILT
C3422 1 1 C3434
NC 1000PF 1000PF
D5 F3 10% 10%
PDM_DATA1 AD1 10V 2 2 10V
GNDP GNDA 1 C3429 X5R
01005
X5R
01005
B 2.2UF ROOM=SPKAMP1 ROOM=SPKAMP1

B
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
20%
2 6.3V
X5R-CERM
0201-1
ROOM=SPKAMP1
A
PAGE TITLE
AUDIO:SPEAKER AMP 1
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

34 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ARC DRIVER
D D
#25742582,Add back C3531 for D10x at Pg46

53
27 26 25 23 21 19 18 10 9 4
46 41 40 39 37 34 33 31 30 28
PP_VDD_MAIN PP1V8_VA 19 32 33 34 35
C3530 1 C3525 1 C3532 1 1 C3527 1 C3534

10UF 10UF 10UF 0.1UF 2.2UF
20% 20% 20% 20% 20%
10V 6.3V 6.3V 2 6.3V 2 6.3V
X5R-CERM 2 CERM-X5R 2 CERM-X5R 2 X5R-CERM X5R-CERM
0402-8 0402-9 0402-9 01005
ROOM=ARC1
0201-1
ROOM=ARC1
ROOM=ARC1 ROOM=ARC1 ROOM=ARC1
C C
A5
F5
VP VA
A2 A1
TO TRINITY 28 ARC1_LX
B2
SW U3502 VBST_B
B1
PP_ARC1_VBOOST
SW CS35L26-A1 VBST_B
D6 WLCSP C1
1 C3526 1 C3535 1 C3537 1 C3524 1 C3538 1 C3539
48 =I2C_ARC1_SDA SDA VBST_A 220PF 0.1UF 10UF 10UF 10UF 10UF
ROOM=SPKAMP2 D1 5% 10% 20% 20% 20% 20%
E6 VBST_A 2 10V
C0G-CERM 2 16V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM
48 =I2C_ARC1_SCL SCL CRITICAL 01005 0201 0402-8 0402-8 0402-8 0402-8
A7 ROOM=ARC1 ROOM=ARC1 ROOM=ARC1 ROOM=ARC1 ROOM=ARC1 ROOM=ARC1
34 33 32 13 AUDIO_TO_AOP_INT_L INT*
A6
34 13 AOP_TO_SPKAMP1_ARC_RESET_L RESET*
NC FROM HOMER PER #25452686

F6
ALIVE/SYNC ISNS+
F1
ARC1_ISENSE_P
1 C3528
1
R3508 NC E1 0.01UF
E5 ISNS- ARC1_ISENSE_N 10%
100K 35 34 33 32 19 PP1V8_VA MAKE_BASE=TRUE ARC1_AD0 AD0/PDM_CLK1 2 6.3V
X5R
5% 01005
1/32W B7
MF 36 34 33 13 I2S_AOP_TO_MAGGIE_L26_MCLK MCLK ROOM=ARC1
2 01005 E2 NO_XNET_CONNECTION
ROOM=ARC1
I2S_MAGGIE_TO_AP_L26_CODEC_BCLK C7 VSNS+ SOLENOID1_TO_ARC1_VSENSE_POS 41
36 34 33 32 11 SCLK E3
VSNS- SOLENOID1_TO_ARC1_VSENSE_NEG 41
NOSTUFF I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK
C6
LRCK/FSYNC
C3501 1 36 34 33 32 11
D7
10PF 36 34 33 32 I2S_MAGGIE_TO_L26_CODEC_DOUT SDIN D2
5% OUT+ ARC1_TO_SOLENOID1_OUT_POS 41
16V 2 B6 C2
CERM 36 34 33 32 I2S_L26_CODEC_TO_MAGGIE_DIN SDOUT OUT- ARC1_TO_SOLENOID1_OUT_NEG 41
01005
ROOM=ARC1 F7
NC PDM_CLK0
E7 F4
B NC PDM_DATA0 FILT+ ARC1_FILT C3529 1 1 C3542 B
D5 F3 1000PF 1000PF
PDM_DATA1 AD1 10% 10%
GNDP GNDA 1 C3536 10V 2
X5R 2 10V
X5R
2.2UF 01005 01005
A3
A4
B3
B4
C3
C4
C5
D3
D4
B5
E4
F2
20% ROOM=ARC1 ROOM=ARC1
2 6.3V
X5R-CERM
0201-1
ROOM=ARC1
A
PAGE TITLE
ARC:DRIVER
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

35 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
MAGGIE LDO
APN: 353S00842
MAGGIE
APN: 336S00020
U3603
LD39130S-1.2V/AP
46 41 40 37 36 32 21 20 18 16
53 48 47
PP1V8_SDRAM A1 IN CSP OUT A2 PP1V2_MAGGIE
B1 EN 1 C3605 1 C3601
GND
4UF 0.1UF
20% 20%
2 6.3V
CER-X5R 2 6.3V
X5R-CERM
B2
0201 01005
ROOM=ARC_CTRL ROOM=ARC_CTRL
R3601
100
1 2 PP1V2_MAGGIE_PLL
5%
1/32W
MF
1 C3602
01005 0.1UF
ROOM=ARC_CTRL 20%
2 6.3V
X5R-CERM
01005
ROOM=ARC_CTRL
C C
VPP_2V5 must be > 1.71V for SPI Slave programming
36 24 18 PP1V8_MAGGIE_IMU
1 C3604 1 C3606
2.2UF 0.1UF
C4
D4
C3
A4
B3
A5
20% 20%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
VCCIO_0
VCCIO_2
VCCPLL
VPP_2V5
VCC
SPI_VCCIO1
0201-1 01005
ROOM=ARC_CTRL ROOM=ARC_CTRL
ICE5LP4K-SWG36I
NC
A2 IRLED U3602 IOB_10A B4
NC
R3604 MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC
F4 33.2
WLCSP IOB_11B_G5 I2S_MAGGIE_TO_AP_L26_CODEC_BCLK_R 1 2 I2S_MAGGIE_TO_AP_L26_CODEC_BCLK
HOMER STM32L0 MICRO NC
NC
C6
B6
RGB0
RGB1
IOB_12A_G4_CDONE E4
F3
MAGGIE_TO_AP_CDONE 12 1%
1/32W
11 32 33 34 35
BANK 0
STM32L03 APN: 337S00231 A6 IOB_16A UART_AOP_TO_MAGGIE_TXD 13 MF
NC RGB2 E3 01005
IOB_20A I2S_MAGGIE_TO_AP_DIN 11 ROOM=ARC_CTRL MAGGIE <-> AP (SDIN)
36 MAGGIE_TO_HOMER_WAKE B5 IOT_46B_G0 IOB_25B_G3 C2 I2S_AOP_TO_MAGGIE_L26_MCLK 13 33 34 35
BANK 1
IOB_26A B1 I2S_MAGGIE_TO_L26_CODEC_DOUT 32 33 34 35 MAGGIE <-> ARC, SPKRS, CODEC (SDOUT)
D2 PP1V8_MAGGIE_IMU 18 24 36
F6 IOB_27B I2S_L26_CODEC_TO_MAGGIE_DIN 32 33 34 35 MAGGIE <-> ARC, SPKRS, CODEC (SDIN)
SPI_MAGGIE_TO_HOMER_POS_SCLK IOB_2A E2 1 1
E6 IOB_29B I2S_AP_TO_MAGGIE_DOUT 11 MAGGIE <-> AP (SDOUT) R3605 R3602
BANK 2
NC IOB_3B_G6 C1
46 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM D6 IOB_30A 10K 10K
53 48 47
NC IOB_4A B2 5% 5%
D5 IOB_31B I2S_MAGGIE_TO_AP_L26_CODEC_LRCLK 11 32 33 34 MAGGIE DRIVES TO ARC, SPKRS, AP, CODEC 1/32W 1/32W
SPI_HOMER_TO_MAGGIE_POS_MISO IOB_5B 35 MF MF
C3603 1
AOP_TO_MAGGIE_EN F5 IOB_6A
IOB_32A_SPI_SO F2 SPI_CODEC_MAGGIE_TO_AP_MISO 11 32
2 01005 2 01005
2.2UF 13
IOB_33B_SPI_SI D1 SPI_AP_TO_CODEC_MAGGIE_MOSI 11 32
20% 13 MAGGIE_TO_AOP_INT E5 IOB_7B
6.3V 2 IOB_34A_SPI_SCK E1 SPI_AP_TO_CODEC_MAGGIE_SCLK 11 32
X5R-CERM
0201-1 F1
B ROOM=HOMER IOB_35B_SPI_CSN SPI_AP_TO_MAGGIE_CS_L 9
B
CRESET_B D3 AP_TO_MAGGIE_CRESETB_L 12
GND_LED
ROOM=ARC_CTRL
PP3601
P2MM-NSM
SM PP 1
CRITICAL 1
R3603
GND
GND
ROOM=HOMER 511K
D1
C4
1%
PP3602 SM PP 1 1/32W
A1
C5
A3
P2MM-NSM VDD VDDA MF
ROOM=HOMER 2 01005
U3601
STM32L031E6Y6D
E5 PA0_CLK_INROOM=HOMER PB0 E2
NC
B4 PA1 PB1 D2 SPI_MAGGIE_TO_HOMER_POS_MOSI
NC WLCSP
12 UART_HOMER_TO_AP_RXD D4 PA2 PB3 B2
12 UART_AP_TO_HOMER_TXD E4 PA3 PB6 A3
36 MAGGIE_TO_HOMER_WAKE
B3 PA4 PB7 A4
NC
R3607 NC
D3 PA5
B5
1
100 2 AP_BI_HOMER_BOOTLOADER_ALIVE_R E3 PA6 PC14_OSC32_IN NC
PC15_OSC32_OUT C5
5% C3 PA7 NC NOTE: RESET HAS INTERNAL 65K PULLUP
1/32W NC
MF 13 HOMER_TO_AOP_WAKE_INT C1 PA8 RST* D5 PMU_TO_HOMER_RESET_L 20
01005
I2C_HOMER_SCL B1 PA9
ROOM=HOMER 47 41
I2C_HOMER_SDA C2 PA10 BOOT0 A5 AP_BI_HOMER_BOOTLOADER_ALIVE 12

1 C3607
47 41
0.1UF
A1 PA13 1
13 SWD_AP_BI_HOMER_SWDIO
A2 PA14
R3611 20%
2 6.3V
X5R-CERM
53 17 13 SWD_AP_TO_MANY_SWCLK 27K 01005
5%
VSSA 1/32W ROOM=HOMER
MF
2 01005
E1
ROOM=HOMER
A #24543115: Scrub Value SYNC_MASTER=sync SYNC_DATE=04/28/2016

A
PAGE TITLE
ARC:MAGGIE
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

36 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DISPLAY & TOUCH - POWER SUPPLIES

CHESTNUT DISPLAY PMU 1
PP_CHESTNUT_CP
APN:338S1172 C3707
10UF
20%
VOLTAGE=10V
53 46
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN 2 X5R-CERM
41 40 39 37 35 34 33 31 30 28 0402-8
ROOM=CHESTNUT PN_CHESTNUT_CN
1 C3722 1 C3710 1
D
D CRITICAL 10UF
20%
10UF
20% NOSTUFF NOSTUFF
L3704 6.3V 2
CERM-X5R
6.3V 2
CERM-X5R U3703
1 C3726 1 C3727 #24543286: Densense Cap for Chestnut Charge Pump
1.0UH-20%-2.25A-0.15OHM 0402-9 0402-9 TPS65730A0PYFF 56PF 56PF
PIXB2016FE-SM ROOM=CHESTNUT ROOM=CHESTNUT C4 5% 5%
ROOM=CHESTNUT BGA CF1 2 25V
NP0-C0G-CERM 2 25V
NP0-C0G-CERM
D1 E4 01005 01005
VIN ROOM=CHESTNUT CF2 ROOM=CHESTNUT ROOM=CHESTNUT
2
B2 CRITICAL
CHESTNUT_LX SW
6.3V
A2 B3
SYNC LCMBST PP6V0_LCM_BOOST
NO INT PULL B4
D3 CPUMP
47 20 =I2C_CHESTNUT_SCL SCL
D2 E3
47 =I2C_CHESTNUT_SDA SDA VNEG PN5V7_LCM_MESON_AVDDN 39
C3 E2
39 20 LCM_TO_CHESTNUT_PWR_EN LCM_EN VNEG(SUB)
200K INT PD
C2 A4
40 20 13 7 PMU_TO_AOP_TRISTAR_ACTIVE_READY RESET* HVLDO1 PP5V7_MESON_AVDDH 39
NO INT PULL
E1 A3
20 CHESTNUT_TO_PMU_ADCMUX ADCMUX HVLDO2 PP5V7_LCM_AVDDH 39
PGND1
PGND2
AGND
A1
HVLDO3 PP5V1_TOUCH_VDDH 39
1 C3711 1 C3712 1 C3713 1 C3714 1 C3715 1 C3716 1 C3717
C1
B1
D4
1UF 10UF 10UF 10UF 10UF 10UF 220PF
20% 20% 20% 20% 20% 20% 5%
2 16V
CER-X5R 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
C0G-CERM
0201 0402-8 0402-8 0402-8 0402-8 0402-8 01005
ROOM=CHESTNUT ROOM=CHESTNUT ROOM=CHESTNUT ROOM=CHESTNUT ROOM=CHESTNUT ROOM=CHESTNUT ROOM=CHESTNUT
LED BACKLIGHT DRIVER - 6LED CRITICAL

C APN:353s00640 D3701 C
DSN2
28 BL_SW2_LX A K
25V
NSR05F30NXT5G
ROOM=BACKLIGHT
TO TRINITY
CRITICAL
D3702
NSR0530P2T5G
53 46 41 PP_VDD_MAIN BL_SW1_LX A K PP_LCM_BL_ANODE
27 26 25 23 21 19 18 10 9 4 28 39
40 39 37 35 34 33 31 30 28 25V
C3702 1 SOD-923-1
ROOM=BACKLIGHT
1 C3703 1 C3725 1 C3704 1 C3706 1 C3705 1 C3721
10UF 220PF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF
20% 2% 20% 20% 20% 20% 20%
VOLTAGE=6.3V 2 2 50V
C0G 2 35V
X5R 2 35V
X5R 2 35V
X5R 2 35V
X5R 2 35V
X5R
CERM-X5R
0402-9
ROOM=BACKLIGHT
U3701
LM3539A1
0201
ROOM=BACKLIGHT
0402 0402 0402 0402 0402
PLACE_NEAR=U3701:2MM
D4 IN DSBGA OUT A1
CRITICAL
47 46 41 40 36 32 21 20 18 16
53 48
PP1V8_SDRAM D3 VIO/HWEN SW1 C4
46 11 DWI_PMGR_TO_BACKLIGHT_DATA C2 SDI SW2_1 A3

46 11 DWI_PMGR_TO_BACKLIGHT_CLK C3 SCK SW2_2 A4
47 =I2C_BACKLIGHT1_SDA B2 SDA LED1 C1 PP_LCM_BL_CAT1 39

47 =I2C_BACKLIGHT1_SCL A2 SCL LED2 B1 PP_LCM_BL_CAT2 39
46 9 AP_TO_MUON_BL_STROBE_EN D1 TRIG ROOM=BACKLIGHT
53 46 26 BB_TO_STROBE_DRIVER_GSM_BURST_IND D2 INHIBIT
GND
GND
B B
B3
B4
1
R3701
200K
1%
1/32W
MF
01005
2
ROOM=BACKLIGHT
MOJAVE MESA BOOST

APN:353S00671
L3703
1.0UH-20%-0.4A-0.636OHM
53 46
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN 1 2 POS18V0_MESA_LX
41 40 39 37 35 34 33 31 30 28
0403
C3718 1 ROOM=MOJAVE
CRITICAL
10UF
20% U3702
6.3V LM3638A0 PP16V0_MESA
CERM-X5R 2 BGA
4 38
0402-9
ROOM=MOJAVE B1 SW
ROOM=MOJAVE
CRITICAL
1 C3708 1 C3720
100PF 2.2UF
38 32 30 25 23 19 PP_VDD_BOOST A2 VIN VOUT C3 5% 20%
2 35V
NP0-C0G 2 35V
X5R
MESA_TO_BOOST_EN B2 EN_M 01005 0402
C3724 1 38 4
A3 EN_S
ROOM=MOJAVE ROOM=MOJAVE
A 10UF
20%
6.3V 2 SYNC_MASTER=sync
A
PP17V0_MOJAVE_LDOIN
C2 LDOIN PMID C1
PGND
AGND
CERM-X5R PAGE TITLE

0402-9
ROOM=MOJAVE 1 C3709 1 C3719 DISPLAY & MESA:POWER
100PF 2.2UF
A1
B3
DRAWING NUMBER SIZE

5% 20%
2 35V
NP0-C0G 2 35V
X5R Apple Inc.
051-00542 D
01005 0402 REVISION
ROOM=MOJAVE ROOM=MOJAVE R
5.0.0

37 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
MESA POWER MAMBA AND MESA CONNECTOR CRITICAL
J3801
FL3803 MLB: 516S00141 (RCPT) BB35C-RA24-3A
80-OHM-25%-0.52A-0.17OHM FLEX: 516S00142 (PLUG) F-ST-SM
1 2 29
19 PP3V0_MESA PP3V0_MESA_CONN 38
0201 26 25 Matches flex_x452_acf, schematic revision 1.5.0 pinout
1 C3813 1 C3815 1 C3821 ROOM=MAMBA_MESA 1 C3822 1 C3804
2.2UF 2.2UF 2.2UF 0.1UF 220PF 38 PP3V0_MESA_CONN 2 1 PP1V8_MESA_CONN 38
20% 20% 20% 20% 5%
2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 10V
C0G-CERM 4 3
0201-1 0201-1 0201-1 01005 01005 6 5 MESA_TO_AOP_FDINT_CONN 38
ROOM=MAMBA_MESA ROOM=MAMBA_MESA ROOM=MAMBA_MESA ROOM=MAMBA_MESA ROOM=MAMBA_MESA
38 PP16V0_MESA_CONN 8 7 I2C_MESA_TURTLE_SDA_CONN 48
D MAMBA_TO_LCM_MDRIVE_CONN_MESA
GUARD 10
12
9
11
I2C_MESA_TURTLE_SCL_CONN
MESA_TO_BOOST_EN_CONN
48
D
FL3801 LCM_TO_MAMBA_MSYNC_CONN
38
14 13 MESA_TO_AP_INT_CONN
38
150OHM-25%-200MA-0.7DCR 45 38
1 2 P2MM-NSM 45 39 AP_TO_TOUCH_MAMBA_RESET_CONN_L 16 15 SPI_AP_TO_MESA_SCLK_CONN 38

48 19 PP1V8_MESA PP1V8_MESA_CONN 38 SM
TP_MAMBA_HINT_L
PP 1 18 17 SPI_AP_TO_MESA_MOSI_CONN
1 C3814
01005 1 C3807 =I2C_MAMBA_SDA 20 19 AOP_TO_MESA_BLANKING_EN_CONN
38
2.2UF
ROOM=MAMBA_MESA 1 C3802 5%
56PF PP3801 47
=I2C_MAMBA_SCL 22 21 SPI_MESA_TO_AP_MISO_CONN
38
20% 220PF 2 25V

47 38
2 6.3V
X5R-CERM
5% NP0-C0G-CERM 38 PP1V8_TOUCH_TO_MAMBA_CONN 24 23 PP2V75_MAMBA_CONN 38
0201-1 2 10V
C0G-CERM
01005
01005 ROOM=MAMBA_MESA
ROOM=MAMBA_MESA
ROOM=MAMBA_MESA 28 27
FL3802 30
150OHM-25%-200MA-0.7DCR ROOM=MAMBA_MESA
37 4 PP16V0_MESA 1 2 PP16V0_MESA_CONN 38
01005 37 32 30 25 23 19 PP_VDD_BOOST
ROOM=MAMBA_MESA 1 C3803
5%
2 35V
100PF
NP0-C0G
MAMBA POWER NOTE: OUTPUT IMPDEANCE MUST BE >0.005-OHM TI:353S00576
01005
ROOM=MAMBA_MESA
C3828 1 IN ORDER TO MEET CAP ESR REQUIREMENT PER LDO SPEC.
ST:353S00932
2.2UF
20%
MESA DIGITAL I/O ROOM=MAMBA_MESA

6.3V 2
X5R-CERM
0201-1
U3801
LP5907SNX-2.75
X2SON
4 VIN VOUT 1 PP2V75_MAMBA_CONN
XW3801
SHORT-20L-0.05MM-SM ROOM=MAMBA_MESA
38
FL3807 47 39 38 18 PP1V8_TOUCH 1 2 MAMBA_LDO_EN 3 EN 1 C3823 1 C3812

150OHM-25%-200MA-0.7DCR ROOM=PMU GND EPAD 10UF 220PF
OMIT 20% 5%
SPI_AP_TO_MESA_MOSI 1 2 SPI_AP_TO_MESA_MOSI_CONN 2 10V 2 10V
5
11 38 X5R-CERM C0G-CERM
01005 0402-8 01005
C 1
R3807 ROOM=MAMBA_MESA 1 C3816
56PF
ROOM=MAMBA_MESA ROOM=MAMBA_MESA C
511K 5%
1%
1/32W 2 25V
NP0-C0G-CERM R3805
MF 01005
2 01005 PP1V8_TOUCH 0.00
ROOM=MAMBA_MESA ROOM=MAMBA_MESA 47 39 38 18 1 2 PP1V8_TOUCH_TO_MAMBA_CONN 38
0%
1/32W
R3809 MF
01005
1 C3824 1 C3811
ROOM=MAMBA_MESA 2.2UF 220PF
0.00 20% 5%
11 SPI_AP_TO_MESA_SCLK 1 2 SPI_AP_TO_MESA_SCLK_CONN 38 2 6.3V
X5R-CERM 2 10V
C0G-CERM
1
R3808
511K
0%
1/32W
MF
1 C3817
56PF
MAMBA DIGITAL I/O 0201-1
ROOM=MAMBA_MESA
01005
ROOM=MAMBA_MESA
1%
01005
ROOM=MAMBA_MESA 5%
2 25V
FL3804
1/32W
MF NP0-C0G-CERM 150OHM-25%-200MA-0.7DCR
01005
2 01005
ROOM=MAMBA_MESA ROOM=MAMBA_MESA 45 MAMBA_TO_LCM_MDRIVE 1 2 MAMBA_TO_LCM_MDRIVE_CONN_MESA 38
01005 NOSTUFF
C3805 1 ROOM=MAMBA_MESA 1 C3806
56PF 56PF
5%
R3811 25V
NP0-C0G-CERM 2
5%
2 25V
1
33.2 2 01005 NP0-C0G-CERM
11 SPI_MESA_TO_AP_MISO SPI_MESA_TO_AP_MISO_CONN 38 01005
ROOM=MAMBA_MESA ROOM=MAMBA_MESA
1%
1/32W
MF
1 C3818
01005 56PF
ROOM=MAMBA_MESA 5%
2 25V
NP0-C0G-CERM
01005
ROOM=MAMBA_MESA
R3801
681
B 11 MESA_TO_AP_INT 1
1%
2 MESA_TO_AP_INT_CONN 38
B
1/32W
MF
1 C3819
01005 100PF
ROOM=MAMBA_MESA 5%
2 16V
NP0-C0G
01005
ROOM=MAMBA_MESA
R3802
681
37 4 MESA_TO_BOOST_EN 1 2 MESA_TO_BOOST_EN_CONN 38
FL3806
1% 150OHM-25%-200MA-0.7DCR
1/32W
MF
1 C3801
01005 100PF 13 MESA_TO_AOP_FDINT 1 2 MESA_TO_AOP_FDINT_CONN 38
ROOM=MAMBA_MESA 5%
2 16V 01005
NP0-C0G
01005 ROOM=MAMBA_MESA 1 C3826
ROOM=MAMBA_MESA 100PF
5% #24543342: stuff 100pF
2 16V
NP0-C0G
01005
FL3811
150OHM-25%-200MA-0.7DCR
ROOM=MAMBA_MESA
13 AOP_TO_MESA_BLANKING_EN 1 2 AOP_TO_MESA_BLANKING_EN_CONN 38
01005
1 C3825
56PF
5%
2 25V
NP0-C0G-CERM
01005
ROOM=MAMBA_MESA
A
PAGE TITLE
B2B:ORB & MESA

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

38 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
FL3912
DISPLAY POWER 240-OHM-25%-0.42A-0.31DCR DISPLAY MIPI L3901
65OHM-0.7-2GHZ-3.4OHM
CRITICAL
37 PP5V7_LCM_AVDDH 2 1 PP5V7_LCM_AVDDH_CONN 45 TAM0605
SYM_VER-1
0201 4 1
C3901 1 1 C3929 ROOM=DISPLAY_B2B 1 C3933 1 C3913 9 90_MIPI_AP_TO_LCM_CLK_P 90_MIPI_AP_TO_LCM_CLK_CONN_P 45
10UF 10UF 2.2UF 220PF
20% 20% 20% 5%
10V 2 10V 2 6.3V 2 10V
X5R-CERM 2 X5R-CERM X5R-CERM C0G-CERM 9 90_MIPI_AP_TO_LCM_CLK_N
3 2
90_MIPI_AP_TO_LCM_CLK_CONN_N 45
0402-8 0402-8 0201-1 01005 ROOM=DISPLAY_B2B
ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B
FL3906 L3902
PP1V8
240-OHM-25%-0.42A-0.31DCR
2 1 4
TAM0605 CRITICAL
SYM_VER-1
1
AP/TOUCH INTERFACE
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 30 29
PP1V8_LCM_CONN 45 9 90_MIPI_AP_TO_LCM_DATA0_P 90_MIPI_AP_TO_LCM_DATA0_CONN_P 45
D
0201
ROOM=DISPLAY_B2B 1 C3934 1 C3914 3 2
D
2.2UF 220PF 9 90_MIPI_AP_TO_LCM_DATA0_N 90_MIPI_AP_TO_LCM_DATA0_CONN_N 45
20% 5% ROOM=DISPLAY_B2B
2 6.3V
X5R-CERM 2 10V
C0G-CERM
0201-1
ROOM=DISPLAY_B2B
01005
ROOM=DISPLAY_B2B
L3903
TAM0605
SYM_VER-1
CRITICAL
4 1
9 90_MIPI_AP_TO_LCM_DATA1_P 90_MIPI_AP_TO_LCM_DATA1_CONN_P 45
3 2
FL3904
9 90_MIPI_AP_TO_LCM_DATA1_N 90_MIPI_AP_TO_LCM_DATA1_CONN_N 45
150OHM-25%-200MA-0.7DCR
ROOM=DISPLAY_B2B 2 1
12 AP_TO_TOUCH_MAMBA_RESET_L AP_TO_TOUCH_MAMBA_RESET_CONN_L 38 45
01005
FL3913 ROOM=DISPLAY_B2B 1 C3915 1 C3902
150OHM-25%-200MA-0.7DCR 220PF 220PF
5% 5%
LCM_TO_CHESTNUT_PWR_EN 2 1 LCM_TO_CHESTNUT_PWR_EN_CONN 2 10V
37 20 45 C0G-CERM 2 10V
C0G-CERM
01005 01005 01005
ROOM=DISPLAY_B2B 1 C3916 ROOM=DISPLAY_B2B ROOM=MAMBA_MESA
220PF
5%
2 10V
C0G-CERM To Display B2B To Mamba/Mesa B2B
01005
FL3908 ROOM=DISPLAY_B2B
240-OHM-25%-0.42A-0.31DCR
37 PN5V7_LCM_MESON_AVDDN 2 1 PN5V7_LCM_MESON_AVDDN_CONN 45
0201
ROOM=DISPLAY_B2B 1 C3909
5%
220PF FL3915
2 10V
150OHM-25%-200MA-0.7DCR
C0G-CERM 01005
01005 12 AP_TO_LCM_RESET_L 1 2 AP_TO_LCM_RESET_CONN_L 45
1 1 C3917
240-OHM-25%-0.42A-0.31DCR R3901
C 37 PP5V7_MESON_AVDDH 2 1 PP5V7_MESON_AVDDH_CONN 45
100K
5% 5%
220PF C
0201 1/32W 2 10V
C0G-CERM
MF
ROOM=DISPLAY_B2B 1 C3910 1 C3940 01005
ROOM=DISPLAY_B2B 2
01005
ROOM=DISPLAY_B2B
220PF 2.2UF
5% 20%
2 10V
C0G-CERM 2 6.3V
X5R-CERM R3915
FL3910
01005 0201-1
PMU_TO_LCM_PANICB 1
10 2 PMU_TO_LCM_PANICB_CONN
FL3922
ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B 20 45 150OHM-25%-200MA-0.7DCR
33-OHM-25%-1500MA 5%
PP1V8_TOUCH 1 2 PP1V8_TOUCH_CONN
1/32W
MF
1 C3918 11 SPI_AP_TO_TOUCH_CS_L 2 1 SPI_AP_TO_TOUCH_CS_CONN_L 45
47 38 18 45
01005 100PF 01005
C3932 1
0201
ROOM=DISPLAY_B2B 1 C3911 ROOM=DISPLAY_B2B 5%
2 16V
NP0-C0G 56PF
2.2UF 220PF 01005 5%
20%
6.3V
X5R-CERM 2
5%
2 10V
C0G-CERM
AOP/TOUCH INTERFACE ROOM=DISPLAY_B2B
2 25V
NP0-C0G-CERM
01005
0201-1 01005 ROOM=DISPLAY_B2B
ROOM=DISPLAY_B2B
R3923
240-OHM-25%-0.42A-0.31DCR 0.00
11 SPI_AP_TO_TOUCH_SCLK 1 2 SPI_AP_TO_TOUCH_SCLK_CONN 45
PP5V1_TOUCH_VDDH 2 1 PP5V1_TOUCH_VDDH_CONN
37 45
NOSTUFF 0%
0201
ROOM=DISPLAY_B2B 1 C3912 C3922 1
1/32W
MF
1 C3923
220PF 56PF 01005 56PF
5% 5% ROOM=DISPLAY_B2B 5%
2 10V 25V 2 25V
C0G-CERM FL3916 NP0-C0G-CERM 2 NP0-C0G-CERM
01005
01005 01005
150OHM-25%-200MA-0.7DCR ROOM=DISPLAY_B2B
ROOM=DISPLAY_B2B
LCM_TO_MANY_BSYNC 2 1 LCM_TO_MANY_BSYNC_CONN
ROOM=DISPLAY_B2B
FL3924
FL3901 23 20 13 45 150OHM-25%-200MA-0.7DCR
BACKLIGHT 33-OHM-25%-1500MA 01005
ROOM=DISPLAY_B2B 1 C3919 11 SPI_AP_TO_TOUCH_MOSI 2 1 SPI_AP_TO_TOUCH_MOSI_CONN 45
PP_LCM_BL_ANODE 1 2 PP_LCM_BL_ANODE_CONN 56PF 01005

37
0201 VOLTAGE=25.0V
4 45
5% ROOM=DISPLAY_B2B 1 C3925
ROOM=DISPLAY_B2B 1 C3903 2 25V
NP0-C0G-CERM 56PF
01005 5%
220PF 2 25V
B 2%
2 50V
ROOM=DISPLAY_B2B NP0-C0G-CERM
01005
ROOM=DISPLAY_B2B
B
C0G
0201
ROOM=DISPLAY_B2B
FL3919
FL3917 150OHM-25%-200MA-0.7DCR
150OHM-25%-200MA-0.7DCR SPI_TOUCH_TO_AP_MISO 2 1 SPI_TOUCH_TO_AP_MISO_CONN
FL3902 UART_TOUCH_TO_AOP_RXD 2 1 UART_TOUCH_TO_AOP_RXD_CONN
11
01005
45
33-OHM-25%-1500MA 13 45
01005
37 PP_LCM_BL_CAT1 1 2 PP_LCM_BL_CAT1_CONN 4 45 ROOM=DISPLAY_B2B 1 C3920 5%
56PF
0201 56PF 2 25V
ROOM=DISPLAY_B2B 1 C3904 5%
2 25V
NP0-C0G-CERM
01005
100PF NP0-C0G-CERM
01005 ROOM=DISPLAY_B2B
5%
2 35V
NP0-C0G FL3920
01005 FL3918 ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR
FL3903 ROOM=DISPLAY_B2B 150OHM-25%-200MA-0.7DCR 12 TOUCH_TO_AP_INT_L 2 1 TOUCH_TO_AP_INT_L_CONN 45
33-OHM-25%-1500MA UART_AOP_TO_TOUCH_TXD 2 1 UART_AOP_TO_TOUCH_TXD_CONN 01005
PP_LCM_BL_CAT2 1 2 PP_LCM_BL_CAT2_CONN
13
01005
45
37
0201
4 45
100PF
56PF 2 16V
NP0-C0G
100PF 2 25V
NP0-C0G-CERM
01005
ROOM=DISPLAY_B2B
5%
2 35V
NP0-C0G
01005
01005 ROOM=DISPLAY_B2B R3908
ROOM=DISPLAY_B2B
AP_TO_CUMULUS_CLK32K 2
33.2
11 1 AP_TO_CUMULUS_CLK_32K_CONN 45
1%
1/32W
MF
1 C3928
01005 100PF
ROOM=DISPLAY_B2B 5%
2 16V
NP0-C0G
AC Coupling Caps 01005
ROOM=DISPLAY_B2B
A SYNC_MASTER=sync
A
PP_VDD_MAIN
28 27 26 25 23 21 19 18 10 9 4
53 46 41 40 37 35 34 33 31 30 PAGE TITLE
1 C3930 1 C3931 1 C3935 1 C3936 1 C3937 1 C3938 1

C3939 B2B FILTERS: DISPLAY & TOUCH
220PF 220PF 220PF 220PF 220PF 220PF 220PF DRAWING NUMBER SIZE
5%
5%
2 10V
5%
2 10V
5%
2 10V
5%
2 10V
5%
2 10V
5%
10V
2 C0G-CERM
10V
2 C0G-CERM Apple Inc.
051-00542 D
C0G-CERM C0G-CERM C0G-CERM C0G-CERM C0G-CERM 01005 REVISION
01005 01005 01005 01005 01005 01005
ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B
R
5.0.0
AC return path for LCM MIPI which is referenced to GND and VDD_MAIN
For placement "along the way" as we route from SOC to B2B. I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
39 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
53 41 29 19 PP3V0_TRISTAR_ANT_PROX PP_ACC_VAR 19 27
PP5V0_USB
1 C4003 1 C4002 4 21 41
1.0UF 0.1UF 47 46 41 37 36 32 21 20 18 16 PP1V8_SDRAM 3

20% 20% 53 48
TRISTAR 2 2 6.3V
X5R
0201-1
ROOM=TRISTAR
2 6.3V
X5R-CERM
01005
ROOM=TRISTAR
1 C4004
0.01UF
10%
D
CRITICAL
2 6.3V Q4001 C
C z=0.45mm X5R
01005
1 G RV3CA01ZP
<rdar:/24285280> EVT: 343S00091 (P2:343S00078) ROOM=TRISTAR TRISTAR_REVERSE_GATE DFN
ROOM=TRISTAR
ACC_PWR D5
VDD_1V8 F3
VDD_3V0 F4
1
R4002 S
10K 2 Sm Footprint: 376S00135
5%
R4001 1/32W
MF
6.34K 2 2 01005
20 TRISTAR_TO_PMU_USB_BRICK_ID 1 ROOM=TRISTAR
1%
1 C4001 1/32W
MF
01005
U4001
10%
0.01UF ROOM=PMU CBTL1610A3BUK
C3 WLCSP
2 6.3V
X5R 31 90_MIKEYBUS_DATA_P DIG_DP P_IN F6 PP5V0_USB_RVP
C4
01005 90_MIKEYBUS_DATA_N DIG_DN ACC1 C5 PP_TRISTAR_ACC1
ROOM=PMU
31
ACC2 E5 PP_TRISTAR_ACC2
4 41
1 C4006
A1 4 41
1UF
53 90_USB_BB_DATA_P USB1_DP 20%
B1
53 90_USB_BB_DATA_N USB1_DN DP1 A2 90_TRISTAR_DP1_CONN_P 4 41 2 16V
CER-X5R
L4022 TRISTAR_USB_BRICK_ID_R C2
BRICK_ID
DN1 B2 90_TRISTAR_DP1_CONN_N 4 41
0201
15NH-250MA ROOM=TRISTAR
A3 DP2 A4 90_TRISTAR_DP2_CONN_P 4 41
7 90_USB_AP_DATA_P 1 2 90_USB_AP_DATA_L_P USB0_DP
B3 DN2 B4 90_TRISTAR_DP2_CONN_N 4 41
0201 90_USB_AP_DATA_L_N USB0_DN
ROOM=TRISTAR
CON_DET_L E3 TRISTAR_CON_DETECT_L
L4021 12 UART_AP_TO_ACCESSORY_TXD E2
UART0_TX
4 41
15NH-250MA 12 UART_ACCESSORY_TO_AP_RXD E1
UART0_RX POW_GATE_EN*
21
D6 TRISTAR_TO_TIGRIS_VBUS_OFF
7 90_USB_AP_DATA_N 1 2
12 UART_AP_DEBUG_TXD F2
UART1_TX SWITCH_EN E4
POW_GATE_EN* is 6V-tolerant
PMU_TO_AOP_TRISTAR_ACTIVE_READY 7 13 20 37
PP4001
P2MM-NSM
#25714843: Remove R4003 Weak PD
0201 SM
F1
ROOM=TRISTAR 12 UART_AP_DEBUG_RXD UART1_RX HOST_RESET B6 TRISTAR_TO_PMU_HOST_RESET 20 1
PP
D2 D3
UART2_TX SDA =I2C_TRISTAR_SDA 47
D1 D4
NC UART2_RX SCL =I2C_TRISTAR_SCL 47
B
53
B 27 26 25 23 21 19 18 10 9 4
46 41 39 37 35 34 33 31 30 28
PP_VDD_MAIN
7 SWD_DOCK_TO_AP_SWCLK A5
JTAG_CLK
INT C6 TRISTAR_TO_AOP_INT 13
BYPASS E6 TRISTAR_BYPASS
1 C4007 1 C4008 7 SWD_DOCK_BI_AP_SWDIO B5
JTAG_DIO
220PF 220PF
DVSS
DVSS
DVSS
5% 5%
2 10V
C0G-CERM 2 10V
C0G-CERM
1 C4005
01005 01005 1.0UF
20%
F5
C1
A6
ROOM=SOC ROOM=SOC
2 6.3V
X5R
0201-1
ROOM=TRISTAR
AC return path for USB pairs which is referenced to GND and VDD_MAIN
A
PAGE TITLE
TRISTAR 2
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

40 OF 53
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8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ANTENNA LOWER MIC1/4 FL4116
Please loop in Matt Mow (Antenna Team) 150OHM-25%-200MA-0.7DCR
when changing these components! ARC CONTROL 31 LOWERMIC1_TO_CODEC_AIN1_P 2 1 LOWERMIC1_TO_CODEC_AIN1_CONN_POS
01005
41
ROOM=DOCK_B2B 1 C4128
56PF
5%
FL4103 2 25V
NP0-C0G-CERM
150OHM-25%-200MA-0.7DCR 01005
2 1 PP3V0_LAT_CONN FL4104 ROOM=DOCK_B2B
41 49.9 I2C_HOMER_SCL_CONN FL4117
01005 47 36 I2C_HOMER_SCL 1 2 41
ROOM=DOCK_B2B 1 C4134 CKPLUS_WAIVE=I2C_PULLUP 150OHM-25%-200MA-0.7DCR
1%
220PF 1/32W 1 C4135 2 1 LOWERMIC1_TO_CODEC_AIN1_CONN_NEG
D 5%
2 10V
MF
01005
5%
56PF
31 LOWERMIC1_TO_CODEC_AIN1_N
01005
41
D
C0G-CERM
01005
ROOM=DOCK_B2B
2 25V
NP0-C0G-CERM
ROOM=DOCK_B2B 01005 56PF
5%
FL4112 ROOM=DOCK_B2B 2 25V
NP0-C0G-CERM
150OHM-25%-0.21A-0.69OHM 01005
FL4107 I2C_HOMER_SDA 1 2 I2C_HOMER_SDA_CONN FL4118 ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR 47 36
CKPLUS_WAIVE=I2C_PULLUP
41
150OHM-25%-200MA-0.7DCR
01005
53 40 29 19 PP3V0_TRISTAR_ANT_PROX 2 1 PP3V0_LAT1_CONN 41
1 C4136 32 PP_CODEC_TO_LOWERMIC1_BIAS 2 1 PP_CODEC_TO_LOWERMIC1_BIAS_CONN 41
01005 VOLTAGE=3.0V 56PF
ROOM=DOCK_B2B 1 C4119 5%
2 25V
01005
220PF NP0-C0G-CERM
01005 220PF
5% 5%
2 10V
C0G-CERM
01005 ARC1 ROOM=DOCK_B2B 2 10V
C0G-CERM
01005
FL4108 ROOM=DOCK_B2B ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR 41 35 ARC1_TO_SOLENOID1_OUT_POS FL4119
53 48 2 1
150OHM-25%-200MA-0.7DCR
32 21 20 18 16 PP1V8_SDRAM PP1V8_LAT_ARC_CONN 41
47 46 40 37 36
01005 31 LOWERMIC4_TO_CODEC_AIN2_P 2 1 LOWERMIC4_TO_CODEC_AIN2_CONN_POS 41
ROOM=DOCK_B2B 1 C4120 01005
5%
220PF ROOM=DOCK_B2B 1 C4131
41 35 ARC1_TO_SOLENOID1_OUT_NEG 56PF
2 10V
C0G-CERM 5%
01005 C4101 1 C4102 1 2 25V
NP0-C0G-CERM
ROOM=DOCK_B2B 220PF 220PF 01005
5% 5% ROOM=DOCK_B2B
10V 10V
R4109 C0G-CERM 2
01005
C0G-CERM 2
01005
FL4120
0.00 150OHM-25%-200MA-0.7DCR
53 BB_TO_LAT_ANT_SCLK 1 2 BB_TO_LAT_ANT_SCLK_CONN 41 ROOM=DOCK_B2B ROOM=DOCK_B2B
0% 31 LOWERMIC4_TO_CODEC_AIN2_N 2 1 LOWERMIC4_TO_CODEC_AIN2_CONN_NEG 41
1/32W 1 C4121 01005
MF 1 C4132
01005
ROOM=DOCK_B2B 5%
33PF
2 16V
Antenna GPIO ROOM=DOCK_B2B
5%
56PF
C
NP0-C0G-CERM
01005
ROOM=DOCK_B2B
FL4101
2 25V
NP0-C0G-CERM
01005
C
150OHM-25%-200MA-0.7DCR
R4110 2 1
FL4121 ROOM=DOCK_B2B
0.00 53 BB_TO_LAT_GPO1 BB_TO_LAT_GPO1_CONN 41 150OHM-25%-200MA-0.7DCR

53 BB_TO_LAT_ANT_DATA 1 2 BB_TO_LAT_ANT_DATA_CONN 41
01005 2 1
0%
1/32W 1 C4122 ROOM=DOCK_B2B 1 C4110 32 PP_CODEC_TO_LOWERMIC4_BIAS
01005
PP_CODEC_TO_LOWERMIC4_BIAS_CONN 41
56PF
MF
01005 33PF 5% ROOM=DOCK_B2B
1 C4133
ROOM=DOCK_B2B 5% 2 25V 220PF
2 16V
NP0-C0G-CERM
NP0-C0G-CERM
01005 5%
01005 2 10V
ROOM=DOCK_B2B
FL4102
ROOM=DOCK_B2B
SPEAKER1 C0G-CERM
01005
ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR FL4114
2 1
150OHM-25%-200MA-0.7DCR
53 BB_TO_LAT_GPO2 BB_TO_LAT_GPO2_CONN 41
01005 34 SPEAKER_TO_SPEAKERAMP1_VSENSE_P 2 1 SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS 41
ROOM=DOCK_B2B 1 C4111 01005
56PF 220PF
5% 5%
2 25V
NP0-C0G-CERM 2 10V
01005 C0G-CERM
01005
ROOM=DOCK_B2B
FL4115 ROOM=DOCK_B2B
150OHM-25%-200MA-0.7DCR
Per ANT Erdinc, change to cap
34 SPEAKER_TO_SPEAKERAMP1_VSENSE_N 2 1 SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG 41
01005
220PF
5%
VOLTAGE=16.0V 2 10V
C0G-CERM
01005
ROOM=DOCK_B2B
40 21 4 PP5V0_USB
B J4101 41 34 SPEAKERAMP1_TO_SPEAKER_OUT_POS B
C4109 1 C4105 1 C4106 1 C4107 1 C4108 1 245857 1 C4103
0.1UF 0.1UF 0.1UF 100PF 56PF F-ST-SM 220PF
10% 10% 10% 5% 5% 53 5%
25V 2 25V 2 25V 2 35V 2 25V 2 10V
X5R X5R X5R NP0-C0G NP0-C0G-CERM 2 C0G-CERM
0201 0201 0201 01005 01005 49 50 01005
ROOM=DOCK_B2B ROOM=DOCK_B2B ROOM=DOCK_B2B ROOM=DOCK_B2B ROOM=DOCK_B2B ROOM=DOCK_B2B
1 2 41 34 SPEAKERAMP1_TO_SPEAKER_OUT_NEG
41 34 SPEAKERAMP1_TO_SPEAKER_OUT_NEG #25429221:Carrier Dock flex to add +1 ACC2 pin
41 SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_NEG 3 4 1 C4104
46 BB_TO_LAT_GPO3_CONN 5 6 PP_TRISTAR_ACC2_CONN 41
220PF
5%
LOWERMIC4_TO_CODEC_AIN2_CONN_NEG 7 8 BB_TO_LAT_GPO2_CONN 2 10V
41
41
41
PP_CODEC_TO_LOWERMIC4_BIAS_CONN
PP_TRISTAR_ACC1_CONN
9
11
10
12
LOWERMIC4_TO_CODEC_AIN2_CONN_POS
LOWERMIC4_TO_CODEC_BIAS_FILT_RET
41
41
32
TRISTAR C0G-CERM
01005
ROOM=DOCK_B2B
#22499940:Change Net Name to POS/NEG 13 14 BB_TO_LAT_GPO1_CONN 41
40 4
40 4
90_TRISTAR_DP2_CONN_P
90_TRISTAR_DP2_CONN_N
15
17
16
18
BB_TO_LAT_ANT_SCLK_CONN
BB_TO_LAT_ANT_DATA_CONN
41
41
40 4 TRISTAR_CON_DETECT_L
R4102
2
1.00K 1
TRISTAR_CON_DETECT_CONN_L 41
USB AC Coupling
AC return path for USB pairs which is referenced to GND and VDD_MAIN
19 20 PP1V8_LAT_ARC_CONN 41
5%
90_TRISTAR_DP1_CONN_N 21 22 PP3V0_LAT1_CONN 1/32W 53
PP_VDD_MAIN
40 4
90_TRISTAR_DP1_CONN_P 23 24
41
MF
01005
1 C4116 27 26 25 23 21 19 18 10 9 4
46 40 39 37 35 34 33 31 30 28
40 4
27PF
25 26 ROOM=DOCK_B2B 5%
2 16V
1 C4143
MIKEYBUS_REFERENCE 27 28 NP0-C0G 220PF
31
LOWERMIC1_TO_CODEC_AIN1_CONN_POS 29 30 LOWERMIC1_TO_CODEC_AIN1_CONN_NEG
FL4105 01005 5%
2 10V
41 41 10-OHM-1.1A ROOM=DOCK_B2B C0G-CERM
32 LOWERMIC1_TO_CODEC_BIAS_FILT_RET 31 32 PP_CODEC_TO_LOWERMIC1_BIAS_CONN 41
01005
40 4 PP_TRISTAR_ACC1 1 2 PP_TRISTAR_ACC1_CONN 41
33 34 TRISTAR_CON_DETECT_CONN_L 41
ROOM=SOC
01005 VOLTAGE=4.3V
47 I2C_MIC1_SDA_CONN 35 36 ROOM=DOCK_B2B 1 C4117
47 I2C_MIC1_SCL_CONN 37 38 100PF
5%
A 39
41
40
42
ARC1_TO_SOLENOID1_OUT_NEG
ARC1_TO_SOLENOID1_OUT_POS
35 41
FL4106
2 16V
NP0-C0G
01005 SYNC_MASTER=d10tod101
A
ARC1_TO_SOLENOID1_OUT_POS
41 35 35 41
PAGE TITLE
SOLENOID1_TO_ARC1_VSENSE_POS 43 44 SOLENOID1_TO_ARC1_VSENSE_NEG 22-OHM-25%-1800MA ROOM=DOCK_B2B
35
41 PP3V0_LAT_CONN 45 46 I2C_HOMER_SDA_CONN
35
41 40 4 PP_TRISTAR_ACC2 1 2 PP_TRISTAR_ACC2_CONN 41
B2B:DOCK FLEX
DRAWING NUMBER SIZE
SPEAKER_TO_SPEAKERAMP1_VSENSE_CONN_POS 47 48 I2C_HOMER_SCL_CONN 0201 VOLTAGE=4.3V
41 41
ROOM=DOCK_B2B 1 C4118 Apple Inc.
051-00542 D
#25098110: Decrease DCR 100PF REVISION
5%
41 34 SPEAKERAMP1_TO_SPEAKER_OUT_POS 51 52 2 16V
NP0-C0G
R
5.0.0
01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
54 ROOM=DOCK_B2B
DOCK FLEX CONNECTOR I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

SHEET
41 OF 53
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
C C
B B
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

42 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
C C
B B
A
PAGE TITLE
spare
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

43 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
STROBE1 STROBE2 BUTTONS

R4402
100
PP_STROBE_DRIVER1_WARM_LED 26 45 PP_STROBE_DRIVER2_WARM_LED 26 45 20 BUTTON_POWER_KEY_L 1 2 BUTTON_POWER_KEY_CONN_L 45
5% 1
C4402 1 1 C4409 C4410 1 1 C4413 C4401 1 1/32W
MF
220PF 27PF 220PF 27PF 27PF 01005 0201
5% 5% 5% 5% 5% ROOM=RIGHT_BUTTON
10V 2 2 16V 10V 2 2 16V 6.3V 2 5.5V-6.2PF
C0G-CERM NP0-C0G C0G-CERM NP0-C0G NP0-C0G DZ4401 D
D 01005
ROOM=RIGHT_BUTTON
01005
ROOM=RIGHT_BUTTON
01005
ROOM=RIGHT_BUTTON
01005
ROOM=RIGHT_BUTTON
ROOM=RIGHT_BUTTON
0201
2 ROOM=RIGHT_BUTTON
CHASSIS_GND_BS401 4 44
PP_STROBE_DRIVER1_COOL_LED 26 45 PP_STROBE_DRIVER2_COOL_LED 26 45
FL4407
C4406 1 1 C4408 C4411 1 1 C4412 120-OHM-0.220A
220PF 27PF 220PF 27PF 20 BUTTON_RINGER_A 1 2 BUTTON_RINGER_A_CONN 45
5% 5% 5% 5%
10V 2 16V 10V 2 16V 01005
C0G-CERM 2 NP0-C0G C0G-CERM 2 NP0-C0G C4418 1 ROOM=LEFT_BUTTON 1
01005 01005 01005 01005
ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON 27PF
5% 0201
6.3V
NP0-C0G 2 5.5V-6.2PF
ROOM=LEFT_BUTTON
0201 DZ4402
ROOM=LEFT_BUTTON
2
FL4404
150OHM-25%-200MA-0.7DCR CHASSIS_GND_BS401 4 44
26 STROBE_MODULE_NTC 1 2 STROBE_MODULE_NTC_CONN 45
01005
R4401 1 ROOM=RIGHT_BUTTON 1 C4407
27K 220PF
0.5%
1/32W 5% R4405
MF 2 10V
C0G-CERM 100
01005 2 01005 20 BUTTON_VOL_DOWN_L 1 2 BUTTON_VOL_DOWN_CONN_L 45
ROOM=RIGHT_BUTTON
5%
#24544474: Can R4401 be changed to 5%?
ROOM=RIGHT_BUTTON
C4419 1 1/32W
MF
1 DZ4403
100PF 01005 12V-33PF
01005-1
5% ROOM=LEFT_BUTTON ROOM=LEFT_BUTTON
16V
NP0-C0G 2 2
01005
ROOM=LEFT_BUTTON CHASSIS_GND_BS401 4 44
C HAWKING R4406 C
100
#24678255:DOE with 10% and/20% cap 20 12 BUTTON_VOL_UP_L 1 2 BUTTON_VOL_UP_CONN_L 45
5%
C4417 C4420 1 1/32W
MF
1 DZ4404
0.22UF 100PF 01005 12V-33PF
01005-1
5% ROOM=LEFT_BUTTON
31 HAWKING_TO_CODEC_AIN7_N 1 2 HAWKING_TO_CODEC_AIN7_N_CONN 45
16V 2 2 ROOM=LEFT_BUTTON
NP0-C0G
01005
20%
6.3V ROOM=LEFT_BUTTON CHASSIS_GND_BS401 4 44
X5R
01005
ROOM=RIGHT_BUTTON
C4421 FL4405
0.22UF 150OHM-25%-200MA-0.7DCR
31 HAWKING_TO_CODEC_AIN7_P 1 2 HAWKING_TO_CODEC_AIN7_C_P 1 2 HAWKING_TO_CODEC_AIN7_P_CONN 45
01005
20%
6.3V
CKPLUS_WAIVE=MISS_N_DIFFPAIR
ROOM=RIGHT_BUTTON NOSTUFF
X5R
01005
1 C4415 1 C4422
56PF 180PF
ROOM=RIGHT_BUTTON 5% 10%
2 25V
NP0-C0G-CERM 2 10V
CERM
01005 01005
ROOM=RIGHT_BUTTON ROOM=RIGHT_BUTTON
FL4406
150OHM-25%-200MA-0.7DCR
19 PP1V8_HAWKING 1 2 PP1V8_HAWKING_CONN 45
B 01005
ROOM=RIGHT_BUTTON 1 C4416 1 C4414 B
2.2UF 220PF
20% 5%
2 6.3V
X5R-CERM 2 10V
C0G-CERM
0201-1 01005
MIC2 (ANC REF)
FL4403
150OHM-25%-200MA-0.7DCR
32 PP_CODEC_TO_REARMIC2_BIAS 2 1 PP_CODEC_TO_REARMIC2_BIAS_CONN 45
01005
ROOM=RIGHT_BUTTON 1 C4403
220PF
5%
2 10V
C0G-CERM
01005
ROOM=RIGHT_BUTTON
FL4401
150OHM-25%-200MA-0.7DCR
31 REARMIC2_TO_CODEC_AIN3_P 2 1 REARMIC2_TO_CODEC_AIN3_CONN_P 45
01005
ROOM=RIGHT_BUTTON 1 C4404
56PF
5%
2 25V
NP0-C0G-CERM
01005
A ROOM=RIGHT_BUTTON
A
FL4402 PAGE TITLE
150OHM-25%-200MA-0.7DCR B2B FILTERS: RIGHT BUTTON FLEX
31 REARMIC2_TO_CODEC_AIN3_N 2 1 REARMIC2_TO_CODEC_AIN3_CONN_N 45 DRAWING NUMBER SIZE
01005
Apple Inc.
051-00542 D
ROOM=RIGHT_BUTTON 1 C4405 REVISION
56PF R
5.0.0
5%
2 25V
NP0-C0G-CERM NOTICE OF PROPRIETARY PROPERTY: BRANCH
01005 THE INFORMATION CONTAINED HEREIN IS THE
ROOM=RIGHT_BUTTON PROPRIETARY PROPERTY OF APPLE INC.
44 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DISPLAY / TOUCH FLEX CONNECTOR

UTAH-D FLEX
516S00152 RCPT (USED ON MLB)
CONNECTOR
<-- THIS ONE
MLB: 516S00050 J4502
BB35C-RA48-3A
516S00151 PLUG F-ST-SM
J4501 53
AA26D-S022VA1 49 50
F-ST-SM ROOM=RCAM_B2B
24 23
1 2
D 25 PP3V0_UT_SVDD_CONN 2 1 90_LPDP_UT_TO_AP_D2_CONN_N 25
R4501
38
47
MAMBA_TO_LCM_MDRIVE
I2C_DISP_EEPROM_SDA_CONN CKPLUS_WAIVE=I2C_PULLUP 3 4
I2C_DISP_EEPROM_SCL_CONN
=I2C_TOUCH_SDA
47
47
D
4 3 90_LPDP_UT_TO_AP_D2_CONN_P 49.9 5 6
25 LPDP_UT_BI_AP_AUX_CONN 25 47 =I2C_TOUCH_SCL 1 2 I2C_TOUCH_SCL_CONN SPI_AP_TO_TOUCH_MOSI_CONN 39
25 AP_TO_UT_SHUTDOWN_CONN_L 6 5 1% 39 SPI_TOUCH_TO_AP_MISO_CONN 7 8 TOUCH_TO_AP_INT_L_CONN 39

1/32W
30 25 UT_AND_NV_TO_LED_DRIVER_STROBE_EN_CONN 8 7 90_LPDP_UT_TO_AP_D3_CONN_N 25 MF 39 SPI_AP_TO_TOUCH_CS_CONN_L 9 10 AP_TO_TOUCH_MAMBA_RESET_CONN_L 38 39
01005
30 UT_TO_NV_SYNC_J2501_CONN 10 9 90_LPDP_UT_TO_AP_D3_CONN_P 25 ROOM=DISPLAY_B2B 39 AP_TO_CUMULUS_CLK_32K_CONN 11 12 Per #25048465:No Satin flex support in CRB
25 PP1V8_UT_CONN 12 11 39 SPI_AP_TO_TOUCH_SCLK_CONN 13 14 UART_AOP_TO_TOUCH_TXD_CONN 39
48 I2C_UT_SDA_CONN 14 13 AP_TO_UT_CLK_CONN 25 39 UART_TOUCH_TO_AOP_RXD_CONN 15 16 PMU_TO_LCM_PANICB_CONN 39
48 I2C_UT_SCL_CONN 16 15 39 AP_TO_LCM_RESET_CONN_L 17 18 PP1V8_LCM_CONN 39

18 17 PP2V9_UT_AVDD_CONN 25 46 39 PP5V1_TOUCH_VDDH_CONN 19 20 PP5V7_LCM_AVDDH_CONN 39
25 PP2V8_UT_AF_VAR_CONN 20 19 39 PP1V8_TOUCH_CONN 21 22 LCM_TO_CHESTNUT_PWR_EN_CONN 39

22 21 39 PN5V7_LCM_MESON_AVDDN_CONN 23 24 LCM_TO_MANY_BSYNC_CONN 39
39 PP5V7_MESON_AVDDH_CONN 25 26
25 PP1V2_UT_VDD_CONN 26 25 38 LCM_TO_MAMBA_MSYNC_CONN 27 28 90_MIPI_AP_TO_LCM_DATA0_CONN_P 39
TP_LCM_PIFA 29 30 90_MIPI_AP_TO_LCM_DATA0_CONN_N
1 C4507 31 32
39
56PF PP4501
P2MM-NSM
39 90_MIPI_AP_TO_LCM_CLK_CONN_P
33 34
5%
SM 39 90_MIPI_AP_TO_LCM_CLK_CONN_N 90_MIPI_AP_TO_LCM_DATA1_CONN_P 39
2 25V 1 35 36
NP0-C0G-CERM
01005 PP 90_MIPI_AP_TO_LCM_DATA1_CONN_N 39
ROOM=DISPLAY_B2B 39 4 PP_LCM_BL_CAT1_CONN 37 38
39 4 PP_LCM_BL_ANODE_CONN 39 40 90_MIPI_AP_TO_LCM_DATA2_CONN_P 46
39 4 PP_LCM_BL_CAT2_CONN 41 42 90_MIPI_AP_TO_LCM_DATA2_CONN_N 46
46 4 PP_LCM_BL34_CAT1_CONN 43 44
46 4 PP_LCM_BL34_ANODE_CONN 45 46 90_MIPI_AP_TO_LCM_DATA3_CONN_P 46
46 4 PP_LCM_BL34_CAT2_CONN 47 48 90_MIPI_AP_TO_LCM_DATA3_CONN_N 46
FOREHEAD FLEX CONNECTOR 51 52

MLB: 516S00146 (MCO REV 27)
C 54 C
ROOM=FOREHEAD
CRITICAL
J4503
245858036201829
41
F-ST-SM COMBO BUTTON FLEX CONNECTOR
37 38
APPLE APN: 516S00150 <-- THIS ONE ON MLB (matched MCO rev 27)
APPLE APN: 516S00149
29 PP2V9_NH_AVDD_CONN 1 2 90_MIPI_NH_TO_AP_DATA0_P 9
29 PP1V8_NH_IO_CONN 3 4 90_MIPI_NH_TO_AP_DATA0_N 9
5 6 ROOM=RIGHT_BUTTON
29 AP_TO_NH_SHUTDOWN_CONN_L 7 8 90_MIPI_NH_TO_AP_CLK_P 9 J4504
9 10 90_MIPI_NH_TO_AP_CLK_N 9 AA37D-S014SVA1
F-ST-SM
29 AP_TO_NH_CLK_CONN 11 12
STROBE_LED_RETURN 20 19
MAKE_BASE=TRUE
13 14 90_MIPI_NH_TO_AP_DATA1_P 9
16 15
48 I2C_NH_SCL_CONN 15 16 90_MIPI_NH_TO_AP_DATA1_N 9 44 26 PP_STROBE_DRIVER2_COOL_LED
47 I2C_ALS_CONVOY_SCL_CONN 17 18
2 1
29 PDM_CONVOY_TO_ADARE_DATA_CONN 19 20 PP1V2_NH_DVDD_CONN 29 44 STROBE_MODULE_NTC_CONN PP_CODEC_TO_REARMIC2_BIAS_CONN 44
4 3
PP3V0_PROX_CONN 21 22 I2C_NH_SDA_CONN 44 PP1V8_HAWKING_CONN REARMIC2_TO_CODEC_AIN3_CONN_N
29
29 SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_N 23 24 ALS_TO_AP_INT_CONN_L
48
29
XW4501
SHORT-20L-0.05MM-SM 44 HAWKING_TO_CODEC_AIN7_P_CONN
6 5
REARMIC2_TO_CODEC_AIN3_CONN_P
44
44
8 7
46 33 29 SPEAKERAMP2_TO_SPEAKER_OUT_NEG 25 26 I2C_ALS_CONVOY_SDA_CONN 47 44 HAWKING_TO_CODEC_AIN7_N_CONN 1 2 REARMIC2_TO_CODEC_BIAS_FILT_RET 32
10 9
48 I2C_PROX_SDA_CONN 27 28 PDM_ADARE_TO_CONVOY_CLK_CONN 29 44 BUTTON_RINGER_A_CONN I2C_MIC2_SDA_CONN 47
12 11
48 I2C_PROX_SCL_CONN 29 30 PP3V0_ALS_CONVOY_CONN 29 44 BUTTON_VOL_UP_CONN_L I2C_MIC2_SCL_CONN 47
14 13
29 PROX_BI_AP_AOP_INT_PWM_L_CONN 31 32 SPEAKER_TO_SPEAKERAMP2_VSENSE_CONN_P 29 44 BUTTON_VOL_DOWN_CONN_L BUTTON_POWER_KEY_CONN_L 44
SPEAKERAMP2_TO_SPEAKER_OUT_POS
B 29
29
PP_CODEC_TO_FRONTMIC3_BIAS_CONN
FRONTMIC3_TO_CODEC_AIN4_CONN_P
33
35
34
36 FRONTMIC3_TO_CODEC_AIN4_CONN_N
29 33 46
29 44 26 PP_STROBE_DRIVER2_WARM_LED 18 17
PP_STROBE_DRIVER1_COOL_LED 26 44
B
22 21
44 26 PP_STROBE_DRIVER1_WARM_LED
39 40
42
CRITICAL
PAGE TITLE
B2B FF SPECIFIC
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

45 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
THIS PAGE UNIQUE TO LARGE FORM FACTOR
2ND BACKLIGHT DRIVER - 4LED
PP_LCM_BL34_ANODE 46
1 C4604 1 C4609 1 C4610 1 C4611 1 C4612 1 C4602 L4602

220PF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 65OHM-0.7-2GHZ-3.4OHM
TAM0605
CRITICAL
2% 20% 20% 20% 20% 20% ROOM=DISPLAY_B2B
2 50V 2 35V 2 35V 2 35V 35V 2 35V
SYM_VER-1
C0G X5R X5R X5R 2 X5R X5R

0201 0402 0402 0402 0402 0402 9 NC_MIPI_AP_TO_LCM_DATA2_P 90_MIPI_AP_TO_LCM_DATA2_P 4 1 90_MIPI_AP_TO_LCM_DATA2_CONN_P 45
53 46
27 26 25 23 21 19 18 10 9 4
41 40 39 37 35 34 33 31 30 28
PP_VDD_MAIN ROOM=BACKLIGHT34 ROOM=BACKLIGHT34 ROOM=BACKLIGHT34 ROOM=BACKLIGHT34 ROOM=BACKLIGHT34 ROOM=BACKLIGHT34 MAKE_BASE=TRUE
3 2
C4601 1 9 NC_MIPI_AP_TO_LCM_DATA2_N 90_MIPI_AP_TO_LCM_DATA2_N
MAKE_BASE=TRUE
L4603
90_MIPI_AP_TO_LCM_DATA2_CONN_N 45
10UF
D 20%
6.3V K K
TAM0605
CRITICAL
ROOM=DISPLAY_B2B
D
CERM-X5R 2
0402-9
ROOM=BACKLIGHT34 U4601 D4602 D4601
DSN2 9 NC_MIPI_AP_TO_LCM_DATA3_P 90_MIPI_AP_TO_LCM_DATA3_P 4
SYM_VER-1
1 90_MIPI_AP_TO_LCM_DATA3_CONN_P 45
LM3539A1 NSR0530P2T5G
SOD-923-1 NSR05F30NXT5G MAKE_BASE=TRUE
DSBGA A ROOM=BACKLIGHT34
D4 IN OUT A1 A ROOM=BACKLIGHT34
CRITICAL CRITICAL CRITICAL 9 NC_MIPI_AP_TO_LCM_DATA3_N 90_MIPI_AP_TO_LCM_DATA3_N 3 2 90_MIPI_AP_TO_LCM_DATA3_CONN_N 45
40 37 36 32 21 20 18 16
53 48 47 41
PP1V8_SDRAM D3 VIO/HWEN SW1 C4 BL34_SW1_LX 28
MAKE_BASE=TRUE
37 11 DWI_PMGR_TO_BACKLIGHT_DATA C2 SDI SW2_1 A3 BL34_SW2_LX 28
37 11 DWI_PMGR_TO_BACKLIGHT_CLK C3 SCK SW2_2 A4

FL4601
47 =I2C_BACKLIGHT2_SDA B2 SDA LED1 C1 PP_LCM_BL34_CAT1 46 33-OHM-25%-1500MA
47 =I2C_BACKLIGHT2_SCL A2 SCL LED2 B1 PP_LCM_BL34_CAT2 46
46 PP_LCM_BL34_ANODE 1 2 PP_LCM_BL34_ANODE_CONN 4 45
ROOM=BACKLIGHT34 0201
37 9 AP_TO_MUON_BL_STROBE_EN D1 TRIG ROOM=DISPLAY_B2B 1 C4605
BB_TO_STROBE_DRIVER_GSM_BURST_IND 220PF
53 37 26 D2 INHIBIT 2%
GND
GND
2 50V
C0G
0201
ROOM=DISPLAY_B2B
B3
B4
FL4602
33-OHM-25%-1500MA
46 PP_LCM_BL34_CAT1 1 2 PP_LCM_BL34_CAT1_CONN 4 45
0201
100PF
5%
2 35V
NP0-C0G
01005
ISP I2C1 ROOM=DISPLAY_B2B
FL4603
C 25 18 17 16 13 12 11 9 8 7 5
52 48 47 39 30 29
PP1V8 33-OHM-25%-1500MA C
1 1 PP_LCM_BL34_CAT2 1 2 PP_LCM_BL34_CAT2_CONN
R4603 R4604 46
0201
4 45
1.00K 1.00K ROOM=DISPLAY_B2B 1 C4607

5% 5%
1/32W 1/32W 100PF
MF MF 5%
2 01005
ROOM=SOC 2 01005
ROOM=SOC 2 35V
NP0-C0G
01005
ROOM=DISPLAY_B2B
30 9 I2C_ISP_NV_SCL MAKE_BASE=TRUE =I2C_STROBE2_SCL 26
30 9 I2C_ISP_NV_SDA MAKE_BASE=TRUE =I2C_STROBE2_SDA 26
Dock B2B (Pg 41)
FL4604
150OHM-25%-200MA-0.7DCR
53 BB_TO_LAT_GPO3 2 1 BB_TO_LAT_GPO3_CONN 41
01005
56PF
AC Coupling Caps 5%
2 25V
NP0-C0G-CERM
01005
ROOM=DOCK_B2B
53 46 41
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN
40 39 37 35 34 33 31 30 28
1 C4618 1 C4603 1 C4613 1 C4615 UT B2B

220PF 220PF 220PF 220PF
5% 5% 5% 5%
2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM 2 10V
C0G-CERM
01005 01005 01005 01005
ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B
PP2V9_UT_AVDD_CONN 25 45
B 1 C2507 B
4UF
20%
2 6.3V
CER-X5R
AC return path for LCM MIPI which is referenced to GND and VDD_MAIN 0201
ROOM=RCAM_B2B
Top Speaker Compass Coil

Extra RF GND
ACC Buck Caps
45 33 29
SPEAKERAMP2_TO_SPEAKER_OUT_POS
PP_ACC_BUCK_VAR 27
SPEAKERAMP2_TO_SPEAKER_OUT_NEG 29 33 45 TP4602
1
A rf GROUND
TP-P55
1 C2707
2.2UF
1
20%
2 6.3V
X5R-CERM
R3332 1
R3333
0201-1 1.1K 1.1K
ROOM=TRISTAR 1% 1%
1/32W 1/32W
MF MF
2 01005 2 01005
ROOM=SPKAMP2 ROOM=SPKAMP2
NEG_COMPASS_COIL_COMP POS_COMPASS_COIL_COMP
A XW3333
SHORT-20L-0.05MM-SM A
NO_XNET_CONNECTION
ROOM=MAMBA_MESA PAGE TITLE
2 OMIT
LARGE FORM FACTOR SPECIFIC
DRAWING NUMBER SIZE
1 C3332 1 C3333 Apple Inc.

051-00542 D
REVISION
220PF 220PF
5%
2 10V
5%
2 10V
R
5.0.0
C0G-CERM C0G-CERM NOTICE OF PROPRIETARY PROPERTY: BRANCH
01005 01005
ROOM=SPKAMP2 ROOM=SPKAMP2 THE INFORMATION CONTAINED HEREIN IS THE
46 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
AP TOUCH
PP1V8 39 38 18
PP1V8_TOUCH
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 30 29
NOSTUFF NOSTUFF NOTE:MAMBA I2C 2.2K PULL-UPS TO PP1V8_TOUCH INSIDE GALILEO
I2C0 R4701
4.02K
1%
1
R4702
4.02K
1%
1 1
R4711
10K
1
R4712
10K
ADDING R3803, R3804 AS OPTION FOR TWEAKING VALUE
1/32W 1/32W 5% 5%
MF MF 1/32W 1/32W
MF MF
D
01005 2
ROOM=SOC
01005 2
ROOM=SOC 2 01005
ROOM=MAMBA_MESA
2 01005
ROOM=MAMBA_MESA D
I2C_TOUCH_TO_MAMBA_SCL MAKE_BASE=TRUE =I2C_MAMBA_SCL 38 TO MAMBA / MESA FLEX
11 I2C0_AP_SCL MAKE_BASE=TRUE =I2C_BACKLIGHT1_SCL 37 I2C_TOUCH_BI_MAMBA_SDA MAKE_BASE=TRUE =I2C_MAMBA_SDA 38
11 I2C0_AP_SDA MAKE_BASE=TRUE =I2C_BACKLIGHT1_SDA 37
NOSTUFF NOSTUFF
C4709 1 1 C4710
NOSTUFF NOSTUFF =I2C_BOOST_SCL 23
56PF 56PF
5% 5%
#24544434 C4701 1 1 C4702 =I2C_BOOST_SDA 23
NP0-C0G-CERM
225V 2 25V
NP0-C0G-CERM
56PF 56PF 01005 01005
5% 5% =I2C_TRISTAR_SCL 40
ROOM=MAMBA_MESA ROOM=MAMBA_MESA
2 25V 2 25V
NP0-C0G-CERM NP0-C0G-CERM =I2C_TRISTAR_SDA 40
01005 01005
ROOM=SOC ROOM=SOC
=I2C_TOUCH_SCL 45
TO DISPLAY / TOUCH FLEX
=I2C_TOUCH_SDA 45
=I2C_CHESTNUT_SCL 20 37
=I2C_CHESTNUT_SDA 37
C4711 1 1 C4712
I2C1 5%
56PF
2 25V
5%
56PF
2 25V
25 18 17 16 13 12 11 9 8 7 5 PP1V8 NP0-C0G-CERM NP0-C0G-CERM
52 48 47 46 39 30 29 01005 01005
ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B
R4703 1 R4704 1
4.02K 4.02K
1% 1%
1/32W 1/32W
MF MF
11 I2C1_AP_SCL
11 I2C1_AP_SDA
01005 2
ROOM=SOC
01005
ROOM=SOC 2
MAKE_BASE=TRUE
MAKE_BASE=TRUE
=I2C_BACKLIGHT2_SCL
=I2C_BACKLIGHT2_SDA
46
46
D11/111 ONLY
HOMER I2C5
NOSTUFF NOSTUFF 25 18 17 16 13 12 11 9 8 7 5 PP1V8
46 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM 52 48 47 46 39 30 29
C #24544426 C4703 1 1 C4704 =I2C_PMU_SCL 20

53 48
C
56PF 56PF 1 1 1 1
5%
25V 2 2
5%
25V
=I2C_PMU_SDA 20 R4713 R4714 R4715
2.2K
R4716
2.2K
NP0-C0G-CERM NP0-C0G-CERM 1.00K 1.00K 5% 5%
01005 01005 5% 5% 1/32W 1/32W
ROOM=PMU ROOM=PMU 1/32W 1/32W MF MF
MF MF 01005 010052
2 01005 2 01005 ROOM=SOC 2 ROOM=SOC
ROOM=HOMER ROOM=HOMER
I2C_HOMER_SCL I2C5_SCL
I2C2 I2C_HOMER_SDA
36 41
36 41 I2C5_SDA
11
11
=I2C_TIGRIS_SCL 21
25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 30 29
PP1V8 =I2C_TIGRIS_SDA 21
1 1
R4705 R4706
2.2K
5%
1/32W
2.2K
5%
1/32W
I2C3
MF MF 25 18 17 16 13 12 11 9 8 7 5 PP1V8
01005 01005 52 48 47 46 39 30 29
ROOM=SOC 2 ROOM=SOC 2
1 1
11 I2C2_AP_SCL MAKE_BASE=TRUE =I2C_SPKAMP2_SCL 33
R4709
2.2K
R4710
2.2K
11 I2C2_AP_SDA MAKE_BASE=TRUE =I2C_SPKAMP2_SDA 33
5% 5%
1/32W 1/32W
ROOM=FOREHEAD MF MF ROOM=DOCK
01005 01005
R4707 ROOM=SOC 2 ROOM=SOC 2 FL4730
0.00 150OHM-25%-200MA-0.7DCR ckplus_waive=i2c_pullup
1 2 I2C_ALS_CONVOY_SCL_CONN 45
0% MF 11 I2C3_AP_SCL 2 1 I2C_MIC1_SCL_CONN 41
1/32W 01005 01005
R4708 FL4729 TO DOCK FLEX
1
0.00 2 150OHM-25%-200MA-0.7DCR
I2C_ALS_CONVOY_SDA_CONN CKPLUS_WAIVE=i2c_pullup
B 0%
1/32W
MF
01005
45
I2C3_AP_SDA 2 1 I2C_MIC1_SDA_CONN
B
ROOM=FOREHEAD
C4707 1 1 C4708 TO FOREHEAD FLEX 11 41
01005
ROOM=DOCK
56PF
5% 5%
56PF C4730 1 1 C4729
25V 2 2 25V 56PF 56PF
NP0-C0G-CERM NP0-C0G-CERM 5% 5%
01005 01005 25V 2 25V
ROOM=FOREHEAD ROOM=FOREHEAD NP0-C0G-CERM 2 NP0-C0G-CERM
01005 01005
ROOM=DOCK_B2B ROOM=DOCK_B2B
ROOM=RIGHT_BUTTON
FL4732
150OHM-25%-200MA-0.7DCR
2 1 I2C_MIC2_SCL_CONN 45
01005
FL4731 TO COMBINED BUTTON FLEX
150OHM-25%-200MA-0.7DCR
2 1 I2C_MIC2_SDA_CONN 45
01005
ROOM=RIGHT_BUTTON
C4732 1 1 C4731
56PF 56PF
5% 5%
25V 2 2 25V
NP0-C0G-CERM NP0-C0G-CERM
01005 01005
FL4742
150OHM-25%-200MA-0.7DCR
A 2 1 I2C_DISP_EEPROM_SCL_CONN 45
A
01005 PAGE TITLE
ROOM=DISPLAY_B2B
FL4741 TO DISPLAY FLEX I2C MAP: AP, TOUCH, HOMER, I2C5

150OHM-25%-200MA-0.7DCR DRAWING NUMBER SIZE
2 1 I2C_DISP_EEPROM_SDA_CONN 45
Apple Inc.
051-00542 D
01005 REVISION
ROOM=DISPLAY_B2B
1 C4742 1 C4741
R
5.0.0
56PF 56PF
5% 5% THE INFORMATION CONTAINED HEREIN IS THE
2 25V 2 25V PROPRIETARY PROPERTY OF APPLE INC.
NP0-C0G-CERM NP0-C0G-CERM THE POSESSOR AGREES TO THE FOLLOWING: PAGE
01005 01005
ROOM=DISPLAY_B2B ROOM=DISPLAY_B2B I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
47 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PP1V8_SDRAM
AOP
I2C 46 41 40 37 36 32 21 20 18 16
53 48 47
PP1V8_SDRAM
46 41 40 37 36 32 21 20 18 16
53 48 47
1 C4807
0.1UF
ISP
20%
I2C0
VCC B1
1 1 2 6.3V
R4801
2.2K
R4802
2.2K
X5R-CERM
01005
5% 5% ROOM=SOC PP1V8 #24550735: ISP I2C0 PU
1/32W
MF
1/32W
MF
#24544699: Support 1MHz 25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 30 29
2
01005
2
01005 U4802 1 1
MAX20312
WLP
R4808 R4809
D 13 I2C_AOP_SCL MAKE_BASE=TRUE A2 IOVCC1 ROOM=SOC
5%
1.00K
5%
1.00K D
1/32W 1/32W
13 I2C_AOP_SDA MAKE_BASE=TRUE B2 IOVCC2 MF MF
2 01005 2 01005
ROOM=SOC ROOM=SOC
A1 GND
9
I2C_ISP_UT_SCL MAKE_BASE=TRUE =I2C_STROBE1_SCL 26
9 I2C_ISP_UT_SDA MAKE_BASE=TRUE =I2C_STROBE1_SDA 26
R4816
=I2C_SPKAMP1_SCL
I2C1 1
0.00
2 I2C_UT_SCL_CONN 45
=I2C_SPKAMP1_SDA
34
34
See page 46 0%
1/32W 1 C4817
MF
01005 56PF
ROOM=RCAM_B2B 5%
2 25V
=I2C_ARC1_SCL 35 NP0-C0G-CERM
01005
=I2C_ARC1_SDA 35
R4817 ROOM=RCAM_B2B
ROOM=FOREHEAD
FL4815 TO FCAM FLEX
I2C2 1
0.00
0%
2
1
I2C_UT_SDA_CONN
45
150OHM-25%-200MA-0.7DCR 25 18 17 16 13 12 11 9 8 7 5
52 48 47 46 39 30 29
PP1V8 1/32W
MF
C4816
56PF
01005 5%
2 1 I2C_PROX_SCL_CONN 45 ROOM=RCAM_B2B 25V
01005 CKPLUS_WAIVE=I2C_PULLUP 2 NP0-C0G-CERM
1 1 01005
R4810
2.2K
R4811
2.2K
ROOM=RCAM_B2B
5% 5%
#24958320:Intentional R4815 Change R4815 1/32W
MF
1/32W
MF
Reduce undershoot when Prox Driving 33.2 01005 01005 R4812
2 1 I2C_PROX_SDA_CONN 45
2 ROOM=SOC 2 ROOM=SOC
1%
CKPLUS_WAIVE=I2C_PULLUP 0.00
1/32W 9 I2C_ISP_NH_SCL MAKE_BASE=TRUE 1 2 I2C_NH_SCL_CONN 45
1 1
MF
01005 C4803
56PF
C4804
56PF
9 I2C_ISP_NH_SDA MAKE_BASE=TRUE 0%
1/32W 1 C4812
ROOM=FOREHEAD 5% 5% MF
56PF
C Intentional R4815 Change
25V
2 NP0-C0G-CERM
01005
25V
2 NP0-C0G-CERM
01005
01005
ROOM=FOREHEAD 5%
2 25V
C
ROOM=FOREHEAD ROOM=FOREHEAD NP0-C0G-CERM
01005
ROOM=FOREHEAD
38 19 PP1V8_MESA R4813
PP1V8_SDRAM 0.00
16 18 20 21 32 36 37 40 41 46 1 2 I2C_NH_SDA_CONN 45
1 1
47 48 53
R4803 R4804 0%
1/32W
1
C4813 CKPLUS_WAIVE=I2C_PULLUP
5 4.7K 4.7K MF 56PF
VCC
1% 1% 01005 5%
1/32W 1/32W ROOM=FOREHEAD 25V
MF MF
6S U4805 3 2 01005 2 01005
2 NP0-C0G-CERM
74LVC1G3157GX Y0 NC ROOM=MAMBA_MESA ROOM=MAMBA_MESA R4806 01005
ROOM=FOREHEAD
4Z
X2SON6 0.00
Y1 1 I2C_AOP_SCL_ISO 2 1 I2C_MESA_TURTLE_SCL_CONN 38
GND
2 0% 1/32W
MF 01005 ROOM=MAMBA_MESA
13 AOP_TO_MESA_I2C_ISO_EN 1 C4809
1
R4805 56PF
PP1V8_SDRAM 16 18 20 21 32 36 37 40 41 46
5%
1%
511K 47 48 53 2 25V
NP0-C0G-CERM TO MAMBA/MESA FLEX
1/32W 5 01005
MF ROOM=MAMBA_MESA
VCC
2 01005
6S U4806 3
74LVC1G3157GX Y0 NC R4807
4Z
X2SON6 0.00
Y1 1 I2C_AOP_SDA_ISO 2 1 I2C_MESA_TURTLE_SDA_CONN 38
GND
2 0% 1/32W
MF 01005 ROOM=MAMBA_MESA
1 C4810
56PF
5%
2 25V
NP0-C0G-CERM
01005
B ROOM=MAMBA_MESA B
A
PAGE TITLE
I2C MAP AOP

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

48 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
C C
B B
A
PAGE TITLE
I2C TABLE DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

49 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
C C
B B
A A
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
C C
B B
A A
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
This page controls elements different accross all MLBs
D D
PCIe Lanes
1 2 0.1UF
8 90_AP_PCIE2_RXD_C_P C0816
ROOM=SOC 20% 6.3V GND_VOID=TRUE
90_PCIE_WLAN_TO_AP_RXD_P 53 MAKE_BASE=TRUE
X5R-CERM 01005
1 2 0.1UF
C 8 90_AP_PCIE2_RXD_C_N C0817
90_PCIE_WLAN_TO_AP_RXD_N 53 MAKE_BASE=TRUE C
X5R-CERM 01005
1 2 0.1UF
8 90_AP_PCIE2_TXD_C_P C0815
90_PCIE_AP_TO_WLAN_TXD_P 53 MAKE_BASE=TRUE
X5R-CERM 01005
1 2 0.1UF
8 90_AP_PCIE2_TXD_C_N C0818
90_PCIE_AP_TO_WLAN_TXD_N 53 MAKE_BASE=TRUE
X5R-CERM 01005
25 18 17 16 13 12 11 9 8 7 5 PP1V8
48 47 46 39 30 29
1 R0807
100K
5%
1/32W
MF
2 01005
ROOM=SOC
53 52 PCIE_WLAN_BI_AP_CLKREQ_L
1 2
8 90_AP_PCIE3_RXD_C_P C0811
ROOM=SOC 20% 6.3V
0.1UF
GND_VOID=TRUE
90_PCIE_BB_TO_AP_RXD_P 53 MAKE_BASE=TRUE
X5R-CERM 01005
1 2
8 90_AP_PCIE3_RXD_C_N C0812
ROOM=SOC 20% 6.3V
0.1UF
GND_VOID=TRUE
90_PCIE_BB_TO_AP_RXD_N 53 MAKE_BASE=TRUE
X5R-CERM 01005
1 2
8 90_AP_PCIE3_TXD_C_P C0814
ROOM=SOC 20% 6.3V
0.1UF
GND_VOID=TRUE
90_PCIE_AP_TO_BB_TXD_P 53 MAKE_BASE=TRUE
X5R-CERM 01005
B 1 2
B
8 90_AP_PCIE3_TXD_C_N C0813
ROOM=SOC 20% 6.3V
0.1UF 90_PCIE_AP_TO_BB_TXD_N 53 MAKE_BASE=TRUE
X5R-CERM 01005 GND_VOID=TRUE
8 90_AP_PCIE3_REFCLK_P 90_PCIE_AP_TO_BB_REFCLK_P 53 MAKE_BASE=TRUE

8 90_AP_PCIE3_REFCLK_N 90_PCIE_AP_TO_BB_REFCLK_N 53 MAKE_BASE=TRUE
8 90_AP_PCIE2_REFCLK_P 90_PCIE_AP_TO_WLAN_REFCLK_P 53 MAKE_BASE=TRUE
8 90_AP_PCIE2_REFCLK_N 90_PCIE_AP_TO_WLAN_REFCLK_N 53 MAKE_BASE=TRUE
8 AP_PCIE_RESET3_L PCIE_AP_TO_BB_RESET_L 53 MAKE_BASE=TRUE
8 AP_PCIE_RESET2_L PCIE_AP_TO_WLAN_RESET_L 53 MAKE_BASE=TRUE
8 AP_PCIE_CLKREQ3_L PCIE_BB_BI_AP_CLKREQ_L 53 MAKE_BASE=TRUE
8 AP_PCIE_CLKREQ2_L PCIE_WLAN_BI_AP_CLKREQ_L 52 53 MAKE_BASE=TRUE
A SYNC_DATE=08/20/2015 A
PAGE TITLE
MLB UNIQUE
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

52 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
80
27 26 25
40 39 37
77
23
35
75
21
34
69
19
33
53
18
31
46
10
30
41
9 4
28
Wifi/BT
PP_VDD_MAIN PP_VDD_MAIN
I306
80 77 75 69 53 46 41
27 26 25 23 21 19 18 10 9 4
Cellular
Aliases used to correct name for Karoo radio system
PP_VDD_MAIN PP_VDD_MAIN
46 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM PP1V8_SDRAM 40 39 37 35 34 33 31 30 28
80 78 75 55 53 48 47 46 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM PP1V8_SDRAM
80 78 75 55 53 48 47
80 20 PMUGPIO_TO_WLAN_CLK32K PMU_TO_WLAN_32K
58 20 BBPMU_TO_PMU_AMUX1 BBPMU_TO_PMU_AMUX1
58 20 BBPMU_TO_PMU_AMUX2 BBPMU_TO_PMU_AMUX2
80 20 PMU_TO_WLAN_REG_ON PMU_TO_WLAN_REG_ON
PMU_TO_BT_REG_ON 58 20 BBPMU_TO_PMU_AMUX3 BBPMU_TO_PMU_AMUX3
80 20 PMU_TO_BT_REG_ON
80 20 BT_TO_PMU_HOST_WAKE BT_TO_PMU_HOST_WAKE
AP_TO_BT_WAKE
D
80 12 AP_TO_BT_WAKE
Opposite polarity on Eureka --v MAKE_BASE=TRUE
D
12 AP_TO_BBPMU_RADIO_ON_L 55 AP_TO_BBPMU_SDWN_L AP_TO_BBPMU_SDWN_L
80 52 90_PCIE_AP_TO_WLAN_REFCLK_P 100_PCIE_AP_TO_WLAN_REFCLK_P
20 PMU_TO_BBPMU_RESET_L MAKE_BASE=TRUE PMU_TO_BBPMU_ON PMU_TO_BBPMU_ON
80 52 90_PCIE_AP_TO_WLAN_REFCLK_N 100_PCIE_AP_TO_WLAN_REFCLK_N Eureka names 56 12 AP_TO_BB_RESET_L AP_TO_BB_RESET_L
80 52 90_PCIE_AP_TO_WLAN_TXD_P 100_PCIE_AP_TO_WLAN_TX_P
12 NC_BB_TO_AP_RESET_ACT_L MAKE_BASE=TRUE BB_TO_AP_RESET_ACT_L BB_TO_AP_RESET_ACT_L
80 52 90_PCIE_AP_TO_WLAN_TXD_N 100_PCIE_AP_TO_WLAN_TX_N RADIO_MLB
55 12 BB_TO_AP_RESET_DETECT_L BB_TO_AP_RESET_DETECT_L
80 52 90_PCIE_WLAN_TO_AP_RXD_P 100_PCIE_WLAN_TO_AP_RX_P
55 46 37 26 BB_TO_STROBE_DRIVER_GSM_BURST_IND BB_TO_AP_GSM_TXBURST
80 52 90_PCIE_WLAN_TO_AP_RXD_N 100_PCIE_WLAN_TO_AP_RX_N
WIFI_MLB 55 12 AP_TO_BB_MESA_ON AP_TO_BB_MESA_ON
80 52 PCIE_AP_TO_WLAN_RESET_L PCIE_AP_TO_WLAN_PERST_L
55 12 AP_TO_BB_TIME_MARK AP_TO_BB_TIME_MARK
80 52 PCIE_WLAN_BI_AP_CLKREQ_L PCIE_AP_BI_WLAN_CLKREQ_L
55 12 AP_TO_BB_COREDUMP AP_TO_BB_COREDUMP_TRIG
80 20 WLAN_TO_PMU_HOST_WAKE PCIE_WLAN_TO_PMU_WAKE
TOUCH_TO_BBPMU_FORCE_PWM
80 12 AP_TO_WLAN_DEVICE_WAKE AP_TO_WLAN_DEV_WAKE
55 12 AP_TO_BB_IPC_GPIO1 AP_TO_BB_IPC_GPIO
12 NC_AP_TO_BB_IPC_GPIO2 AP_TO_BB_IPC_GPIO2
MAKE_BASE=TRUE
AP_TO_BB_IPC_GPIO2
80 12 UART_AP_TO_WLAN_TXD UART_AP_TO_WLAN_TXD
80 12 UART_WLAN_TO_AP_RXD UART_WLAN_TO_AP_RXD
55 52 90_PCIE_AP_TO_BB_REFCLK_P 100_PCIE_AP_TO_BB_REFCLK_P
80 12 UART_AP_TO_WLAN_RTS_L UART_AP_TO_WLAN_RTS_L
55 52 90_PCIE_AP_TO_BB_REFCLK_N 100_PCIE_AP_TO_BB_REFCLK_N
80 12 UART_WLAN_TO_AP_CTS_L UART_WLAN_TO_AP_CTS_L
55 52 90_PCIE_AP_TO_BB_TXD_P 100_PCIE_AP_TO_BB_TX_P
UART_AP_TO_BT_TXD 55 52 90_PCIE_AP_TO_BB_TXD_N 100_PCIE_AP_TO_BB_TX_N

80 12 UART_AP_TO_BT_TXD
UART_BT_TO_AP_RXD 55 52 90_PCIE_BB_TO_AP_RXD_P 100_PCIE_BB_TO_AP_RX_P
80 12 UART_BT_TO_AP_RXD
UART_AP_TO_BT_RTS_L 55 52 90_PCIE_BB_TO_AP_RXD_N 100_PCIE_BB_TO_AP_RX_N
80 12 UART_AP_TO_BT_RTS_L
UART_BT_TO_AP_CTS_L 55 52 PCIE_AP_TO_BB_RESET_L PCIE_AP_TO_BB_PERST_L
80 12 UART_BT_TO_AP_CTS_L
55 52 PCIE_BB_BI_AP_CLKREQ_L PCIE_AP_BI_BB_CLKREQ_L
55 20 BB_TO_PMU_PCIE_HOST_WAKE_L PCIE_BB_TO_PMU_WAKE_L
80 13 AOP_TO_WLAN_CONTEXT_A AOP_TO_WLAN_CONTEXT_A
AP_TO_BB_DEVICE_WAKE
80 13 AOP_TO_WLAN_CONTEXT_B AOP_TO_WLAN_CONTEXT_B
I2S_AP_TO_BT_BCLK NC UART_AP_TO_BB_TXD
80 11 I2S_AP_TO_BT_BCLK
C 80 11
I2S_AP_TO_BT_LRCLK
I2S_BT_TO_AP_DIN
I2S_AP_TO_BT_LRCK NC UART_BB_TO_AP_RXD
C
80 11 I2S_BT_TO_AP_DIN
I2S_AP_TO_BT_DOUT 55 13 UART_AOP_TO_BB_TXD UART_AOP_TO_BB_TXD
80 11 I2S_AP_TO_BT_DOUT
55 13 UART_BB_TO_AOP_RXD UART_BB_TO_AOP_RXD
80 55 53 UART_BB_TO_WLAN_COEX UART_BB_TO_WLAN_COEX
80 55 53 UART_WLAN_TO_BB_COEX UART_WLAN_TO_BB_COEX
55 11 I2S_BB_TO_AP_BCLK I2S_AP_TO_BB_BCLK
81 77 53 50_UAT_WLAN_5G_WEST 50_UAT_WLAN_5G_WEST
55 11 I2S_BB_TO_AP_LRCLK I2S_AP_TO_BB_LRCLK
81 77 53 50_UAT_WLAN_2G_EAST 50_UAT_WLAN_2G_EAST
55 11 I2S_AP_TO_BB_DOUT I2S_AP_TO_BB_DOUT
81 77 53 50_UAT_WLAN_5G_EAST 50_UAT_WLAN_5G_EAST
55 11 I2S_BB_TO_AP_DIN I2S_BB_TO_AP_DIN
80 77 53 50_WLAN_G_1 50_WLAN_G_1
80 77 53 50_WLAN_A_1 50_WLAN_A_1
80 55 53 UART_BB_TO_WLAN_COEX UART_BB_TO_WLAN_COEX
81 78 53 50_UAT2_M 50_UAT2_M
80 55 53 UART_WLAN_TO_BB_COEX UART_WLAN_TO_BB_COEX
75 69 53 SIM1_SWP SIM1_SWP
SIM2_SWP
75 59 53 NFC_TO_BB_CLK_REQ NFC_TO_BB_CLKREQ
75 59 53 BB_TO_NFC_CLK BB_TO_NFC_CLK
20 NC_PMU_TO_GNSS_EN MAKE_BASE=TRUE PMU_TO_GNSS_EN PMU_TO_GNSS_EN

12 NC_AP_UART2_TXD MAKE_BASE=TRUE UART_AP_TO_GNSS_TXD UART_AP_TO_GNSS_TXD
12 NC_AP_UART2_RXD MAKE_BASE=TRUE UART_GNSS_TO_AP_RXD UART_GNSS_TO_AP_RXD
12 NC_AP_UART2_RTS_L MAKE_BASE=TRUE UART_AP_TO_GNSS_RTS_L UART_AP_TO_GNSS_RTS_L
12 NC_AP_UART2_CTS_L MAKE_BASE=TRUE UART_GNSS_TO_AP_CTS_L UART_GNSS_TO_AP_CTS_L
20 NC_GNSS_TO_PMU_HOST_WAKE MAKE_BASE=TRUE GNSS_TO_PMU_HOST_WAKE GNSS_TO_PMU_HOST_WAKE
12 NC_AP_TO_GNSS_TIME_MARK MAKE_BASE=TRUE AP_TO_GNSS_TIME_MARK AP_TO_GNSS_TIME_MARK
B 12 NC_AP_TO_GNSS_WAKE MAKE_BASE=TRUE AP_TO_GNSS_WAKE AP_TO_GNSS_DEVICE_WAKE B
NFC FF SPECIFIC
56 36 17 13
56 13
55 20
55 40
SWD_AP_TO_MANY_SWCLK
SWD_AOP_BI_BB_SWDIO
PMU_TO_BB_USB_VBUS_DETECT
90_USB_BB_DATA_P
SWD_AP_TO_BB_CLK
SWD_AP_BI_BB_IO
USB_BB_VBUS
90_USB_BB_P
80
27 26 25
40 39 37
77
23
35
75
21
34
69
19
33
53
18
31
46
10
30
41
9 4
28
PP_VDD_MAIN PP_VDD_MAIN 55 40 90_USB_BB_DATA_N 90_USB_BB_N
46 41 40 37 36 32 21 20 18 16 PP1V8_SDRAM PP1V8_SDRAM RADIO_MLB_FF
80 78 75 55 53 48 47
80 77 53 50_WLAN_A_1 50_WLAN_A_1 50_UAT_WLAN_2G_WEST 77 67 50_UAT_WLAN_2G_WEST 50_UAT_WLAN_2G_WEST
80 77 53 50_WLAN_G_1 50_WLAN_G_1 50_UAT_LB_NORTH 77 66 50_UAT_LB_NORTH 50_UAT_LB_NORTH
75 20 PMU_TO_NFC_EN PMU_TO_NFC_EN 81 77 53 50_UAT_WLAN_5G_EAST 50_UAT_WLAN_5G_EAST 50_UAT_LB_SOUTH 77 64 50_UAT_LB_SOUTH 50_UAT_LB_SOUTH
75 59 53 BB_TO_NFC_CLK BB_TO_NFC_CLK 81 77 53 50_UAT_WLAN_2G_EAST 50_UAT_WLAN_2G_EAST 50_UAT_MB_HB_SOUTH 77 64 50_UAT_MB_HB_SOUTH 50_UAT_MB_HB_SOUTH
75 59 53 NFC_TO_BB_CLK_REQ NFC_TO_BB_CLK_REQ 81 77 53 50_UAT_WLAN_5G_WEST 50_UAT_WLAN_5G_WEST 50_UAT_MB_HB_WEST 77 66 50_UAT_MB_HB_WEST 50_UAT_MB_HB_WEST
75 12 AP_TO_NFC_FW_DWLD_REQ AP_TO_NFC_FW_DWLD 81 78 53 50_UAT2_M 50_UAT2_M 50_UAT1_TUNER 78 67 50_UAT1_TUNER 50_UAT1_TUNER
STOCKHOLM_MLB
75 12 AP_TO_NFC_DEV_WAKE AP_TO_NFC_DEV_WAKE
PP3V0_TRISTAR PP3V0_TRISTAR_ANT_PROX 19 29
40 41 78
75 20 NFC_TO_PMU_HOST_WAKE NFC_TO_PMU_HOST_WAKE
VDD_TUNER_RFFE_VIO_1V8 PP1V8_SDRAM 75
16
78
80
18
20 21 32 36 37
40 41
46 47 48 53 55 BB_TO_LAT_ANT_SCLK LAT_TUNER_RFFE_CLK
UAT_TUNER_RFFE_CLK BB_TO_UAT_ANT_SCLK 53 66
78
75 12 UART_AP_TO_NFC_TXD UART_AP_TO_NFC_TXD 64 41 BB_TO_LAT_ANT_DATA LAT_TUNER_RFFE_DATA
80 77 75 69 53 46
27 26 25 23 21 19 18 10 9 4 PP_VDD_MAIN PP_VDD_MAIN UAT_TUNER_RFFE_DATA BB_TO_UAT_ANT_DATA 53 66 78
75 12 UART_NFC_TO_AP_RXD UART_NFC_TO_AP_RXD 41 40 39 37 35 34 33 31 30 28 78 64 53 BB_TO_UAT_TUNER_GPO UAT_TUNER_GPO
UAT_TUNER_GPO BB_TO_UAT_TUNER_GPO 53 64 78
75 12 UART_AP_TO_NFC_RTS_L UART_AP_TO_NFC_RTS_L 78 66 53 BB_TO_UAT_ANT_SCLK UAT_TUNER_RFFE_CLK
75 12 UART_NFC_TO_AP_CTS_L UART_NFC_TO_AP_CTS_L P2MM-NSM 78 66 53 BB_TO_UAT_ANT_DATA UAT_TUNER_RFFE_DATA
SM PP5304 PP
1
BB_TO_LAT_GPO1
ROOM=UAT_DEBUG 64 41 LAT_TUNER_GPO1
P2MM-NSM
75 69 53 SIM1_SWP NFC_SWP SM PP5301 PP
1 64 41 BB_TO_LAT_GPO2 LAT_TUNER_GPO2
ROOM=UAT_DEBUG
75 NC_SE2_READY SE2_READY P2MM-NSM 64 46 BB_TO_LAT_GPO3 LAT_TUNER_GPO3
NC_SE2_PWR_REQ SM PP5302 PP
1
75 SE2_PWR_REQ ROOM=UAT_DEBUG
P2MM-NSM
75 NC_SE2_PRESENT SE2_PRESENT SM PP5303 PP
1
ROOM=UAT_DEBUG
A 75 NC_NFC_SWP_MUX NFC_SWP_MUX A
75 NC_ICEFALL_LDO_ENABLE ICEFALL_LDO_ENABLE PAGE TITLE
CELL,WIFI,NFC
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

53 OF 53
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CK
APPD
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
RADIO_MLB PORTS REV
5
ECN
0006232160
DESCRIPTION OF REVISION
ENGINEERING RELEASED
DATE
2016-05-16
69 68 61 60 59 58 53 IN
POWER
PP_VDD_MAIN
D
ICE16 RADIO_MLB 69 68 64 59 58 57 56 55 53 IN
58
58
58
53 OUT
53 OUT
53 OUT
PP1V8_SDRAM
AMUX
BBPMU_TO_PMU_AMUX1
BBPMU_TO_PMU_AMUX2
BBPMU_TO_PMU_AMUX3
D
Mon May 16 14:17:24 2016

BB CONTROL AP_TO_BBPMU_SDWN_L
PDF PAGE
TABLE_TABLEOFCONTENTS_HEAD
CSA PAGE CONTENTS AP_TO_BBPMU_RADIO_ON_L
PMU_TO_BBPMU_RESET_L PMU_TO_BBPMU_ON
OUT
OUT
53 55 58
53 58 69
69
AP_TO_BB_RESET_L
2TABLE_TABLEOFCONTENTS_ITEM
55 BASEBAND 69 56 53 IN
56 53 OUT BB_TO_AP_RESET_ACT_L
BB_TO_AP_RESET_DETECT_L
56 BASEBAND MEMORY/DEBUG 69
55 53 OUT
55 53 OUT BB_TO_AP_GSM_TXBURST
AP_TO_BB_MESA_ON
57 BASEBAND POWER 69
69
55 53 IN
55 53 IN AP_TO_BB_TIME_MARK
AP_TO_BB_COREDUMP_TRIG
58 BASEBAND PMIC 55 53 IN
TOUCH_TO_BBPMU_FORCE_PWM
AP_TO_BB_IPC_GPIO
59 TRANSCEIVERS 55
55
53 IN
53 IN AP_TO_BB_IPC_GPIO2
60 ET MODULATOR PCIE
100_PCIE_AP_TO_BB_REFCLK_P
61 TDD TRANSMIT 55
55
53 IN
53 IN 100_PCIE_AP_TO_BB_REFCLK_N
100_PCIE_AP_TO_BB_TX_P
62 FDD TRANSMIT 69
69
55 53 IN
55 53 IN 100_PCIE_AP_TO_BB_TX_N
100_PCIE_BB_TO_AP_RX_P
10 63 PRIMARY RECEIVE 55 53 OUT
100_PCIE_BB_TO_AP_RX_N
C TABLE_TABLEOFCONTENTS_ITEM
69 55 53 OUT
PCIE_AP_TO_BB_PERST_L C
11
TABLE_TABLEOFCONTENTS_ITEM
64 LOWER ANTENNA & COUPLERS 69 55 53 IN
16 2 IO
PCIE_AP_BI_BB_CLKREQ_L
PCIE_BB_TO_PMU_WAKE_L
12
65 DIVERSITY RECEIVE ASM'S 69 55 53 OUT
AP_TO_BB_DEVICE_WAKE
13
66 DIVERSITY RECEIVE LNA'S UART
UART_AP_TO_BB_TXD
14
67 UPPER ANTENNA FEEDS 69 55 IN
69 55 OUT UART_BB_TO_AP_RXD
15
68 GNSS
55 53 IN
AOP
UART_AOP_TO_BB_TXD
16
69 TEST POINTS & SIM 55 53 OUT UART_BB_TO_AOP_RXD
ALTERNATES ALTERNATE FOR

AUDIO
I2S_AP_TO_BB_BCLK
PART NUMBER REFERENCE DESIGNATOR(S) DESCRIPTION BOM OPTION 55 53 IN
PART NUMBER 55 53 IN I2S_AP_TO_BB_LRCLK
197S00040 197S00044 VTCXO_RF AVX VC-TCXO ? 55 53 IN I2S_AP_TO_BB_DOUT
55 53 OUT I2S_BB_TO_AP_DIN
197S00042 197S00044 VTCXO_RF NDK VC-TCXO ?
197S00039 197S00043 GTCXO_RF AVX VC-TCXO ?
69 55 53 IN
WLAN
UART_BB_TO_WLAN_COEX
197S00041 197S00043 GTCXO_RF NDK VC-TCXO ? UART_WLAN_TO_BB_COEX
69 55 53 OUT
335S00013 335S0894 EPROM_RF ON SEMI EEPROM ?
B 138S0719 138S1103 C5820_RF MURATA ?

16
NFC
SIM1_SWP B
IO
138S0706 138S0739 C5811_RF, C5813_RF, C5815_RF, C5905_RF, C5913_RF MURATA ? SIM2_SWP

59 53 IN NFC_TO_BB_CLKREQ
138S0945 138S0739 C5811_RF, C5813_RF, C5815_RF, C5905_RF, C5913_RF KYOCERA ? BB_TO_NFC_CLK
59 53 OUT
69 68 53
GNSS
PMU_TO_GNSS_EN
IN
69 68 53 IN
UART_AP_TO_GNSS_TXD
69 68 53 OUT UART_GNSS_TO_AP_RXD
69 68 53 IN
UART_AP_TO_GNSS_RTS_L
69 68 53 OUT UART_GNSS_TO_AP_CTS_L
BOM OPTIONS
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_HEAD
69 68 53 OUT
69 68 53
68 53
IN
IN
GNSS_TO_PMU_HOST_WAKE
AP_TO_GNSS_TIME_MARK
AP_TO_GNSS_DEVICE_WAKE
998-03730 1 BASEBAND, UNFUSED BB_RF BB_UNFUSED

TABLE_5_ITEM
56 53 IN
DEBUG
SWD_AP_TO_BB_CLK
TABLE_5_ITEM
998-03731 1 BASEBAND, LOCAL FUSED BB_RF BB_LOCAL_FUSED 3 IO

SWD_AP_BI_BB_IO
TABLE_5_ITEM
69 55 53 IN USB_BB_VBUS
998-03732 1 BASEBAND, DEV FUSED BB_RF BB_DEV_FUSED
16 2 IO
90_USB_BB_P
TABLE_5_ITEM
64 53 OUT LAT_TUNER_GPO1
337S00127 1 BASEBAND, PRODUCTION FUSED BB_RF BB_PROD_FUSED 16 2 IO
90_USB_BB_N
64 53 OUT LAT_TUNER_GPO2
LAT_TUNER_GPO3
ANTENNA 64 53 OUT
A SCH: 951-00673 14
13
11
IO
IO
50_UAT_WLAN_2G_WEST
50_UAT_LB_NORTH
50_UAT_LB_SOUTH PAGE1 A
BOM: 939-00555
IO
11 IO
50_UAT_MB_HB_SOUTH
DRAWING TITLE
50_UAT_MB_HB_WEST
13 IO SCH,MLB,D111
14 IO
50_UAT1_TUNER
DRAWING NUMBER SIZE
TUNER Apple Inc.

051-00542
REVISION
D
R
5.0.0
OUT
LAT_TUNER_RFFE_CLK RFFE1_CLK_FILT 11 12 NOTICE OF PROPRIETARY PROPERTY: BRANCH
IO
LAT_TUNER_RFFE_DATA RFFE1_DATA_FILT 11 12 THE INFORMATION CONTAINED HEREIN IS THE
64 53 OUT UAT_TUNER_GPO THE POSESSOR AGREES TO THE FOLLOWING: PAGE
66 53 OUT UAT_TUNER_RFFE_CLK I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

1 OF 73
13 IO
UAT_TUNER_RFFE_DATA SHEET
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
BASEBAND
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
1 1
R5502_RF R5510_RF
100K 100K
1% 1%
1/32W 1/32W
MF MF
01005
2 BASEBAND 01005
2 BASEBAND
16 2 1 PCIE_AP_BI_BB_CLKREQ_L
16 5 2 1 AP_TO_BBPMU_SDWN_L
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
1
R5500_RF
D 1%
100K D
1/32W
MF
01005
2 BASEBAND
16 2 SIM1_DETECT
BB_RF
BB_RF PMB9943
16 5 4 VDD_SIM1 WF2BGA
PMB9943
WF2BGA 1 SYM 7 OF 9
R5501_RF OMIT_TABLE
SYM 1 OF 9
OMIT_TABLE 4.7K
1% U5 SYS_CLK
1/32W 69 59 IN
SYSCLK_26MHZ RXDAT_MAIN_0_1- D1 90_DIGRF_M0_RX1_N IN 59
SIM CARD 1
G18 CC1_CLK FS MF
69 OUT
SIM1_CLK 01005
2 BASEBAND V6 SYS_CLK_EN RXDAT_MAIN_0_1+ D2 90_DIGRF_M0_RX1_P IN 59
59 OUT
SYSCLK_26MHZ_EN
69 55 SIM1_IO F19 CC1_IO FS
BI
F18 CC1_RST FS RXDAT_MAIN_0_2- C2 90_DIGRF_M0_RX2_N IN 59
69 OUT
SIM1_RST 16 2 SIM1_IO
RXDAT_MAIN_0_2+ C3 90_DIGRF_M0_RX2_P IN 59
CLOCKS AND CONTROL

RXDAT_MAIN_1_1- M1 90_DIGRF_M1_RX1_N IN 59
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
SIM CARD 2
DIGRF V4.0 MAIN

H18 CC2_IN FS RXDAT_MAIN_1_1+ M2 90_DIGRF_M1_RX1_P 59
NC IN
H19 CC2_CLK FS 1 1
NC R5509_RF R5511_RF RXDAT_MAIN_1_2- L1 90_DIGRF_M1_RX2_N 59
G19 IN
NC CC2_IO FS 1.00K 1.00K
H20 1% 1% RXDAT_MAIN_1_2+ L2 90_DIGRF_M1_RX2_P IN 59
NC CC2_RST FS W2 1/32W 1/32W
I2S2_CLK0 I2S_AP_TO_BB_BCLK OUT 53 54 MF MF
G17 USIF1_TXD_MTSR AA4 01005
2 BASEBAND 01005
2 BASEBAND TXDAT_MAIN_0_1- E1 90_DIGRF_M0_TX_N OUT 59
UART_BB_TO_AP_RXD FS I2S2_CLK1 AP_TO_BB_MESA_ON
I2S2
69 54 OUT IN 53 54 69
H16 USIF1_RXD_MRST Y3 TXDAT_MAIN_0_1+ E2 90_DIGRF_M0_TX_P OUT 59
69 54 IN
UART_AP_TO_BB_TXD FS I2S2_RX I2S_AP_TO_BB_DOUT IN 53 54 5 2 I2C_BBPMU_SCL
W3 TXDAT_MAIN_1_1- N1
USIF1
I2S2_TX I2S_BB_TO_AP_DIN OUT 53 54 5 2 I2C_BBPMU_SDA 90_DIGRF_M1_TX_N OUT 59 69

J17 USIF1_RTS* I2S2_WA0 Y4 I2S_AP_TO_BB_LRCLK 53 54 TXDAT_MAIN_1_1+ N2 90_DIGRF_M1_TX_P 59 69
NC OUT OUT
EINT4 H17 USIF1_CTS* FS FS I2S2_WA1 W4 AP_TO_BB_COREDUMP_TRIG 53 54
IN EINT2 MPHY_MAIN_0_EN A3 DIGRF_M0_EN OUT 59
UART_BB_TO_AOP_RXD D19 USIF3_TXD_MTSR MPHY_MAIN_1_EN K4 DIGRF_M1_EN

C 54
54
53
53
OUT
IN
UART_AOP_TO_BB_TXD E18 USIF3_RXD_MRST FS
OUT 59
C
RXDAT_AUX_0_1- H2 90_DIGRF_A0_RX1_N IN 59
USIF3
D18 USIF3_RTS* RXDAT_AUX_0_1+ H1 90_DIGRF_A0_RX1_P IN 59

69 IN
DEV_HW_CONFIG
E19 USIF3_CTS* FS RXDAT_AUX_0_2- J1 90_DIGRF_A0_RX2_N 59
NC IN
Y7 USIF2_TXD_MTSR RXDAT_AUX_0_2+ J2 90_DIGRF_A0_RX2_P IN 59

NC
DIGRF V4.0 AUX

Y6 USIF2_RXD_MRST I2C1_SCL L17 RXDAT_AUX_1_1- T1
I2C1
I2C_BB_EEPROM_SCL 55 90_DIGRF_A1_RX1_N 59 69
NC OUT IN
I2C1_SDA K17 I2C_BB_EEPROM_SDA RXDAT_AUX_1_1+ T2 90_DIGRF_A1_RX1_P
USIF2
BI 55 IN 59 69
Y5 USIF2_RTS*
NC I2C2_SCL B16 I2C_BBPMU_SCL 55 58 RXDAT_AUX_1_2- U1 90_DIGRF_A1_RX2_N 59
AA7 USIF2_CTS* OUT IN
I2C2
NC I2C2_SDA A15 I2C_BBPMU_SDA 55 58 RXDAT_AUX_1_2+ U2 90_DIGRF_A1_RX2_P 59

OUT IN
EXTRA I/OS TXDAT_AUX_0_1- G2 90_DIGRF_A0_TX_N OUT 59

G16 CLKOUT1 TXDAT_AUX_0_1+ G1 90_DIGRF_A0_TX_P 59
NC OUT
USB_DPLUS Y1 90_USB_BB_P BI 53 54 69 TXDAT_AUX_1_1- R1 90_DIGRF_A1_TX_N OUT 59
EINT7 69 54 53 IN
AP_TO_BB_TIME_MARK U7 MMCI1_CD* FS USB_DMINUS AA1 90_USB_BB_N BI 53 54 69 TXDAT_AUX_1_1+ R2 90_DIGRF_A1_TX_P OUT 59
54 53 BB_TO_AP_RESET_DETECT_L W9 MMCI1_CLK VBUS W1 USB_BB_VBUS 1 16

OUT
W7 AA3 MPHY_AUX_0_EN J4 DIGRF_A0_EN OUT 59
BB_DEBUG_ERROR USB_BB_TUNE
MMC/SDIO1
69 OUT MMCI1_CMD USB_TUNE

U9 Y2 MPHY_AUX_1_EN T4 DIGRF_A1_EN OUT 59
USB 3.0
69 BB_HW_ID<0> MMCI1_DAT_0 USB_TEST

IN NC 1
EINT4 69 BB_HW_ID<1> V7 MMCI1_DAT_1 R5506_RF BASEBAND
IN AB2
V8 USB30_TXP NC 200
EINT5 69 IN
BB_HW_ID<2> MMCI1_DAT_2 1%
USB30_TXN AB1 1/32W
EINT6 54 53 AP_TO_BB_IPC_GPIO2 U8 MMCI1_DAT_3 NC MF
BI AC1
USB30_RXP NC 01005
2 BASEBAND
USB30_RXN AC2
NC
USB_SSIC_LLI_TXP R18
NC
P18
MIPI LLI
USB_SSIC_LLI_TXN
SSIC
NC
USB_SSIC_LLI_RXP R20
NC
B USB_SSIC_LLI_RXN R19
NC
B
PCI_PET_P1 AE16 100_PCIE_BB_TO_AP_RX_P
EXT INTERRUPT
OUT 53 54
58 BBPMU_ALERT_L C15 EINT0 BB_RF
IN AE15
PCI_PET_N1 100_PCIE_BB_TO_AP_RX_N OUT 53 54 69
69 55 SIM1_DETECT J18 EINT1 FS PMB9943
PCIE
IN AE13
PCI_PER_P1 100_PCIE_AP_TO_BB_TX_P IN 53 54 69
69 54 53 PCIE_BB_TO_PMU_WAKE_L J20 EINT2 BOOTROM DRIVEN WF2BGA
OUT AE14
PCI_PER_N1 100_PCIE_AP_TO_BB_TX_N IN 53 54 69 SYM 9 OF 9
54 53 AP_TO_BB_IPC_GPIO K18 EINT3 FS OMIT_TABLE
BI AD15 C16
PCI_REFCLK_P 100_PCIE_AP_TO_BB_REFCLK_P IN 53 54 58 OUT
BBPMU_STBY MODEM_STDBY
PCI_REFCLK_N AD14 100_PCIE_AP_TO_BB_REFCLK_N 53 54 FS PCIE_CLKREQ* M17 PCIE_AP_BI_BB_CLKREQ_L 53 54 55 69
IN D17 BI
69 54 53 OUT
BB_TO_AP_GSM_TXBURST FTA_TRIG
PCI_REF_RES AB15 PCIE_REF_RES PCIE_PERST* L18 PCIE_AP_TO_BB_PERST_L 53 54 69 PERST PULLED DOWN AT AP
IN
68 GNSS_BLANK E17 IDC_PA_BLANKING
1 OUT
BASEBAND R5507_RF D16 1 C5501_RF
69 54 53 IN
UART_WLAN_TO_BB_COEX IDC_UART_RXD FS
200 E16 100PF
1% 69 54 53 OUT
UART_BB_TO_WLAN_COEX IDC_UART_TXD FS
1/32W 5%
MF D15 2 16V
NP0-C0G
01005 69 58 55 54 53 OUT
AP_TO_BBPMU_SDWN_L SDWN_REQ* FS 01005
2 BASEBAND
BASEBAND
69 58 BBPMU_VCLK B13 VCLK
OUT
69 58 BBPMU_VDIO C14 VDIO

BI
BB EEPROM BASEBAND
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
1 C5500_RF
1 1
1UF R5504_RF R5505_RF
20% 10K 10K
2 16V
CER-X5R 1% 1%
0201 1/32W 1/32W
BASEBAND MF MF
2 01005 2 01005
A1
BASEBAND BASEBAND
VCC
A EPROM_RF
A
PAGE TITLE
CAT24C08C4A
2 I2C_BB_EEPROM_SCL B1 SCL
WLCSP
SDA B2 I2C_BB_EEPROM_SDA 2
BASEBAND
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
VSS
BASEBAND
R
5.0.0
NOTICE OF PROPRIETARY PROPERTY:
A2
BRANCH

55 OF 73
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
BASEBAND MEMORY/DEBUG
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
D 1
D
R5603_RF
100K
1%
1/32W
MF
2 01005
BASEBAND
BB_RF 69 56 54 53 IN
AP_TO_BB_RESET_L
PMB9943
WF2BGA
SYM 2 OF 9
OMIT_TABLE
V11 NAND_ADQ_0 DDR_DQ_0 AE6
NC NC
AB12 NAND_ADQ_1 DDR_DQ_1 AD7
NC NC
AA12 NAND_ADQ_2 BB_RF
NC
Y12 NAND_ADQ_3 PMB9943
NC
Y13 NAND_ADQ_4 WF2BGA
NC SYM 6 OF 9
V12 NAND_ADQ_5 OMIT_TABLE
NC
U13 NAND_ADQ_6
NC
V13 NAND_ADQ_7
NC
DBB EMIC
NAND IF
BB_RF
BBPMU_PWRGOOD B14 PMB9943

69 59 58 IN PWRGOOD WF2BGA
DDR_DQ_15 AC15 54 53 SWD_AP_TO_BB_CLK F15 SWDCLK SYM 5 OF 9
NC 69 58 BBPMU_XG_RESET_L B15 XG_RESET*
IN
OMIT_TABLE
IN E15 SWDIO
Y10 DDR_DQ_16 AD3 NC 54 53 BI
SWD_AP_BI_BB_IO
NAND_ALE
C C
PMU CONTROL
NC 69 58 BBPMU_XG_RESET_SD_L B17 XG_SDWN*
Y9 IN C19
NC NAND_CE* 69 OUT
BB_JTAG_TDO TDO TRIG_IN C20 NC
Y11 NAND_CLE 54 53 BB_TO_AP_RESET_ACT_L K19 RESET2* 69 BB_JTAG_TDI B20 TDI
NC OUT IN
HW_MON1 D20 HW_MON1 69
U11 K20 C18 OUT
JTAG
NAND_RB* 69 56 54 53 AP_TO_BB_RESET_L CP_RESET_BB* FS 69 BB_JTAG_TMS TMS
NC IN IN
HW_MON2 E20 HW_MON2 69
AB10 NAND_RE* 69 BB_JTAG_TCK C17 TCK
OUT
NC 59 XCVR0_RESET_L L4 RESET_TRX1*
IN
W10 OUT A19
NAND_WE* 69 BB_JTAG_TRST_L TRST*
NC 59 XCVR1_RESET_L U4 RESET_TRX2*
IN
W11 OUT B19
NAND_WP* RTCK
MONITORING
NC NC
F4 TPIU_TRACEPKT0
NC
E4 TPIU_TRACEPKT1
NC
B8 DDR_CA_0 E5 TPIU_TRACEPKT2
NC NC
A8 DDR_CA_1 F5 TPIU_TRACEPKT3
NC L10 RCT_MON2 NC
A9 NC E7
ADN SENSE
DDR_CA_2
CONTACT
NC L11 NC TPIU_TRACEPKT4
B9 NC RCT_MON1 F6
NC DDR_CA_3 NC TPIU_TRACEPKT5
C10 DDR_CA_4 F17 VSS_SENSE D6 TPIU_TRACEPKT6
NC NC
A13 DDR_CA_5 DDR_DQ_31 AD19 G7 TPIU_TRACEPKT7
NC NC NC
TPIU
C12 DDR_CA_6 G6 TPIU_TRACEPKT8
NC DDR_DQS_T_0 AD9 NC
C13 DDR_CA_7 NC D5 TPIU_TRACEPKT9
NC DDR_DQS_C_0 AE9 NC
D13 DDR_CA_8 NC F8 TPIU_TRACEPKT10
NC DDR_DQS_T_1 AD13 NC
E14 DDR_CA_9 NC C6 TPIU_TRACEPKT11
NC DDR_DQS_C_1 AE12 VSS B18 NC
NC C5 TPIU_TRACEPKT12
DDR_DQS_T_2 AD6 VSS V2 NC
NC C7 TPIU_TRACEPKT13
DDR_DQS_C_2 AE5 VSS V20 NC
NC D7 TPIU_TRACEPKT14
DDR_DQS_T_3 AE17 VSS W13 NC
NC E8 TPIU_TRACEPKT15
DDR_DQS_C_3 AC16 VSS W15 NC
NC
VSS W17 C4 TPIU_TRACECLK
DDR_CK_T B11 NC
NC VSS W19 D4 TPIU_TRACECTL
DDR_CK_C A11 NC
NC VSS W20
AD10
B DDR_DQM_0
DDR_DQM_1 AD12
NC VSS W5 BASEBAND
B
NC VSS Y17
VSS Y19
DDR_DQM_3 AD16 NC
BASEBAND
CLOCKS & CONTROL
DDR_CS_1 B10 NC
F16 FSYS_32K DDR_CKE_1 AB9 BB_DDR_CKE 4

58 OUT
BBPMU_32K
16 15 3 TCXO_BB_GNSS_32K M20 F32K DDR_VREF_DQ AE10 BB_DDR_VREF_DQ
NC
L20 OSC32K DDR_VREF_CA A12 BB_DDR_VREF_CA
BASEBAND 1 C5600_RF 1 C5601_RF

47PF 47PF
5% 5%
2 16V
CERM 2 16V
CERM
01005 01005
BASEBAND BASEBAND
R5600_RF
15 11 1
0.00 2
3 2 1 PP1V8_SDRAM PP1V8_TCXO
6 5 4
16 0%
1/32W 1 C5602_RF
MF
3
01005 0.01UF
A 10%
2 6.3V
X5R
VDD A
01005 TCXO_RF PAGE TITLE
BASEBAND 32.768KHZ-5PPM
CSP BASEBAND MEMORY/DEBUG
DRAWING NUMBER SIZE
1 CAL/NC CLKOUT 2 TCXO_BB_GNSS_32K 56 68 69
NC OUT
Apple Inc.
051-00542 D
REVISION
GND R
5.0.0
4

56 OF 73
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
BASEBAND POWER BB_RF

PMB9943
WF2BGA
SYM 4 OF 9
DBB POWER PINS
OMIT_TABLE
5 4 VDD_CORE_1V0 AA16 VDD_CORE_MAIN VDD_EMIC_IO_0 AC7 VDD_IO_1V2 4 5
AA18 VDD_CORE_MAIN VDD_EMIC_IO_0 AC8
1 C5720_RF 1 C5725_RF 1 C5729_RF 1 C5731_RF 1 C5733_RF 1 C5736_RF 1 C5738_RF 1 C5739_RF
AA20 VDD_CORE_MAIN VDD_EMIC_IO_1 AA15
1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 1UF
20% 20% AA5 VDD_CORE_MAIN VDD_EMIC_IO_1 AB14 20% 20% 20% 20% 20% 20%
2 16V
CER-X5R 2 6.3V
X5R-CERM P14 AC5
6.3V
2 X5R-CERM 6.3V
2 X5R-CERM 6.3V
2 X5R-CERM 6.3V
2 X5R-CERM 6.3V
2 X5R-CERM 2 16V
CER-X5R
0201 01005 VDD_CORE_MAIN VDD_EMIC_IO_2 01005 01005 01005 01005 01005 0201
BASEBAND BASEBAND P16 VDD_CORE_MAIN VDD_EMIC_IO_2 AC6 BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND
R14 AC17
D R16
VDD_CORE_MAIN
VDD_CORE_MAIN
VDD_EMIC_IO_3
VDD_EMIC_IO_3 AC18
AE11
D
T16 VDD_CORE_MAIN VDD_EMIC_IO_CA AC11
U15 VDD_CORE_MAIN VDD_EMIC_IO_CA AC12
U16 VDD_CORE_MAIN VDD_EMIC_1V8_IO AB16 VDD_DDR_1V8 4 5
U18 VDD_CORE_MAIN VDD_LDO_DLL_EMIC AE11
1 C5740_RF
V14 VDD_CORE_MAIN
VDD_SMB_IO V1 PP1V8_SDRAM 1 2 3 4 5 6
0.1UF
V16 VDD_CORE_MAIN 11 15 16 20%
V18 1 C5737_RF 2 6.3V
X5R-CERM
VDD_CORE_MAIN 01005
W18 VDD_CORE_MAIN 1UF BASEBAND
VDD_LDO_USB_SS AC3 VDD_IO_1V2 4 5
20%
W16 VDD_CORE_MAIN 2 16V
CER-X5R
Y14 LDO_MON_USB_SS AB4 NC 1 C5735_RF 0201
VDD_CORE_MAIN
Y16 VDD_USB_SS_IO AA2 VDD_USB_3V15 5
0.22UF
BASEBAND
VDD_CORE_MAIN 10%
Y18 VDD_CORE_MAIN 1 C5719_RF 2 6.3V
CER-X5R
Y20 VDD_CORE_MAIN 0.1UF 01005
20% BASEBAND
6.3V
2 X5R-CERM
5 4 VDD_CORE_1V0 L6 VDD_CORE_3G VDD_LDO_DIGRF_PHY1 F1 VDD_IO_1V2 4 5 01005
M4 VDD_CORE_3G LDO_MON_DIGRF1 G4 BASEBAND
1 C5721_RF 1 C5726_RF NC 1 C5730_RF 1 C5732_RF 1 C5742_RF 1 C5743_RF
M5 VDD_CORE_3G VDD_LDO_DIGRF_PHY2 K2
1UF 0.1UF 1UF 0.1UF 0.1UF 0.1UF
20% 20% N6 VDD_CORE_3G LDO_MON_DIGRF2 D3 20% 20% 20% 20%
2 16V 2 6.3V NC 2 16V 2 6.3V 2 6.3V 2 6.3V
CER-X5R X5R-CERM P4 VDD_CORE_3G VDD_LDO_DIGRF_PHY3 K1 CER-X5R X5R-CERM X5R-CERM X5R-CERM BB_RF
0201 01005 0201 01005 01005 01005
BASEBAND BASEBAND R6 VDD_CORE_3G LDO_MON_DIGRF3 N4 BASEBAND BASEBAND BASEBAND BASEBAND PMB9943
NC
U6 VDD_CORE_3G VDD_LDO_DIGRF_PHY4 P1 WF2BGA
V4 VDD_CORE_3G LDO_MON_DIGRF4 R4 A10 VSS SYM 3 OF 9 VSS_USB AB3
NC
V5 VDD_CORE_3G VDD_LDO_USB_SSIC_MPHY P20 A14 VSS GROUND VSS_PLL V9
N18 A2 OMIT_TABLE W14
B6 LDO_MON_SSIC NC VSS VSS_PLL
5 4 VDD_CORE_1V0 VDD_CORE_LTE
VDD_LDO_PCIE T20 A4 VSS VSS_MPHY_1 E3
B7 VDD_CORE_LTE
1 C5722_RF 1 C5727_RF LDO_MON_PCIE T19 AA14 VSS VSS_MPHY_1 F3
C 1UF
20%
0.1UF
20%
C11
C8
VDD_CORE_LTE
VDD_PCIE_1V8 U20
NC
PP1V8_SDRAM 1 2 3 4 5 6 11 15 16
AA17 VSS VSS_MPHY_2 H3 C
VDD_CORE_LTE
2 16V
CER-X5R 2 6.3V
X5R-CERM D11
AA19 VSS VSS_MPHY_2 J3
0201 01005 VDD_CORE_LTE VPP Y8 NC
1 C5734_RF
AA8 M3
BASEBAND BASEBAND D9 0.1UF VSS VSS_MPHY_3
VDD_CORE_LTE A1 20% AB6 N3
DUMMY_BALL NC VSS VSS_MPHY_3
E11 VDD_CORE_LTE A20 2 6.3V
X5R-CERM AC10 R3
E9 DUMMY_BALL NC 01005 VSS VSS_MPHY_4
VDD_CORE_LTE AE1 BASEBAND B1 T3
F10 DUMMY_BALL NC VSS VSS_MPHY_4
VDD_CORE_LTE AE20 B12 P19
F11 DUMMY_BALL NC VSS VSS_MPHY_SSIC_TX
VDD_CORE_LTE BB_RF B2 N20
F12 VSS VSS_MPHY_SSIC_RX
VDD_CORE_LTE PMB9943 B3 T18
F13 WF2BGA VSS VSS_PCIE_TX
VDD_CORE_LTE B4
F9 AB11 CKE_MEM SYM 8 OF 9
AA13 VSS
VDD_CORE_LTE 3 BB_DDR_CKE VSS_EMIC B5 VSS VSS N10
G10 VDD_CORE_LTE ZQ_MEM D14 ZQ_MEM LPDDR2 RAM VSS_EMIC AB17
OMIT_TABLE C1 VSS VSS N11
G11 VDD_CORE_LTE VSS_EMIC AB18
D8 VSS VSS N12
H10 VDD_CORE_LTE VSS_EMIC AB19
E10 VSS VSS N13
H11 VDD_CORE_LTE 1 VSS_EMIC AB5
R5700_RF 5 4 VDD_IO_1V2 A7 BUS_SET_MEM E12 VSS VSS N14
H15 VDD_CORE_LTE 240 VSS_EMIC AC19
1% E13 VSS VSS N16
J10 VDD_CORE_LTE 1/32W 5 4 VDD_DDR_1V8 A16 VDD1_MEM VSS_EMIC AC4
MF E6 VSS VSS N17
J11 VDD_CORE_LTE 01005 A6 VDD1_MEM VSS_EMIC AC9
2 BASEBAND F14 VSS VSS N7
J12 VDD_CORE_LTE AB20 VDD1_MEM VSS_EMIC AD11
F2 VSS VSS N8
J13 VDD_CORE_LTE AE2 VDD1_MEM VSS_EMIC AD17
F7 VSS VSS N9
J5 VDD_CORE_LTE VSS_EMIC AD18
5 4 VDD_IO_1V2 A17 VDD2_MEM G13 VSS VSS P10
A5 VDD2_MEM G14 VSS VSS P11
AC20 VDD2_MEM G3 VSS VSS P12
AD1 VDD2_MEM G9 VSS VSS P15
H5 VSS VSS P17
K11 VDD_CORE_LTE AC13 VDDQ_MEM VSS_EMIC AD8
H6 VSS VSS P2
K13 AE18 C9
B K15
VDD_CORE_LTE
VDD_CORE_LTE AE4
VDDQ_MEM
VDDQ_MEM
VSS_EMIC
VSS_EMIC D10
H7 VSS VSS P3 B
H8 VSS VSS P6
K5 VDD_CORE_LTE AE7 VDDQ_MEM VSS_EMIC D12
H9 VSS VSS P7
K8 VDD_CORE_LTE VSS_EMIC G12
J16 VSS VSS P8
M10 VDD_CORE_LTE VSS_EMIC H12
K10 VSS VSS P9
M11 VDD_CORE_LTE VSS_EMIC H13
K16 VSS VSS R13
M13 VDD_CORE_LTE VSS_EMIC J15
K3 VSS VSS R15
M15 VDD_CORE_LTE VSS_EMIC K12
K6 VSS VSS R17
M8 VDD_CORE_LTE VSS_EMIC L13
K7 VSS VSS R7
5 4 VDD_CORE_1V0 M9 VDD_CORE_LTE VSS_EMIC M12
K9 VSS VSS T11
R12 VDD_CORE_LTE VSS_EMIC N15
1 C5717_RF 1 C5718_RF L16 VSS VSS T12
R9 VDD_CORE_LTE VSS_EMIC P13
1UF 1UF L19 VSS VSS T13
20% 20% AB7 VDD_CORE_DSP VSS_EMIC V15
2 16V
CER-X5R 2 16V
CER-X5R AB8
L3 VSS VSS T14
0201 0201 VDD_CORE_DSP AC14 L5 T15
BASEBAND BASEBAND U10 VSSQ_MEM VSS VSS
VDD_CORE_TD AE19 L7 T17
V10 VSSQ_MEM VSS VSS
AB7 U10 VDD_CORE_TD AE3 L8 T7
VSSQ_MEM VSS VSS
5 4 VDD_IO_1V2 W12 VDD_LDO_PLL VSSQ_MEM AE8 L9 VSS VSS U14
U12 LDO_MON_PLL M16 VSS VSS U17
NC BASEBAND M18 VSS VSS U19
11 6 5 4 3 2 1 PP1V8_SDRAM N19 VDD_RTC
16 15 M19 VSS VSS U3
16 5 2 VDD_SIM1 F20 VDD_SIM1
5 4 VDD_IO_1V2 M6 VSS VSS V17
CKPLUS_WAIVE=PWRTERM2GND G20 VDD_SIM2 M7 VSS VSS V19
11 6 5 4 3 2 1 PP1V8_SDRAM W8 VDD_MMC_IO 1 C5703_RF 1 C5704_RF 1 C5706_RF 1 C5708_RF 1 C5710_RF 1 C5711_RF 1 C5712_RF 1 C5741_RF
16 15
2.2UF 0.1UF 0.1UF 0.1UF 2.2UF 2.2UF 0.1UF 0.1UF BASEBAND
11 6 5 4 3 2 1 PP1V8_SDRAM AA6 VDD_IO18 20% 20% 20% 20% 20% 20% 20% 20%
16 15
AA9 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM 2 6.3V
X5R-CERM
1 C5713_RF 1 C5714_RF 1 C5700_RF 1 C5716_RF 1 C5723_RF 1 C5728_RF VDD_IO18 0201-1 01005 01005 01005 0201-1 0201-1 01005 01005
G8 VDD_IO18 BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND
A 1UF
20%
16V
0.1UF
20%
6.3V
0.47UF
10%
6.3V
0.47UF
10%
6.3V
0.1UF
20%
6.3V
0.1UF
20%
6.3V
J19 VDD_IO18 A
2 CER-X5R 2 X5R-CERM 2 CERM-X5R 2 CERM-X5R 2 X5R-CERM 2 X5R-CERM R10 PAGE TITLE
0201 01005 0201 0201 01005 01005 VDD_IO18
BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND BASEBAND R11
R8
VDD_IO18 5 4 VDD_DDR_1V8 BASEBAND POWER
VDD_IO18 1 C5705_RF 1 C5707_RF 1 C5709_RF 1 C5715_RF DRAWING NUMBER SIZE
R5701_RF
T8 VDD_IO18 2.2UF 0.1UF 0.1UF 0.1UF Apple Inc.
051-00542 D
10K 20% 20% 20% 20% REVISION
5 VDD_VREFCP 1 2 VREF_0V6 A18 VREF_0V6 2 6.3V 2 6.3V 2 6.3V 2 6.3V
1% 5 4 VDD_IO_1V2 AB13 VDD_LDO_CORE_EMIC
X5R-CERM
0201-1
X5R-CERM
01005
X5R-CERM
01005
X5R-CERM
01005
R
5.0.0
1/32W 1 C5702_RF BASEBAND BASEBAND BASEBAND BASEBAND NOTICE OF PROPRIETARY PROPERTY: BRANCH
MF AA11 LDO_MON_EMIC
01005 0.01UF 1 C5724_RF NC THE INFORMATION CONTAINED HEREIN IS THE
BASEBAND 10% PROPRIETARY PROPERTY OF APPLE INC.
2 6.3V 1UF BASEBAND THE POSESSOR AGREES TO THE FOLLOWING: PAGE
X5R 20%
01005
BASEBAND 2 16V
CER-X5R
57 OF 73
0201 SHEET
BASEBAND III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IV ALL RIGHTS RESERVED 57 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
BASEBAND PMIC
D D
BBPMU_RF
0.47UH-20%-4.8A-0.032OHM
L5800_RF
16 15 8 7 6 5 1 PP_VDD_MAIN B4 VSYS PMB6826 VMOD1LX D1 VMOD1LX 1 2 VDD_CORE_1V0 4 5
BBPMU
G4 VSYS BGA VMOD1LX D2 0805
VMOD1SENSE D3 VMOD1_FB 5
1.0UH-20%-3.2A-0.07OHM
L5801_RF
69 59 56 OUT
BBPMU_PWRGOOD E4 XG_PWRGOOD VMOD2LX A2 VMOD2LX 1 2 VRF_CORE_1V0 5 6
B6 BBPMU
69 54 53 IN
PMU_TO_BBPMU_ON PMIC_ON VMOD2LX B2 0805
69 55 54 53 IN
AP_TO_BBPMU_SDWN_L C4 SDWN* VMOD2SENSE B1 VMOD2_FB 5
2.2UH-20%-2.1A-0.155OHM
L5802_RF
69 56 OUT
BBPMU_XG_RESET_L F2 XG_RESET* VMOD3LX A7 VMOD3LX 1 2 VRF_ANA_1V3 5 6
BBPMU
69 56 OUT
BBPMU_XG_RESET_SD_L F6 XG_RESET_SD* VMOD3SENSE B7 VMOD3_FB 5 0805
4 VDD_USB_3V15 H4 VUSB_IO/GPIO1
1.0UH-20%-2.1A-0.128OHM
L5803_RF
1 C5821_RF VMOD4LX H2 VMOD4LX 1 2 VDD_IO_1V2 4 5
A4 BBPMU
2.2UF 56 IN
BBPMU_32K CLK_32K VMOD4SENSE G1 VMOD4_FB 5 0603
20%
2 6.3V I2C_BBPMU_SDA F3 I2CSDA VMOD5LX G8 VDD_DDR_1V8 4
X5R-CERM IN
0201-1 55 I2C_BBPMU_SCL F4 I2CSCL VMOD5SENSE G7
BBPMU BI
69 55 BBPMU_VDIO B3 VDIO VDD_VMOD1 E1 PP_VDD_MAIN 1 5 6 7 8 15 16

BI
VDD_VMOD1 E2
C 69 55 IN
BBPMU_VCLK D4 VCLK
VDD_VMOD2 A1 C
55 BBPMU_STBY G3 STBY VDD_VMOD4 H1
IN
VDD_VMOD3 A8
55 BBPMU_ALERT_L E3 ALERT* VDD_VMOD5 H8 PP1V8_SDRAM 1 2 3 4 5
1 C5811_RF
OUT 6 11 15 16
1UF
20%
C6 TESTENTRY VCHP_C+ C8 VCHP_CP 2 10V
X5R
NC
E7 ANAMON VCHP_C- D8 VCHP_CN 0201
BBPMU
BBPMU.C8/D8
5 BBPMU_AGND G2 VSSA VCHP C7 VDD_BBPMU_3V3 5
C3 VSSA VDD_CHP D7 PP1V8_SDRAM 1 2 3 4 5 6 11 15 16
2 D5 VSSA
XW5803_RF H5 VSSA VSIM1 G6 VDD_SIM1 2 4 16
OMIT
SHORT-10L-0.25MM-SM F7 VSSA VSIM2 H6 NC
1 H7 VSSA
E8 VRF A5 VFE_LNA_2V7 12 13
R5800_RF
VSSA 0.00
B8 VFE_AUX B5 VFE_AUX_3V1_R 1 2 VFE_AUX_3V1 8 9 11
VSSA
VREFCP F1 VDD_VREFCP 4 1%
1/20W
C1 VSS_VMOD1 MF
0201
C2 VSS_VMOD1 V1V8 F5 PP1V8_SDRAM 1 2 3 4 5 6 11 15 16
A3 VSS_VMOD2
A6 V3V3 C5 VDD_BBPMU_3V3 5
VSS_VMOD3
H3 VSS_VMOD4 VPMIC E5 VPMIC
F8 VSS_VMOD5
VOTP E6 VOTP
D6 VSS_CHP VPMICREF G5 VPMICREF
B 1 C5812_RF 1 C5813_RF 1 C5814_RF 1 C5815_RF 1 C5816_RF 1 C5817_RF 1 C5819_RF 1 C5820_RF B

0.22UF 1UF 2.2UF 1UF 10UF 10UF 0.22UF 4.7UF
10% 20% 20% 20% 20% 20% 10% 20%
2 6.3V
CER-X5R 2 10V
X5R 2 6.3V
X5R-CERM 2 10V
X5R 2 10V
X5R-CERM 2 10V
X5R-CERM 2 6.3V
CER-X5R 2 10V
X5R
5 BBPMU_AGND 01005 0201 0402 0201 0402-8 0402-8 01005 0402-1
BBPMU BBPMU BBPMU BBPMU BBPMU BBPMU BBPMU BBPMU
BBPMU.G5 BBPMU.F1
16 15 8 7 6 5 1 PP_VDD_MAIN PP1V8_SDRAM 1 2 3 4 5 6 11 15 16
1 C5822_RF 1 C5823_RF 1 C5809_RF 1 C5800_RF 1 C5802_RF 1 C5804_RF 1 C5808_RF 1 C5806_RF

100PF 27PF 15UF 15UF 15UF 15UF 15UF 15UF
5% 5% 20% 20% 20% 20% 20% 20%
2 16V
NP0-C0G 2 16V
NP0-C0G 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R
01005 01005 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1
BBPMU BBPMU BBPMU BBPMU BBPMU BBPMU BBPMU BBPMU
BBPMU.H1 BBPMU.E2 BBPMU.A1 BBPMU.A8 BBPMU.B4 BBPMU.H8
XW5804_RF
SHORT-20L-0.05MM-SM
5 4 VDD_CORE_1V0 1 2 VMOD1_FB 5
OMIT
XW5805_RF
SHORT-20L-0.05MM-SM
VRF_CORE_1V0 1 2 VMOD2_FB
6 5
OMIT
5
SELF TEST
XW5806_RF
SHORT-20L-0.05MM-SM XW5800_RF
VRF_ANA_1V3 1 2 VMOD3_FB SHORT-20L-0.05MM-SM
6 5 5
5 4 VDD_CORE_1V0 1 2 BBPMU_TO_PMU_AMUX1 53 54
OMIT OUT
XW5707_RF OMIT
SHORT-20L-0.05MM-SM
5 4 VDD_IO_1V2 1 2 VMOD4_FB 5 XW5801_RF
A OMIT
6 5 VRF_CORE_1V0
SHORT-20L-0.05MM-SM
1 2 BBPMU_TO_PMU_AMUX2 OUT 53 54 A
1 C5803_RF 1 C5805_RF 1 C5807_RF 1 C5810_RF 1 C5801_RF OMIT PAGE TITLE
20UF
20%
20UF
20%
20UF
20%
20UF
20%
20UF
20% XW5802_RF
BASEBAND PMIC
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R SHORT-20L-0.05MM-SM DRAWING NUMBER SIZE
0402
BBPMU
0402
BBPMU
0402
BBPMU
0402
BBPMU
0402
BBPMU 5 4 VDD_IO_1V2 1 2 BBPMU_TO_PMU_AMUX3 OUT 53 54
Apple Inc.
051-00542 D
OMIT REVISION
R
5.0.0

58 OF 73
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TRANSCEIVERS XCVR0_RF
PMB5750
BGA
SYM 5 OF 5
LAYOUT: TRACE SHOULD B1 ~1NH/1MM B3 VSS1 VSS39 U16
LAYOUT: TRACE SHOULD B1 ~1NH/1MM B9 VSS2 VSS40 U6
R5906_RF R5908_RF
0.00 0.00 C12 VSS3 VSS41 U8
6 5 VRF_ANA_1V3 1 2 6 VDD_XCVR0_1V3 6 5 VRF_ANA_1V3 1 2 6 VDD_XCVR1_1V3
C16 VSS4 VSS42 V3
1% 1%
1 C5944_RF 1/20W 1 C5904_RF 1 C5917_RF 1 C5929_RF 1 C5930_RF 1 C5931_RF 1 C5932_RF 1 C5933_RF 1 C5940_RF 1 C5941_RF 1 C5947_RF 1 C5948_RF 1 C5949_RF 1 C5945_RF 1/20W 1 C5911_RF 1 C5925_RF 1 C5934_RF 1 C5935_RF 1 C5936_RF 1 C5937_RF 1 C5938_RF 1 C5939_RF 1 C5942_RF 1 C5951_RF 1 C5952_RF C2 VSS5
MF MF
0.1UF 15UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.22UF 2.2UF 2.2UF 2.2UF 27PF 15UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.22UF 2.2UF 2.2UF
D 10%
2 6.3V
0201
XCVR 20%
2 6.3V
20%
6.3V
2 X5R-CERM
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
10%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
5%
2 16V
0201
XCVR 20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
20%
2 6.3V
10%
2 6.3V
20%
2 6.3V
20%
2 6.3V
C4
C8
VSS6
VSS7
D
CER-X5R X5R X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM CER-X5R X5R-CERM X5R-CERM X5R-CERM NP0-C0G X5R X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM CER-X5R X5R-CERM X5R-CERM
01005 0402-1 01005 01005 01005 01005 01005 01005 01005 01005 0201-1 0201-1 0201-1 01005 0402-1 01005 01005 01005 01005 01005 01005 01005 01005 0201-1 0201-1 D3 VSS8
XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR XCVR
NOSTUFF F15 VSS9
F3 VSS10
F5 VSS11
XCVR0_RF XCVR1_RF
F9 VSS12
PMB5750 PMB5750 H11
BGA BGA VSS13
XW5901_RF LAYOUT: MAX DCR 85MOHM XW5903_RF
LAYOUT: MAX DCR 85MOHM SHORT-0201 SYM 1 OF 5 SHORT-0201 SYM 1 OF 5 H15 VSS14
6 VDD_XCVR0_1V3 L14 VDD1V3_MPHY 6 VDD_XCVR1_1V3 L14 VDD1V3_MPHY
1 2 1 2 H3
6 5 VRF_CORE_1V0
OMIT
VRF_XCVR0_1V0
1 C5915_RF 1 C5918_RF
6
E14
H9
VDD1V3_CI SMARTI5 6 5 VRF_CORE_1V0
OMIT
VRF_XCVR1_1V0
1 C5922_RF
6
1 C5926_RF
E14
H9
VDD1V3_CI SMARTI5 H5
VSS15
VSS16
XCVR VDD1V3_TXPLL XCVR VDD1V3_TXPLL H7
0.47UF 0.1UF 0.47UF 0.1UF VSS17
N6 VDD1V3_RX1PLL N6 VDD1V3_RX1PLL
10% 20% 10% 20% J4 VSS18
6.3V
2 CERM-X5R 6.3V
2 X5R-CERM N14 VDD1V3_RX2PLL 2 6.3V 2 6.3V N14 VDD1V3_RX2PLL
CERM-X5R X5R-CERM K3 VSS19
0201 01005 K7 VDD1V3_RXMS 0201 01005 K7 VDD1V3_RXMS
XCVR XCVR XCVR XCVR L10 VSS20
NOSTUFF NOSTUFF
C6 VDD1V3_TXDIG L5901_RF C6 VDD1V3_TXDIG L12 VSS21
L5900_RF 600-OHM-25%-0.1A
600-OHM-25%-0.1A B1 VDD1V3_TXRF B1 VDD1V3_TXRF L4 VSS22
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM 1 2 VDD_XCVR1_1V8 6 L8 VSS23
15 11 6 5 4 3 2 1 PP1V8_SDRAM 1 2 VDD_XCVR0_1V8 6 R14 VDD1V3_RX2DCO R14 VDD1V3_RX2DCO
16 0201-1 M13 VSS24
0201-1
1 C5920_RF 1 C5921_RF N4 VDD1V3_RX1DCO 1 C5914_RF 1 C5928_RF N4 VDD1V3_RX1DCO M15 VSS25
15UF 0.1UF 15UF 0.1UF M3 VSS26
20% 20% D7 VDD1V3_TXDCO 20% 20% D7 VDD1V3_TXDCO
2 6.3V 6.3V
2 X5R-CERM 2 6.3V 2 6.3V P13 VSS27
X5R X5R X5R-CERM
0402-1 01005 U4 VDD1V3_RXRF 0402-1 01005 U4 VDD1V3_RXRF P3 VSS28
XCVR XCVR XCVR XCVR
R10 VSS29
C14 VDD1V3_TXMS C14 VDD1V3_TXMS
R5901_RF R5907_RF R12 VSS30
1
0.00 2 K15 1
0.00 2 K15 R6
6 5 1 PP_VDD_MAIN VDD_XCVR0_BAT 6 6 VRF_XCVR0_1V0 VDD1V0_DIG 16 15 8 7 6 5 1 PP_VDD_MAIN VDD_XCVR1_BAT 6 6 VRF_XCVR1_1V0 VDD1V0_DIG VSS31
16 15 8 7
1% 1% R8 VSS32
1 C5903_RF 1 C5912_RF 1/20W 1 C5916_RF 1 C5919_RF VDD_XCVR0_1V8 G14 VDD1V8_CI 1 C5924_RF 1 C5943_RF1/20W 1 C5923_RF 1 C5927_RF VDD_XCVR1_1V8 G14 VDD1V8_CI
C 100PF
5%
27PF
5%
MF
0201 0.47UF
10%
0.1UF
20%
6
T9 VDD1V8_RX 100PF
5%
27PF 0201
5%
MF
0.47UF
10%
0.1UF
20%
6
T9 VDD1V8_RX
T13
T3
VSS33 C
XCVR 6.3V 6.3V XCVR VSS34
2 16V
NP0-C0G 2 16V
NP0-C0G 2 CERM-X5R 2 X5R-CERM D5 VDD1V8_TX 2 16V
NP0-C0G 2 16V
NP0-C0G 2 6.3V
CERM-X5R 2 6.3V
X5R-CERM
D5 VDD1V8_TX T5 VSS35
01005 01005 0201 01005 01005 01005 0201 01005
XCVR XCVR XCVR XCVR 6 VDD_XCVR0_BAT D13 VDD_BAT XCVR XCVR XCVR XCVR 6 VDD_XCVR1_BAT D13 VDD_BAT U10 VSS36
NOSTUFF NOSTUFF
U12 VSS37
CEXT0_RX2PLL N12 CEXT_RX2PLL CELL_CLK_EN J12 SYSCLK_26MHZ_EN IN 55 CEXT1_RX2PLL N12 CEXT_RX2PLL CELL_CLK_EN J12 U14 VSS38
CEXT0_TXPLL J8 CEXT_TXPLL CELL_CLK J14 SYSCLK_26MHZ 55 69 CEXT1_TXPLL J8 CEXT_TXPLL CELL_CLK J14
OUT NC XCVR
CEXT0_RX1PLL P7 CEXT_RX1PLL CEXT1_RX1PLL P7 CEXT_RX1PLL
CEXT0_TXMAG B5 CEXT_TXMAG CEXT1_TXMAG B5 CEXT_TXMAG XCVR1_RF
PMB5750
54 53 BB_TO_NFC_CLK F13 FSYS_RF GPO0 J6 F13 FSYS_RF GPO0 J6 XCVR1_RFE_GPO0 61
BGA
1 C5900_RF 1 C5901_RF 1 C5902_RF 1 C5905_RF OUT NC 1 C5908_RF 1 C5909_RF 1 C5910_RF 1 C5913_RF NC OUT
SYM 5 OF 5
NFC_TO_BB_CLKREQ M11 FSYS_RF_EN_CLK_ON GPO1 K5 XCVR1_26MHZ_EN M11 FSYS_RF_EN_CLK_ON GPO1 K5
22NF 22NF 22NF 1UF 59 54 53 IN NC 22NF 22NF 22NF 1UF 59 OUT NC B3 VSS1 VSS39 U16
10% 10% 10% 20% 59 XCVR1_26MHZ G12 FSYS_C GPO2 L6 10% 10% 10% 20% 68 GNSS_26MHZ_CLKOUT G12 FSYS_C GPO2 L6
2 25V 2 25V 2 25V 2 10V
OUT NC 2 25V 2 25V 2 25V 2 10V
OUT NC B9 VSS2 VSS40 U6
CER-X5R CER-X5R CER-X5R X5R 59 XCVR1_26MHZ_EN E12 FSYS_C_EN GPO3 P11 XCVR0_TSYNC_OUT 6
CER-X5R CER-X5R CER-X5R X5R E12 FSYS_C_EN GPO3 P11 XCVR0_TSYNC_IN 6
0201 0201 0201 0201 IN 0201 0201 0201 0201 C12 VSS3 VSS41 U8
XCVR GPO4 N10 XCVR0_TSYNC_IN 6
XCVR GPO4 N10 XCVR0_TSYNC_OUT 6
C16 VSS4 VSS42 V3
55 DIGRF_M0_EN F11 MPHY_EN GPO5 T7 55 DIGRF_M1_EN F11 MPHY_EN GPO5 T7
IN NC IN NC C2 VSS5
55 DIGRF_A0_EN K11 MPHY2_EN GPO6 T11 55 DIGRF_A1_EN K11 MPHY2_EN GPO6 T11
IN NC IN NC C4 VSS6
69 59 58 56 IN
BBPMU_PWRGOOD K13 RESET_MAIN* 69 59 58 56 IN
BBPMU_PWRGOOD K13 RESET_MAIN* C8 VSS7
56 IN
XCVR0_RESET_L H13 RESET_TRX* 56 IN
XCVR1_RESET_L H13 RESET_TRX* D3 VSS8
F15 VSS9
59 XCVR0_JTAG_TMS K9 TMSC MI3 C10 59 XCVR1_JTAG_TMS K9 TMSC MI3 C10 F3 VSS10
BI NC BI NC
59 XCVR0_JTAG_TCK J10 TCKC MI4 D11 59 XCVR1_JTAG_TCK J10 TCKC MI4 D11 F5 VSS11
IN NC IN NC
F9 VSS12
55 OUT
90_DIGRF_M0_RX1_P G16 MPHY_RX1_DAT 55 OUT
90_DIGRF_M1_RX1_P G16 MPHY_RX1_DAT H11 VSS13
55 OUT
90_DIGRF_M0_RX1_N H17 MPHY_RX1_DATX 55 OUT
90_DIGRF_M1_RX1_N H17 MPHY_RX1_DATX H15 VSS14
55 OUT
90_DIGRF_M0_RX2_P E16 MPHY_RX2_DAT 55 OUT
90_DIGRF_M1_RX2_P E16 MPHY_RX2_DAT H3 VSS15
B 55 OUT
90_DIGRF_M0_RX2_N F17 MPHY_RX2_DATX 55 OUT
90_DIGRF_M1_RX2_N F17 MPHY_RX2_DATX H5 VSS16 B
55 IN
90_DIGRF_M0_TX_P J16 MPHY_TX_DAT RFFE_SDATA P9 RFFE1_DATA BI 59 60 61 62 64 65 69 55 IN
90_DIGRF_M1_TX_P J16 MPHY_TX_DAT RFFE_SDATA P9 RFFE1_DATA BI 59 60 61 62 64 H7 VSS17
65
55 IN
90_DIGRF_M0_TX_N K17 MPHY_TX_DATX RFFE_SCLK N8 RFFE1_CLK OUT 59 60 61 62 64 65 69 55 IN
90_DIGRF_M1_TX_N K17 MPHY_TX_DATX RFFE_SCLK N8 RFFE1_CLK OUT 59 60 61 62 64 J4 VSS18
65
RFFE_VIO M9 VDD_RFFE_VIO_1V8 OUT 59 60 61 62 64 65 66 RFFE_VIO M9 VDD_RFFE_VIO_1V8 OUT 59 60 61 62 64 K3 VSS19
55 OUT
90_DIGRF_A0_RX1_P P17 MPHY2_RX1_DAT 69 55 OUT
90_DIGRF_A1_RX1_P P17 MPHY2_RX1_DAT 65 66
L10 VSS20
55 OUT
90_DIGRF_A0_RX1_N N16 MPHY2_RX1_DATX RFFE2_SCLK M7 RFFE2_CLK_R 6 69 55 OUT
90_DIGRF_A1_RX1_N N16 MPHY2_RX1_DATX RFFE2_SCLK M7 RFFE2_CLK_R 6
L12 VSS21
55 OUT
90_DIGRF_A0_RX2_P T17 MPHY2_RX2_DAT RFFE2_SDATA M5 RFFE2_DATA_R 6 55 OUT
90_DIGRF_A1_RX2_P T17 MPHY2_RX2_DAT RFFE2_SDATA M5 RFFE2_DATA_R 6
L4 VSS22
55 OUT
90_DIGRF_A0_RX2_N R16 MPHY2_RX2_DATX 55 OUT
90_DIGRF_A1_RX2_N R16 MPHY2_RX2_DATX L8 VSS23
55 90_DIGRF_A0_TX_P M17 MPHY2_TX_DAT XO_SUP D17 XO_SUP 6 55 90_DIGRF_A1_TX_P M17 MPHY2_TX_DAT XO_SUP D17
IN IN NC M13 VSS24
55 IN
90_DIGRF_A0_TX_N L16 MPHY2_TX_DATX AFCDAC D15 AFC_DAC 6 55 IN
90_DIGRF_A1_TX_N L16 MPHY2_TX_DATX AFCDAC D15 NC M15 VSS25
XO B17 VCXO_26MHZ 6 XO B17 XCVR1_26MHZ 6
M3 VSS26
XCVR XCVR P13 VSS27
P3 VSS28
VCTCXO
R10 VSS29
R12 VSS30
R6 VSS31
R8 VSS32
VDD_XCVR1_1V8 6
R5903_RF
0.00 T13 VSS33
VDD_XCVR0_1V8 6 6 XO_SUP 1 2 XO_SUP_R
T3 VSS34
0%
1 1 1/32W 1 C5907_RF T5 VSS35
R5904_RF R5912_RF MF
27K 27K 01005 4700PF U10 VSS36
5% 5% XCVR 10% R6506_RF
1/32W 1/32W 6.3V
2 X5R VDD_RFFE_VIO_1V8 6 7 8 9 11 12 13 0.00 U12 VSS37
MF MF 6 RFFE2_CLK_R 1 2 RFFE2_CLK 66
01005 OUT U14 VSS38
2 01005
XCVR 2 01005
XCVR XCVR NFC_TO_BB_CLKREQ 1 6 0%
4
1/32W
VCC MF XCVR
XCVR0_JTAG_TMS 1 1 01005
6 R5902_RF R5905_RF
XCVR1_JTAG_TMS VTCXO_RF 4.7K 100K
A XCVR0_JTAG_TCK
6
6
26MHZ-6PPM-1.8V
1P6X1P2-SM
1%
1/32W
1%
1/32W R6508_RF
A
MF MF PAGE TITLE
XCVR1_JTAG_TCK 6
1 3 2 01005 2 01005 1
0.00 2
1 1
R5909_RF R5900_RF
6 AFC_DAC VCONT OUT
VCXO_26MHZ 6 XCVR
NOSTUFF
XCVR 6 RFFE2_DATA_R
0%
RFFE2_DATA BI 66
TRANSCEIVERS
1/32W DRAWING NUMBER SIZE
562K 562K 1 C5906_RF GND 1 C5950_RF MF
1% 1% XCVR NOTE: GNSS_CLK REQUESTED WITH AT@CMD 01005 051-00542 D
2
1/32W 1/32W 5600PF 18PF Apple Inc.

MF MF 10% 2% REVISION
2 01005 2 01005 2 10V 2 25V
XCVR XCVR CERM-X5R
01005
C0H-CERM
0201
R
5.0.0
XCVR XCVR NOTICE OF PROPRIETARY PROPERTY: BRANCH
NOSTUFF
59 OF 73
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
ET MODULATOR
D D
ALPES II ES2
XW6000_RF
SHORT-10L-0.25MM-SM
16 15 8 6 5 1 PP_VDD_MAIN 1 2 PP_VDD_MAIN_ET VPA_ET 61 62
OUT
OMIT
ET 1 C6000_RF 1 C6001_RF 1 C6002_RF 1 C6003_RF
2.2UF 1000PF 100PF 27PF
20% 10% 5% 5%
6.3V 10V 16V 16V
C 2 X5R-CERM
0201-1
2 X5R
01005
2 NP0-C0G
01005
2 NP0-C0G
01005 C
ET ET ET ET
VCC2 26
PVDD 3
ET_RF
QM81003M
69 61 50_ET_DAC_N 8 VRAMP- LGA
IN
69 61 50_ET_DAC_P 7 VRAMP+
IN
66 65 64 62 61 59 VDD_RFFE_VIO_1V8 15 VIO
IN
65 64 62 61 59 RFFE1_DATA 17 DATA
BI
65 64 62 61 59 RFFE1_CLK 16 CLK
IN
THERM
PAD
GND
ET
1
2
4
5
6
9
10
11
12
13
14
18
19
22
23
27
28
29
30
31
32
20
21
24
25
USID=0XC
B B
A A
PAGE TITLE
ET MODULATOR
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

60 OF 73
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
TDD TRANSMIT XW6100_RF

SHORT-10L-0.25MM-SM
2G PA
69 68 60 59 58 54 53 PP_VDD_MAIN 1 2 PP_VDD_MAIN_2G
IN
OMIT
1 C6102_RF 1 C6105_RF 1 C6112_RF 1 C6106_RF 1 C6103_RF
15UF 100PF 27PF 18PF 0.1UF
20% 5% 5% 2% 20%
2 6.3V
X5R 2 16V
NP0-C0G 2 16V
NP0-C0G 2 16V
CERM
6.3V
2 X5R-CERM
0402-1 01005 01005 01005 01005
RFFE RFFE RFFE RFFE RFFE
D D
C6100_RF
56PF R6100_RF
1 2 1
0.00 2
61 IN
50_XCVR0_2GLB_TX 50_XCVR0_2GLB_TX_T
11
4
0%
5% 1 1/32W
6.3V MF
NP0-C0G 01005 VBATT VCC
01005 XCVR L6109_RF
XCVR L6100_RF GSMPA_RF
3.0NH+/-0.1NH-0.6A
1.0NH+/-0.1NH-0.580A SKY77359
01005 1 2 50_2GMB_PA_OUT 62 1710-1910
XCVR 50_XCVR0_2GLB_TX_M 9 RFIN_LB_0 OUT
NOSTUFF 0201
LGA RFFE
2 50_XCVR1_2GLB_TX_M 10 RFIN_LB_1
1 C6107_RF 1 C6110_RF
61 IN
50_XCVR1_2GMB_TX 15 RFIN_MB_1 RFOUT_MB 8 50_2GMB_PA_OUT_M 0.5PF 18PF
+/-0.05PF 2%
C6101_RF 2 25V 2 25V
56PF R6101_RF 61 50_XCVR0_2GMB_TX 16 RFIN_MB_0 RFOUT_LB 1 50_2GLB_PA_OUT_M COG-CERM C0H-CERM
XCVR0_RF 0.00 IN 0201 0201
PMB5750 61 50_XCVR1_2GLB_TX 1 2 50_XCVR1_2GLB_TX_T 1 2 RFFE L6125_RF RFFE
IN NOSTUFF
BGA 0% 66 65 64 62 61 60 59 VDD_RFFE_VIO_1V8 14 VIO 1.0NH-+/-0.05NH-1.1A-0.04OHM
5% 1 IN
SYM 3 OF 5 1/32W
6.3V MF 65 64 62 61 60 59 RFFE1_DATA 12 SDATA 1 2 50_2GLB_PA_OUT 62 824- 915
NP0-C0G BI OUT
PADACFN A12 50_ET_DAC_N OUT 60 61 69
01005
01005
13 SCLK 0201
XCVR 65 64 62 61 60 59 IN
RFFE1_CLK
PADACFP B13 50_ET_DAC_P 60 61 69
XCVR L6101_RF RFFE
OUT
1.0NH+/-0.1NH-0.580A GND
EPAD 1 C6108_RF 1 C6111_RF
01005 1 C6109_RF
18PF 18PF
2
3
5
6
7
17
XCVR 3900PF 2% 2%
B11
TX2GHB
TX2GLB B7
50_XCVR0_2GMB_TX
50_XCVR0_2GLB_TX
OUT
OUT
61
61
1710-1910
824- 915 2
NOSTUFF 10%
2 6.3V
CERM-X5R
USID=0X5 2 25V
C0H-CERM
0201
2 25V
C0H-CERM
0201
TX25 A4 01005 RFFE RFFE
NC NOSTUFF NOSTUFF
NC A2 1 C6116_RF
NC
TXH A10 50_XCVR0_B3_B4_B1_B25_TX OUT 62 1710-1980 18PF
2%
TXL A8 50_XCVR0_LB_TX OUT 62 699- 915 2 16V
CERM
C XCVR
01005
NOSTUFF C
MB HB TDD S-PAD
9 7 VPA_ET VDD_RFFE_VIO_1V8 IN 59 60 61 62 64 65 66
RFFE1_DATA BI 59 60 61 62 64 65
1 C6115_RF 1C6104_RF
VFE_AUX_3V1 RFFE1_CLK
11 9 8 5
18PF 18PF IN 59 60 61 62 64 65
2% 2%
1 C6113_RF 1 C6114_RF 2 16V
CERM 2 16V
CERM
0.1UF 18PF 01005 01005
20% 2% RFFE RFFE
XCVR1_RF 2 6.3V 2 16V
X5R-CERM CERM
VBATT 11
VIO 14
SDATA 12
SCLK 13
PMB5750
VCC1 8
VCC2 9
01005 01005
BGA RFFE RFFE
SYM 3 OF 5 11 9 8 5 VFE_AUX_3V1
PADACFN A12 50_ET_DAC_N OUT 60 61 69
PADACFP B13 50_ET_DAC_P OUT 60 61 69
B TDDPA_RF
B
3
50_XCVR1_B34_B39_TX 3 RFIN_MB MB-HB-TDD-PAD

VDD 61 IN
TX2GHB B11 50_XCVR1_2GMB_TX 61 1710-1910 LGA-2
OUT SWTX1_RF 61 50_XCVR1_B38_B40_B41_TX 5 RFIN_HB
TX2GLB B7 50_XCVR1_2GLB_TX 61 814- 915 CXA4430GC-E IN
ANT 16 50_TDD_PAD_ANT 62
OUT OUT
TX25 A4 50_XCVR1_2P5G_TX 2 RFIN LGA RF1 4 50_XCVR1_B7_B30_TX 62 2305-2570
OUT
NC A2 RF2 6 50_XCVR1_B38_B40_B41_TX 61 2300-2690
NC OUT
TXH A10 50_XCVR1_B34_B39_TX 61 1880-2025 59 XCVR1_RFE_GPO0 1 CTRL
OUT IN
TXL A8 50_XCVR1_LB_TX OUT 62 699- 915
0 RFIN<->RF1 GND
XCVR
XCVR 1 RFIN<->RF2
5
63 50_XCVR1_B38_B40_B41_RX 27 RX_B38_B40_B41
OUT
63 50_XCVR1_B34_B39_RX 25 RX_B34_B39
OUT
GND THRM_PAD
1
2
4
6
7
10
15
17
19
21
22
24
26
28
23
20
18
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
RFFE
USID=0XF
A A
PAGE TITLE
TDD TRANSMIT
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

61 OF 73
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
FDD TRANSMIT
9 8 7 VPA_ET
VDD_RFFE_VIO_1V8 IN 59 60 61 62 64 65 66
11 9 8 5 VFE_AUX_3V1 1 C6204_RF 1 C6205_RF
RFFE1_DATA
18PF 39PF BI 59 60 61 62 64 65
1 C6201_RF 1 C6202_RF 2% 5% RFFE1_CLK 59 60 61 62 64 65
2 16V 2 16V
IN
0.1UF 18PF CERM NP0-C0G
20% 2% 01005 01005
2 6.3V
X5R-CERM 2 16V
CERM
RFFE RFFE
01005 01005
D D
VCC1 41
VCC2 40
VIO 10
RFFE RFFE
VBATT 7
SDATA 8
SCLK 9
LBPA_RF
2 L6202_RF
61 IN
50_XCVR0_LB_TX RFIN0 RF6110 1.5NH+/-0.1NH-1.0A
3 LGA 1 2
61 IN
50_XCVR1_LB_TX RFIN1 50_LAT_LB_M 50_LAT_LB BI 64 824-915
0201
18 OMIT_TABLE
61 IN
50_2GLB_PA_OUT 2G_TX 1 C6213_RF
65
63
OUT
OUT
50_LB_DRX
50_XCVR0_LB_RX
12
26
LB_DIV
LB_RX0
LB S-PAD ANT1 16
ANT2 14
L6201_RF
1.0PF
+/-0.1PF
2 25V
C0G
201
OMIT_TABLE
63 50_XCVR1_LB_RX 25 LB_RX1
3.3NH+/-0.1NH-0.5A
OUT
50_UAT_LB_M 1 2 50_UAT_LB 64 824-915
63 50_XCVR0_VLB_RX 24 VLB_RX0
BI
OUT 0201
23 OMIT_TABLE
63 OUT
50_XCVR1_VLB_RX VLB_RX1 1 C6214_RF
1.6PF
+/-0.05PF
GND THRM_PAD
2 25V
C0G-CERM
RFFE 0201
OMIT_TABLE
1
4
5
6
11
13
15
17
19
20
21
22
27
28
29
30
31
32
33
34
35
36
37
38
39
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
USID=0XD PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_HEAD
TABLE_5_ITEM
152S2021 1 IND, 1.5NH, 0201, UH-Q L6202_RF D101
C C
TABLE_5_ITEM
131S0278 1 CAP, 1.0PF, 0201, HQ C6213_RF D101

TABLE_5_ITEM
152S2004 1 IND, 3.3NH, 0201, UH-Q L6201_RF D101

TABLE_5_ITEM
131S0338 1 CAP, 1.6PF, 0201, HF C6214_RF D101

TABLE_5_ITEM
152S00151 1 IND, 0.8NH, 0201, UH-Q L6202_RF D111

TABLE_5_ITEM
131S0312 1 CAP, 1.2PF, 0201, HQ C6213_RF D111

TABLE_5_ITEM
152S2002 1 IND, 2.7NH, 0201, UH-Q L6201_RF D111

TABLE_5_ITEM
131S0338 1 CAP, 1.6PF, 0201, HF C6214_RF D111
9 8 7 VPA_ET
11 9 8 5 VFE_AUX_3V1 1 C6203_RF 1 C6200_RF

18PF 18PF
2% 2%
2 16V
CERM 2 16V
CERM VDD_RFFE_VIO_1V8 IN 59 60 61 62 64 65 66
01005 01005 RFFE1_DATA 59 60 61 62 64 65
RFFE RFFE BI
NOSTUFF NOSTUFF RFFE1_CLK IN 59 60 61 62 64 65
B B
29
37
38
26
28
27
VBATT
VCC1
VCC2
VIO
SDATA
SCLK
61 50_2GMB_PA_OUT 34 RFIN_GSM
IN
61 50_XCVR0_B3_B4_B1_B25_TX 31 RFIN_MB C6206_RF
IN
50_XCVR1_B7_B30_TX 32 MHBPA_RF 8PF
61 IN RFIN_HB 1 2
50_LAT_MB_HB_M 50_LAT_MB_HB
MB-HB-FDD BI 64
LGA 1 +/-0.05PF 1710-2690

61 50_TDD_PAD_ANT 7 TRX2 25V
IN C0G
63 50_XCVR1_B40B_NO_FILT_RX 8 TRX3 0201
OUT OMIT_TABLE
L6203_RF
ANT1 14 10NH-3%-0.3A
65 50_LAT_MB_HB_DRX 10 MB_HB_DRX 0201
OUT
11 OMIT_TABLE
63 OUT
50_XCVR0_2GMB_RX DCS_PCS_RX
ANT2 13 2
63 50_XCVR0_B1_B4_RX 1 RX_B1
OUT
63
63
63
63
OUT
OUT
OUT
OUT
50_XCVR0_B3_RX
50_XCVR1_B7_RX
50_XCVR0_B4_RX
50_XCVR0_B25_RX
3
5
17
19
RX_B3
RX_B7
RX_B4
RX_B25
MB/HB S-PAD 50_UAT_MB_HB_M 1
L6200_RF
1.2NH-+/-0.05NH-1.1A-0.04OHM
0201
OMIT_TABLE
2 50_UAT_MB_HB BI 64 1710-2690
63 50_XCVR1_B30_RX 21 RX_B30 1 C6212_RF

OUT
18PF
GND EPAD 2%
2 25V
C0H-CERM
0201
2
4
12
15
16
18
20
22
23
24
25
30
33
35
36
39
40
41
42
6
9
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
OMIT
A
USID=0XE PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION
TABLE_5_HEAD
131S00068 1 CAP, 8.0PF, 0201, HQ C6206_RF D101

TABLE_5_ITEM
A
PAGE TITLE
152S2041 1 IND, 10NH, 0201, UH-Q L6203_RF D101

TABLE_5_ITEM
FDD TRANSMIT
DRAWING NUMBER SIZE
TABLE_5_ITEM
152S00157 1 IND, 1.2NH, 0201, UH-Q L6200_RF D101

Apple Inc.
051-00542 D
NOSTUFF C6212_RF D101 REVISION
131S00068 1 CAP, 8.0PF, 0201, HQ C6206_RF D111

TABLE_5_ITEM
R
5.0.0
TABLE_5_ITEM
152S00020 1 IND, 12NH, 0201, UH-Q L6203_RF D111 THE INFORMATION CONTAINED HEREIN IS THE
TABLE_5_ITEM
152S2021 1 IND, 1.5NH, 0201, UH-Q L6200_RF D111 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
62 OF 73
NOSTUFF C6212_RF D111 III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
PRIMARY RECIEVE
L6300_RF
22NH-3%-0.25A
10 50_XCVR0_VLB_RX_M 1 2 50_XCVR0_VLB_RX 62
IN
0201
XCVR L6308_RF
15NH-3%-0.3A-0.7OHM
D 10 50_XCVR1_VLB_RX_M 1 2 50_XCVR1_VLB_RX IN 62 D
0201
L6301_RF XCVR 1
10NH-+/-3%-0.25A
10 50_XCVR0_LB_RX_M 1 2 50_XCVR0_LB_RX 62 L6326_RF
IN
01005 18NH+/-3%-0.250A
XCVR 1 0201
XCVR
NOSTUFF
L6317_RF 2
9.1NH-3%-0.17A-1.7OHM L6309_RF
01005 8.2NH-3%-0.3A
XCVR
NOSTUFF 1 2
10 50_XCVR1_LB_RX_M 50_XCVR1_LB_RX IN 62
2 0201
XCVR 1
L6327_RF
18NH+/-3%-0.250A
XCVR PRX XCVR PRX L6312_RF

2
0201
XCVR
XCVR1_RF 1.8NH+/-0.1NH-0.8A
XCVR0_RF PMB5750 50_XCVR1_B30_RX_M 50_XCVR1_B30_RX
10 IN 62
PMB5750 BGA
SYM 2 OF 5 0201
BGA XCVR
SYM 2 OF 5 FBRRF1 A16 50_XCVR1_LAT_CPLR IN 64
FBRRF1 A16 50_XCVR0_LAT_CPLR IN 64 FBRRF2 A14 50_XCVR1_UAT_CPLR IN 64

L6303_RF L6328_RF
FBRRF2 A14 50_XCVR0_UAT_CPLR IN 64 VSS B15 2.4NH+/-0.1NH-0.6A
0.00
VSS B15 10 50_XCVR0_B1_B4_RX_M 1 2 50_XCVR0_B1_B4_RX IN 62 0201
XCVR
1%
C W2
1/20W
MF
1 RX1 W2
V1
50_XCVR1_B7_RX_M 10 2620-2690 C
RX1 50_XCVR0_B3_RX_M 10 1805-1880 0201 RX2 50_XCVR1_B30_RX_M 10 2350-2360
XCVR L6313_RF
RX2 V1 50_XCVR0_GSM1900_RX_M 10 1930-1990 C6301_RF RX3 U2 1.3NH+/-0.1NH-600MA
RX3 U2 3.3NH+/-0.1NH-0.45A RX4 T1 50_XCVR1_B38_B40_B41_RX_M 10 2300-2690
0201 10 50_XCVR1_B7_RX_M 1 2 50_XCVR1_B7_RX 62
T1 R2 IN
RX4 50_XCVR0_B4_RX_M 10 2110-2155 RX5 50_XCVR1_LB_RX_M 10 852- 960
XCVR 0201
RX5 R2 50_XCVR0_GSM1800_RX_M 10 1805-1880 RX6 P1 50_XCVR1_B40B_NO_FILT_RX_M 10 2300-2400 1 XCVR
2
RX6 P1 50_XCVR0_B1_B4_RX_M 10 2110-2170 RX7 N2
RX7 N2 RX8 M1 50_XCVR1_VLB_RX_M 10 717- 821 L6325_RF
RX8 M1 50_XCVR0_B25_RX_M 10 1930-1995 RX9 L2 1.8NH+/-0.1NH-600MA
L6304_RF 0201
RX9 L2 0.7NH-+/-0.05NH-1.1A-0.04OHM RX10 K1 50_XCVR1_B34_B39_RX_M 10 1880-2025 XCVR
RX10 K1 50_XCVR0_VLB_RX_M 10 717- 821 RX11 J2
10 50_XCVR0_B4_RX_M 1 2 50_XCVR0_B4_RX 62 2
J2 IN H1
RX11 0201 RX12
1 L6314_RF
RX12 H1 50_XCVR0_LB_RX_M 10 852- 960 XCVR RX13 G2 0.6NH-+/-0.05NH-1.1A-0.04OHM
RX13 G2 RX14 F1
10 50_XCVR1_B38_B40_B41_RX_M 50_XCVR1_B38_B40_B41_RX IN 61
RX14 F1 L6322_RF RX15 E2
0201
RX15 E2 2.4NH+/-0.1NH-0.6A RX16 D1 XCVR
0201
RX16 D1 XCVR
XCVR
L6302_RF
XCVR 2 1.8NH+/-0.1NH-0.8A
L6310_RF 0201
1.2NH-+/-0.05NH-1.1A-0.04OHM XCVR
10 50_XCVR0_B25_RX_M 1 2 50_XCVR0_B25_RX 62
IN
0201 L6315_RF
XCVR 1
3.0NH+/-0.1NH-0.6A
10 50_XCVR1_B34_B39_RX_M 50_XCVR1_B34_B39_RX IN 61
L6323_RF 0201
2.4NH+/-0.1NH-0.6A XCVR
0201
B XCVR
L6329_RF
B
2 5.6NH+/-3%-0.4A
R6300_RF 0201
XCVR
3.6NH+/-0.1NH-400MA
10 50_XCVR0_B3_RX_M 50_XCVR0_B3_RX IN 62
0201
1 L6316_RF
NOSTUFF 3.3NH+/-0.1NH-0.5A
L6324_RF 10 50_XCVR1_B40B_NO_FILT_RX_M 50_XCVR1_B40B_NO_FILT_RX IN 62
3.6NH+/-0.1NH-400MA 0201
0201 XCVR 1 C6315_RF
XCVR 2.7PF
+/-0.05PF
2 2 25V
C0G-CERM
0201
XCVR
L6305_RF
0.6NH-+/-0.05NH-1.1A-0.04OHM
10 50_XCVR0_GSM1800_RX_M
0201
XCVR GSMDI_RF
GSM1800-1900
B8856
L6318_RF LGA
3.0NH+/-0.1NH-0.6A
0201
XCVR 50_XCVR0_GSM1800_RX 4 GSM1800
COMMON 1 50_XCVR0_2GMB_RX IN 62
50_XCVR0_GSM1900_RX 3 GSM1900
1
A L6306_RF GND
L6307_RF
3.6NH+/-0.1NH-0.5A A
1.3NH+/-0.1NH-1.1A 0201 PAGE TITLE
2
5
6
10 50_XCVR0_GSM1900_RX_M
0201
XCVR
PRIMARY RECEIVE
2 DRAWING NUMBER SIZE
XCVR
Apple Inc.
051-00542 D
REVISION
L6319_RF
3.0NH+/-0.1NH-0.6A
R
5.0.0
XCVR
63 OF 73
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
LOWER ANTENNA AND COUPLER
D LOWER ANTENNA COUPLER D
R6400_RF
LATDI_RF 0.00
DPX202690DT-4190A1SJ 11 9 8 5 VFE_AUX_3V1 1 2 VFE_AUX_3V1_LATCP
0805 0%
R6401_RF 1/32W 1 C6409_RF 1 C6410_RF 1 C6411_RF
6 0.00 MF
0.1UF 18PF 0.1UF
62 BI
50_LAT_MB_HB HI COM 2 50_LAT_LB_MB_HB_M 1 2 01005
20% 2% 20%
4
1% 2 6.3V
X5R-CERM 2 16V
CERM 2 6.3V
X5R-CERM
62 BI
50_LAT_LB LO 1/20W 01005 01005 01005
1 C6403_RF MF JLAT1_RF
RFFE RFFE RFFE
9
0201 MM7829-2700
GND 0.2PF RFFE NOSTUFF
RFFE +/-0.05PF F-ST-SM
VDD
2 25V
1
3
5
COG-CERM 2
0201 LATCP_RF C6402_RF
RFFE DUAL-COUPLER-MOD 56PF
50_LAT_LB_MB_HB 1 RFIN1 LGA RFOUT1 2 50_LAT1_CPL 1 2 50_LAT1_ANT 1
13 RFIN2 RFOUT2 14
NC NC 5% 1 RFFE
FL6400_RF 25V 3
6 USID NP0-C0G-CERM
10-OHM-1.1A 01005
1 2 5 VIO 4 L6400_RF
13 12 11 9 8 7 6 VDD_RFFE_VIO_1V8 VDD_RFFE_VIO_LATCP RF_CPL1 50_XCVR0_LAT_CPLR 63
OUT 56NH-100MA-3.9OHM
01005 65 64 62 61 60 59 RFFE1_DATA 12 SDATA RF_CPL2 16 50_XCVR1_LAT_CPLR 63 0201
BI OUT
1 C6401_RF 1 C6405_RF 1 C6407_RF 8 SCLK UP_RFFE
59 IN
RFFE1_CLK
27PF 0.033UF 5.0PF 62 61 60
64 FOR ESD AND LOW FREQUENCY IMD
5% 20% +/-0.1PF 65 2
GND
2 16V
NP0-C0G 2 4V
X5R-CERM 2 16V
NP0-C0G
01005 01005 01005 RFFE
3
7
10
11
15
C USID=0X6 C
UPPER ANTENNA COUPLER

11 9 8 5 VFE_AUX_3V1
B
B 1 C6406_RF
18PF
2%
1 C6408_RF
0.1UF
20% TUNER GPO
9
2 16V
CERM 2 6.3V
X5R-CERM
VDD 01005 01005
RFFE RFFE
UATCP_RF
DUAL-COUPLER-MOD 16 15 6 5 4 3 2 1 PP1V8_SDRAM
62 50_UAT_MB_HB 1 RFIN1 LGA RFOUT1 2 50_UAT_MB_HB_SOUTH 53 54
BI BI 1 C6414_RF 1 C6415_RF
62 50_UAT_LB 13 RFIN2 RFOUT2 14 50_UAT_LB_SOUTH 53 54
BI BI 0.01UF 33PF
FL6401_RF 10% 5% GPIO_RF
6 USID 2 6.3V 2 16V
10-OHM-1.1A X5R NP0-C0G-CERM QM18064
01005 01005
13 12 11 9 8 7 6 VDD_RFFE_VIO_1V8 1 2 VDD_RFFE_VIO_UATCP 5 VIO RF_CPL1 4 50_XCVR0_UAT_CPLR 63
WLCSP
OUT A3 VIO A4
GPO1 LAT_TUNER_GPO1 53 54
01005 65 64 62 61 60 59 RFFE1_DATA 12 SDATA RF_CPL2 16 50_XCVR1_UAT_CPLR 63
OUT
BI OUT B1
GPO2 LAT_TUNER_GPO2 53 54
65 64 62 61 60 59 RFFE1_CLK 8 SCLK OUT
IN B2
GPO3 LAT_TUNER_GPO3 OUT 53 54
65 RFFE1_CLK_FILT
54 BB_TO_LAT_ANT_SCLK-53[I275] A1 SCLK
1 C6400_RF 1 C6404_RF IN B4
GND GPO4 UAT_TUNER_GPO OUT 53 54
0.033UF 5.0PF 65 54 RFFE1_DATA_FILT
BB_TO_LAT_ANT_DATA-53[I275]
BI
A2 SDATA
20% +/-0.1PF RFFE
2 4V 2 16V
3
7
10
11
15
X5R-CERM NP0-C0G
01005 01005
NOSTUFF 1 C6412_RF 1 C6413_RF GND
0.1UF 0.1UF
USID=0X7
B3
20% 20%
2 6.3V 2 6.3V
X5R-CERM
01005
RFFE
X5R-CERM
01005
RFFE
USID=0X8
NOSTUFF NOSTUFF
A A
PAGE TITLE
LOWER ANTENNA & COUPLERS

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

64 OF 73
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DIVERSITY RECEIVE ASM'S
D D
LB DRX ASM
13 12 5 VFE_LNA_2V7
XCVR0_RF
PMB5750 1 C6503_RF 1 C6501_RF
BGA
SYM 4 OF 5 18PF 0.1UF
2% 20%
9
RD1 W4 50_XCVR0_B1_B4_DRX 12 2 16V
CERM 2 6.3V
X5R-CERM
V5 VDD 01005 01005
RD2 RFFE RFFE R6500_RF
RD3 W6 50_XCVR0_B3_B25_DRX 12 LBDR_RF 0.00
12 50_XCVR0_VLB_DRX 2 VLB_RX0 ANT 16 50_LB_DRX_M 1 2 50_LB_DRX
RD4 V7 D5325 IN 62
12 50_XCVR1_VLB_DRX 12 VLB_RX1 LGA 1%

RD5 W8 1 C6504_RF 1/20W
50_XCVR0_LB_DRX 3 LB_RX0 MF
RD6 V9
12
18PF 0201
12 50_XCVR1_LB_DRX 11 LB_RX1 2% RFFE
RD7 W10 2 25V
C0H-CERM
RD8 V11 0201
65 VDD_RFFE_VIO_FILT_1V8 5 VIO RFFE
W12 IN NOSTUFF
RD9 7 SDATA
65 64 54 RFFE1_DATA_FILT
BI
RD10 V13
65 64 54 RFFE1_CLK_FILT
BB_TO_LAT_ANT_SCLK-53[I275]
6 SCLK
W14 IN
RD11
GND EPAD
RD12 V15 50_XCVR0_LB_DRX 12
RD13 W16
1
4
8
10
13
14
15
17
18
19
20
21
RD14 V17 50_XCVR0_VLB_DRX 12
XCVR
USID=0X9
C C
MB HB DRX ASM
13 12 5 VFE_LNA_2V7
BYPASSING SHARED WITH LB DRX ASM
18
XCVR1_RF
2 VDD
PMB5750 12 50_XCVR0_B3_B25_DRX B3_B25
BGA 12 50_XCVR0_B1_B4_DRX 3 B1_B4 MHBDR_RF
SYM 4 OF 5 15 D5313
12 50_XCVR1_B40_B30_DRX B30_B40
RD1 W4 50_XCVR1_VLB_DRX 12 LGA
12 50_XCVR1_B7_B41_B38_DRX 16 B7_B41_B38
RD2 V5
12 50_XCVR1_B34_DRX 13 B34 R6501_RF
RD3 W6 50_XCVR1_LB_DRX 12 0.00
12 50_XCVR1_B39_DRX 14 B39 ANT1 10 50_LAT_MB_HB_DRX_M 1 2 50_LAT_MB_HB_DRX 62
V7 IN
RD4
1%
RD5 W8 50_XCVR1_B7_B41_B38_DRX 12 65 VDD_RFFE_VIO_FILT_1V8 22 VIO 1 C6505_RF 1/20W
ANT2 8
IN
MF
RD6 V9 50_XCVR1_B40_B30_DRX 12 65 64 54 RFFE1_DATA_FILT
BI
20 SDATA 18PF 0201
2% RFFE
RD7 W10 65 64 54 RFFE1_CLK_FILT
BB_TO_LAT_ANT_SCLK-53[I275]
21 SCLK 2 25V
IN C0H-CERM
RD8 V11 GND THRM_PAD 0201
RFFE
RD9 W12 NOSTUFF
B B
1
4
5
6
7
9
11
12
17
19
23
24
25
26
RD10 V13 50_XCVR1_B39_DRX 12
R6502_RF
W14 1
0.00 2
RD11 50_UAT_MB_HB_DRX_M 50_UAT_MB_HB_DRX IN 66
V15
RD12
RD13 W16
50_XCVR1_B34_DRX 12
USID=0XA 1 C6506_RF
18PF
1%
1/20W
MF
0201
RD14 V17 2% RFFE
2 25V
C0H-CERM
XCVR 0201
RFFE
NOSTUFF
RFFE FILTERING
R6503_RF
1
0.00 2
66 64 62 61 60 59 IN
VDD_RFFE_VIO_1V8 VDD_RFFE_VIO_FILT_1V8 OUT 65
0%
1 C6500_RF 1/32W
MF
1000PF 01005
10% RFFE
2 6.3V
X5R-CERM
01005
R6504_RF
1
0.00 2
64 62 61 60 59 BI
RFFE1_DATA RFFE1_DATA_FILT BI BB_TO_LAT_ANT_DATA-53[I275]
54 64 65
0%
1 C6507_RF 1/32W
MF
5.0PF 01005
+/-0.1PF RFFE
2 16V
NP0-C0G
A 01005
A
PAGE TITLE
R6505_RF
64 62 61 60 59 IN
RFFE1_CLK 1
0.00 2 RFFE1_CLK_FILT OUT BB_TO_LAT_ANT_SCLK-53[I275]
54 64 65
DIVERSITY RECEIVE ASM'S
DRAWING NUMBER SIZE
0%
1 C6508_RF 1/32W
MF Apple Inc.
051-00542 D
5.0PF 01005 REVISION
+/-0.1PF RFFE
2 16V
NP0-C0G
R
5.0.0

65 OF 73
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
DIVERSITY RECEIVE LNAS

12 5 VFE_LNA_2V7 1
L6602_RF
120NH-5%-40MA
0201
UP_RFFE
2 VFE_LNA_FILT_2V7 13 LB DRX LNA
13 VFE_LNA_FILT_2V7
BYPASS SHARED WITH MB/HB DRX LNA
10
D VDD
13 50_UUAT_LB_TXRX 3 TX_RX LBLN_RF ANT 14 50_UUAT_LB 67

BI
SKY13702-17
LGA
13 12 11 9 8 7 6 VDD_RFFE_VIO_1V8 9 VIO
13 1 UAT_TUNER_RFFE_DATA 7 SDATA
13 1 UAT_TUNER_RFFE_CLK 8 SCLK
GND EPAD
1 C6617_RF 1 C6619_RF 1 C6620_RF
18PF 18PF 0.033UF
1
2
4
5
6
11
12
13
15
16
17
18
19
20
21
22
23
24
25
2% 2% 20%
2 16V
CERM 2 16V
CERM 2 4V
X5R-CERM
01005 01005 01005
UP_RFFE
NOSTUFF
UP_RFFE
NOSTUFF
USID=0X2
C
54 53 BI
50_UAT_MB_HB_WEST 1
R6605_RF
0.00 2 50_UUAT_MB_HB_TX 13
MB/HB DRX LNA 13 VFE_LNA_FILT_2V7
C
1%
1/20W 1 C6625_RF 1 C6629_RF
MF 1 C6613_RF
0201 18PF 0.1UF
UP_RFFE 18PF 2% 20%
2 16V 2 6.3V
20
2%
2 25V
C0H-CERM
CERM
01005
X5R-CERM
01005
0201 VDD UP_RFFE UP_RFFE
UP_RFFE
NOSTUFF MHBLN_RF
50_UUAT_MB_HB_TX 4 IN_TX ANT 16 50_UUAT_MB_HB
13
SKY13703-19 BI 67
12 50_UAT_MB_HB_DRX 2 OUT_RX LGA
R6606_RF 66 65 64 62 61 60 59 VDD_RFFE_VIO_1V8 21 VIO

IN
1
0.00 2 23
54 53 BI
50_UAT_LB_NORTH 50_UUAT_LB_TXRX 13 66 54 53 BI
UAT_TUNER_RFFE_DATA SDATA
1% 66 54 53 UAT_TUNER_RFFE_CLK 22 SCLK
IN
1/20W
MF 1 C6614_RF GND EPAD
0201
UP_RFFE 0.5PF
+/-0.05PF
1
3
5
6
7
8
9
10
11
12
13
14
15
17
18
19
24
25
26
27
28
2 25V
COG-CERM
0201
UP_RFFE
NOSTUFF USID=0X3
B B
RFFE2 IMPEDANCE MATCHING

R6600_RF
1
0.00 2
59 IN
RFFE2_CLK UAT_TUNER_RFFE_CLK 1 13
0%
1/32W
MF
01005
R6601_RF
1
0.00 2
59 BI
RFFE2_DATA UAT_TUNER_RFFE_DATA 1 13
0%
1/32W
MF
01005
A A
PAGE TITLE
DIVERSITY RECEIVE LNA'S

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

66 OF 73
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
UPPER ANTENNA FEEDS
D D
66 BI
50_UUAT_LB 1
1%
R6708_RF
1/20W
MF
0201
0.00 2 50_UUAT_LB_PLEXER
1 C6726_RF
UAT1
OMIT_TABLE 0.5PF JUAT1_RF
+/-0.05PF
25V
2 COG-CERM MM8830-2600B
0201 F-RT-SM
OMIT_TABLE QUADP_RF
10 LB ACFM-W512-AP1 L6704_RF
C6707_RF
L6702_RF LGA 6.8PF 2.3NH-+/-0.1NH-0.6A-0.12OHM TO ANTENNA FEED
0.00 14
66 IN
50_UUAT_MB_HB 50_UUAT_HB_PLEXER MB-HB ANT 5 50_UAT1 1 2 50_UAT1_M 1 2 50_UAT1_TEST 1 2 50_UAT1_TUNER BI 53 54
1 C R
1% WIFI 0201
1/20W +/-0.1PF 1 OMIT_TABLE
MF 1 17 GNSS 25V
0201 C0G
0201 GND
OMIT_TABLE OMIT_TABLE 1 C6728_RF
L6703_RF UP_RFFE
3
L6705_RF 11NH-3%-0.3A 0.6PF
12NH-3%-0.3A-0.5OHM 0201 +/-0.05PF
0201 GND OMIT_TABLE 25V
2 CERM
EPAD
OMIT 0201
OMIT_TABLE
2
3
4
6
7
8
9
11
12
13
15
16
18
19
2
2
C FOR ESD AND LOW FREQUENCY IMD
C
R6711_RF
1
0.00 2
54 53 BI
50_UAT_WLAN_2G_WEST 50_UAT_WLAN_2G_PLEXER
1%
1/20W 1
MF TABLE_5_HEAD
0201 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION

UP_RFFE
OMIT C6729_RF TABLE_5_ITEM
MATCHING CONTROLLED BY WIFI_MLB 9.1NH+/-0.3%-0.3A 131S0424 1 CAP, 6.8PF, 0201, HQ C6707_RF D101
0201 TABLE_5_ITEM
UP_RFFE 152S00305 1 IND, 11NH, 0201, UH-Q L6703_RF D101

OMIT TABLE_5_ITEM
2 152S00056 1 IND, 2.3NH, 0201, UH-Q L6704_RF D101

TABLE_5_ITEM
R6709_RF 131S0363 1 CAP, 0.6PF, 0201, HQ C6728_RF D101
1
0.00 2
TABLE_5_ITEM
68 OUT
50_GNSS 50_GNSS_PLEXER 131S0349 1 CAP, 6.2PF, 0201, HQ C6707_RF D111
1% TABLE_5_ITEM
1/20W 152S00305 1 IND, 11NH, 0201, UH-Q L6703_RF D111

MF 1 C6727_RF
0201 TABLE_5_ITEM
UP_RFFE 18PF 152S2036 1 IND, 2.5NH, 0201, UH-Q L6704_RF D111

2%
25V
2 C0H-CERM TABLE_5_ITEM
0201 131S0363 1 CAP, 0.6PF, 0201, HQ C6728_RF D111

UP_RFFE
NOSTUFF
TABLE_5_HEAD

TABLE_5_ITEM
118S0724 1 RES, 0OHM, 0201 R6708_RF D101

TABLE_5_ITEM
B 131S0425 1 CAP, 0.5PF, 0201, HQ C6726_RF D101

TABLE_5_ITEM
B
118S0724 1 RES, 0OHM, 0201 L6702_RF D101
TABLE_5_ITEM
152S00020 1 IND, 12NH, 0201, UH-Q L6705_RF D101

TABLE_5_ITEM
118S0724 1 RES, 0OHM, 0201 R6708_RF D111

TABLE_5_ITEM
131S0425 1 CAP, 0.5PF, 0201, HQ C6726_RF D111

TABLE_5_ITEM
118S0724 1 RES, 0OHM, 0201 L6702_RF D111

TABLE_5_ITEM
152S00020 1 IND, 12NH, 0201, UH-Q L6705_RF D111
A A
PAGE TITLE
UPPER ANTENNA FEEDS

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

67 OF 73
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
GNSS LNA + RECEIVER
D D
GNSS_RF
BCM47734
L6800_RF
WLBGA 120NH-5%-40MA
G1 TMO GNSS_TCXO A3 GNSS_26MHZ_TCXO 15 15 VDD_GNSS_AUX_1V8 1 2 VGNSS_LNA_L
0201
& BLANKING
TEST MODE PIN CNTIN A4 GNSS_26MHZ_CLKOUT GNSS
CLOCKING
IN 59
1 C6803_RF
GPIO_18/SYNC B5 AP_TO_GNSS_TIME_MARK IN 53 54 69
0.1UF
I2S & JTAG INTERFACE GFIL_RF 20%
7
A7 GPIO_04/I2S_MCLK CLK32 E3 TCXO_BB_GNSS_32K 56 69 GPS-GNSS 2 6.3V
NC IN X5R-CERM
SAFGB1G56XA0F57 VDD 01005
B7 GPIO_05/I2S_LRCI L6801_RF GNSS
NC 7.5NH+/-0.3%-0.4A LGA GLNA_RF
GNSS RF & ANALOG SKY65766-13
54 53 AP_TO_GNSS_DEVICE_WAKE C7 GPIO_06/I2S_BCLK GNSS_RFIN B1 50_GNSS_RFIN 1 2 50_GNSS_SAW 4 UNBAL_PRT UNBAL_PRT 1 50_UUAT_GNSS 9 RFOUT LGA RFIN 1 50_GNSS 67
IN IN
0201
D7 GPIO_07/I2S_SDI GNSS_AUX_OUT B3 GNSS_IF_TEST_OUT 69
GNSS GND LNA_EN 3 GNSS_EXT_LNA_EN 15 16
NC OUT 1 C6802_RF
GND
1.5PF GNSS
6
5
3
2
69 54 53 UART_GNSS_TO_AP_RXD F7 GPIO_00/HOST_SPI_CLK/ GPIO_10/UART1_RTS* C6 +/-0.1PF GNSS
OUT NC 2 16V
8
6
5
4
2
UART0_TXD/I2CS_SCL NP0-C0G
G7 GPIO_01/HOST_SPI_FSS/ GPIO_11/UART1_CTS* D6 NC 01005
UART_AP_TO_GNSS_TXD
HOST INTERFACE
69 54 53 IN
UART0_RXD/I2CS_SDA GNSS
H7 GPIO_02/HOST_SPI_RXD/ GPIO_12/SPI1_RXD E6 NC
69 54 53 OUT
UART_GNSS_TO_AP_CTS_L
UART0_RTS* GPIO_21/SPI1_TXD E5 NC
J7 GPIO_03/HOST_SPI_TXD/
MISCELLANEOUS PERIPHERAL INTERFACE

69 54 53 IN
UART_AP_TO_GNSS_RTS_L
UART0_CTS* GPIO_13/I2CM3_SCL F6 NC
A6 GPIO_08 GPIO_14/I2CM3_SDA G6
NC NC
GNSS_TO_PMU_HOST_WAKE B6 GPIO_09/HOST_REQ GPIO_15/I2CM1_SCL H6
C 69 54 53 OUT
GPIO_16/I2CM1_SDA J6
NC
NC
C
G2 VDD1P1_CORE GPIO_22/I2CM2_SCL F5 NC
VDD_GNSS_CORE_1V1
D3 VDD1P1_GBB GPIO_23/I2CM2_SDA H5 NC
VDD_GNSS_GBB_1V1
VDD_GNSS_SRAM_1V1 F3 VDD1P1_SRAM GPIO_26/SPI1_CLK D4
PMU INTERFACE
NC
D1 VDD1P2_GRF GPIO_27/SPI1_FSS E4 NC
VDD_GNSS_GRF_1V2
C2 VDD1P8_AUX GPIO_17/LNA_EN A5 GNSS_EXT_LNA_EN 15 16
15 VDD_GNSS_AUX_1V8
VDD_GNSS_IO_1V8 C3 VDD1P8_IO GPIO_19/UART1_RXD C5 NC
F2 VDD_PMU_IN_AON GPIO_20/UART1_TXD D5 NC
15 PP_VDD_MAIN_GNSS
6 5 4 3 2 1 PP1V8_SDRAM D2 VDD_PMU_IN GPIO_24/I2S_SDO F4
16 11 NC
69 54 53 PMU_TO_GNSS_EN F1 NSTANDBY GPIO_25/I2S_LRCO/IFVALID B4 GNSS_BLANK 55
IN IN
GNSS_REF_CAP E1 REF_CAP
1 C6804_RF 1 C6805_RF 1 C6806_RF 1 C6812_RF 1 C6813_RF 1 C6807_RF 1 C6808_RF 1 C6810_RF 1 C6801_RF 1 C6814_RF 1 C6809_RF
ADC_IN1/GPIO_28 J1
1UF 1UF 1UF 47PF 1UF 0.1UF 1UF 2.2UF 100PF 27PF 1UF 1 C6811_RF NC
20% 20% 20% 5% 20% 10% 20% 20% 5% 5% 20% H1 VDD_ADC ADC_IN2/GPIO_29 J2
2 16V 2 16V 2 16V 2 16V 2 16V 2 16V 2 16V 2 6.3V 2 16V 2 16V 2 16V 0.01UF NC
CER-X5R CER-X5R CER-X5R CERM CER-X5R X5R-CERM CER-X5R X5R-CERM NP0-C0G NP0-C0G CER-X5R 10% J3
POWER IINPUT
0201 0201 0201 01005 0201 0201 0201 0201-1 01005 01005 0201 A2 VDD_IF ADC_IN3/GPIO_30/SWDIO NC
GNSS GNSS GNSS GNSS GNSS GNSS GNSS GNSS GNSS 2 16V
X5R-CERM J4
GNSS GNSS 0201 ADC_IN4/GPIO_31/SWDCLK NC
GNSS E7 VDD_IO ADC_IN5/GPIO_32/UART0_RTS* H3
NC
GNSS_RF.J5 GNSS_RF.A1,A2 GNSS_RF.E7 GNSS_RF.D2 ADC_IN6/GPIO_33/UART0_RXD H4
A1 VDD_LNA NC
ADC_IN7/GPIO_34/UART0_CTS* G3
NC
J5 VDD_SRAM ADC_IN8/GPIO_35/UART0_TXD G4
NC
ADC INTERFACE
C4 VSS_CORE ADC_REF H2
XW6800_RF G5 VSS_CORE
SHORT-10L-0.25MM-SM
GROUND
B 16 8 7 6 5 1 PP_VDD_MAIN 1
OMIT
2 PP_VDD_MAIN_GNSS 15
C1 VSS_IF B
GNSS B2 VSS_LNA
E2 VSS_PMU
TCXO
KEEP AWAY FROM HEAT SOURCES
15 VDD_GNSS_AUX_1V8
1 C6800_RF
0.1UF
4
20%
VCC
2 6.3V
X5R-CERM
GTCXO_RF 01005
26MHZ-4PPM-1.8V GNSS
1P6X1P2-SM
3 GNSS_26MHZ_TCXO 15
OUT
GND
GNSS
2
1
A A
PAGE TITLE
GNSS
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

68 OF 73
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET

8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
MLB TEST POINTS HARDWARE ID DEV CONFIG

SIM CARD CONNECTOR 16 15 11 6 5 4 3 2 1 PP1V8_SDRAM 16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
1 1 1 1
R6901_RF R6903_RF R6906_RF R6909_RF
1.00K 1.00K 1.00K 1.00K
1% 1% 1% 1%
1/32W 1/32W 1/32W 1/32W
MF MF MF MF
2 01005
BASEBAND 2 01005
BASEBAND 2 01005
BASEBAND 2 01005
BASEBAND
55 OUT
BB_HW_ID<0> OMIT OMIT OMIT 55 OUT DEV_HW_CONFIG NOSTUFF
D BASEBAND 9
3
SIM_DETECT_GND SIM_DETECT 8 SIM1_DETECT OUT 55 69
55
55
OUT
OUT
BB_HW_ID<1>
BB_HW_ID<2>
1 1 1
HW CONFIG
RESERVED
DEV_HW_CONFIG
Z
1
1%
R6910_RF
1.00K
D
69 55 IN SIM1_CLK CLK J_SIM_RF IO 7 SIM1_IO BI 55 69 R6902_RF R6904_RF R6907_RF 1/32W
PP6901_RF RESERVED 0 MF
P2MM-NSM RCPT-WIDE-HSG-THICK-PIVOT 1.00K 1.00K 1.00K 2 01005
SM 1% 1% 1% BASEBAND
PP
1 AP_TO_BBPMU_SDWN_L 1 2 5 69 55 IN
SIM1_RST 2 RESET F-RT-SM SWP 6 SIM1_SWP BI 53 54 69 1/32W 1/32W 1/32W RESERVED 1 NOSTUFF
MF MF MF
OMIT 2 01005
BASEBAND 2 01005
BASEBAND 2 01005
BASEBAND
16 5 4 2 VDD_SIM1 1 VCC 2 OMIT OMIT OMIT
PP6903_RF GND DZ6900_RF NOTE: STUFFING FOR HWID IS IN RADIO_MLB_FF SUB-DESIGN
P2MM-NSM 1 C6900_RF 5.5V-6.2PF
SM
1 BBPMU_PWRGOOD 1 DZ6901_RF
5
10
11
12
13
14
15
16
PP 3 5 6
2.2UF 0201
20% 12V-33PF SIM 1 C6901_RF HARDWARE HW_ID<2:0> HARDWARE HW_ID<2:0> HARDWARE HW_ID<2:0>
OMIT 6.3V 01005-1
2 X5R-CERM 1 100PF RF DEV2 0 0 Z ICE16 PROTO0 0 0 0 ICE16.1 PROTO1 Z Z 1
0201-1 2 SIM 5%
PP6904_RF SIM 16V RF DEV2.1 0 Z 0 ICE16 PROTO0 ES2 0 0 1 ICE16.1 PROTO2 Z 1 Z
P2MM-NSM 2 NP0-C0G
SM 01005 RF DEV3 0 Z Z ICE16 PROTO1 0 1 0 ICE16.1 EVT Z 1 1
1 BBPMU_XG_RESET_L 3 5
PP BASEBAND RF DEV4 Z 0 0 ICE16 PROTO2 0 1 1 ICE16.2 EVT 1 Z Z
OMIT
RF DEV4.1 Z 0 Z ICE16 PROTO2 ES2.2 1 0 0 ICE16.1 EVT2 1 Z 1
PP6905_RF RF DEV4.2 Z Z 0 ICE16 EVT 1 0 1 ICE16.2 EVT2 1 1 Z
P2MM-NSM
SM RF DEV5 Z Z Z ICE16 EVT2 CARRIER 1 1 0 ICE16.1 DVT/PVT 0 1 Z
1 BBPMU_XG_RESET_SD_L 3 5
PP
RF DEV5.1 0 Z 1 ICE16 DVT/PVT 1 1 1 ICE16.2 DVT/PVT Z 0 1
OMIT
SIM1_IO
PP6906_RF
P2MM-NSM
SM
16 2
16 2
16 2
SIM1_CLK
SIM1_RST
BOOTCFG
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
16 15 11 6 5 4 3 2 1 PP1V8_SDRAM
1 TCXO_BB_GNSS_32K 3 15
PP
SIM1_SWP 1
OMIT
16 1
1 1 R6911_RF
R6905_RF R6908_RF 1.00K
1 1.00K 1.00K 1%
PP6909_RF 1 1% 1% 1/32W
P2MM-NSM DZ6902_RF 1/32W 1/32W MF
SM DZ6904_RF MF MF
1 BB_DEBUG_ERROR 2 01005
PP 2 SG-WLL-2-2 SG-WLL-2-2 2 01005
BASEBAND 2 01005
BASEBAND 69 55 54 53 PCIE_AP_TO_BB_PERST_L
BASEBAND
NOSTUFF
OMIT ESD202-B1-CSP01005 ESD202-B1-CSP01005 56 OUT HW_MON1 OUT
1 2 1 STUFF FOR VENDOR CONFIG ONLY
2 56 OUT
HW_MON2
PP6961_RF DZ6905_RF
C P2MM-NSM
SM
1 AP_TO_BB_MESA_ON
DZ6903_RF
SG-WLL-2-2 SG-WLL-2-2 HW_MON1 HW_MON2 TRIG_IN C
1 2
PP ESD202-B1-CSP01005 ESD202-B1-CSP01005 NAND 0 0 1
OMIT 2 2
FLASHLESS 1 0 1
PP6962_RF FLASHLESS WDOG DIS 1 1 0
P2MM-NSM
SM NAND 1 1 1
PP
OMIT
1 BB_TO_AP_GSM_TXBURST 1 2
XCVR BOOTSTRAPS ARE INTERNALLY PULLED DOWN
PP6963_RF PP6931_RF
P2MM-NSM P2MM-NSM
SM SM
1 AP_TO_BB_TIME_MARK 1 2 1 SYSCLK_26MHZ 2 6
PP PP
OMIT OMIT
DEBUG CONNECTOR
PP6932_RF
P2MM-NSM
ETIC MLB 516S1185
FLEX 516S1184
SM
1 50_ET_DAC_P 7 8
PP J_DEBUG
OMIT 20-5857-036-001-829
PP6933_RF F-ST-SM
P2MM-NSM 41
SM
1 50_ET_DAC_N 7 8 16 15 8 7 6 5 1 PP_VDD_MAIN 37 38
PP
OMIT
2 1 USB_BB_VBUS 1 2 VDD_SIM1 2 4 5 16
2 1 90_USB_BB_P 3 4 SIM1_RST 2 16
B
GNSS BBPMU 2 1
5 1
16 15 11 6 5 4 3 2 1
90_USB_BB_N
PMU_TO_BBPMU_ON
PP1V8_SDRAM
5
7
9
6
8
10
SIM1_CLK
SIM1_IO
SIM1_SWP
2 16
2 16
1 16 B
PP6935_RF
PP6937_RF P2MM-NSM 3 BB_JTAG_TDO 11 12 SIM1_DETECT 2 16
P2MM-NSM SM
1 BBPMU_VCLK 13 14
SM 2 5 3 BB_JTAG_TDI VDD_SIM2
1 GNSS_EXT_LNA_EN 15
PP
PP 15 16
OMIT 3 BB_JTAG_TRST_L SIM2_RST
OMIT 17 18
3 1 AP_TO_BB_RESET_L SIM2_CLK
PP6954_RF
PP6936_RF P2MM-NSM 3 BB_JTAG_TCK 19 20 SIM2_IO
PCIE P2MM-NSM
SM
PP
OMIT
1 PMU_TO_GNSS_EN 1 15
SM
PP
OMIT
1 BBPMU_VDIO 2 5
SELECT
3
7 6 5 1
16 15 8
BB_JTAG_TMS
PP_VDD_MAIN
21
23
25
22
24
26
SIM2_SWP
SIM2_DETECT
SIM2_IO_R BB_JTAG_RESET_L
PP6915_RF PP6938_RF 2 1 UART_BB_TO_AP_RXD 27 28 UART_BB_TO_WLAN_COEX 1 2
P2MM-NSM P2MM-NSM 29 30
SM SM 2 1 UART_AP_TO_BB_TXD UART_WLAN_TO_BB_COEX 1 2
1 100_PCIE_AP_TO_BB_TX_P 1 2 1 UART_GNSS_TO_AP_RXD 1 15
PP PP 31 32
PP_VDD_BOOST NC
OMIT OMIT 33 34
PP6916_RF PP6939_RF 35 36
P2MM-NSM P2MM-NSM
SM SM
1 100_PCIE_AP_TO_BB_TX_N 1 2 1 UART_AP_TO_GNSS_TXD 1 15
PP PP
OMIT OMIT 39 40
PP6964_RF
P2MM-NSM
SM
PP
1 UART_GNSS_TO_AP_CTS_L 1 15 PP6950_RF
DIGRF 42
NOSTUFF
P2MM-NSM
OMIT SM
1 90_DIGRF_M1_TX_P 2 6
PP
PP6918_RF PP6965_RF OMIT
P2MM-NSM P2MM-NSM
SM SM
1 100_PCIE_BB_TO_AP_RX_N 1 2 1 UART_AP_TO_GNSS_RTS_L 1 15 PP6951_RF
PP PP
P2MM-NSM
OMIT OMIT SM
1 90_DIGRF_M1_TX_N 2 6
PP
PP6919_RF PP6966_RF OMIT
A P2MM-NSM P2MM-NSM A
SM
PP
OMIT
1 PCIE_AP_TO_BB_PERST_L 1 2 16
SM
PP
OMIT
1 AP_TO_GNSS_TIME_MARK 1 15 PP6952_RF
P2MM-NSM
SM
PP
1 90_DIGRF_A1_RX1_P 2 6
PCIE GND PP6948_RF
PAGE TITLE
TEST POINTS & SIM

P2MM-NSM
PP6920_RF PP6940_RF OMIT SM DRAWING NUMBER SIZE
P2MM-NSM P2MM-NSM 1
SM
1 PCIE_AP_BI_BB_CLKREQ_L 1 2
SM
1 GNSS_IF_TEST_OUT 15 PP6953_RF
PP
OMIT Apple Inc.
051-00542 D
PP PP
P2MM-NSM REVISION
OMIT OMIT SM
PP
1 90_DIGRF_A1_RX1_N 2 6 PP6949_RF
P2MM-NSM
R
5.0.0
PP6921_RF PP6945_RF OMIT SM NOTICE OF PROPRIETARY PROPERTY: BRANCH
P2MM-NSM P2MM-NSM 1
PP
SM SM THE INFORMATION CONTAINED HEREIN IS THE
1 PCIE_BB_TO_PMU_WAKE_L 1 2 1 GNSS_TO_PMU_HOST_WAKE 1 15 OMIT PROPRIETARY PROPERTY OF APPLE INC.
PP PP
OMIT OMIT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
69 OF 73
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
C C
B B
A A
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
C C
B B
A A
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
C C
B B
A A
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D D
C C
B B
A A
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CK
D D
STOCKHOLM_MLB
APRIL 11, 2016
75 53 IN PP_VDD_MAIN
75 53 IN PP1V8_SDRAM
75 53 IN PMU_TO_NFC_EN
NFC_TO_PMU_HOST_WAKE
C 75
75
53 OUT
53 IN AP_TO_NFC_DEV_WAKE C
75 53 IN AP_TO_NFC_FW_DWLD
75 53 OUT NFC_TO_BB_CLK_REQ
75 53 IN BB_TO_NFC_CLK
75 53 IN UART_AP_TO_NFC_TXD
75 53 OUT UART_NFC_TO_AP_RXD
75 53 IN UART_AP_TO_NFC_RTS_L
75 53 OUT UART_NFC_TO_AP_CTS_L
2 IO
NFC_SWP
75 53 IN SE2_READY
75 53 IN SE2_PWR_REQ
75 53 IN SE2_PRESENT
75 53 OUT NFC_SWP_MUX
75 53 OUT ICEFALL_LDO_ENABLE
ALTERNATES ALTERNATE FOR

PART NUMBER REFERENCE DESIGNATOR(S) DESCRIPTION BOM OPTION
PART NUMBER
B 132S0436 132S0400 C7504_RF 0.22UF 20% 6.3V 01005 ? B
BOM OPTIONS
TABLE_5_HEAD
TABLE_5_HEAD

TABLE_5_ITEM
131S0883 1 220PF, 0201 2% 50V C7514_RF D101 TABLE_5_ITEM
TABLE_5_ITEM
131S00081 1 270PF, 0201 2% 25V C7514_RF D111
TABLE_5_ITEM
131S0883 1 220PF, 0201 2% 50V C7518_RF D111
TABLE_5_ITEM
131S00026 1 820PF, 0201 2% 50V C7516_RF D111
TABLE_5_ITEM
131S00081 1 270PF, 0201 2% 25V C7514_RF D11_JP
131S0883 1 220PF, 0201 2% 50V C7514_RF D10_JP TABLE_5_ITEM
TABLE_5_ITEM
131S0731 1 100PF, 0201 2% 50V C7518_RF D11_JP
TABLE_5_ITEM
131S00033 1 680PF, 0201 2% 50V C7516_RF D11_JP
TABLE_5_ITEM
131S00081 1 270PF, 0201 2% 25V C7514_RF D11_ROW
TABLE_5_ITEM
131S0883 1 220PF, 0201 2% 50V C7518_RF D11_ROW
131S0883 1 220PF, 0201 2% 50V C7514_RF D10_ROW TABLE_5_ITEM
TABLE_5_ITEM
131S00026 1 820PF, 0201 2% 50V C7516_RF D11_ROW
131S00055 1 22PF, 0201 2% 50V C7512_RF D10_ROW
TABLE_5_ITEM
131S00117 1 120PF, 0201 2% 50V C7518_RF D10_ROW

TABLE_5_ITEM
A 131S00026 1 820PF, 0201 2% 50V C7516_RF D10_ROW page1 A

DRAWING TITLE
SCH,MLB,D111
DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

1 OF 75
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
STOCKHOLM 5V BOOSTER NFBST_RF

WLCSP
FAN48614BUC50X
2 PP_VDD_MAIN_NFC A3 VIN VOUT A1 VDD_NFC_5V 2
L7502_RF VOUT A2
1 C7521_RF 1 C7511_RF 1.8UH-0.7A B1 SW 1 C7517_RF 1 C7522_RF
D 100PF 15UF 1 2 NFC_BOOST_SW B2 SW 15UF 100PF
D
5% 20% 20% 5%
2 16V
NP0-C0G 2 6.3V
X5R
0603
B3 EN 2 6.3V
X5R 2 16V
NP0-C0G
01005 0402-1 NFC 2 NFC_BOOST_EN 0402-1 01005
C1 PGND
C2 PGND
C3 AGND
NFC NFC NFC NFC
NFC CONTROLLER NFC
2 VDD_NFC_5V
1 C7520_RF
1UF
20%
2 10V
X5R
0201
NFC
R7502_RF
0.00
2 1
2
PP1V8_SDRAM
PP_VDD_MAIN_NFC
VDD_NFC_TVDD
VDD_NFC_AVDD
VOLTAGE=1.80V
2
1 C7506_RF
2.2UF
20%
2 6.3V
1 C7526_RF
2.2UF
20%
2 6.3V
1 C7527_RF
2.2UF
20%
2 6.3V
NFC FRONT END
2 VDD_NFC_AVDD 1 2 VDD_NFC_DVDD VDD_NFC_ESE 2
X5R-CERM X5R-CERM X5R-CERM
VOLTAGE=1.80V 0201-1 0201-1 0201-1
0% 1 C7505_RF
1/32W 1 C7500_RF 1 C7502_RF 1 C7504_RF C7507_RF
MF 1UF 1000PF R7508_RF
VUP G2
C6
C7
D3
AVDD D7
ESE_VDD C5
B5
TVDD E7
SVDD B7
01005 1UF 1UF 0.22UF 20% 560
NFC 20% 20% 20% 2 10V 2 NFC_RXP 1 2 NFC_RXP_CAP 1 2
2 10V 2 10V 2 6.3V X5R
VDD
VBAT
SIM_PMU_VCC
PVDD
X5R X5R X5R 0201 1%
0201 0201 01005 NFC 2% 1/20W
NFC NFC NFC 25V MF
C0G-NP0 201
0201 NFC
NFC
L7500_RF
160NH-10%-0.48A-0.33OHM
C NFC_RF F1 2 NFC_TXP 1 2 NFC_BALP C
PN67VEU3-B001D004 IC00 NC 0402
NFC_TO_PMU_HOST_WAKE D1 IRQ UFLGA SIM_SWIO A4 NFC_SWP NFC 1 C7509_RF
BAL0 2
GND 1
75 74 53 OUT BI 53 74
74 53 SE2_PRESENT A5 SVDD_REQ GPIO0 A7 NFC_TEST_OUT 2

680PF
IN 2%
74 53 AP_TO_NFC_FW_DWLD B2 DWL IC01 A6 2 25V
IN NC C0G-NP0
NFC_TO_BB_CLK_REQ A2 CLK_REQ TX_PWR_REQ D5 NFC_BOOST_EN 0201
ATB161006F-20011
74 53 OUT 2
NFC
74 53 BB_TO_NFC_CLK A3 NFC_CLK_XTAL1
ESE_DWPM_DBG G7
IN
BALUN_RF
75 74 53 UART_AP_TO_NFC_TXD C1 RX NC 180 PHASE SHIFT INTRODUCED BY BALUN
ESE_DWPS_DBG G6
IN
SM
75 74 53 UART_NFC_TO_AP_RXD B1 TX NC DONE FOR BEST ROUTING
OUT
75 74 53 UART_AP_TO_NFC_RTS_L D2 CTS RX+ F6 NFC_RXP 2
IN
75 74 53 UART_NFC_TO_AP_CTS_L A1 RTS RX- F5 NFC_RXN 2
OUT
4 UNBAL
PMU_TO_NFC_EN E1 VEN
3 BAL1
75 74 53
TX1 G3
IN
NFC_TXP 2
E3 L7501_RF
2 VDD_NFC_ESE SMX_RST* TX2 G5 NFC_TXN 2 160NH-10%-0.48A-0.33OHM
C7514_RF
E4 220PF
SMX_CLK TP7500_RF
NC
F4 WKUP_REQ E5 AP_TO_NFC_DEV_WAKE IN 53 74 75 2 NFC_TXN 1 2 NFC_BALN NFC_ANT_MATCH 1 2 NFC_ANT 1
A
NC ESE_IO1 0402 SM-TP1P25-TOP
SE2_READY B3 SE2_BUSY F7 NFC_VMID NFC 1 C7510_RF 2% OMIT
74 53 IN VMID 50V 1 C7515_RF 1 C7516_RF 1 C7518_RF
74 53 ICEFALL_LDO_ENABLE B4 IC2 680PF C0G
SE2_ENABLE F2
OUT 2% 0201 1000PF 820PF 120PF
SE2_PWR_REQ 53 74 75
74 53 NFC_SWP_MUX E6 EXT_MUX
OUT
2 25V OMIT_TABLE 2% 2% 2%
SE2_SVDD_IN G1 C0G-NP0 2 25V 2 25V 2 50V
OUT
PP1V8_SDRAM IN 53 74 75 0201 C0G-NP0 C0G-NP0 NP0-C0G
C3 XTAL2 C7508_RF NFC C7512_RF 0201 0201 0201
NC R7509_RF NFC NFC OMIT_TABLE
B6 DVSS
C4 DVSS
1000PF 22PF
D4 AVSS
D6 AVSS
F3 AVSS
C2 PVSS
G4 TVSS
OMIT_TABLE
E2 VSS
1 C7503_RF 1 2 560 1 2
2 NFC_RXN NFC_RXN_CAP 1 2
0.1UF 1%
20% 2% 1/20W 2%
2 6.3V
X5R-CERM
25V
C0G-NP0
MF 50V
C0G-CERM
01005 201
0201 NFC 0201 TP7505_RF
NFC NFC OMIT NFC_TEST_OUT 1
2 A
TP-P55
NFC
OMIT
B SE2_PWR_REQ B
1
R7599_RF
1.00K
5%
1/32W
MF
2 01005
NFC LOAD SWITCH

NFCSW_RF
TPS22915
PP7503_RF PP7507_RF DSBGA
P2MM-NSM P2MM-NSM
SM SM 2 1 PP_VDD_MAIN A2 VIN VOUT A1 PP_VDD_MAIN_NFC 2
2 1 UART_AP_TO_NFC_TXD 1 2 1 NFC_TO_PMU_HOST_WAKE 1
PP PP
OMIT OMIT 2 1 PP1V8_SDRAM B2 ON
B1 GND
PP7504_RF PP7508_RF
P2MM-NSM P2MM-NSM
SM SM
2 1 UART_NFC_TO_AP_RXD 1 2 1 PMU_TO_NFC_EN 1
PP PP
OMIT OMIT
PP7505_RF PP7509_RF
P2MM-NSM P2MM-NSM
SM SM
2 1 UART_AP_TO_NFC_RTS_L 1 2 1 AP_TO_NFC_DEV_WAKE 1
PP PP
OMIT OMIT R7520_RF
0.00
PP7506_RF 2 1 PP_VDD_MAIN 1 2 PP_VDD_MAIN_NFC 2
P2MM-NSM
SM 1%
A 2 1 UART_NFC_TO_AP_CTS_L 1
PP
1/20W
MF
0201
A
OMIT PAGE TITLE
NOSTUFF
NFC DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

75 OF 75
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CK
D D111 RADIO_MLB_FF D
Mon May 16 17:43:10 2016

PDF PAGE
CONTENTS
METROCIRC
C C
B B
A SCH: 951-02180 ? A
BOM: 939-01837 DRAWING TITLE
SCH,MLB,D111
DRAWING NUMBER SIZE
PCB: 920-XXXXX R
Apple Inc.

051-00542
REVISION
BRANCH
5.0.0
D

1 OF 3
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
METROCIRC
D111 NORTH-SOUTH METROCIRC D111 EAST-WEST METROCIRC
D D
339S00147 339S00146
EAST MLB WEST MLB
MCEW_RF
FLTPSSL-672E
UPPER MLB MCNS_RF
FLTPSSL-765E
LOWER MLB IO
50_UAT_WLAN_2G_EAST 3
1
SIGNAL1-E
SM
SIGNAL1-W 7
10
50_UAT_WLAN_2G_WEST IO
IO
50_UAT_WLAN_5G_EAST SIGNAL2-E SIGNAL2-W 50_UAT_WLAN_5G_WEST IO
6 SM 5 11
77 50_UAT_MB_HB_EAST SIGNAL1-U SIGNAL1-L 7 50_UAT_MB_HB_SOUTH 77 50_UAT_MB_HB_EAST SIGNAL3-E SIGNAL3-W 50_UAT_MB_HB_WEST
BI IO BI IO
2 50_LAT_WLAN_NORTH 2 SIGNAL2-U SIGNAL2-L 11 50_LAT_WLAN_SOUTH 2

2 23
50_UAT_LB_NORTH 4 SIGNAL3-U SIGNAL3-L 9 50_UAT_LB_SOUTH
IO IO 4 24
1 33 6 25
3 34 8 26
5 35 9 GND GND 27
8 36 12 28
GND
10 37 21 29
12 38 22 30
21 39
22
23
24 GND
25
26
27
C 28
29
C
30
31
32
B
WIFI BULK CAPS
WIFI LOWER ANTENNA FEED COAX B
53 IN
PP_VDD_MAIN
R7700_RF
1 C7610_RF 1 C7611_RF 0.00 2
50_WLAN_A_1 1 50_WLAN_A_1_DPLX
10UF 1000PF IO
20% 10% 0%
2 6.3V
CERM-X5R 2 10V
X5R 1
1/32W
1
0402-9 01005 C7700_RF MF
01005
WLAN WLAN 0.2PF OMIT
NOSTUFF +/-0.1PF JLAT3_RF
2 16V
NP0-C0G C7702_RF MM7829-2700
01005 4.3NH-3%-0.270A W25DI_RF F-ST-SM
OMIT 01005 DPX205850DT-9173C1SJ
OMIT 2
0805
R7701_RF
2 6 0.00 2
HI COM 2 50_LAT_WLAN_M 1 50_LAT_WLAN_NORTH 2 2 50_LAT_WLAN_SOUTH 1
W2BPF_RF 4
0%
1/32W
WLAN-BT-LTE LO 1 1 3
C7703_RF MF
01005
C7704_RF
B39242B8847P810 GND 0.2PF 0.2PF
LGA C7701_RF +/-0.1PF OMIT +/-0.1PF
L7700_RF WLAN_RFFE
3.6PF 2 16V 2 16V
1
3
5
0.00 2 NP0-C0G NP0-C0G
50_WLAN_G_1 1 50_WLAN_G_1_BPF 4 IN/OUT IN/OUT 1 50_WLAN_G_1_M 1 2 50_WLAN_G_1_DPLX 01005 01005
IO OMIT OMIT
0%
1/32W 1 GND +/-0.1PF
MF 1 16V 1
01005 NP0-C0G
6
5
3
2
01005
OMIT
L7701_RF
9.1NH-3%-0.17A-1.7OHM
L7702_RF L7703_RF
4.0NH-+/-0.1NH-0.27A
THROUGH METROCIRC
01005
9.1NH-3%-0.17A-1.7OHM 01005
01005
OMIT
2
A 2 2
A
PAGE TITLE
METROCIRC
DRAWING NUMBER SIZE
051-00542 D
ICE16.1/2 EVT2 TABLE_5_HEAD

MATCHING CONTROLLED BY WIFI_MLB R
Apple Inc.

REVISION
BRANCH
5.0.0
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) BOM OPTION PROPRIETARY PROPERTY OF APPLE INC.
TABLE_5_ITEM
118S0608 2 RES, MF, 1K OHM, 1%, 1/32W, 01005 R6901_RF, R6906_RF I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
2 OF 3
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
FL6700_RF
UAT TUNER FLEX FL6703_RF
ALTERNATES TABLE_ALT_HEAD
150OHM-25%-200MA-0.7DCR 150OHM-25%-200MA-0.7DCR PART NUMBER ALTERNATE FOR

PART NUMBER
IO
VDD_TUNER_RFFE_VIO_1V8 1 2 TUNFX_RF 1 2 PP3V0_TRISTAR 3
TABLE_ALT_ITEM
01005 505066-0620 01005 152S00482 152S00490 ALTERNATE L8007_RF MURATA LQW03CAR56J00
10 9
FL6701_RF FL6702_RF
D IO
UAT_TUNER_RFFE_DATA 1
0.00 2
VDD_TUNER_RFFE_VIO_1V8_FILT
UAT_TUNER_RFFE_DATA_FILT 6 5
PP3V0_TRISTAR_FILT
UAT_TUNER_RFFE_CLK_FILT 1
0.00 2
UAT_TUNER_RFFE_CLK IN 53
D
0% 4 3 0%
1/32W 2 1 1/32W
MF 1 C6701_RF 1 C6702_RF 1 C6705_RF 1 C6703_RF MF
01005 01005
27PF 27PF 27PF 27PF
5% 5% 5% 5%
8 7
2 16V
NP0-C0G 2 16V
NP0-C0G 2 16V
NP0-C0G 2 16V
NP0-C0G
01005 01005 F-ST-SM 01005 01005
UAT UAT UAT UAT
PINOUT IS ROTATED 180 COMPARED TO D101

NOSTUFF NOSTUFF
ALT UAT1 GND

L8007_RF
560NH-5%-2.80OHM
3 PP3V0_TRISTAR 2 1 UATUN_VDD
IO
0201
1 C8001_RF 1 C8006_RF
0.1UF 33PF
20% 5%
2 6.3V 2 16V
UAT TUNER X5R-CERM

01005
NP0-C0G-CERM
01005
4
VDD
L8010_RF USPDT_RF L8008_RF
120NH-5%-40MA RF1341 0.6NH-+/-0.05NH-1.1A-0.04OHM
WLCSP
53 IN
UAT_TUNER_GPO 1 2 UAT_TUNER_GPO_FIL 3 CB 1 USPDT_RF 1 2 DC_BLOCK
0201 RF1 6 0201
1 C8005_RF 1 C8008_RF
GNDA RFGND
33PF 18PF
5% 2%
2
AGND_RF
C 2 16V
NP0-C0G-CERM
01005
2 25V
C0H-CERM
0201
STDOFF-2.2OD0.25H-0.50-1.70 C
ALT_GND 1
REMOVED L8009_RF
2.4NH-2%-2A-0.042OHM
0402HP
CHASSIS_GND 3
5G WIFI
USID=0XC STANDOFF
SUAT2_RF
C7731_RF STDOFF-2.56OD1.4ID.99H-SM
1
0.00 2
IO
50_UAT2_M 50_UAT2_FEED 1
B LB/MLB/GNSS/MB/HB 1 C7730_RF
1.0PF
1%
1/20W
MF
0201
1 UP_RFFE B
STANDOFF +/-0.05PF
2 25V
C0G-CERM
0201
UP_RFFE
L7709_RF
UP_RFFE 1.5NH+/-0.1NH-1.0A
L6708_RF SUAT1_RF NOSTUFF 0201
1.4NH+/-0.1NH-1.1A C6716_RF UP_RFFE
18PF STDOFF-2.56OD1.4ID.99H-SM NOSTUFF
50_UAT1_TUNER 1 2 50_UAT1_NOTCH 1 2 50_UAT1_FEED 1 2
IO
0201
2% UP_RFFE
25V
C0H-CERM
0201
1 UP_RFFE
1 C6714_RF
C6736_RF 1
L6707_RF 0.8PF
0.3PF +/-0.05PF
18NH-3%-0.22A-0.54OHM 2 25V
GROUND RING
+/-0.05PF
25V 03015 C0G
C0G-CERM 2 NO_XNET_CONNECTION
0201
0201 NO_XNET_CONNECTION
NO_XNET_CONNECTION
UP_RFFE 2
UGND_RF
2.85R1.5-NSP
3 CHASSIS_GND 1
1 C6734_RF 1 C6735_RF 1 C6730_RF 1 C6731_RF 1 C6732_RF 1 C6733_RF

100PF 18PF 220PF 56PF 4.7PF 220PF
5% 5% 5% 5% +/-0.1PF 5%
2 16V
NP0-C0G 2 16V
CERM 2 6.3V
CERM 2 16V
NP0-C0G 2 16V
NP0-C0G 2 6.3V
CERM
01005 01005 01005 01005 01005 01005
UP_RFFE UP_RFFE
A A
PAGE TITLE
UAT MATCH & TUNER

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

3 OF 3
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
CK
D
D1X WIFI_MLB (PERENNIAL) D
FEBRUARY 1, 2016
PDF PAGE
CSA PAGE CONTENTS
76 PERENNIAL
77 WIFI FRONT-END
BOM OPTIONS:
D10_JP: D11_JP:
TRUE POWER
TABLE_5_HEAD TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION PART# TRUE
QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
TABLE_5_ITEM TABLE_5_ITEM
80 53 IN PP_VDD_MAIN
131S0648 1 CAP,CER,0.3PF,+/-0.05,01005 C7705_RF CRITICAL D10_JP 152S00273 TRUE
1 IND,0.6NH,UH-Q,01005 R7703_RF CRITICAL D11_JP
80 53 IN PP1V8_SDRAM
152S00029 1 IND,1.1NH,UH-Q,01005 R7703_RF CRITICAL D10_JP 152S1976 TRUE

1 IND,0.7NH,UH-Q,01005 R7711_RF CRITICAL D11_JP
131S0893 1 CAP,CER,0.2PF,+/-0.05,01005 C7706_RF CRITICAL D10_JP

TABLE_5_ITEM
131S0400 TRUE
1 CAP,CER,3.5PF+/-0.1,01005 R7702_RF CRITICAL D11_JP
TABLE_5_ITEM
CLOCKS
80 53 IN PMU_TO_WLAN_32K
117S0161 1 RES,MF,0 OHM,1/32W,01005 R7711_RF CRITICAL D10_JP 152S1986 1
TRUE IND,FILM,2.2NH,UH-Q,01005 R7704_RF CRITICAL D11_JP
CONTROL
117S0161 1 RES,MF,0 OHM,1/32W,01005 R7702_RF CRITICAL D10_JP 131S0648 TRUE

1 CAP,CER,0.3PF,+/-0.05PF,01005 C7708_RF CRITICAL D11_JP
PMU_TO_WLAN_REG_ON
C 152S1980 1 IND,1.0NH,UH-Q,01005 R7704_RF CRITICAL D10_JP
TABLE_5_ITEM
131S0593 TRUE
1 CAP,3.9PF,+/-1.0PF,0201,HI-Q R6711_RF CRITICAL D11_JP
TABLE_5_ITEM
80
80
53 IN
53 IN PMU_TO_BT_REG_ON C
131S0404 1 CAP,3.9PF,+/-1.0PF,01005 R6711_RF CRITICAL D10_JP 152S2055 TRUE
1 IND,7.5NH,UH-Q,0201 C6729_RF CRITICAL D11_JP
80 53 OUT BT_TO_PMU_HOST_WAKE
152S2061 1 IND,7.5NH,UH-Q,01005 C6729_RF CRITICAL D10_JP 117S0161 TRUE

1 RES,MF,0 OHM,1/32W,01005 R7700_RF CRITICAL D11_JP 80 53 IN AP_TO_BT_WAKE
117S0161 1 RES,MF,0 OHM,1/32W,01005 R7700_RF CRITICAL D10_JP 117S0161 TRUE

1 RES,MF,0 OHM,1/32W,01005 L7700_RF CRITICAL D11_JP
WLAN PCIE
152S2043 1 IND,6.2NH,UH-Q,01005 C7702_RF CRITICAL D10_JP 152S1853 TRUE
1 IND,9.1NH,UH-Q,01005 L7701_RF CRITICAL D11_JP
80 53 IN 100_PCIE_AP_TO_WLAN_REFCLK_P
152S1998 1 IND, 0.8NH,UH-Q,01005 L7700_RF CRITICAL D10_JP 117S0161 TRUE

1 RES,MF,0 OHM,1/32W,01005 R7701_RF CRITICAL D11_JP 80 53 IN 100_PCIE_AP_TO_WLAN_REFCLK_N
80 53 IN 100_PCIE_AP_TO_WLAN_TX_P
152S2043 1 IND,6.2NH,UH-Q,01005 L7701_RF CRITICAL D10_JP 131S0893 TRUE
1 CAP,CER,0.2PF,+/-0.05PF,01005 C7705_RF CRITICAL D11_JP
80 53 IN 100_PCIE_AP_TO_WLAN_TX_N
117S0161 1 RES,MF,0 OHM,1/32W,01005 R7701_RF CRITICAL D10_JP 131S0893 1 CAP,CER,0.2PF,+/-0.05PF,01005 C7729_RF CRITICAL D11_JP 80 53 OUT 100_PCIE_WLAN_TO_AP_RX_P
80 53 OUT 100_PCIE_WLAN_TO_AP_RX_N
NOSTUFF:C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF NOSTUFF:C7706_RF, C7711_RF,C7709_RF,C7710_RF, C7707_RF PCIE_AP_TO_WLAN_PERST_L
80 53 IN
C7700_RF, C7703_RF,C7704_RF C7700_RF,C7702_RF, C7703_RF,C7704_RF PCIE_AP_BI_WLAN_CLKREQ_L
D10_ROW: 80
2 IO
53 OUT PCIE_WLAN_TO_PMU_WAKE
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION 80 53 IN AP_TO_WLAN_DEV_WAKE
131S0648 1 CAP,CER,0.3PF,+/-0.05,01005 C7705_RF CRITICAL D10_ROW

TABLE_5_ITEM
D11_ROW:
TABLE_5_ITEM

TABLE_5_HEAD
WLAN UART
152S00029 1 IND,1.1NH,UH-Q,01005 R7703_RF CRITICAL D10_ROW TABLE_5_ITEM
80 53 OUT UART_WLAN_TO_AP_RXD
TABLE_5_ITEM
152S00273 1 IND,0.6NH,UH-Q,01005 R7703_RF CRITICAL D11_ROW

131S0893 1 CAP,CER,0.2PF,+/-0.05,01005 C7706_RF CRITICAL D10_ROW 80 53 IN UART_AP_TO_WLAN_TXD
TABLE_5_ITEM
TABLE_5_ITEM
152S1976 1 IND,0.7NH,UH-Q,01005 R7711_RF CRITICAL D11_ROW 80 53 OUT UART_WLAN_TO_AP_CTS_L

117S0161 TRUE
1 RES,MF,0 OHM,1/32W,01005 R7711_RF CRITICAL D10_ROW TABLE_5_ITEM
80 53 IN UART_AP_TO_WLAN_RTS_L
TABLE_5_ITEM
131S0400 1 CAP,CER,3.5PF+/-0.1,01005 R7702_RF CRITICAL D11_ROW

117S0161 TRUE
1 RES,MF,0 OHM,1/32W,01005 R7702_RF CRITICAL D10_ROW
TRUE
BLUETOOTH UART
TABLE_5_ITEM
TABLE_5_ITEM
152S1986 1 IND,FILM,2.2NH,UH-Q,01005 R7704_RF CRITICAL D11_ROW

152S1988 TRUE
1 IND,2.4NH,UH-Q,01005 R7704_RF CRITICAL D10_ROW
TRUE TABLE_5_ITEM
TABLE_5_ITEM
118S0724 1 RES,MF,0 OHM,1/20W,0201 R6711_RF CRITICAL D11_ROW 80 53 IN UART_AP_TO_BT_TXD

117S0161 TRUE
1 RES,MF,0 OHM,1/32W,01005 R6711_RF CRITICAL D10_ROW
B 152S1853 TRUE
1 IND,9.1NH,UH-Q,01005 C6729_RF CRITICAL D10_ROW
TABLE_5_ITEM
152S2054
TRUE
1 IND,9.1NH,UH-Q,0201 C6729_RF CRITICAL D11_ROW
TABLE_5_ITEM
80
80
53 OUT
53 IN
UART_BT_TO_AP_RXD
UART_AP_TO_BT_RTS_L
B
TABLE_5_ITEM
TABLE_5_ITEM
117S0161 1 RES,MF,0 OHM,1/32W,01005 R7700_RF CRITICAL D11_ROW 80 53 OUT UART_BT_TO_AP_CTS_L

117S0161 TRUE
1 RES,MF,0 OHM,1/32W,01005 R7700_RF CRITICAL D10_ROW TABLE_5_ITEM
117S0161 1 RES,MF,0 OHM,1/32W,01005 L7700_RF CRITICAL D11_ROW

AOP
TABLE_5_ITEM
152S2043 1 IND,6.2NH,UH-Q,01005 C7702_RF CRITICAL D10_ROW TABLE_5_ITEM
TABLE_5_ITEM
152S1853 1 IND,9.1NH,UH-Q,01005 L7701_RF CRITICAL D11_ROW 80 53 IN AOP_TO_WLAN_CONTEXT_A

152S1998 1 IND, 0.8NH,UH-Q,01005 L7700_RF CRITICAL D10_ROW TABLE_5_ITEM
80 53 IN AOP_TO_WLAN_CONTEXT_B
TABLE_5_ITEM
117S0161 1 RES,MF,0 OHM,1/32W,01005 R7701_RF CRITICAL D11_ROW

152S2043 TRUE
1 IND,6.2NH,UH-Q,01005 L7701_RF CRITICAL D10_ROW
AUDIO
TABLE_5_ITEM
TABLE_5_ITEM
131S0893 1 CAP,CER,0.2PF,+/-0.05PF,01005 C7705_RF CRITICAL D11_ROW

117S0161 1 RES,MF,0 OHM,1/32W,01005 R7701_RF CRITICAL D10_ROW TABLE_5_ITEM
131S0893 1 CAP,CER,0.2PF,+/-0.05PF,01005 C7729_RF CRITICAL D11_ROW 80 53 IN I2S_AP_TO_BT_BCLK

NOSTUFF:C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF I2S_AP_TO_BT_LRCK
80 53 IN
C7700_RF, C7703_RF,C7704_RF NOSTUFF:C7706_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF I2S_BT_TO_AP_DIN
80 53 OUT
C7700_RF,C7702_RF, C7703_RF,C7704_RF I2S_AP_TO_BT_DOUT
80 53 IN
D101_WIFI: COEX
D111_WIFI:
TABLE_5_HEAD
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION 80 53 IN UART_BB_TO_WLAN_COEX

TABLE_5_ITEM TABLE_5_HEAD
80 53 OUT UART_WLAN_TO_BB_COEX
131S0648 1 CAP,CER,0.3PF,+/-0.05,01005 C7705_RF CRITICAL D101 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
152S00029 1 IND,1.1NH,UH-Q,01005 R7703_RF CRITICAL D101

TABLE_5_ITEM
152S00273 1 IND,0.6NH,UH-Q,01005 R7703_RF CRITICAL D111

TABLE_5_ITEM
ANTENNA
3 IO
50_UAT_WLAN_5G_WEST
131S0893 1 CAP,CER,0.2PF,+/-0.05,01005 C7706_RF CRITICAL D101 152S1976 1 IND,0.7NH,UH-Q,01005 R7711_RF CRITICAL D111
3 IO
50_UAT_WLAN_2G_EAST
117S0161 1 RES,MF,0 OHM,1/32W,01005 R7711_RF CRITICAL D101 131S0400 1 CAP,CER,3.5PF+/-0.1,01005 R7702_RF CRITICAL D111 3 IO
50_UAT_WLAN_5G_EAST
TABLE_5_ITEM
TRUE TABLE_5_ITEM
2 IO
50_WLAN_G_1
117S0161 1 RES,MF,0 OHM,1/32W,01005 R7702_RF CRITICAL D101 152S1986 1 IND,FILM,2.2NH,UH-Q,01005 R7704_RF CRITICAL D111
2 IO
50_WLAN_A_1
TRUE TABLE_5_ITEM
TRUE TABLE_5_ITEM
152S1988 1 IND,2.4NH,UH-Q,01005 R7704_RF CRITICAL D101 118S0724 1 RES,MF, 0 OHM,1/20W, 0201 R6711_RF CRITICAL D111 3 IO
50_UAT2_M
TRUE TABLE_5_ITEM
TRUE TABLE_5_ITEM
A 131S0648 1 CAP,CER,0.3PF,+/-0.05PF,01005 C7708_RF CRITICAL D101 152S2054 1 IND,9.1NH,UH-Q,0201 C6729_RF CRITICAL D111 WIFI_MLB SCHEMATIC A
TRUE TABLE_5_ITEM TABLE_5_ITEM
118S0724 1 RES,MF, 0 OHM,1/20W, 0201 R6711_RF CRITICAL D101 117S0161 1 RES,MF,0 OHM,1/32W,01005 R7700_RF CRITICAL D111 DRAWING TITLE
152S2054
TRUE
1 IND,9.1NH,UH-Q,0201 C6729_RF CRITICAL D101
TABLE_5_ITEM
117S0161 1 RES,MF,0 OHM,1/32W,01005 L7700_RF CRITICAL D111

TABLE_5_ITEM
SCH,MLB,D111
DRAWING NUMBER SIZE
117S0161 1 RES,MF,0 OHM,1/32W,01005 R7700_RF CRITICAL D101 152S1853 1 IND,9.1NH,UH-Q,01005 L7701_RF CRITICAL D111
TRUE TABLE_5_ITEM TABLE_5_ITEM
Apple Inc.
051-00542 D
152S2043 1 IND,6.2NH,UH-Q,01005 C7702_RF CRITICAL D101 117S0161 1 RES,MF,0 OHM,1/32W,01005 R7701_RF CRITICAL D111 REVISION
152S1998 1 IND, 0.8NH,UH-Q,01005 L7700_RF CRITICAL D101

TABLE_5_ITEM
131S0893 1 CAP,CER,0.2PF,+/-0.05PF,01005 C7705_RF CRITICAL D111

TABLE_5_ITEM
R
5.0.0
152S2043 1 IND,6.2NH,UH-Q,01005 L7701_RF CRITICAL D101 131S0893 1 CAP,CER,0.2PF,+/-0.05PF,01005 C7729_RF CRITICAL D111 THE INFORMATION CONTAINED HEREIN IS THE
TABLE_5_ITEM
117S0161 1 RES,MF,0 OHM,1/32W,01005 R7701_RF CRITICAL D101 NOSTUFF:C7706_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF, C7708_RF

C7700_RF,C7702_RF, C7703_RF,C7704_RF
1 OF 77
NOSTUFF: C7729_RF,C7711_RF,C7709_RF,C7710_RF, C7707_RF III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
SHEET
C7700_RF, C7703_RF,C7704_RF CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IV ALL RIGHTS RESERVED 79 OF 81
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
WIFI/BT
1 106
4 WLAN_RF 107
D 6 LBEE5W11GJ-943
LGA
108 D
2 1 PP1V8_SDRAM PP_VDD_MAIN 1
18 SYM 2 OF 2 109
21 110
1 C7600_RF 1 C7601_RF 1 C7602_RF 1 C7606_RF 1 C7607_RF 24 111
27PF 0.01UF 10UF 0.01UF 27PF
5% 10% 20% 10% 5% 27 112
2 16V
NP0-C0G 2 6.3V
X5R 2 6.3V
CERM-X5R 2 6.3V
X5R 2 16V
NP0-C0G 32 113
01005 01005 0402-9 01005 01005
WLAN WLAN WLAN WLAN 34 114
VDDIO_1P8V 15
VBAT_VCC 28
VBAT_VCC 29
VBAT_RF_VCC 30
VBAT_RF_VCC 31
36 115
45 116
46 117
80 79 53 PMU_TO_WLAN_32K 54 LPO_IN 47 118
IN
48 119
79 53 UART_BB_TO_WLAN_COEX 8 SECI_RX GND
IN 49 120
79 53 UART_WLAN_TO_BB_COEX 7 SECI_TX
OUT 50 121
51 122
PP1V8_SDRAM
WLAN_RF BT_DEV_WAKE 55 AP_TO_BT_WAKE IN 53 79 80
53 123
1 PMU_TO_WLAN_REG_ON 92 WL_REG_ON LBEE5W11GJ-943 57 124
R7600_RF 79 53
80 IN
10K LGA 58 125
5% 93 BT_REG_ON SYM 1 OF 2 60 126
1/32W 80 79 53 IN
PMU_TO_BT_REG_ON
MF 41 65 127
BT_UART_RXD UART_AP_TO_BT_TXD
2 01005
WLAN
IN 53 79 80
2 JTAG_WLAN_SEL NOSTUFF 2 JTAG_WLAN_SEL 61 JTAG_SEL BT_UART_TXD 42 UART_BT_TO_AP_RXD 53 79 80

67 128
OUT
2 JTAG_WLAN_TCK 64 JTAG_TCK BT_UART_CTS* 44 UART_AP_TO_BT_RTS_L 53 79 80
68 129
IN
2 JTAG_WLAN_TMS 62 JTAG_TMS BT_UART_RTS* 43 UART_BT_TO_AP_CTS_L 53 79 80
69 130
OUT
2 JTAG_WLAN_TRST_L 2 JTAG_TRST* 70 131
BT_PCM_CLK 38 I2S_AP_TO_BT_BCLK 53 79
71 132
IN
BT_PCM_SYNC 37 I2S_AP_TO_BT_LRCK 53 79
72 THRM_PAD 133
IN
BT_PCM_OUT 40 I2S_BT_TO_AP_DIN 73 134
C BT_PCM_IN 39 I2S_AP_TO_BT_DOUT
OUT
IN
53 79
53 79
135 C
80 79 53 UART_WLAN_TO_AP_RXD 11 FAST_UART_TX 74 136
OUT
80 79 53 UART_AP_TO_WLAN_TXD 10 FAST_UART_RX 75 137
IN
76 138
77 139
79 53 UART_WLAN_TO_AP_CTS_L 9 FAST_UART_RTS_OUT
OUT 78 140
79 141
79 53 UART_AP_TO_WLAN_RTS_L 12 FAST_UART_CTS_IN
IN 80 142
80 79 53 AP_TO_WLAN_DEV_WAKE 13 WL_DEV_WAKE WL_HOST_WAKE 14 PCIE_WLAN_TO_PMU_WAKE 53 79 80
81 143
IN OUT
82 144
83 145
80 79 53 BT_TO_PMU_HOST_WAKE 56 BT_HOST_WAKE PCIE_CLKREQ* 17 PCIE_AP_BI_WLAN_CLKREQ_L 53 79
84 146
OUT BI
PCIE_PERST* 16 PCIE_AP_TO_WLAN_PERST_L 53 79 80
85 147
IN
86 148
81 50_WLAN_G_0 52 2G_ANT_CORE0 87 THRM_PAD 149
BI
1 50_WLAN_G_1 5 2G_ANT_CORE1 PCIE_RDP 19 100_PCIE_AP_TO_WLAN_TX_P 53 79 80
88 150
IO IN
PCIE_RDN 20 100_PCIE_AP_TO_WLAN_TX_N 53 79 80
89 151
IN
81 50_WLAN_A_0 59 5G_ANT_CORE0 90 152
BI
PCIE_TDP 22 100_PCIE_WLAN_TO_AP_RX_P 53 79
1 50_WLAN_A_1 66 5G_ANT_CORE1 OUT 91 153
IO
PCIE_TDN 23 100_PCIE_WLAN_TO_AP_RX_N 53 79
OUT 94 154
PCIE_REFCLK_P 25 100_PCIE_AP_TO_WLAN_REFCLK_P 53 79 80
95 155
IN
PCIE_REFCLK_N 26 100_PCIE_AP_TO_WLAN_REFCLK_N 96 156
IN 53 79 80 C7604_RF
7.5UF 97 157
CXT_A/JTAG_TDI 63 AOP_TO_WLAN_CONTEXT_A 53 79 80 20%
IN
L7600_RF 4V 98 158
CXT_B/JTAG_TDO 3 AOP_TO_WLAN_CONTEXT_B CERM
IN 80 2.2UH-20%-0.68A-0.25OHM 0402 99 159
SR_VLX 33 SR_LVX 1 2 SR_LVX_1 1 3 100 160
B VIN_LDO 35 VIN_LDO
0806
2 4
101 161 B
102 162
103 163
1 C7603_RF 104
100PF
5% 105
2 16V
NP0-C0G
01005
WLAN
PP7600_RF PP7610_RF
P2MM-NSM OMIT P2MM-NSM OMIT
SM SM TABLE_ALT_HEAD
2 1 AOP_TO_WLAN_CONTEXT_A 1 2 1 PMU_TO_WLAN_32K 1 PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
PP PP
TDI PART NUMBER
PP7601_RF PP7611_RF TABLE_ALT_ITEM
P2MM-NSM OMIT P2MM-NSM OMIT 339S00201 339S00199 ALTERNATE WLAN_RF ALT WIFI/BT MODULE
SM SM
2 1 AOP_TO_WLAN_CONTEXT_B 1 2 1 PCIE_WLAN_TO_PMU_WAKE 1
PP PP
TDO
PP7612_RF
P2MM-NSM OMIT
SM
2 1 100_PCIE_AP_TO_WLAN_REFCLK_P 1
PP
PP7603_RF PP7613_RF
SM SM
2 1 UART_WLAN_TO_AP_RXD 1 2 1 100_PCIE_AP_TO_WLAN_REFCLK_N 1
PP PP
PP7604_RF PP7614_RF
SM SM
2 1 UART_AP_TO_WLAN_TXD 1 2 1 100_PCIE_AP_TO_WLAN_TX_P 1
PP PP
PP7605_RF PP7615_RF PP7620_RF

P2MM-NSM OMIT P2MM-NSM OMIT P2MM-NSM OMIT
SM SM SM
2 JTAG_WLAN_TCK 1 2 1 100_PCIE_AP_TO_WLAN_TX_N 1 2 1 UART_AP_TO_BT_TXD 1
PP PP PP
A PP7606_RF
P2MM-NSM OMIT
PP7616_RF
P2MM-NSM OMIT
PP7621_RF
P2MM-NSM OMIT
SYNC_MASTER=WIFI SYNC_DATE=01/30/2014 A
SM SM SM PAGE TITLE
1 1 1
2 JTAG_WLAN_TMS PP 2 1 PCIE_AP_TO_WLAN_PERST_L PP 2 1 UART_BT_TO_AP_RXD PP
PERENNIAL
PP7607_RF PP7617_RF PP7622_RF DRAWING NUMBER SIZE
2 JTAG_WLAN_TRST_L 1
SM
2 JTAG_WLAN_SEL
SM
1 2 1 UART_AP_TO_BT_RTS_L
SM
1 Apple Inc.
051-00542 D
PP PP PP
REVISION
PP7608_RF
P2MM-NSM OMIT
PP7618_RF
P2MM-NSM OMIT
PP7623_RF
P2MM-NSM OMIT
R
5.0.0
SM SM SM NOTICE OF PROPRIETARY PROPERTY: BRANCH
2 1 AP_TO_WLAN_DEV_WAKE 1 2 1 PMU_TO_WLAN_REG_ON 1 2 1 UART_BT_TO_AP_CTS_L 1
PP PP PP
PP7609_RF PP7619_RF PP7624_RF THE POSESSOR AGREES TO THE FOLLOWING: PAGE
2 1 BT_TO_PMU_HOST_WAKE 1
SM
2 1 PMU_TO_BT_REG_ON
SM
1 2 1 AP_TO_BT_WAKE
SM
1
76 OF 77
PP PP PP
SHEET
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
D
WIFI UPPER ANTENNA FEEDS OMIT_TABLE
D
R7704_RF
2.4NH+/-0.1NH-0.370A
80 BI
50_WLAN_G_0 1 2 50_UAT_WLAN_2G_EAST BI 53
79
2GHZ UAT
01005
1 C7707_RF 1 C7708_RF
0.2PF 0.6PF
+/-0.1PF +/-0.05PF
2 16V
NP0-C0G
16V
2 CERM
01005 01005
WLAN_UP_RFFE WLAN_UP_RFFE
NOSTUFF OMIT_TABLE
OMIT_TABLE
R7703_RF
1
0.00 2
80 50_WLAN_A_0 50_UAT_WLAN_5G_EAST 53
BI
0%
BI 79 5GHZ UAT
1 C7705_RF 1/32W 1 C7706_RF
MF
0.2PF 01005 0.2PF
+/-0.1PF +/-0.1PF
2 16V
NP0-C0G
16V
2 NP0-C0G
01005 01005
OMIT OMIT
C C
JUAT2_RF
MM8830-2600B
F-RT-SM
W5BPF_RF
OMIT_TABLE 5.15-5.85GHZ-1.2DB OMIT_TABLE
R7711_RF LFB185G53CGZE200 R7702_RF
1
0.00 2 1 3 1
0.00 2 1 2
79 53 BI
50_UAT_WLAN_5G_WEST 50_UAT_WLAN_5G_BPF 50_UAT2_BPF 50_UAT2_TEST 50_UAT2_M IO 1
C R
0% 0%
1/32W 1 C7709_RF 1/32W 1 C7710_RF
2
MF MF
1 C7729_RF 01005 1 C7711_RF 0.2PF 01005 0.2PF GND
+/-0.1PF +/-0.1PF
0.2PF 0.2PF 2 16V 2 16V
+/-0.1PF +/-0.1PF NP0-C0G NP0-C0G
3
UP_RFFE
2 16V
NP0-C0G 2 16V
NP0-C0G
01005
WLAN_UP_RFFE
01005
WLAN_UP_RFFE
01005 01005 OMIT OMIT
OMIT OMIT
B B
A A
PAGE TITLE
WIFI FRONT-END [77]

DRAWING NUMBER SIZE
Apple Inc.
051-00542 D
REVISION
R
5.0.0

77 OF 77
SHEET
8 7 6 5 4 3 2 1

IPHONE 7PLUS SCH 051-00542 BRD 820-00249-A Intel

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8 7 6 5 4 3 2 1

D111/121 MLB - Carrier

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION

051-00542 1 SCH,MLB,D111/121 SCH CRITICAL ?

NOTICE OF PROPRIETARY PROPERTY: BRANCH

MCO 056-01585 THE INFORMATION CONTAINED HEREIN IS THE

820-00249 1 PCBF,MLB,D111/121 PCB CRITICAL ? PROPRIETARY PROPERTY OF APPLE INC.

NAND BOM Options TABLE_5_HEAD

335S00169 1 NAND,H,32GB,16nm,MLC U1701 CRITICAL NAND_32G TABLE_ALT_ITEM TABLE_ALT_ITEM

335S00182 1 NAND,H,128GB,16nm,TLC U1701 CRITICAL NAND_128G TABLE_ALT_ITEM

335S00156 1 NAND,H,256GB,3Dv3,TLC U1701 CRITICAL NAND_256G

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

138S00003 6 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1719,C1721,C1733 CRITICAL NAND_128G

D 138S00003 6 CAP,X5R,15UF,20%,,6.3V,0.65MM,HRZTL,0402 C1748,C1713,C1716,C1719,C1721,C1733 CRITICAL NAND_256G

155S00095 155S00068 ALTERNATE FL1501 FERR BD,100OHM,25%,100MA,2OHM,01005

335S00201 335S00169 ALTERNATE U1701 T,15nm,MLC,32GB TABLE_ALT_ITEM

335S00209 335S00169 ALTERNATE U1701 S,16nm,MLC,32GB TABLE_ALT_ITEM

335S00180 335S00182 ALTERNATE U1701 T,15nm,TLC,128GB TABLE_ALT_ITEM

335S00179 335S00182 ALTERNATE U1701 SD,15nm,TLC,128GB TABLE_ALT_ITEM

152S00365 152S00297 ALTERNATE ALL CYNTEC 2012 1UH

#22686038:See Radar TABLE_ALT_ITEM

Except BUCK5 LX (BUCK5 LX is Taiyo only)

152S00117 152S00074 ALTERNATE L1806,L1810,L1814,L1816,L1817 IND,PWR,SHLD,1.0 UH,3.0A,0.060 OHM,2016

CAYMAN DDR Alternates

Global R/C Alternates

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

339S00255 339S00253 ALTERNATE ALL DDR-S, 2G, B1 TABLE_ALT_ITEM

339S00257 339S00253 ALTERNATE ALL DDR-H, 3G, B1 TABLE_ALT_ITEM

339S00258 339S00253 ALTERNATE ALL DDR-S, 3G, B1 TABLE_ALT_ITEM

339S00256 339S00253 ALTERNATE ALL DDR-M, 3G, B1 TABLE_ALT_ITEM

138S00005 138S00003 ALTERNATE ALL CAP,X5R,15UF,6.3V,0.65MM,0402,TAIYO

138S00048 138S00003 ALTERNATE ALL CAP,X5R,15UF,6.3V,0.65MM,0402,KYOCERA

138S0648 138S0652 ALTERNATE ALL CAP,X5R,4.7UF,6.3V,0.65MM,0402,TAIYO

132S0400 132S0436 ALTERNATE ALL CAP,X5R,0.22UF,6.3V,01005,TDK

Magnesium Alternates TABLE_ALT_HEAD

138S0945 138S0739 ALTERNATE ALL CAP,CER,1UF,20%,10V,X5R,0201,KYOCERA

132S0436 132S0400 ALTERNATE ALL CAP,CER,X5R,0.22UF,20%,6.3V,20%

Carbon Alternates 138S00117 138S00071 ALTERNATE ALL CAP,X5R,4UF,0201,6.3V,20%, KYOCERA

New in Carrier, per #25737217

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

338S00087 338S00226 ALTERNATE U2401,U2404 Updated version of Carbon

B Phosphorous Alternates Global Ferrite Alternates TABLE_ALT_HEAD

338S00230 338S00188 ALTERNATE U2403 ST version of Phosphorous

155S00012 155S00168 ALTERNATE ALL FLTR, 65 OHMS, 0605

155S00194 155S0610 ALTERNATE ALL FERR BD, 150OHM, TDK

155S0885 155S0610 ALTERNATE ALL FERR BD, 150OHM, TY

152S00489 152S00456 ALTERNATE ALL FERR BD, 0.47UH, TY

Mamba LDO Alternates TABLE_ALT_HEAD

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

353S00932 353S00576 ALTERNATE U3801 ST, LDO REG, 2.75V

377S0168 377S0140 ALTERNATE ALL VARISTOR, 6.8V, 100PF, 01005

EEPROM Alternate TABLE_ALT_HEAD

A PART NUMBER ALTERNATE FOR

335S00234 335S00233 ALTERNATE U1101 IC,EEPROM,16KX8,1.8V,I2C,WLCSP4,ONSEMI

THE INFORMATION CONTAINED HEREIN IS THE

D111 EEEE CALLOUTS

PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION

825-6838 1 EEEE CODE FOR 639-01824 EEEE_GY4R CRITICAL EEEE_D111_BEST

825-6838 1 EEEE CODE FOR 639-01825 EEEE_GY4T CRITICAL EEEE_D111_SUPREME

825-6838 1 EEEE CODE FOR 639-01826 EEEE_GY4V CRITICAL EEEE_D111_EXTREME

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:

138S00049 138S00032 ALTERNATE ALL CAP,CER,X5R,2,2UF,20%6.3V,20%, KYOCERA

138S0831 138S00032 ALTERNATE ALL CAP,CER,X5R,2,2UF,20%,6.3V,20%,MURATA