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Sunzidul Islam
Roll : 1907079
Section : B
Semester : 2nd
Experiment No : 1
Experiment Name : Logic Gate
Truth table for NAND gate:
Input Output
A B C
0 0 1
0 1 1
1 0 1
1 1 0
Input Output
A B C
0 0 1
0 1 0
1 0 0
1 1 0
Input Output
A B C
0 0 0
0 1 0
1 0 0
1 1 1
OR Gate(IC 7432)
Input Output
A B C
0 0 0
0 1 1
1 0 1
1 1 1
Input Output
A C
0 1
1 0
EX-OR Gate
Input Output
A B C
0 0 0
0 1 1
1 0 1
1 1 0
Viva Question: