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BSS89
N-channel enhancement mode
vertical D-MOS transistor
Product specification 1998 Apr 24
Supersedes data of 1997 Jun 20
File under Discrete Semiconductors, SC13b

Philips Semiconductors Product specification

N-channel enhancement mode

BSS89
vertical D-MOS transistor

FEATURES PINNING - TO-92 variant

• Direct interface to C-MOS, TTL, etc. PIN SYMBOL DESCRIPTION
• High-speed switching 1 g gate
• No secondary breakdown. 2 d drain
3 s source
APPLICATIONS
• Line current interruptor in telephone sets
• Relay, high-speed and line transformer drivers. handbook, halfpage d
1
2
DESCRIPTION 3
g
N-channel enhancement mode vertical D-MOS transistor
in a TO-92 variant package.
MAM146 s

Fig.1 Simplified outline and symbol.

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

VDS drain-source voltage (DC) −−200 V
VGSO gate-source voltage (DC) open drain −−±
20 V
ID drain current (DC) −−300 mA
Ptot total power dissipation Tamb ≤ 25 °C −−1W
RDSon drain-source on-state resistance ID = 400 mA; VGS =10V − 4.5 6 Ω
⎪yfs⎪ forward transfer admittance ID = 400 mA; VDS = 25 V 140 350 − mS