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 DISCRETE SEMICONDUCTORS

DATA SHEET

book, halfpage

M3D087

BSP122
N-channel enhancement mode
vertical D-MOS transistor
Product specification 2001 May 18
Supersedes data of 1997 Jun 23
Philips Semiconductors Product specification

N-channel enhancement mode

BSP122
vertical D-MOS transistor

FEATURES QUICK REFERENCE DATA

• Direct interface to C-MOS, TTL, SYMBOL PARAMETER MAX. UNIT
etc.
VDS drain-source voltage (DC) 200 V
• High-speed switching
ID drain current (DC) 550 mA
• No secondary breakdown.
RDSon drain-source on-state resistance 2.5 Ω
VGSth gate-source threshold voltage 2 V
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a
SOT223 package and intended for
use as a line current interruptor in handbook, halfpage 4 d
telephone sets and for applications in
relay, high-speed and line
transformer drivers.
g

PINNING - SOT223 1 2 3 s
Top view MAM054
PIN DESCRIPTION
1 gate
2 drain
3 source Fig.1 Simplified outline (SOT223) and symbol.
4 drain

LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 60134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDS drain-source voltage (DC) − 200 V
VGSO gate-source voltage (DC) open drain − ±20 V
ID drain current (DC) − 550 mA
IDM peak drain current − 3 A
Ptot total power dissipation Tamb ≤ 25 °C; note 1 − 1.5 W
Tstg storage temperature −55 +150 °C
Tj junction temperature − 150 °C

Note
1. Transistor mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum
6 cm2.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

Rth j-a thermal resistance from junction to ambient; note 1 83.3 K/W
Note
1. Transistor mounted on an epoxy printed circuit board, 40 x 40 x 1.5 mm, mounting pad for the drain tab minimum
6 cm2.

2001 May 18 2
Philips Semiconductors Product specification

N-channel enhancement mode

BSP122
vertical D-MOS transistor

CHARACTERISTICS
Tj = 25 °C unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V(BR)DSS drain-source breakdown voltage ID = 10 µA; VGS = 0 200 − − V
IDSS drain-source leakage current VDS = 160 V; VGS = 0 − − 1 µA
IGSS gate-source leakage current VGS = ±20 V; VDS = 0 − − 100 nA
VGSth gate-source threshold voltage ID = 1 mA; VGS = VDS 0.4 − 2 V
RDSon drain-source on-resistance ID = 750 mA; VGS = 10 V − 1.7 2.5 Ω
ID = 20 mA; VGS = 2.4 V − 3 − Ω
 Yfs  transfer admittance ID = 750 mA; VDS = 25 V 400 900 − mS
Ciss input capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 100 − pF
Coss output capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 20 − pF
Crss reverse transfer capacitance VDS = 25 V; VGS = 0; f = 1 MHz − 10 − pF
Switching times (see Figs 2 and 3)
ton turn-on time ID = 750 mA; VDD = 50 V; − 10 20 ns
VGS = 0 to 10 V
toff turn-off time ID = 750 mA; VDD = 50 V; − 45 60 ns
VGS = 0 to 10 V

handbook, halfpage 90 %
handbook, halfpage VDD = 50 V
INPUT

10 %

90 %
10 V OUTPUT
ID
0V 10 %
50 Ω
ton toff
MBB691 MBB692

VDD = 50 V.

Fig.2 Switching times test circuit. Fig.3 Input and output waveforms.

2001 May 18 3
Philips Semiconductors Product specification

N-channel enhancement mode

BSP122
vertical D-MOS transistor

PACKAGE OUTLINE

Plastic surface mounted package; collector pad for good heat transfer; 4 leads SOT223

D B E A X

y
HE v M A

b1

A1

1 2 3 Lp

e1 bp w M B detail X

0 2 4 mm

scale

DIMENSIONS (mm are the original dimensions)

UNIT A A1 bp b1 c D E e e1 HE Lp Q v w y

1.8 0.10 0.80 3.1 0.32 6.7 3.7 7.3 1.1 0.95
mm 4.6 2.3 0.2 0.1 0.1
1.5 0.01 0.60 2.9 0.22 6.3 3.3 6.7 0.7 0.85

OUTLINE REFERENCES EUROPEAN

ISSUE DATE
VERSION IEC JEDEC EIAJ PROJECTION

97-02-28
SOT223 SC-73
99-09-13

2001 May 18 4
Philips Semiconductors Product specification

N-channel enhancement mode

BSP122
vertical D-MOS transistor

DATA SHEET STATUS

PRODUCT
DATA SHEET STATUS(1) DEFINITIONS
STATUS(2)
Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Changes will be
communicated according to the Customer Product/Process Change
Notification (CPCN) procedure SNW-SQ-650A.
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

DEFINITIONS
Short-form specification  The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
DISCLAIMERS
Life support applications  These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
the use of any of these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

2001 May 18 5
Philips Semiconductors Product specification

N-channel enhancement mode

BSP122
vertical D-MOS transistor

NOTES

2001 May 18 6
Philips Semiconductors Product specification

N-channel enhancement mode

BSP122
vertical D-MOS transistor

NOTES

2001 May 18 7
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SCA 72
Date of release: 2001 May 18 Document order number: 9397 750 08246