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EXPERIMENT NO – 03

DATE:
AIM:
To implement TTL Inverter using NPN BJT having Bf = 20, R1 = 4k, R2 = 1.6k, VCC =
5V.
i) Verify its functionality as an inverter and calculate the propagation delay and
frequency of operation.
ii) Plot VTC curve and calculate noise margin.
iii) Calculate the theoretical and practical fan-out and compare them.

THEORY:
Transistor–transistor logic (TTL) is a logic family built from bipolar junction transistors. Its
name signifies that transistors perform both the logic function (the first "transistor") and
the amplifying function (the second "transistor"); it is the same naming convention used
in resistor–transistor logic (RTL) and diode–transistor logic (DTL).
TTL integrated circuits (ICs) were widely used in applications such as computers,
industrial controls, test equipment and instrumentation, consumer electronics, and
synthesizers. Sometimes TTL-compatible logic levels are not associated directly with TTL
integrated circuits, for example, they may be used at the inputs and outputs of electronic
instruments.[1]
TTL became the foundation of computers and other digital electronics. Even after Very-
large-scale integration integrated circuits made multiple-circuit-board processors
obsolete, TTL devices still found extensive use as the glue logic interfacing between more
densely integrated components.

CIRCUIT DIAGRAM:
CODE:

1)TRANSIENT ANALYSIS:

*TRANSIENT ANALYSIS
.model trans npn bf=20
q1 3 2 1 trans
q 0 4 3 0trans
r1 2 5 4k
r2 4 5 1.6k
vcc 5 0 5
vin 1 0 pulse(0 5 1n 1n 1n 200n 1000n)
*analysis
.tran 0.1n 500n
.control
run
plot v(1) v(4)
.endc
.end

2)VTC:

*TTL
.model trans npn bf=20
q1 3 2 1 trans
q0 4 3 0 trans
r1 2 5 4k
r2 4 5 1.6k
vcc 5 0 5
vin 1 0 dc 5
*analysis
.dc vin 0 5 0.01
.control
run
plot v(1) v(4)
.endc
.end

3) FAN OUT:
*fan out
.model trans npn bf=20
q1 3 2 1 trans
q0 4 3 0 trans
r1 2 5 4k
r2 4 5 1.6k
vcc 5 0 1.8
vin 1 0 dc 5

*analysis
.dc vin 0 5 0.01

*SubCircuit
.subckt load a1 a2 a3 0
q1 b3 b2 a1 trans
q0 a2 b3 0 trans
r1 b2 a3 4k
r2 a2 a3 1.6k
.ends
x1 4 out1 5 0 load
x2 4 out2 5 0 load
x3 4 out3 5 0 load
x4 4 out4 5 0 load
x5 4 out5 5 0 load
x6 4 out6 5 0 load
x7 4 out7 5 0 load
x8 4 out8 5 0 load
x9 4 out9 5 0 load
x10 4 out10 5 0 load
x11 4 out11 5 0 load
x12 4 out12 5 0 load
x13 4 out13 5 0 load
x14 4 out14 5 0 load
x15 4 out15 5 0 load
x16 4 out16 5 0 load
x17 4 out17 5 0 load
x18 4 out18 5 0 load
.control
run
plot v(1) v(4)
.endc
.end
1) Propagation Delay:

2) Voltage Transfer Characteristics:

3)Fan Out:
RESULTS:

CONCLUSION:
Thus, we have successfully verified the functionality of a TTL inverter (using NPN BJT)
by performing transient analysis of the circuit. We have also plotted the voltage-transfer
characteristics (VTC) of the circuit and calculated its noise margin and maximum fan-out
values and compared them with their respective theoretical values.

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