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Computer Architecture

Unit 5
I/O ORGANIZATION
There are four types of I/O commands:

1. Control 2.Test Status 3.Read 4.Write

There are three commonly used Input/output Techniques (Data Transfer mode)

1. Programmed I/O 2.Interrupt Driven I/O 3.Direct Memory Access

Programmed Input/output:

Entire I/O is handled by CPU with the help of small software (system software) without any additional
hardware. It is based on concept of busy waiting.

Transferring a block of data using Programmed I/O


Computer Architecture
Unit 5
I/O ORGANIZATION
When the processor, main memory, and I/O share common bus, two modes of addressing are possible:

Memory Mapped Input/output

With memory-mapped I/O, there is a single address space for memory locations and I/O devices

Input/output Mapped I/O

There are separate control lines for memory and I/O devices. A memory reference instruction does not
affect an I/O device.
Computer Architecture
Unit 5
I/O ORGANIZATION
Interrupt Driven I/O:

Major drawback of programmed I/O is busy waiting, CPU has to repeatedly check whether a device is
free, the performance of CPU goes down. One solution could be, CPU switches to some other program
without waiting for the I/O device to complete. When device becomes free, it informs back the CPU
through a mechanism, known as interrupt.

Interrupt Processing:

Interrupt can be generated by various sources both internal and external. An interrupt causes CPU to
temporarily transfer control from current program to another program. This mechanism significantly
improves a computer’s I/O performance.
Computer Architecture
Unit 5
I/O ORGANIZATION

Multiple Interrupt:

If several devices are connected to CPU, CPU must know the interrupting device (may generate interrupt
at same time). In case of multiple interrupts, CPU will have to use arbitration technique to select an I/O
device to service.
Computer Architecture
Unit 5
I/O ORGANIZATION
Direct Memory Access (DMA):

When CPU is involved in data transfer, it uses the system bus twice

• During memory to CPU transfer


• During CPU to I/O transfer
DMA increase the speed of I/O transfer by eliminating the role played by CPU in such operations.

DMA Data Transfer Modes


• DMA block transfer (A block of data of arbitrary length can be transferred in single burst)
• Cycle stealing mode (The DMA controller is allowed to use the system bus to transfer one word
at a time, after that it must return control of the bus to the CPU.)
• Transparent DMA (DMA is allowed to steal only those cycles when the CPU is not using the
system bus)

I/O Processor (DO it yourself)


Computer Architecture
Unit 5
I/O ORGANIZATION
Computer Architecture
Unit 5
I/O ORGANIZATION
Computer Architecture
Unit 5
I/O ORGANIZATION
Computer Architecture
Unit 5
I/O ORGANIZATION

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