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IRL530N
HEXFET® Power MOSFET
l Logic-Level Gate Drive D
l Advanced Process Technology VDSS = 100V
l Dynamic dv/dt Rating
l 175°C Operating Temperature RDS(on) = 0.10Ω
l Fast Switching G
l Fully Avalanche Rated
ID = 17A
Description S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient and reliable device for use
in a wide variety of applications.
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.9
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62
1/09/04
IRL530N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min.Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V V GS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.122 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.100 VGS = 10V, ID = 9.0A
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.120 Ω VGS = 5.0V, ID = 9.0A
––– ––– 0.150 VGS = 4.0V, ID = 8.0A
VGS(th) Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 7.7 ––– ––– S V DS = 25V, ID = 9.0A
––– ––– 25 VDS = 100V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 16V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
Qg Total Gate Charge ––– ––– 34 ID = 9.0A
Qgs Gate-to-Source Charge ––– ––– 4.8 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 20 VGS = 5.0V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 7.2 ––– VDD = 50V
tr Rise Time ––– 53 ––– ID = 9.0A
ns
td(off) Turn-Off Delay Time ––– 30 ––– RG = 6.0Ω, VGS = 5.0V
tf Fall Time ––– 26 ––– RD = 5.5Ω, See Fig. 10
Between lead, D
LD Internal Drain Inductance ––– 4.5 ––– nH
6mm (0.25in.)
G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact S
––– ––– 17
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G
––– ––– 60
(Body Diode) p-n junction diode. S
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 9.0A, VGS = 0V
trr Reverse Recovery Time ––– 140 210 ns TJ = 25°C, I F = 9.0A
Qrr Reverse RecoveryCharge ––– 740 1100 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by ISD ≤ 9.0A, di/dt ≤ 540A/µs, VDD ≤ V(BR)DSS,
max. junction temperature. ( See fig. 11 ) TJ ≤ 175°C
Starting TJ = 25°C, L = 3.7mH Pulse width ≤ 300µs; duty cycle ≤ 2%
RG = 25Ω, IAS = 9.0A. (See Figure 12)
.
IRL530N
100 VGS
100 VGS
TOP 15V TOP 15V
12V 12V
10V 10V
8.0V 8.0V
ID , Drain-to-Source Current (A )
ID , Drain-to-Source Current (A )
6.0V 6.0V
4.0V 4.0V
3.0V 3.0V
BOTTOM 2.5V BOTTOM 2.5V
10 10
2.5 V
1 1
2 .5V
2 0µ s P U LS E W ID TH 2 0µ s P U LS E W ID TH
T J = 2 5°C T J = 1 75 °C
0.1 A 0.1 A
0.1 1 10 100 0.1 1 10 100
V D S , D rain-to-S ource V oltage (V ) V D S , D rain-to-S ource V oltage (V )
100 3.0
I D = 15 A
R D S (on) , D ra in-to -S o urc e O n R e s is ta nc e
T J = 2 5 °C
I D , D ra in -to-S ourc e C urrent (A)
2.5
T J = 1 7 5°C
10 2.0
(N o rm alize d)
1.5
1 1.0
0.5
V DS = 5 0V
2 0µ s P U L S E W ID TH V G S = 1 0V
0.1 0.0 A
A -60 -40 -20 0 20 40 60 80 100 120 140 160 180
2 3 4 5 6 7 8 9 10
1400 15
V GS = 0V , f = 1MHz I D = 9.0 A
C iss = C g s + C g d , C d s S H O R TE D V D S = 8 0V
1000
9
800
600
6
C oss
400
C rss 3
200
FO R TE S T C IR C U IT
S E E FIG U R E 1 3
0 A 0 A
1 10 100 0 10 20 30 40 50
V D S , D rain-to-S ourc e V oltage (V ) Q G , T otal G ate C harge (nC )
100 1000
O P E R A TIO N IN TH IS A R E A LIM ITE D
B Y R D S (o n )
I S D , R everse Drain C urrent (A )
I D , Drain C urrent (A )
T J = 17 5°C
100
10µ s
10
T J = 2 5°C
10 10 0µs
T C = 25 °C 1m s
T J = 17 5°C
V G S = 0V S ing le P u lse 10m s
1 A 1 A
0.4 0.6 0.8 1.0 1.2 1.4 1 10 100 1000
V S D , S ourc e-to-D rain V oltage (V ) V D S , D rain-to-S ource V oltage (V )
20 RD
VDS
VGS
D.U.T.
15 RG
I D , Drain Current (A)
+
-VDD
5.0V
10 Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
VDS
90%
0
25 50 75 100 125 150 175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1 D = 0.50
0.20
0.10
0.05 P DM
0.1 0.02 SINGLE PULSE t1
0.01 (THERMAL RESPONSE)
t2
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)
350
L ID
50
V D D = 25 V
0 A
V(BR)DSS 25 50 75 100 125 150 175
VDD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
VDS
IAS
50KΩ
12V .2µF
QG .3µF
5.0 V +
V
D.U.T. - DS
QGS QGD
VGS
VG
3mA
IG ID
Charge Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
IRL530N
+
- +
-
RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VGS=10V *
Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5% ISD
For GB Production
EXAMPLE: THIS IS ANIRF1010
LOT CODE 1789
ASSEMBLEDONWW19, 1997 INTERNATIONAL PART NUMBER
INTHE ASSEMBLYLINE "C" RECTIFIER
LOGO
DATE CODE
YEAR 7 = 1997
ASSEMBLY
LOT CODE WEEK19
LINE C
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 01/04