PD - 91364B

IRFR/U3910
HEXFET® Power MOSFET
l Ultra Low On-Resistance
D
l Surface Mount (IRFR3910)
VDSS = 100V
l Straight Lead (IRFU3910)
l Advanced Process Technology
RDS(on) = 0.115Ω
l Fast Switching G
l Fully Avalanche Rated
ID = 16A
Description S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.

The D-PAK is designed for surface mounting using

D -P A K I-P A K
vapor phase, infrared, or wave soldering techniques. T O -252 A A T O -25 1A A
The straight lead version (IRFU series) is for through-
hole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.

Absolute Maximum Ratings

Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 16
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 12 A
IDM Pulsed Drain Current † 60
PD @TC = 25°C Power Dissipation 79 W
Linear Derating Factor 0.53 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy‚† 150 mJ
IAR Avalanche Current† 9.0 A
EAR Repetitive Avalanche Energy† 7.9 mJ
dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns
TJ Operating Junction and -55 to + 175
TSTG Storage Temperature Range °C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )

Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.9
RθJA Junction-to-Ambient (PCB mount) ** ––– 50 °C/W
RθJA Junction-to-Ambient ––– 110
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Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V V GS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.12 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.115 VGS = 10V, ID = 10A „
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 6.4 ––– ––– S VDS = 50V, ID = 9.0A†
––– ––– 25 VDS = 100V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 V GS = -20V
Qg Total Gate Charge ––– ––– 44 ID = 9.0A
Qgs Gate-to-Source Charge ––– ––– 6.2 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 21 VGS = 10V, See Fig. 6 and 13 „†
td(on) Turn-On Delay Time ––– 6.4 ––– VDD = 50V
tr Rise Time ––– 27 ––– ID = 9.0A
ns
td(off) Turn-Off Delay Time ––– 37 ––– RG = 12Ω
tf Fall Time ––– 25 ––– RD = 5.5Ω, See Fig. 10 „†
Between lead, D
LD Internal Drain Inductance ––– 4.5 ––– nH
6mm (0.25in.)
G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact… S

Ciss Input Capacitance ––– 640 ––– VGS = 0V

Coss Output Capacitance ––– 160 ––– pF VDS = 25V
Crss Reverse Transfer Capacitance ––– 88 ––– ƒ = 1.0MHz, See Fig. 5†

Source-Drain Ratings and Characteristics

Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current MOSFET symbol D

––– ––– 16
(Body Diode) showing the
A
ISM Pulsed Source Current integral reverse G
––– ––– 60
(Body Diode) † p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 9.0A, VGS = 0V „
trr Reverse Recovery Time ––– 130 190 ns TJ = 25°C, I F = 9.0A
Qrr Reverse RecoveryCharge ––– 650 970 nC di/dt = 100A/µs „†
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Repetitive rating; pulse width limited by „ Pulse width ≤ 300µs; duty cycle ≤ 2%
max. junction temperature. ( See fig. 11 )
‚ VDD = 25V, starting TJ = 25°C, L = 3.1mH … This is applied for I-PAK, Ls of D-PAK is measured between lead and
RG = 25Ω, IAS = 9.0A. (See Figure 12) center of die contact
ƒ ISD ≤ 9.0A, di/dt ≤ 520A/µs, VDD ≤ V(BR)DSS, † Uses IRF530N data and test conditions
TJ ≤ 175°C

** When mounted on 1" square PCB (FR-4 or G-10 Material ) .

For recommended footprint and soldering techniques refer to application note #AN-994

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 IRFR/U3910

100 100
VG S VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V
7.0V 7.0V
I , D rain-to-S ourc e C urrent (A )

I , D rain-to-S ourc e C urrent (A )

6.0V 6.0V
5.5V 5.5V
5.0V 5.0V
BOTTOM 4.5V BOT TOM 4.5V

10 10

4 .5V
4.5V
D

D
20µs P U LS E W ID TH 20 µs P U LS E W ID TH
T J = 25°C T J = 1 75°C
1 A 1 A
0.1 1 10 100 0.1 1 10 100
VD S , Drain-to-S ource Voltage (V) V D S , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics

100 3.0
I D = 1 5A
R D S (on) , Drain-to-S ource O n Resistance
I D , D ra in -to-S ourc e C urrent (A)

2.5

T J = 2 5 °C
T J = 1 75 °C 2.0
(N orm alized)

10 1.5

1.0

0.5

V DS = 5 0V
2 0µ s P U L S E W ID TH V G S = 10 V
1 0.0 A
and A
4 5 6 7 8 9 10 -60 -40 -20 0 20 40 60 80 100 120 140 160 180

V G S , G ate-to -So urce Voltag e (V) T J , Junction T em perature (°C )

Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance

Vs. Temperature

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IRFR/U3910

1200 20
V GS = 0V , f = 1M H z I D = 9 .0A
C is s = C g s + C gd , C ds S H O R T E D
V D S = 80 V
C rss = C gd

V G S , G ate-to-S o urc e V oltage (V )

1000 C os s = C ds + C gd V D S = 50 V
16 V D S = 20 V
C iss
C , C apac itanc e (pF )

800

12
600
C oss
8
400

C rs s
200 4

FO R TE S T C IR C U IT
0 A S E E F IG U R E 1 3
0 A
1 10 100
0 5 10 15 20 25 30 35 40 45
V D S , Drain-to-S ourc e Voltage (V)
Q G , T otal G ate C harge (nC )

Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage Gate-to-Source Voltage

100
1000
O P E R A TIO N IN TH IS A R E A L IM ITE D
B Y R D S (o n)
I S D , Reverse D rain C urrent (A)

I D , Drain C urrent (A )

100
T J = 1 75 °C

10 10µ s
T J = 2 5°C

10 100µ s

1m s
T C = 25 °C
T J = 17 5°C
VG S = 0 V S ing le P u lse 10m s
1 A 1
0.4 0.6 0.8 1.0 1.2 1.4 1.6
A
1 10 100 1000
V S D , S ourc e-to-D rain V oltage (V ) V D S , D rain-to-S ource V oltage (V )

Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area

Forward Voltage
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 IRFR/U3910

20 RD
VDS

VGS
D.U.T.
15 RG
I D , Drain Current (A)

+
-VDD

5.0V
10 Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

5
VDS
90%

0
25 50 75 100 125 150 175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs. td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms

10
Thermal Response (Z thJC )

1 D = 0.50

0.20

0.10
0.05 P DM
0.1 0.02 SINGLE PULSE t1
0.01 (THERMAL RESPONSE)
t2

Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
0.01
0.00001 0.0001 0.001 0.01 0.1 1
t1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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IRFR/U3910

350
ID

E A S , S ingle Pulse Avalanc he E nergy (m J)

TOP 3.7 A
300 6.4A
1 5V
B O TT O M 9 .0 A

250

L D R IV E R
VD S
200

RG D .U .T +
V 150
- DD
IA S A
10V
tp 0.0 1 Ω 100

Fig 12a. Unclamped Inductive Test Circuit 50

V D D = 25 V
0 A
25 50 75 100 125 150 175
V (B R )D SS S tarting T J , J unc tion T em perature (°C )
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current

IAS

Fig 12b. Unclamped Inductive Waveforms Current Regulator

Same Type as D.U.T.

50KΩ

12V .2µF
QG .3µF

5.0 V +
V
D.U.T. - DS
QGS QGD
VGS
VG
3mA

IG ID
Charge Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit

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 IRFR/U3910

Peak Diode Recovery dv/dt Test Circuit

+ Circuit Layout Considerations

D.U.T
• Low Stray Inductance
• Ground Plane
ƒ
• Low Leakage Inductance
Current Transformer
-

+
‚
„
- +
-


RG • dv/dt controlled by RG +
• Driver same type as D.U.T. VDD
-
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test

Driver Gate Drive

P.W.
Period D=
P.W. Period

VGS=10V *

D.U.T. ISD Waveform

Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD

Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent

Ripple ≤ 5% ISD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFETS

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IRFR/U3910

Package Outline
TO-252AA Outline
Dimensions are shown in millimeters (inches)

2 .3 8 (.0 9 4 )
6 .7 3 (.2 6 5 ) 2 .1 9 (.0 8 6 )
6 .3 5 (.2 5 0 ) 1 .1 4 (.0 4 5 )
0 .8 9 (.0 3 5 )
-A -
5 .4 6 (.2 1 5 ) 1 .2 7 (.0 5 0 ) 0 .5 8 (.0 2 3 )
5 .2 1 (.2 0 5 ) 0 .8 8 (.0 3 5 ) 0 .4 6 (.0 1 8 )

6 .2 2 (.2 4 5 )
5 .9 7 (.2 3 5 )
1 .0 2 (.0 4 0 )
1 .6 4 (.0 2 5 ) 1 2 3
-B -
1 .5 2 (.0 6 0 )
1 .1 5 (.0 4 5 )
0 .8 9 (.0 3 5 )
3X
0 .6 4 (.0 2 5 )
1 .1 4 (.0 4 5 )
2 X 0 .7 6 (.0 3 0 ) 0 .2 5 (.0 1 0 )
6 .4 5 (.2 4 5 )
5 .6 8 (.2 2 4 )
1 0 .4 2 (.4 1 0 )
9 .4 0 (.3 7 0 ) L E A D A S S IG N M E N T S
1 - GATE
0 .5 1 (.0 2 0 ) 2 - D R A IN
M IN . 3 - SOURCE
4 - D R A IN
0 .5 8 (.0 2 3 )
0 .4 6 (.0 1 8 )
M A M B

2 .2 8 (.0 9 0 ) N O TE S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 .
4 .5 7 (.1 8 0 ) 2 C O N T R O L L IN G D IM E N S IO N : IN C H .
3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A .
4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP ,
S O L D E R D IP M A X . + 0 .1 6 (.0 0 6 ).

Part Marking Information

TO-252AA (D-PARK)

E XA M P L E : T H IS IS A N IR F R 1 2 0
W IT H A S S E M B L Y A
LOT COD E 9U1P IN T E R N A T IO N A L
F IR S T P O R T IO N
R E C T IF IE R
IR F R OF PART NUMBER
LO GO
120
9U 1P
ASS EMB LY S E C O N D P O R TIO N
LOT CODE OF PART NUMBER

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 IRFR/U3910

Package Outline
TO-251AA Outline
Dimensions are shown in millimeters (inches)

6 .7 3 (.2 6 5 ) 2 .3 8 (.0 9 4 )
6 .3 5 (.2 5 0 ) 2 .1 9 (.0 8 6 )
-A -
1 .2 7 (.0 5 0 ) 0 .5 8 (.0 2 3 )
5 .4 6 (.2 1 5 )
0 .8 8 (.0 3 5 ) 0 .4 6 (.0 1 8 )
5 .2 1 (.2 0 5 )
L E A D A S S IG N M E N T S
4 1 - GATE
6 .4 5 (.2 4 5 ) 2 - D R A IN
5 .6 8 (.2 2 4 ) 3 - SOURCE
1 .5 2 (.0 6 0 ) 6 .2 2 (.2 4 5 ) 4 - D R A IN
1 .1 5 (.0 4 5 ) 5 .9 7 (.2 3 5 )

1 2 3

-B - N O TE S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 .
2 .2 8 (.0 9 0 ) 9 .6 5 (.3 8 0 ) 2 C O N T R O L L IN G D IM E N S IO N : IN C H .
1 .9 1 (.0 7 5 ) 8 .8 9 (.3 5 0 ) 3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A .
4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP ,
S O L D E R D IP M A X . + 0 .1 6 (.0 0 6 ).

1 .1 4 (.0 4 5 ) 1 .1 4 (.0 4 5 )
3X 0 .8 9 (.0 3 5 )
0 .7 6 (.0 3 0 ) 3X 0 .8 9 (.0 3 5 )
0 .6 4 (.0 2 5 )

2 .2 8 (.0 9 0 ) 0 .2 5 (.0 1 0 ) M A M B 0 .5 8 (.0 2 3 )

0 .4 6 (.0 1 8 )
2X

Part Marking Information

TO-251AA (I-PARK)

E XA M P L E : TH IS IS A N IR F U 1 2 0
W IT H A S S E M B L Y
LOT CODE 9U1P IN TE R N A T IO N A L
F IR S T P O R TIO N
R E C TIF IE R
IR F U OF PART NUMBER
LO G O
12 0
9U 1P
AS SEMBLY S E C O N D P O R TIO N
LOT CODE OF PART NUM BER

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IRFR/U3910

Tape & Reel Information

TO-252AA

TR TRR TR L

1 6.3 ( .641 ) 16.3 ( .64 1 )

1 5.7 ( .619 ) 15.7 ( .61 9 )

12 .1 ( .4 76 ) 8 .1 ( .3 18 )
F E E D D IR E C T IO N F E E D D IR E C T IO N
11 .9 ( .4 69 ) 7 .9 ( .3 12 )

NO T ES :
1. C O N T R O LL IN G D IM E N S IO N : M ILLIM E T E R .
2. A LL D IM E N S IO N S A R E S H O W N IN M ILL IM E T E R S ( IN C H E S ).
3. O U T L IN E C O N F O R M S T O E IA -4 81 & E IA -54 1.

13 IN C H

16 m m
NOTES :
1. O U T LIN E C O N F O R M S T O E IA -481 .

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Data and specifications subject to change without notice. 5/98
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/