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Compal LA-D101P Rev 1.0
Compal LA-D101P Rev 1.0
1 1
Compal Confidential
2 2
2014-02-10
3 3
REV:1.0
14PCB@
DA1 PCB
Part Number Description
DA60013Y010
REV1.0 M/B
4 4
15PCB@
DA2 PCB
Part Number Description Security Classification Compal Secret Data Compal Electronics, Inc.
DA60013Y110 2013/04/12 2014/04/12 Title
REV1.0 M/B Issued Date Deciphered Date Cover Page
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-B101P
Date: Tuesday, February 18, 2014 Sheet 1 of 47
A B C D E
A B C D E
15W
Memory Bus
VRAM DDR3L 1GB/2GB 0"#$%&&Z(>"^K"&/DD%y/
!!Z#>%&###D,)%*&+#,s.
eDP X1
(2 Lanes) USB3.0 x1 Left USB3.0 x1
eDP Panel
USB2.0 x1 USB30 Port 0
CRT
CRT Conn. Left USB2.0 x1
Intel Valleyview USB2.0 x1
DDI X1 USB20 Port 1
(4 Lanes) SOC
HDMI Conn.
2
25mm X 27mm USB2.0 x1 Right USB2.0 x1 2
USB20 Port 2
PCIe X1
LAN (1 Lanes) Right USB2.0 x1 Touch Screen
RJ45 Conn. RTL8106E/RTL8111G Finger Printer
USB HUB Port 1 USB HUB Port 1
10/100/GIGA USB2.0 x1 For E14 For B14/B15 USB HUB Port 2
USB Hub * 1
PCIe Port 0
USB20 Port 3
NGFF (1 Lanes)
WLAN / BT SATA X1 HDD Conn.
USB2.0 X1 SATA Port 4
(1 Lanes)
PCIe Port 1
SATA X1 ODD Conn.
SATA Port 5
3 3
SPI ROM EC
Sub-borad 8MB Nuvoton 288N Int. MIC Conn. Int. Speaker Conn. Audio Combo Jacks
HP & MIC
15"
14"
DC IN/B BATT/B Thermal Sensor Touch Pad Int. KBD
Power/B
4
ODD/B 4
IO/B
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Date: Tuesday, February 18, 2014 Sheet 2 of 47
A B C D E
A B C D E
S IC FH8065301616203 SR1SF B3 1.86G C38! S IC FH8065301616103 SR1SE B3 2.17G C38! S IC FH8065301619509 SR1SJ B3 1.86G C38!
Part Number = SA00007E860 Part Number = SA00007E990 Part Number = SA00007EO50
4 4
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 3 of 47
A B C D E
5 4 3 2 1
ON/OFF ON/OFF
EC_RSMRST#
EC_RSMRST# ! 100.1ms
104.9ms
PBTN_OUT#
205.0ms
! " ! PBTN_OUT#
PMC_SLP_S4# ! 22.92ms
PMC_SLP_S4#
PMC_SLP_S3# ! 22.96ms
C PMC_SLP_S3# C
! 5.555ms 2.078ms !
DDR_PWROK DDR_PWROK
B
! 249.3ms ! 6.702ms ! 36.81ms ! 5.241ms B
SUSP# SUSP#
! 22.58us ! 1.213ms ! 23.14us ! 1.286ms
+1.0VS +1.0VS
! 1.406ms ! 1.329ms ! 1.383ms ! 1.361ms
+1.05VS +1.05VS
! 1.893ms ! 8.813ms ! 1.918ms ! 8.902ms
+1.35VS +1.35VS
! 2.156ms ! 18.73ms ! 2.160ms ! 18.71ms
+1.5VS +1.5VS
! 3.042ms ! 12.40ms ! 3.056ms ! 12.46ms
+1.8VS +1.8VS
13.65ms 13.79ms
! 3.538ms ! 156.8ms ! 3.546ms ! 156.8ms
+3VS ! ! +3VS
! 4.272ms ! 18.32ms ! 4.284ms 18.33ms
+5VS +5VS
! 8.081ms ! 25.48ms ! 8.076ms ! 25.56ms
+0.675VS +0.675VS
A
! 62.96ms ! 12.40ms ! 62.98ms ! 7.479ms A
DDR_CORE_PWROK DDR_CORE_PWROK
! 6.040ms ! 5.690ms
PMC_PLTRST# PMC_PLTRST#
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5 4 3 2 1
5 4 3 2 1
D D
USOC1A USOC1B
[13] DDR_A_MA[0..15] K45 M36 DDR_A_D[0..63] [13] [14] DDR_B_MA[0..15] AY45 BG38 DDR_B_D[0..63] [14]
DDR_A_MA0 DDR_A_D0 DDR_B_MA0 DDR_B_D0
DDR_A_MA1 H47 DRAM0_MA_0 DRAM0_DQ_0 J36 DDR_A_D1 DDR_B_MA1 BB47 DRAM1_MA_0 DRAM1_DQ_0 BC40 DDR_B_D1
DDR_A_MA2 L41 DRAM0_MA_1 DRAM0_DQ_1 P40 DDR_A_D2 DDR_B_MA2 AW41 DRAM1_MA_1 DRAM1_DQ_1 BA42 DDR_B_D2
DDR_A_MA3 H44 DRAM0_MA_2 DRAM0_DQ_2 M40 DDR_A_D3 DDR_B_MA3 BB44 DRAM1_MA_2 DRAM1_DQ_2 BD42 DDR_B_D3
DDR_A_MA4 H50 DRAM0_MA_3 DRAM0_DQ_3 P36 DDR_A_D4 DDR_B_MA4 BB50 DRAM1_MA_3 DRAM1_DQ_3 BC38 DDR_B_D4
DDR_A_MA5 G53 DRAM0_MA_4 DRAM0_DQ_4 N36 DDR_A_D5 DDR_B_MA5 BC53 DRAM1_MA_4 DRAM1_DQ_4 BD36 DDR_B_D5
DDR_A_MA6 H49 DRAM0_MA_5 DRAM0_DQ_5 K40 DDR_A_D6 DDR_B_MA6 BB49 DRAM1_MA_5 DRAM1_DQ_5 BF42 DDR_B_D6
DDR_A_MA7 D50 DRAM0_MA_6 DRAM0_DQ_6 K42 DDR_A_D7 DDR_B_MA7 BF50 DRAM1_MA_6 DRAM1_DQ_6 BC44 DDR_B_D7
DDR_A_MA8 G52 DRAM0_MA_7 DRAM0_DQ_7 B32 DDR_A_D8 DDR_B_MA8 BC52 DRAM1_MA_7 DRAM1_DQ_7 BH32 DDR_B_D8
DDR_A_MA9 E52 DRAM0_MA_8 DRAM0_DQ_8 C32 DDR_A_D9 DDR_B_MA9 BE52 DRAM1_MA_8 DRAM1_DQ_8 BG32 DDR_B_D9
DDR_A_MA10 K48 DRAM0_MA_9 DRAM0_DQ_9 C36 DDR_A_D10 DDR_B_MA10 AY48 DRAM1_MA_9 DRAM1_DQ_9 BG36 DDR_B_D10
DDR_A_MA11 E51 DRAM0_MA_10 DRAM0_DQ_10 A37 DDR_A_D11 DDR_B_MA11 BE51 DRAM1_MA_10 DRAM1_DQ_10 BJ37 DDR_B_D11
DDR_A_MA12 F47 DRAM0_MA_11 DRAM0_DQ_11 C33 DDR_A_D12 DDR_B_MA12 BD47 DRAM1_MA_11 DRAM1_DQ_11 BG33 DDR_B_D12
DDR_A_MA13 J51 DRAM0_MA_12 DRAM0_DQ_12 A33 DDR_A_D13 DDR_B_MA13 BA51 DRAM1_MA_12 DRAM1_DQ_12 BJ33 DDR_B_D13
DDR_A_MA14 B49 DRAM0_MA_13 DRAM0_DQ_13 C37 DDR_A_D14 DDR_B_MA14 BH49 DRAM1_MA_13 DRAM1_DQ_13 BG37 DDR_B_D14
DDR_A_MA15 B50 DRAM0_MA_14 DRAM0_DQ_14 B38 DDR_A_D15 DDR_B_MA15 BH50 DRAM1_MA_14 DRAM1_DQ_14 BH38 DDR_B_D15
DRAM0_MA_15 DRAM0_DQ_15 F36 DDR_A_D16 DRAM1_MA_15 DRAM1_DQ_15 AU36 DDR_B_D16
[13] DDR_A_DM[0..7] G36 DRAM0_DQ_16 G38 [14] DDR_B_DM[0..7] BD38 DRAM1_DQ_16 AT36
DDR_A_DM0 DDR_A_D17 DDR_B_DM0 DDR_B_D17
DDR_A_DM1 B36 DRAM0_DM_0 DRAM0_DQ_17 F42 DDR_A_D18 DDR_B_DM1 BH36 DRAM1_DM_0 DRAM1_DQ_17 AV40 DDR_B_D18
DDR_A_DM2 F38 DRAM0_DM_1 DRAM0_DQ_18 J42 DDR_A_D19 DDR_B_DM2 BC36 DRAM1_DM_1 DRAM1_DQ_18 AT40 DDR_B_D19
DDR_A_DM3 B42 DRAM0_DM_2 DRAM0_DQ_19 G40 DDR_A_D20 DDR_B_DM3 BH42 DRAM1_DM_2 DRAM1_DQ_19 BA36 DDR_B_D20
DDR_A_DM4 P51 DRAM0_DM_3 DRAM0_DQ_20 C38 DDR_A_D21 DDR_B_DM4 AT51 DRAM1_DM_3 DRAM1_DQ_20 AV36 DDR_B_D21
DDR_A_DM5 V42 DRAM0_DM_4 DRAM0_DQ_21 G44 DDR_A_D22 DDR_B_DM5 AM42 DRAM1_DM_4 DRAM1_DQ_21 AY42 DDR_B_D22
DDR_A_DM6 Y50 DRAM0_DM_5 DRAM0_DQ_22 D42 DDR_A_D23 DDR_B_DM6 AK50 DRAM1_DM_5 DRAM1_DQ_22 AY40 DDR_B_D23
DDR_A_DM7 Y52 DRAM0_DM_6 DRAM0_DQ_23 A41 DDR_A_D24 DDR_B_DM7 AK52 DRAM1_DM_6 DRAM1_DQ_23 BJ41 DDR_B_D24
DRAM0_DM_7 DRAM0_DQ_24 C41 DDR_A_D25 DRAM1_DM_7 DRAM1_DQ_24 BG41 DDR_B_D25
M45 DRAM0_DQ_25 A45 DDR_A_D26 AV45 DRAM1_DQ_25 BJ45 DDR_B_D26
[13] DDR_A_RAS# M44 DRAM0_RAS# DRAM0_DQ_26 B46 [14] DDR_B_RAS# AV44 DRAM1_RAS# DRAM1_DQ_26 BH46
DDR_A_D27 DDR_B_D27
[13] DDR_A_CAS# H51 DRAM0_CAS# DRAM0_DQ_27 C40 [14] DDR_B_CAS# BB51 DRAM1_CAS# DRAM1_DQ_27 BG40
DDR_A_D28 DDR_B_D28
[13] DDR_A_WE# DRAM0_WE# DRAM0_DQ_28 B40 [14] DDR_B_WE# DRAM1_WE# DRAM1_DQ_28 BH40
C DDR_A_D29 DDR_B_D29 C
K47 DRAM0_DQ_29 B48 DDR_A_D30 AY47 DRAM1_DQ_29 BH48 DDR_B_D30
[13] DDR_A_BS0 K44 DRAM0_BS_0 DRAM0_DQ_30 B47 [14] DDR_B_BS0 AY44 DRAM1_BS_0 DRAM1_DQ_30 BH47
DDR_A_D31 DDR_B_D31
[13] DDR_A_BS1 D52 DRAM0_BS_1 DRAM0_DQ_31 K52 [14] DDR_B_BS1 BF52 DRAM1_BS_1 DRAM1_DQ_31 AY52
DDR_A_D32 DDR_B_D32
[13] DDR_A_BS2 DRAM0_BS_2 DRAM0_DQ_32 K51 [14] DDR_B_BS2 DRAM1_BS_2 DRAM1_DQ_32 AY51
DDR_A_D33 DDR_B_D33
P44 DRAM0_DQ_33 T52 DDR_A_D34 AT44 DRAM1_DQ_33 AP52 DDR_B_D34
[13] DDR_A_CS0# DRAM0_CS_0# DRAM0_DQ_34 T51 [14] DDR_B_CS0# DRAM1_CS_0# DRAM1_DQ_34 AP51
DDR_A_D35 DDR_B_D35
P45 DRAM0_DQ_35 L51 DDR_A_D36 AT45 DRAM1_DQ_35 AW51 DDR_B_D36
[13] DDR_A_CS2# DRAM0_CS_2# DRAM0_DQ_36 L53 [14] DDR_B_CS2# DRAM1_CS_2# DRAM1_DQ_36 AW53
DDR_A_D37 DDR_B_D37
DRAM0_DQ_37 R51 DDR_A_D38 DRAM1_DQ_37 AR51 DDR_B_D38
C47 DRAM0_DQ_38 R53 DDR_A_D39 BG47 DRAM1_DQ_38 AR53 DDR_B_D39
[13] DDR_A_CKE0 D48 DRAM0_CKE_0 DRAM0_DQ_39 T47 [14] DDR_B_CKE0 BE46 DRAM1_CKE_0 DRAM1_DQ_39 AP47
DDR_A_D40 DDR_B_D40
F44 RESERVED_D48 DRAM0_DQ_40 T45 DDR_A_D41 BD44 RESERVED_BE46 DRAM1_DQ_40 AP45 DDR_B_D41
[13] DDR_A_CKE2 E46 DRAM0_CKE_2 DRAM0_DQ_41 Y40 [14] DDR_B_CKE2 BF48 DRAM1_CKE_2 DRAM1_DQ_41 AK40
DDR_A_D42 DDR_B_D42
RESERVED_E46 DRAM0_DQ_42 V41 DDR_A_D43 RESERVED_BF48 DRAM1_DQ_42 AM41 DDR_B_D43
T41 DRAM0_DQ_43 T48 DDR_A_D44 AP41 DRAM1_DQ_43 AP48 DDR_B_D44
[13] DDR_A_ODT0 DRAM0_ODT_0 DRAM0_DQ_44 T50 [14] DDR_B_ODT0 DRAM1_ODT_0 DRAM1_DQ_44 AP50
DDR_A_D45 DDR_B_D45
P42 DRAM0_DQ_45 Y42 DDR_A_D46 AT42 DRAM1_DQ_45 AK42 DDR_B_D46
[13] DDR_A_ODT2 DRAM0_ODT_2 DRAM0_DQ_46 AB40 [14] DDR_B_ODT2 DRAM1_ODT_2 DRAM1_DQ_46 AH40
DDR_A_D47 DDR_B_D47
DRAM0_DQ_47 V45 DDR_A_D48 DRAM1_DQ_47 AM45 DDR_B_D48
M50 DRAM0_DQ_48 V47 DDR_A_D49 AV50 DRAM1_DQ_48 AM47 DDR_B_D49
[13] DDR_A_CLK0 M48 DRAM0_CKP_0 DRAM0_DQ_49 AD48 [14] DDR_B_CLK0 AV48 DRAM1_CKP_0 DRAM1_DQ_49 AF48
DDR_A_D50 DDR_B_D50
[13] DDR_A_CLK0# DRAM0_CKN_0 DRAM0_DQ_50 AD50 [14] DDR_B_CLK0# DRAM1_CKN_0 DRAM1_DQ_50 AF50
DDR_A_D51 DDR_B_D51
DRAM0_DQ_51 V48 DDR_A_D52 DRAM1_DQ_51 AM48 DDR_B_D52
P50 DRAM0_DQ_52 V50 DDR_A_D53 DRAM1_DQ_52 AM50 DDR_B_D53
[13] DDR_A_CLK2 P48 DRAM0_CKP_2 DRAM0_DQ_53 AB44 AT50 DRAM1_DQ_53 AH44
DDR_A_D54 DDR_B_D54
[13] DDR_A_CLK2# DRAM0_CKN_2 DRAM0_DQ_54 Y45 [14] DDR_B_CLK2 AT48 DRAM1_CKP_2 DRAM1_DQ_54 AK45
DDR_A_D55 DDR_B_D55
DRAM0_DQ_55 V52 [14] DDR_B_CLK2# DRAM1_CKN_2 DRAM1_DQ_55 AM52
DDR_A_D56 DDR_B_D56
DRAM0_DQ_56 W51 DDR_A_D57 DRAM1_DQ_56 AL51 DDR_B_D57
P41 DRAM0_DQ_57 AC53 DDR_A_D58 DRAM1_DQ_57 AG53 DDR_B_D58
[13] DDR_A_RST# DRAM0_DRAMRST# DRAM0_DQ_58 AC51 AT41 DRAM1_DQ_58 AG51
DDR_A_D59 DDR_B_D59
DRAM0_DQ_59 W53 [14] DDR_B_RST# DRAM1_DRAMRST# DRAM1_DQ_59 AL53
DDR_A_D60 DDR_B_D60
DRAM0_DQ_60 Y51 DDR_A_D61 DRAM1_DQ_60 AK51 DDR_B_D61
AF44 DRAM0_DQ_61 AD52 DDR_A_D62 DRAM1_DQ_61 AF52 DDR_B_D62
+DDR_SOC_VREF DRAM_VREF JKLMDs DRAM0_DQ_62 DRAM1_DQ_62
AD51 DDR_A_D63 AF51 DDR_B_D63
DRAM0_DQ_63 DRAM1_DQ_63
B B
100K_0402_1% 1 2 R960 DDR_TERMN0 AF42 J38 DDR_A_DQS0 BF40 DDR_B_DQS0
100K_0402_1% 1 2 R961 DDR_TERMN1 AH42 ICLK_DRAM_TERMN_AF42 DRAM0_DQSP_0 K38 DDR_A_DQS#0 DRAM1_DQSP_0 BD40 DDR_B_DQS#0
ICLK_DRAM_TERMN_AH42 DRAM0_DQSN_0 C35 DDR_A_DQS1 DRAM1_DQSN_0 BG35 DDR_B_DQS1
DRAM0_DQSP_1 B34 DDR_A_DQS#1 DRAM1_DQSP_1 BH34 DDR_B_DQS#1
DRAM0_DQSN_1 D40 DDR_A_DQS2 DRAM1_DQSN_1 BA38 DDR_B_DQS2
AD42 DRAM0_DQSP_2 F40 DDR_A_DQS#2 DRAM1_DQSP_2 AY38 DDR_B_DQS#2
[41] DDR_PWROK AB42 DRAM_VDD_S4_PWROK DRAM0_DQSN_2 B44 DRAM1_DQSN_2 BH44
DDR_A_DQS3 DDR_B_DQS3
[8] DDR_CORE_PWROK DRAM_CORE_PWROK DRAM0_DQSP_3 C43 DRAM1_DQSP_3 BG43
DDR_A_DQS#3 DDR_B_DQS#3
DRAM0_DQSN_3 N53 DDR_A_DQS4 DRAM1_DQSN_3 AU53 DDR_B_DQS4
23.2_0402_1% 1 2 R962 DDR_RCOMP0 AD44 DRAM0_DQSP_4 M52 DDR_A_DQS#4 DRAM1_DQSP_4 AV52 DDR_B_DQS#4
29.4_0402_1% 1 2 R963 DDR_RCOMP1 AF45 DRAM_RCOMP_0 DRAM0_DQSN_4 T42 DDR_A_DQS5 DRAM1_DQSN_4 AP42 DDR_B_DQS5
162_0402_1% 1 2 R964 DDR_RCOMP2 AD45 DRAM_RCOMP_1 DRAM0_DQSP_5 T44 DDR_A_DQS#5 DRAM1_DQSP_5 AP44 DDR_B_DQS#5
DRAM_RCOMP_2 DRAM0_DQSN_5 Y47 DDR_A_DQS6 DRAM1_DQSN_5 AK47 DDR_B_DQS6
DRAM0_DQSP_6 Y48 DDR_A_DQS#6 DRAM1_DQSP_6 AK48 DDR_B_DQS#6
Follow CRB v1.15 DRAM0_DQSN_6 DRAM1_DQSN_6
AF40 AB52 DDR_A_DQS7 AH52 DDR_B_DQS7
AF41 RESERVED_AF40 DRAM0_DQSP_7 AA51 DDR_A_DQS#7 DRAM1_DQSP_7 AJ51 DDR_B_DQS#7
AD40 RESERVED_AF41 DRAM0_DQSN_7 DRAM1_DQSN_7
AD41 RESERVED_AD40
RESERVED_AD41 DDR_A_DQS[0..7] [13] DDR_B_DQS[0..7] [14]
1 OF 13 2 OF 13
DDR_A_DQS#[0..7] [13] DDR_B_DQS#[0..7] [14]
FH8065301546401_FCBGA131170 FH8065301546401_FCBGA131170
+1.35V +DDR_SOC_VREF
A A
1 2
R965 1
4.7K_0402_1%
C1132
1 2 .1U_0402_16V7K
R966 2
4.7K_0402_1%
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Date: Tuesday, February 18, 2014 Sheet 5 of 47
5 4 3 2 1
5 4 3 2 1
RP43
USOC1C 150_0804_8P4R_1%
CRT_R 8 1
AV3 AG3 CRT_G 7 2
[24] HDMI_TX2+ DDI0_TXP_0 DDI1_TXP_0 EDP_TXP0 [23]
AV2 /KJs /KJs AG1 CRT_B 6 3
[24] HDMI_TX2- DDI0_TXN_0 DDI1_TXN_0 EDP_TXN0 [23]
AT2 AF3 5 4
[24] HDMI_TX1+ DDI0_TXP_1 DDI1_TXP_1 EDP_TXP1 [23]
AT3 AF2
[24] HDMI_TX1- DDI0_TXN_1 DDI1_TXN_1 EDP_TXN1 [23]
AR3 AD3
[24] HDMI_TX0+ DDI0_TXP_2 DDI1_TXP_2
AR1 AD2
[24] HDMI_TX0- DDI0_TXN_2 DDI1_TXN_2
AP3 AC3
[24] HDMI_CLK+
AP2 DDI0_TXP_3 DDI1_TXP_3 AC1 eDP Panel +1.8VS
D
HDMI [24] HDMI_CLK- DDI0_TXN_3 DDI1_TXN_3 D
5
AL1 /KJs AK2 EDP_AUXN [23] @ U61
DDI0_AUXN DDI1_AUXN 1
P
D27 K30 NC 4 R1081 1 @ 2 0_0402_5%
[24] HDMI_HPD# DDI0_HPD /KOs /KOs DDI1_HPD EDP_HPD# [23] Y BKOFF# [23]
DDI1_ENBKL 2
A
G
C26 /KOs /KOs P30 DDI1_ENABLE R967 1 2 2.2K_0402_5% +1.8VS
[24] HDMI_DDCDATA DDI0_DDCDATA DDI1_DDCDATA
C28 /KOs /KOs G30 NL17SZ07DFT2G_SC70-5
[24] HDMI_DDCCLK
3
DDI0_DDCCLK DDI1_DDCCLK SA00004BV00
B28 /KOs N30 DDI1_ENVDD
C27 DDI0_VDDEN DDI1_VDDEN J30 DDI1_ENBKL
DDI0_BKLTEN /KOs DDI1_BKLTEN
B26 /KOs M30 DDI1_PWM R1060 1 RS@ 2 0_0402_5%
DDI0_BKLTCTL DDI1_BKLTCTL SOC_ENBKL [33]
AH3
1 R968 2 DDI0_RCOMPP AK12 VSS_AH3 AH2
DDI0_RCOMP_P VSS_AH2
Follow CRB v1.15 0ohm till to GND
402_0402_1% DDI0_RCOMPN AK13
AM14 DDI0_RCOMP_N AH14
AM13 RESERVED_AM14 RESERVED_AH14 AH13
AM3 RESERVED_AM13 RESERVED_AH13 AF14
AM2 VSS_AM3 RESERVED_AF14 AF13 +1.8VS
Follow CRB v1.15 0ohm till to GND VSS_AM2 RESERVED_AF13
BA3 CRT_R
VGA_RED CRT_R [25]
5
AY2 CRT_B @ U62
VGA_BLUE CRT_B [25]
BA1 CRT_G 1
P
VGA_GREEN CRT_G [25] NC
AW1 CRT_IREF R969 1 2 357_0402_1% 4 R1086 1 @ 2 0_0402_5%
VGA_IREF Y ENVDD [23]
AY3 DDI1_ENVDD 2
VGA_IRTN A
G
C C
(K(s BD2 CRT_HSYNC
CRT_HSYNC [25]
CRT NL17SZ07DFT2G_SC70-5
3
VGA_HSYNC BF2 CRT_VSYNC SA00004BV00
(K(s VGA_VSYNC CRT_VSYNC [25]
5
Y2 Y13 U64
W3 RESERVED_Y2 RESERVED_Y13 V10 1
P
W1 RESERVED_W3 RESERVED_V10 V9 NC 4
RESERVED_W1 RESERVED_V9 Y INVT_PWM_SOC [23]
V2 T12 DDI1_PWM 2
RESERVED_V2 RESERVED_T12 A
G
V3 T10
R3 RESERVED_V3 RESERVED_T10 V14 NL17SZ07DFT2G_SC70-5
3
R1 RESERVED_R3 RESERVED_V14 V13 SA00004BV00
+1.8VS AD6 RESERVED_R1 RESERVED_V13 T14
AD4 RESERVED_AD6 RESERVED_T14 T13
AB9 RESERVED_AD4 RESERVED_T13 T6
RESERVED_AB9 RESERVED_T6
1
AB7 T4 +3VS
@ Y4 RESERVED_AB7 RESERVED_T4 P14 RP44
R970 Y6 RESERVED_Y4 RESERVED_P14 BKOFF# 5 4
10K_0402_5% V4 RESERVED_Y6 F34 ENVDD 6 3
V6 RESERVED_V4 GPIO_S0_NC_15 M32 INVT_PWM_SOC 7 2
2
FH8065301546401_FCBGA131170 C514
100P_0402_50V8J
GPIO_S0_NC[13]: DDI1_ENBKL 2 1
Multiplexed with Hardware Straps Pin:MDSI_DDCDATA ESD@
C516
100P_0402_50V8J
DDI1_ENVDD 2 1
ESD@
C518
100P_0402_50V8J
DDI1_PWM 2 1
ESD@
C519
100P_0402_50V8J
EDP_HPD# 2 1
A A
ESD@
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Date: Tuesday, February 18, 2014 Sheet 6 of 47
5 4 3 2 1
5 4 3 2 1
USOC1D
1
AK9 1 2
RESERVED_AK9 +1.0VS
AK7
RESERVED_AK7 R977 R978 RS@
C24 10K_0402_5% 10K_0402_5% R1091
PROCHOT# H_PROCHOT# [33]
4 OF 10 Internal PD 2K 0_0402_5%
2
GPIO_S0_SC_63 GPIO_S0_SC_65 2 1
Check power rail FH8065301546401_FCBGA131170
1
+3VS D
2
+1.8VS ME_EN [33]
G
2
@S Q62
3
R10 R980 MESS138W-G_SOT323-3
10K_0402_5% 10K_0402_5%
1 2
@
1
2
G
@
1 3 SATA_LED#_SOC
[32] SOC_SATALED#
D
Q63
MESS138W-G_SOT323-3
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 7 of 47
5 4 3 2 1
5 4 3 2 1
+1.8VALW +1.8VS
R151 2 GCLK@ 1 33_0402_5%
GCLK_PCH_25MHZ [35]
XTAL_25M_IN +1.8VS +3VS
1
+1.8VALW
Place close to Y7 Check power rail RS@
1
@
0_0402_5%
1
R981 NOGCLK@ +1.8VALW 0_0402_5%
1
Y7 NOGCLK@ 1M_0402_5% +3VALW R1106 R1107
25MHZ_10PF_7V25000014 @ R982
2
5
U53 4.7K_0402_5% R983
2
1 3 XTAL_25M_OUT 1.8V 1 3.3V 2.2K_0402_5%
.1U_0402_16V7K
2
2
1 3 NC
C60
1 1 R11 @ 4 1
PLT_RST_BUF# [15,26,27,29,33]
2
GND GND 10K_0402_5% C1085 PMC_PLTRST# 2 Y D40
A
G
C1003 C1004 .1U_0402_16V7K PMC_ACIN 2 1 VCIN1_AC_IN [32,33,39]
2 4 1
ESD@
10P_0402_25V8K 10P_0402_25V8K ESD@ NL17SZ07DFT2G_SC70-5
3
2 2 SA00004BV00 2 RB751V40_SC76-2
1
2
Change To 10pF for Vendor Suggest.
G
D @ D
NOGCLK@
0701 NOGCLK@ @ C520
2
G
1 3 PMC_PCIE_WAKE#
[27] SOC_PCIE_WAKE# PLT_RST Buffer 2
100P_0402_50V8J
S
ESD@ +1.8VALW
Q66 PMC_PLTRST# 3 1 PLT_RST_BUF#
MESS138W-G_SOT323-3
D
+1.8VALW Q74 +1.8VS
MESS138W-G_SOT323-3
SOC_KBRST# 10K_0402_5% 2 1 R992
USOC1E SOC_LID_OUT# 10K_0402_5% 2 1 R1033
PMC_PWRBTN#10K_0402_5% 2 1 R1034
2
XTAL_25M_IN AH12 AU34 +1.8VALW SOC_SMI# 10K_0402_5% 2 @1 R1097
XTAL_25M_OUT AH10 ICLK_OSCIN SIO_UART1_RXD / GPIO_S0_SC_70 AV34 SKU_Strap1 R1104 R1102 R1100 RP47
ICLK_OSCOUT SIO_UART1_TXD / GPIO_S0_SC_71 BA34 SKU_Strap2 PMC_PCIE_WAKE# 1 8 SOC_SCI# 10K_0402_5% 2 1 R1036
SIO_UART1_RTS# / GPIO_S0_SC_72 10K_0402_5% 10K_0402_5% 10K_0402_5%
AD9 AY34 SKU_Strap3 E14@ B15@ DIS@ PMC_BATLOW# 2 7
RESERVED_AD9 SIO_UART1_CTS# / GPIO_S0_SC_73 GPIO_S5_14 3 6 SOC_SCI# 10K_0402_5% 2 1 R1082
1
R984 1 2 4.02K_0402_1% ICLK_ICOMP AD14 BF34 LS_OE 4 5 @
R985 1 2 47.5_0402_1% ICLK_RCOMP AD13 ICLK_ICOMP SIO_UART2_RXD / GPIO_S0_SC_74 BD34
ICLK_RCOMP SIO_UART2_TXD / GPIO_S0_SC_75 BD32 10K_0804_8P4R_5% +1.8VALW +3VALW_EC
AD10 SIO_UART2_RTS# / GPIO_S0_SC_76 BF32 U54
RESERVED_AD10 SIO_UART2_CTS# / GPIO_S0_SC_77
2
AD12 2 19
RESERVED_AD12 R1105 R1103 R1101 VCCA VCCB
AF6 10K_0402_5% 10K_0402_5% 10K_0402_5% PMC_SLP_S3# 1 20
[15] CLK_PEG_VGA# AF4 PCIE_CLKN_0 D26 3 A1 B1 18 EC_SLP_S3# [33,8]
GPU B14@ B14@ UMA@ PMC_SLP_S4#
[15] CLK_PEG_VGA PCIE_CLKP_0 PMC_SUSPWRDNACK / GPIO_S5_11 G24 4 A2 B2 17 EC_SLP_S4# [33,8]
PMC_SUSCLK T192 32.768k output SOC_KBRST#
EC_KBRST# [33,8]
1
AF9 PMC_SUSCLK_0 / GPIO_S5_12 F18 SOC_LID_OUT# 5 A3 B3 16
[29] CLK_PCIE_Card# AF7 PCIE_CLKN_1 PMC_SLP_S0IX# / GPIO_S5_13 F22 PMC_SUSCLK [27] 6 A4 B4 15 EC_LID_OUT# [33,8]
PMC_SLP_S4# SOC_SERIRQ
[29] CLK_PCIE_Card PCIE_CLKP_1 PMC_SLP_S4# D22 [9] SOC_SERIRQ 7 A5 B5 14 EC_SERIRQ [33,8]
Card PMC_SLP_S3# SOC_SMI#
PMC_SLP_S3# J20 GPIO_S5_14 SOC_SCI# 8 A6 B6 13
AK4 GPIO_S5_14 D20 [7] SOC_SCI# 9 A7 B7 12 EC_SCI# [33,8]
PMC_ACIN PMC_PWRBTN#
[26] CLK_PCIE_LAN# AK6 PCIE_CLKN_2 PMC_ACPRESENT F26 A8 B8 PBTN_OUT# [33,8]
LAN PMC_PCIE_WAKE# R1105 R1103
[26] CLK_PCIE_LAN PCIE_CLKP_2 PMC_WAKE_PCIE_0# / GPIO_S5_15 K26 10 11
PMC_BATLOW# 10K_0402_5% 10K_0402_5% LS_OE
AM4 PMC_BATLOW# J26 PMC_PWRBTN# SD028100280 SD028100280 OE GND
[27] CLK_PCIE_WLAN# AM6 PCIE_CLKN_3 PMC_PWRBTN# / GPIO_S5_16 BG9
WLAN XDP_RSTBTN# T217 B15@ E14@ TXB0108PWR_TSSOP20
[27] CLK_PCIE_WLAN PCIE_CLKP_3 PMC_RSTBTN# F20 PMC_PLTRST#
AM9 PMC_PLTRST# J24 GPIO_S5_17 T205
C RESERVED_AM9 GPIO_S5_17 @ C
AM10 G18
RESERVED_AM10 PMC_SUS_STAT# / GPIO_S5_18
0901:for ESD change to 100pF
PDG v1.2 update PMC_SLP_S3# R1040 1 RS@ 2 0_0402_5%
C11 RTC_TEST# EC_SLP_S3# [33,8]
EC_RSMRST# 1 2 PMC_SLP_S4# R1041 1 RS@ 2 0_0402_5%
BH7 ILB_RTC_TEST# C12 RTC_RST# 1 2 EC_SLP_S4# [33,8]
R990 100K_0402_5% SOC_KBRST# R1042 RS@ 0_0402_5%
BH5 PMC_PLT_CLK_0 / GPIO_S0_SC_96 ILB_RTC_RST# 1 2 EC_KBRST# [33,8]
SOC_LID_OUT# R1043 RS@ 0_0402_5%
BH4 PMC_PLT_CLK_1 / GPIO_S0_SC_97 C513 EC_LID_OUT# [33,8]
BH8 PMC_PLT_CLK_2 / GPIO_S0_SC_98 B10 EC_RSMRST# 1 2
BH6 PMC_PLT_CLK_3 / GPIO_S0_SC_99 PMC_RSMRST# B7 EC_RSMRST# [33] 1 RS@ 2 0_0402_5%
PMC_CORE_PWROK SOC_SCI# R1054
BJ9 PMC_PLT_CLK_4 / GPIO_S0_SC_100 PMC_CORE_PWROK 1 RS@ 2 0_0402_5% EC_SCI# [33,8]
PMC_PWRBTN# R1058
PMC_PLT_CLK_5 / GPIO_S0_SC_101 +1.0VS 100P_0402_50V8J PBTN_OUT# [33,8]
RTC domain
C9 ILB_RTC_X1 @ESD@ +3VALW_EC
XDP_H_TCK D14 ILB_RTC_X1 A9 ILB_RTC_X2
TAP_TCK ILB_RTC_X2
1
XDP_H_TRST# G12 B8 ILB_RTC_EXTPAD 1 2 Check power rail? +1.8VALW +1.8VALW
XDP_H_TMS F14 TAP_TRST# ILB_RTC_EXTPAD P22 C1008 R1064
TAP_TMS RTC_VCC_P22
1
XDP_H_TDI F12 +RTCVCC .1U_0402_16V7K 73.2_0402_1% RS@
TAP_TDI
1
XDP_H_TDO G16 R1031 @
TAP_TDO 0_0402_5%
1
XDP_H_PRDY# D18 1 @ R1093 2.2K_0402_5%
2
XDP_H_PREQ_BUF# F16 TAP_PRDY# B24 VR_SVID_ALERT#_SOC R1065 1 2 20_0402_1% R1096 R1095 R1094
TAP_PREQ# SVID_ALERT# VR_SVID_ALERT# [45] 2.2K_0402_5%
AT34 A25 VR_SVID_DATA_SOC R1066 1 2 16.9_0402_1% C153 U63 @ 0_0402_5% 10K_0402_5%
VR_SVID_DATA [45]
2
RESERVED_AT34 SVID_DATA C25 .1U_0402_16V7K 1 6 1 2
VR_SVID_CLK [45]
2
RP48 SOC_SPI_CS0# C23 SVID_CLK 2 VCCA VCCB
2
SPI_CS0# 1 8 SOC_SPI_CS0# T193 C21 PCU_SPI_CS_0# 2 5
SPI_MISO 2 7 SOC_SPI_MISO SOC_SPI_MISO B22 PCU_SPI_CS_1# / GPIO_S5_21 AU32 GCLK@ GND EO
SPI_MOSI 3 6 SOC_SPI_MOSI SOC_SPI_MOSI A21 PCU_SPI_MISO SIO_PWM_0 / GPIO_S0_SC_94 AT32 R148 2 1 0_0402_5% SOC_SERIRQ 3 4
4 5 C22 PCU_SPI_MOSI SIO_PWM_1 / GPIO_S0_SC_95 GCLK_32K [35] A B EC_SERIRQ [33,8]
SPI_CLK SOC_SPI_CLK SOC_SPI_CLK
PCU_SPI_CLK G2129TL1U_SC70-6
22_0804_8P4R_5%
EMI@ SOC_KBRST# B18 ILB_RTC_X1
Place close to Y8
B16 GPIO_S5_0 K24 ILB_RTC_X2
C18 GPIO_S5_1 / PMC_WAKE_PCIE_1 GPIO_S5_22 N24 XDP_OBSDATA_A0 1 2
Close To SOC <1000mil GPIO_S5_2 / PMC_WAKE_PCIE_2 GPIO_S5_23
T213
+1.8VALW A17 M20 XDP_OBSDATA_A1 T214 R994 NOGCLK@
SOC_LID_OUT# C17 GPIO_S5_3 / PMC_WAKE_PCIE_3 GPIO_S5_24 J18 XDP_OBSDATA_A2
GPIO_S5_4 GPIO_S5_25
T215 10M_0402_5% 0529 update
B R989 1 XDP@ 2 51_0402_5% XDP_H_PRDY# C16 M18 XDP_OBSDATA_A3 T216 B
B14 GPIO_S5_5 / PMU_SUSCLK_1 GPIO_S5_26 K18 32.768KHZ_12.5PF_Q13FC135000040
C15 GPIO_S5_6 / PMU_SUSCLK_2 GPIO_S5_27 K20 Y8 1 2
ESD@ C1086
RP52 SOC_SMI#
.1U_0402_16V7K
1
A13 15P_0402_50V8J 15P_0402_50V8J
51_0804_8P4R_5% C19 GPIO_S5_9 AV32 2 2 R993
XDP@ GPIO_S5_10 SIO_SPI_CS# / GPIO_S0_SC_66 BA28
SIO_SPI_MISO / GPIO_S0_SC_67 10K_0402_5%
5
AY28 NOGCLK@ NOGCLK@ U55
1 R995 2 GPIO_RCOMP N26 SIO_SPI_MOSI / GPIO_S0_SC_68 AY30 1
Change To 15pF for Vendor Suggest. 3.3V 1.35V
2
49.9_0402_1% GPIO_RCOMP 5 OF 13 SIO_SPI_CLK / GPIO_S0_SC_69 NC 4
0701 Y DDR_CORE_PWROK [5]
2
@ESD@ C1083
@ESD@ C1084
100P_0402_50V8J
100P_0402_50V8J
[33] PMC_CORE_PWROK A 1 1
G
+1.8VALW FH8065301546401_FCBGA131170
NL17SZ07DFT2G_SC70-5
3
SA00004BV00
1
XDP_RSTBTN# 2 2
XDP@
R1024 1 @ 2 1 2
+1.8VALW
200_0402_5% R1025 C1075 XDP@
1K_0402_5% .1U_0402_16V7K +3VALW
2
2
G
C1011 R711 RS@
+BIOS_SPI +1.8VALW R996 1U_0402_6.3V6K 0_0402_5%
R998 20K_0402_1% 2 1 2 PMC_CORE_PWROK 3 1 DDR_CORE_PWROK
RS@ 1 2 0_0402_5% 1 2 RTC_TEST#
D
+BIOS_SPI 1 2 RTC_RST# Q67
C1013 1 2 .1U_0402_16V7K R997 1 MESS138W-G_SOT323-3 @
20K_0402_1% 1 Check Intel
1
A U56 C151 @ A
1
R999 1 2 3.3K_0402_5% SPI_CS0# 1 8 R1000 1 2 3.3K_0402_5% C1012 SP@ SP@ .1U_0402_16V7K R1080 1 2 0_0402_5%
SPI_MISO 2 CS# VCC 7 SPI_HOLD# 1U_0402_6.3V6K CLRP1 CLRP2 2
2
R1001 1 2 3.3K_0402_5% SPI_WP# 3 DO(IO1) HOLD#(IO3) 6 SPI_CLK 2 SHORT PADS SHORT PADS
2
https://Dr-Bios.com
Date: Tuesday, February 18, 2014 Sheet 8 of 47
5 4 3 2 1
5 4 3 2 1
2
1 2
.1U_0402_16V7K
1U_0402_6.3V6K
1
1
C62
R16 R15 RS@ 2 1
1
@ESD@
C1088
10K_0402_5% 10K_0402_5% @ R13 RS@ @ RS@ @
@ 0_0402_5% R1090 10K_0402_5% 0_0402_5% 0_0402_5% R14 R1109
R1110 0_0402_5%
ESD@
0_0402_5% R1111 R1108 10K_0402_5% 0_0402_5%
1
1
1 2 R1112
2 2
2 2
2 2
2
G
G
ODD_EN_R
G
BT_OFF# 1 3 BT_OFF#_R DGPU_PWR_EN 1 3 DGPU_PWR_EN_R
DGPU_HOLD_RST# 1 3 DGPU_HOLD_RST#_R
S
Q75 Q68
S
DGPU_HOLD_RST#_R DGPU_PWR_EN_R MESS138W-G_SOT323-3 MESS138W-G_SOT323-3 Q73
D MESS138W-G_SOT323-3 D
1
@ @ USOC1F
R1035 R1044
10K_0402_5% 10K_0402_5% G2 M10
GPIO_S5_31 RESERVED_M10 M9
RESERVED_M9
2
1
USB_OC1# B20 @
[32] USB_OC1# USB_OC_1# / GPIO_S5_20 R1006
+1.8VALW 10K_0402_5%
2
R1009 1 2 10K_0402_5% USB_OC1# 45.3_0402_1% C7 USB_RCOMPO GPIO_S0_SC_55 BC12 GPIO_S0_SC_56
USB_RCOMPI GPIO_S0_SC_56 A16 Swap Override
BD14 DBG_UART_TXD T203
GPIO_S0_SC_57 / PCU_UART_TXD 0 = Enable
1
BC14 @
R1010 1 @ 2 USB_PLL_MON M13 GPIO_S0_SC_58 BF14 R1011 1 = Disable
0_0402_5% USB_PLL_MON GPIO_S0_SC_59 BD16 Reference EDS Page 216
GPIO_S0_SC_60 10K_0402_5%
BC16 DBG_UART_RXD T204
GPIO_S0_SC_61 / PCU_UART_RXD
2
B4
B5 USB_HSIC0_DATA BH12 HDA_SPKR
USB_HSIC0_STROBE ILB_8254_SPKR / GPIO_S0_SC_54 HDA_SPKR [28]
E2
D2 USB_HSIC1_DATA
NOTE: Ref checklist rev1.0 p.25 USB_HSIC1_STROBE BH22
USB_HSIC_RCOMP must NOT float if they are not being used. SIO_I2C0_DATA / GPIO_S0_SC_78 BG23
1 2 HSIC_RCOMP A7 SIO_I2C0_CLK / GPIO_S0_SC_79
R1012 45.3_0402_1% USB_HSIC_RCOMP
BG24
SIO_I2C1_DATA / GPIO_S0_SC_80 BH24
49.9_0402_1%1 2 R1013 LPC_RCOMP BF18 SIO_I2C1_CLK / GPIO_S0_SC_81
BH16 LPC_RCOMP / VGA_RCOMP
[33] LPC_AD0 BJ17 ILB_LPC_AD_0 / GPIO_S0_SC_42 BG25
[33] LPC_AD1 BJ13 ILB_LPC_AD_1 / GPIO_S0_SC_43 SIO_I2C2_DATA / GPIO_S0_SC_82 BJ25
ILB_LPC_CLK_0 : Output of 25MHz, [33] LPC_AD2 ILB_LPC_AD_2 / GPIO_S0_SC_44 SIO_I2C2_CLK / GPIO_S0_SC_83
Need Check with EC BG14
[33] LPC_AD3 BG17 ILB_LPC_AD_3 / GPIO_S0_SC_45
B [33] LPC_FRAME# ILB_LPC_FRAME# / GPIO_S0_SC_46 B
22_0402_5% 1 EMI@ 2 R1014 LPC_CLK_0 BG15 BG26
[33] LPC_CLK_EC BH14 ILB_LPC_CLK_0 / GPIO_S0_SC_47 SIO_I2C3_DATA / GPIO_S0_SC_84 BH26
ILB_LPC_CLK_1 is for CLK_0 feedback.(Input) ILB_LPC_CLK_1 / GPIO_S0_SC_48 SIO_I2C3_CLK / GPIO_S0_SC_85
Set to Outpot for Normal Usage LPC_CLKRUN# BG16
BG13 ILB_LPC_CLKRUN# / GPIO_S0_SC_49
[8] SOC_SERIRQ ILB_LPC_SERIRQ / GPIO_S0_SC_50 BF27
SIO_I2C4_DATA / GPIO_S0_SC_86 BG27
SIO_I2C4_CLK / GPIO_S0_SC_87
+3VS
BH28 SOC_I2C0_DATA T207
PCU_SMB_DATA BG12 SIO_I2C5_DATA / GPIO_S0_SC_88 BG28 SOC_I2C0_CLK T208
PCU_SMB_DATA / GPIO_S0_SC_51 SIO_I2C5_CLK / GPIO_S0_SC_89
2
PCU_SMB_CLK BH10
PCU_SMB_ALERT# BG11 PCU_SMB_CLK / GPIO_S0_SC_52
R1016 Check Intel for PU PCU_SMB_ALERT# / GPIO_S0_SC_53
8.2K_0402_5% 2 1 LPC_CLK_0 BJ29
SIO_I2C6_DATA / GPIO_S0_SC_90 BG29
C1015 @EMI@
SIO_I2C6_CLK / GPIO_S0_SC_91 / SD3_WP
0705 : Reserved
10P_0402_50V8J
1
LPC_CLKRUN#
BH30 GPIO_S0_SC_92 T201
GPIO_S0_SC_092 BG30 GPIO_S0_SC_93
GPIO_S0_SC_093
T202 PDA (Platform Debug Assistant) Test Points
6 OF 13
FH8065301546401_FCBGA131170
+1.8VS +1.8VS
RP49
5 4 PCU_SMB_CLK
6 3 PCU_SMB_DATA
7 2 PCU_SMB_ALERT#
8 1
A Pull High at EC side A
4.7K_0804_8P4R_5%
2
G
1 3 PCU_SMB_CLK
[13,14,18,31,33] EC_SMB_CK2
&&Z@/DP/LC Q64
D
S
2
G
MESS138W-G_SOT323-3
D<2<#Q8R@S/C
1 3 PCU_SMB_DATA
67@SEC [13,14,18,31,33] EC_SMB_DA2
Q65
Compal Electronics, Inc.
D
https://Dr-Bios.com
Date: Tuesday, February 18, 2014 Sheet 9 of 47
5 4 3 2 1
5 4 3 2 1
MPZ2012S101AT000_2P 1U_0402_6.3V6K
MPZ2012S101AT000_2P 1U_0402_6.3V6K
D AC29 AK38 C1018 1 2 .1U_0402_16V7K 2 2 D
CORE_VCC_S0iX_AC29 DRAM_VDD_S4_AK38
@EMI@
@EMI@
AC30 AM38
CORE_VCC_S0iX_AC30 DRAM_VDD_S4_AM38 AV41 JUMP_43X118
AD27 DRAM_VDD_S4_AV41 AV42
CORE_VCC_S0iX_AD27 DRAM_VDD_S4_AV42
1250mA
1 1
C1089
C1090
AD29 BB46
AD30 CORE_VCC_S0iX_AD29 DRAM_VDD_S4_BB46 BD49 +1.35V_SOC
AF27 CORE_VCC_S0iX_AD30 DRAM_VDD_S4_BD49 BD52
AF29 CORE_VCC_S0iX_AF27 DRAM_VDD_S4_BD52 BD53
CORE_VCC_S0iX_AF29 DRAM_VDD_S4_BD53
1
AG27 BF44 +1.35V_SOC
CORE_VCC_S0iX_AG27 DRAM_VDD_S4_BF44
@EMI@
@EMI@
AG29 BG51
AG30 CORE_VCC_S0iX_AG29 DRAM_VDD_S4_BG51 BJ48 C1019 2 1 2.2U_0402_6.3V6M
P26 CORE_VCC_S0iX_AG30 DRAM_VDD_S4_BJ48 C51 C1020 2 1 2.2U_0402_6.3V6M
P27 CORE_VCC_S0iX_P26 DRAM_VDD_S4_C51 D44 C1021 2 1 2.2U_0402_6.3V6M
U27 CORE_VCC_S0iX_P27 DRAM_VDD_S4_D44 F49 C1022 2 1 2.2U_0402_6.3V6M
2
CORE_VCC_S0iX_U27 DRAM_VDD_S4_F49
L50
U29 F52
CORE_VCC_S0iX_U29 DRAM_VDD_S4_F52
L51
V27 F53
V29 CORE_VCC_S0iX_V27 DRAM_VDD_S4_F53 H46
V30 CORE_VCC_S0iX_V29 DRAM_VDD_S4_H46 M41
Y27 CORE_VCC_S0iX_V30 DRAM_VDD_S4_M41 M42 C1147 1 2 10U_0603_6.3V6M
Y29 CORE_VCC_S0iX_Y27 DRAM_VDD_S4_M42 V38 C1148 1 2 10U_0603_6.3V6M
Y30 CORE_VCC_S0iX_Y29 DRAM_VDD_S4_V38 Y38
CORE_VCC_S0iX_Y30 DRAM_VDD_S4_Y38
1
100_0402_1% 100_0402_1% AA24 2 1
AD24 UNCORE_VNN_S3_AA24 @ GND @
2
2
P28 UNCORE_VNN_SENSE UNCORE_V1P35_S0iX_F1_AG19 C1026 1 2 1U_0402_6.3V6K
[45] VCORE_VSNS N28 CORE_VCC_SENSE_P28 7 OF 13 C1027 1 2 1U_0402_6.3V6K
[45] VCORE_GSNS CORE_VSS_SENSE_N28
1
C1028 1 2 1U_0402_6.3V6K @
1
C1029 1 2 1U_0402_6.3V6K
B FH8065301546401_FCBGA131170 C1030 1 2 1U_0402_6.3V6K R1085 B
R1020 C1031 1 2 1U_0402_6.3V6K 100K_0402_1%
100_0402_1% C1032 1 2 1U_0402_6.3V6K
2
C1033 1 2 1U_0402_6.3V6K
2
@
2 1
[33,34,41,43] SUSP#
R1087 1
36K_0402_5%
C1181 @
.1U_0402_16V7K
VOUT = 1.25 (1 + R1/R2). 2
A A
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 10 of 47
5 4 3 2 1
5 4 3 2 1
D D
Follow CRBv1.15
USOC1H +1.05VS
325mA 1000mA
U22 AC32 +1.05VS_SOC R1021 1 RS@ 2 0_0402_5%
+1.0VALW UNCORE_V1P0_G3_U22 CORE_V1P0_S3_AC32
V22 Y32
C1034 1 2 1U_0402_6.3V6K C5 UNCORE_V1P0_G3_V22 CORE_V1P0_S3_Y32
UNCORE_V1P0_G3 1uF*4 C1035 1 2 1U_0402_6.3V6K B6 UNCORE_V1P0_G3_C5 AA33
C1036 1 2 1U_0402_6.3V6K UNCORE_V1P0_G3_B6 CORE_V1P05_S3_AA33 AF33
C1037 1 2 1U_0402_6.3V6K Y19 CORE_V1P05_S3_AF33 AG33 C1038 1 2 0.47U_0402_6.3V6K
C3 USB3_V1P0_G3_Y19 CORE_V1P05_S3_AG33 AG35
USB3_V1P0_G3 0.01uF*1 C1039 1 2 0.01U_0402_16V7K USB3_V1P0_G3_C3 CORE_V1P05_S3_AG35 U33 C1040 1 2 1U_0402_6.3V6K
CORE_V1P05_S3_U33 U35 C1041 1 2 1U_0402_6.3V6K CORE_V1P05_S3 1uF*3
CORE_V1P05_S3_U35 V33 C1042 1 2 1U_0402_6.3V6K
2750mA CORE_V1P05_S3_V33
V32
+1.0VS SVID_V1P0_S3_V32 +1.8VALW
BJ6
AD35 VGA_V1P0_S3_BJ6
AF35 DRAM_V1P0_S0iX_AD35 U24
C1043 1 2 1U_0402_6.3V6K AF36 DRAM_V1P0_S0iX_AF35 UNCORE_V1P8_G3_U24 V25
C1044 1 2 1U_0402_6.3V6K AA36 DRAM_V1P0_S0iX_AF36 PCU_V1P8_G3_V25 N20 C1045 1 2 1U_0402_6.3V6K PMC_V1P8_G3 1uF*1
DRAM_V1P0_S0iX 1uF*4 1 2 AJ36 DRAM_V1P0_S0iX_AA36 USB_V1P8_G3_N20 U25
C1046 1U_0402_6.3V6K
DRAM_V1P0_S0iX_AJ36
65mA PMU_V1P8_G3_U25
C1047 1 2 1U_0402_6.3V6K AK35 AA18
AK36 DRAM_V1P0_S0iX_AK35 UNCORE_V1P8_G3_AA18
Y35 DRAM_V1P0_S0iX_AK36 +1.8VS
1 2 Y36 DRAM_V1P0_S0iX_Y35
C1048 1U_0402_6.3V6K
DRAM_V1P0_S0iX_Y36
10mA
C1049 1 2 1U_0402_6.3V6K AK19 AM30
C DDI_V1P0_S0iX 1uF*4 C1050 1 2 1U_0402_6.3V6K AK21 DDI_V1P0_S0iX_AK19 UNCORE_V1P8_S3_AM30 AN32 C1051 1 2 1U_0402_6.3V6K UNCORE_V1P8_S3 1uF*4 C
AN27
R1023
1
RS@
2 For EVT measurement
0_0603_5% 1
.1U_0402_16V7K
&^(
@ESD@ C1081 1 2 .1U_0402_16V7K AG21 UNCORE_V1P0_S0iX_AF21 SD3_V1P8V3P3_S3_AN27 C1093
@ESD@ C1082 1 2 .1U_0402_16V7K M14 UNCORE_V1P0_S0iX_AG21 AM27 1 2 VGA_V3P3_S3 1uF*1
U18 USB_V1P0_S3_M14 LPC_V1P8V3P3_S3_AM27 C1073 1U_0402_6.3V6K 2
U19 USB_V1P0_S3_U18
AN25 USB_V1P0_S3_U19 +1.0VALW
GPIO_V1P0_S3_AN25
35mA
V18 USB_HSIC_V1P2_G3 1uF*1
USB_HSIC_V1P2_G3_V18 C1074 1 2 1U_0402_6.3V6K Disable HSIC
B @ If the USB HSIC is not used, pin V18 can be connected B
F1 AD16 Pop when use +1.2VALW
RESERVED_F1 VSS_AD16 AD18 to either +V1P2A or +V1P0A.
T195 TP_CORE_V1P05_S4 AF30 VSS_AD18
TP_CORE_V1P05_S4_AF30
8 OF 13
FH8065301546401_FCBGA131170
A A
https://Dr-Bios.com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VLV-M SOC Power
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 11 of 47
5 4 3 2 1
5 4 3 2 1
D D
FH8065301546401_FCBGA131170
A A
https://Dr-Bios.com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 12 of 47
5 4 3 2 1
A B C D E
C125
.1U_0402_16V7K R211 R212 TYCO_2-2013022-1
2 0_0402_5% 0_0402_5% Part Number = SP07000JN10
RS@ RS@ PCB Footprint = TYCO_2-2013022-1_204P
1
https://Dr-Bios.com
Date: Tuesday, February 18, 2014 Sheet 13 of 47
A B C D E
A B C D E
1
C147
.1U_0402_16V7K
R231
0_0402_5%
TYCO_2-2013287-1
Part Number = SP07000KW00
Channel B
2 RS@ PCB Footprint = TYCO_2-2013287-1_204P
1
https://Dr-Bios.com
Date: Tuesday, February 18, 2014 Sheet 14 of 47
A B C D E
5 4 3 2 1
UV1A
COMMON
1/14 PCI_EXPRESS
GK208/GF117/GF119 Place near Place near BGA +1.05VS_VGA
AB6 PEX_WAKE
balls 1.05V
NC
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
AA22
4.7U_0603_6.3V6K
D
PEX_IOVDD D
CV23
CV22
CV21
CV24
DGPU_HOLD_RST# RV9 1 @ 2 PLT_RST_VGA# AC7 PEX_RST PEX_IOVDD AB23 1 1 1 1 1 1 1
CV9
CV7
0_0402_5% AC24
CV2 DIS@
PEX_IOVDD
PEX_CLKRQ# AC6 PEX_CLKREQ PEX_IOVDD AD25
PEX_IOVDD AE26
2 2 2 2 2 2 2
DIS@
DIS@
@
AE8 PEX_REFCLK PEX_IOVDD AE27
[8] CLK_PEG_VGA
PCIE CLK AD8 PEX_REFCLK
[8] CLK_PEG_VGA#
(From SOC)
PCIE_PRX_DTX_P0 CV11 DIS@ 1 2 .1U_0402_16V7K PCIE_GTX_HRX_P5L0 AC9 PEX_TX0
[7] PCIE_PRX_DTX_P0 2 .1U_0402_16V7K
PCIE_PRX_DTX_N0 CV12 DIS@ 1 PCIE_GTX_HRX_N5L0 AB9 PEX_TX0
[7] PCIE_PRX_DTX_N0
PCIE X1 Bus PCIE_PTX_C_DRX_P0 AG6 PEX_RX0 Place near Place near BGA
[7] PCIE_PTX_C_DRX_P0 AG7 AA10 +1.05VS_VGA
(Link to SOC) PCIE_PTX_C_DRX_N0 PEX_RX0 PEX_IOVDDQ
[7] PCIE_PTX_C_DRX_N0
PEX_IOVDDQ AA12 balls 1.05V
AB10 PEX_TX1 PEX_IOVDDQ AA13
1U_0402_6.3V6K
1U_0402_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
22U_0603_6.3V6M
22U_0603_6.3V6M
AC10 AA16
4.7U_0603_6.3V6K
PEX_TX1 PEX_IOVDDQ
CV27
CV26
CV25
CV28
PEX_IOVDDQ AA18 1 1 1 1 1 1 1
CV10 @
CV8
AF7 AA19
CV3 @
PEX_RX1 PEX_IOVDDQ
AE7 PEX_RX1 PEX_IOVDDQ AA20
PEX_IOVDDQ AA21
2 2 2 2 2 2 2
DIS@
DIS@
DIS@
AD11 PEX_TX2 PEX_IOVDDQ AB22
AC11 PEX_TX2 PEX_IOVDDQ AC23
PEX_IOVDDQ AD24
AE9 PEX_RX2 PEX_IOVDDQ AE25
AF9 PEX_RX2 PEX_IOVDDQ AF26
PEX_IOVDDQ AF27
AC12 PEX_TX3
AB12 PEX_TX3
AG9 PEX_RX3
AG10 PEX_RX3
AB13 PEX_TX4
AC13 PEX_TX4
Reset Control
AF10 PEX_RX4
AE10 PEX_RX4
+3VS_VGA
C AD14 PEX_TX5 C
AC14 PEX_TX5 PEX_PLL_HVDD AA8
1
PEX_PLL_HVDD AA9
+3VS_VGA RV67 AE12 PEX_RX5 +3VS_VGA
10K_0402_5% AF12 PEX_RX5 Place near BGA
@ PEX_SVDD_3V3 AB8
.1U_0402_16V7K
AC15
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2 PEX_TX6
5
CV19 DIS@
PLT_RST_BUF# 1
CV5 DIS@
CV4 DIS@
P
AD17 PEX_TX8 NC
1
AC17 PEX_TX8 NC
RV2
AE15 @ 100_0402_1%
PEX_RX8 NC
AF15 PEX_RX8 NC
2
AC18 F2 VDD_SENSE_GPU
AB18
PEX_TX9
PEX_TX9
NC VDD_SENSE VDD_SENSE_GPU [44] To POWER
NC
1
AB19 PEX_TX10 NC
AC19 PEX_TX10 NC RV3 differential signal routing.
@ 100_0402_1%
Level shift & Isolation +3VS_VGA AF16 PEX_RX10 NC
+3VS_VGA AE16 PEX_RX10 NC
2
AD20 PEX_TX11 NC
2
AC20 PEX_TX11 NC
B B
RV17
0_0402_5% AE18 PEX_RX11 NC
RV16 RS@ AF18 PEX_RX11 NC
2
1 2
[20,44] DGPU_PWROK
1
DIS@
AG18 PEX_RX12 NC PEX_TSTCLK_OUT AF22 PEX_PLL_CLK_OUTRV4 2 @ 1200_0402_1%
1
2
@
1.05V
G
.1U_0402_16V7K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
D
CV29
(To SOC) AF24 PEX_TX14 NC Place near BALL 1 1 1
CV20 DIS@
1.8VS already pull high 10K at SOC side DIS@ 2N7002LT1G_SOT23-3 AE24
CV6 DIS@
PEX_TX14 NC
QV64
AE21 PEX_RX14 NC 2 2 2
DIS@
RV1003 1 @ 2 AF21 PEX_RX14 NC
0_0402_5% TESTMODE AD9 GPU_TESTMODE
AG24 PEX_TX15 NC Place near BGA
AG25 PEX_TX15 NC
1
AG21 PEX_RX15 NC RV225
AG22 PEX_RX15 NC 10K_0402_5%
DIS@
GF119 GF117
2
GK208 PEX_TERMP AF25 PEX_TERMP
N15V-GM_FCBGA595
1
DIS@
RV6
2.49K_0402_1%
DIS@
A A
2
()*+,-./-0123)45167.8419
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Security Classification Compal Secret Data
Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(1/5)-PCIE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
!"#"$%&' 0.2
UV1J
COMMON IFPE/F
UV1H
COMMON IFPC
5/14 IFPC
UV1G
COMMON IFPA/B 7/14 IFPEF
T6
GF119/GK208 GF117
IFPC
4/14 IFPAB GF119/GK208 IFPC_RSET NC GF117 GF119/GK208
GF117
GF117 GF119/GK208 DVI-DL DVI-SL/HDMI DP
DVI/HDMI DP
AC4 GF117 J3
NC IFPA_TXC GF119 GK208 NC I2CY_SDA I2CY_SDA IFPE_AUX
IFPA_TXC AC3 NC I2CY_SCL I2CY_SCL IFPE_AUX J2 M7 IFPC_PLLVDD NC NC I2CW_SDA IFPC_AUX N5
NC
GF119/GK208 GF117 J7 N7 N4
IFPEF_PLLVDD NC IFPC_PLLVDD NC NC I2CW_SCL IFPC_AUX
AA6 IFPAB_RSET NC
IFPA_TXD0 Y3 IFPE_L3 J1
NC NC TXC TXC
IFPA_TXD0 Y4 IFPE_L3 K1 IFPC_L3 N3
D NC NC TXC TXC NC TXC D
K7 IFPEF_PLLVDD NC IFPC_L3 N2
NC TXC
V7 IFPAB_PLLVDD IFPE_L2 K3
NC NC TXD0 TXD0
IFPA_TXD1 AA2 IFPE_L2 K2 IFPC_L2 R3
NC NC TXD0 TXD0 NC TXD0
W7 IFPAB_PLLVDD IFPA_TXD1 AA3 IFPC_L2 R2
NC NC NC TXD0
K6 IFPEF_RSET IFPE_L1 M3
NC NC TXD1 TXD1
IFPE_L1 M2 TXD1 IFPC_L1 R1
NC TXD1 TXD1 NC
IFPA_TXD2 AA1 NC TXD1 IFPC_L1 T1
NC
IFPA_TXD2 AB1 IFPE_L0 M1
NC NC TXD2 TXD2
IFPE_L0 N1 IFPC_L0 T3
NC TXD2 TXD2 NC TXD2
IFPC_L0 T2
NC TXD2
IFPA_TXD3 AA5
NC NC FOR GK208
NC IFPA_TXD3 AA4 IFPE
P6 IFPC_IOVDD NC GPIO15 C3
NC
IFPB_TXC AB4 NC GPIO18 C2
NC HPD_E HPD_E
IFPB_TXC AB5
NC
N15V-GM_FCBGA595
GF119/GK208 GF117 GF117 DIS@
W6 AB2 GF119 GK208
IFPA_IOVDD NC NC IFPB_TXD4
IFPB_TXD4 AB3 H6 IFPE_IOVDD NC
NC
Y6 IFPB_IOVDD GF119/GK208
NC GF117
J6
NC
NC
IFPB_TXD5
IFPB_TXD5
AD2
AD3
IFPF_IOVDD NC
NC
DVI-DL DVI-SL/HDMI
I2CZ_SDA
DP
IFPF_AUX H4
H3
UV1I
COMMON IFPD
NC I2CZ_SCL IFPF_AUX 6/14 IFPD
IFPD_L0 V4
NC TXD2
IFPD_L0 V3
NC TXD2
UV1K
COMMON DAC_A N15V-GM_FCBGA595
DIS@ R6 IFPD_IOVDD NC NC GPIO17 D4
3/14 DACA
22U_0603_6.3V6M
.1U_0402_16V7K
NC DACA_GREEN AF4 LV5 PBY160808T-300Y-N 0603
DIS@ CV31
B B
1 1
CV32 DIS@
DACA_BLUE AF3
NC
.1U_0402_16V7K
.1U_0402_16V7K
1.05V DIS@ 1 @ 2 N6 1 RV22 2 @
4.7U_0603_6.3V6K
VID_PLLVDD NC
DIS@ CV34
DIS@ CV94
1 1 1 1 0_0402_5% 10K_0402_1%
CV35 DIS@
RV8
CV30 DIS@
GF119/GK208 GF117
2 2 2 2
2 RV21 1 A10 XTALSSIN XTALOUTBUFF C10 1 RV20 2 DIS@
10K_0402_1% 10K_0402_1%
DIS@
XTALIN C11 XTALIN XTALOUT B10 XTAL_OUT
Place near balls
N15V-GM_FCBGA595
DIS@
90-OHM DIFF Impedance for XTALIN & XTALOUT.
YV1
https://Dr-Bios.com
Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
:;<%=>?#8@'A"B(C/@AC"(ADE"!
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Custom
!"#"$%&' 0.2
UV1F
COMMON
13/14 GND
A2 GND GND M13
AB17 GND GND M15
AB20 GND GND M17
Place under GPU AB24 GND GND N10
AC2 GND GND N12
UV1D AC22 GND GND N14
+1.35V_VGA COMMON AC26 GND GND N16
12/14 FBVDDQ AC5 GND GND N18
AC8 GND GND P11
D D
B26 FBVDDQ AD12 GND GND P13
1U_0402_6.3V6K C25 FBVDDQ AD13 GND GND P15
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
DIS@ CV38
DIS@ CV41
DIS@ CV42
DIS@ CV39
DIS@ CV43
1 1 1 1 1 1 FBVDDQ GND GND
E26 FBVDDQ AD15 GND GND P2
F14 FBVDDQ AD16 GND GND P23
F21 FBVDDQ AD18 GND GND P26
2 2 2 2 2 2 G13 AD19 P5
FBVDDQ GND GND
G14 FBVDDQ +VGA_CORE UV1E AD21 GND GND R10
G15 FBVDDQ COMMON AD22 GND GND R12
G16 FBVDDQ Voltage by GPU SKU 11/14 NVVDD AE11 GND GND R14
G18 FBVDDQ K10 VDD AE14 GND GND R16
G19 FBVDDQ K12 VDD AE17 GND GND R18
G20 FBVDDQ K14 VDD AE20 GND GND T11
G21 FBVDDQ K16 VDD AB11 GND GND T13
22U_0603_6.3V6M
10U_0603_6.3V6M
1 1 DIS@ CV44 H26 FBVDDQ L11 VDD AF11 GND GND T17
GPU_Decoupling
CV45 DIS@
N15V-GM_FCBGA595
DIS@
UV1C
COMMON
B +3VS_VGA B
14/14 XVDD/VDD33
Under GPU Near GPU
AD10 NC VDD33 G10 RV58 1 2 0_0402_5%
AD7 NC VDD33 G12 RS@
1U_0402_6.3V6K
.1U_0402_16V7K
4.7U_0603_6.3V6K
B19 G8
DIS@ CV46
DIS@ CV47
DIS@ CV54
NC VDD33 1 1 1
VDD33 G9
F11 3V3AUX_NC
2 2 2
V5 FERMI_RSVD1_NC
V6 FERMI_RSVD2_NC
+3VS_VGA
Under GPU Near GPU
CONFIGURABLE RV40 1 2 0_0402_5%
RS@
DIS@ CV49
POWER CHANNELS 1
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
4.7U_0603_6.3V6K
DIS@ CV69
DIS@ CV50
DIS@ CV48
* nc on substrate 1 1 1
G1 XPWR_G1
G2 2
XPWR_G2
G3 2 2 2
XPWR_G3
G4 XPWR_G4
G5 XPWR_G5
G6 XPWR_G6
G7 XPWR_G7
N15V-GM_FCBGA595
DIS@
()*+,-./-0123)45167.8419
https://Dr-Bios.com
Security Classification Compal Secret Data
Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(3/5)-POWER
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
!"#"$%&' 0.2
5
GF119 0910 NV suggestion reserve DIS@
E12 GF117 GK208 QV2B
THERMDN
I2CB_SCL C9 I2CS_SCL 4 3
NC EC_SMB_CK2 [13,14,31,33,9]
D F12 THERMDP NC I2CB_SDA C8 D
L2N7002DW1T1G 2N SOT-363
2
T2304 TP@ GPU_JTAG_TDO AF6 JTAG_TDO DIS@
T2305 TP@ GPU_JTAG_TRST# AG4 JTAG_TRST GPIO0 C6 QV2A
GPIO1 B2 I2CS_SDA 1 6
D6 EC_SMB_DA2 [13,14,31,33,9]
GPIO2
GPIO3 C7 L2N7002DW1T1G 2N SOT-363
1
GPIO4 F9
RV224 GPIO5 A3 RV75 1 @ 2 0_0402_5%
10K_0402_5% GPIO6 A4
DIS@ GPIO7 B6
GK208
GPIO8 A6 GPIO8_OVERT#_R RV18 1 @ 2 0_0402_5% GPIO8_OVERT#
OVERT GPIO8_OVERT# [33]
2
GPIO9 F8 GPIO9_ALERT#
GPIO10 C5
E7
[44]To DGPU VR
GPIO11 GPU_VID0
GPU_VID0
GPIO12 D7 VGA_AC_DET
GPIO13 B4 PSI T2306 To VGA_CORE VR,N15V-GM not support PSI function
TP@
GK208 GF117 GF119
GPIO16 D5
STRAP
GPIO16 NC
GPIO20 E6 +3VS Reserve for
GPIO20 NC
GPIO21 C4
GPIO8 NC leakage issue
+3VS_VGA
+3VS +3VS_VGA
N15V-GM_FCBGA595
1
DIS@
RV15 RV19 RV80 RV81 RV84
10K_0402_5% 10K_0402_5% 10K_0402_1% 10K_0402_1% 10K_0402_1%
@ @ @ @
2
DIS@
UV1L VGA_AC_DET 2 1 DGPU_AC_DETECT ROM_SI
COMMON DGPU_AC_DETECT [33]
RB751V_SOD323 DV4 ROM_SO
10/14 MISC2 From EC ROM_SCLK
1 @ 2
GF117/GF119/GK208
RV126 0_0402_5%
E10 VMON_IN0 NC
1
C C
F10 VMON_IN1 NC ROM_CS D12
+3VS_VGA RV63 RV64 RV65
ROM_SI B12 ROM_SI 10K_0402_1% 10K_0402_1% 10K_0402_1%
ROM_SO A12 ROM_SO RPV5 N15V_GM@ N15V_GM@ N15V_GM@
STRAP0 D1 STRAP0 ROM_SCLK C12 ROM_SCLK GPIO9_ALERT# 1 8
2
STRAP1 D2 STRAP1 2 7
STRAP2 E4 STRAP2 GPIO8_OVERT#_R 3 6
STRAP3 E3 STRAP3 FB_CLAMP 4 5
[19] FB_CLAMP
STRAP4 D3 STRAP4
10K_0804_8P4R_5%
GF117 DIS@
GF119
C1 STRAP5_NC
GK208
N15V-GM Binary Staps
NC
BUFRST D11
@ CEC E9
NC
2
N15V-GM_FCBGA595
DIS@
STRAP
+3VS_VGA
1
RV61 RV45 RV46 RV51 RV47
10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1%
B @ GM_X76@ GM_X76@ GM_X76@ GM_X76@ B
2
STRAP0
STRAP1
STRAP2
STRAP3
STRAP4
N15V-GM VRAM Straps: RAM_CFG (3..0)
[ ROM_SI (3..0) ]
1
RV62 RV49 RV50 RV48 RV52
10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1% 10K_0402_1%
N15V_GM@ GM_X76@ GM_X76@ GM_X76@ GM_X76@
2
N15V-GM Binary Staps
A A
Hynix 2G Micron 2G Samsung 2G Hynix 1G Micron 1G Samsung 1G
https://Dr-Bios.com
Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(4/5)-GPIO/Strap
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS LA-A721P
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 18 of 47
5 4 3 2 1
5 4 3 2 1
UV1B
COMMON
[21] FBA_D[0..31] 2/14 FBA
FBA_D0 E18 FBA_D0 FB_CLAMP F3 FB_CLAMP
NC FB_CLAMP [18]
FBA_D1 F18 FBA_D1
FBA_D2 E16 FBA_D2 GF119 GF117/GK208
FBA_D3 F17 FBA_D3
FBA_D4 D20 FBA_D4
FBA_D5 D21 FBA_D5
FBA_D6 F20 FBA_D6
FBA_D7 E21 FBA_D7
FBA_D8 E15 FBA_D8
FBA_D9 D15 FBA_D9
FBA_D10 F15 FBA_D10
D FBA_D11 F13 D
FBA_D11
FBA_D12 C13 FBA_D12
FBA_D13 B13 FBA_D13
FBA_D14 E13 FBA_D14
FBA_D15 D13 FBA_D15
FBA_D16 B15 FBA_D16
FBA_D17 C16 FBA_D17
FBA_D18 A13 FBA_D18
FBA_D19 A15 FBA_D19
FBA_D20 B18 FBA_D20
FBA_D21 A18 FBA_D21
FBA_D22 A19 FBA_D22
FBA_D23 C19 FBA_D23
FBA_D24 B24 FBA_D24
FBA_D25 C23 FBA_D25
FBA_D26 A25 FBA_D26
FBA_D27 A24 FBA_D27
FBA_D28 A21 FBA_D28
FBA_D29 B21 FBA_D29
FBA_D30 C20 FBA_CMD[0..30] [21,22]
FBA_D30
FBA_D31 C21 FBA_D31
[22] FBA_D[32..63] FBA_D32 R22 FBA_DOT_L FBA_CMD2
FBA_D32
FBA_D33 R24 FBA_D33 FBA_CMD0 C27 FBA_CMD0
FBA_D34 T22 FBA_D34 FBA_CMD1 C26 FBA_CMD1 FBA_DOT_H FBA_CMD18
FBA_D35 R23 FBA_D35 FBA_CMD2 E24 FBA_CMD2
FBA_D36 N25 FBA_D36 FBA_CMD3 F24 FBA_CMD3 FBA_CKE_L FBA_CMD3
FBA_D37 N26 FBA_D37 FBA_CMD4 D27 FBA_CMD4
FBA_D38 N23 FBA_D38 FBA_CMD5 D26 FBA_CMD5 FBA_CKE_H FBA_CMD19
FBA_D39 N24 FBA_D39 FBA_CMD6 F25 FBA_CMD6
FBA_D40 V23 FBA_D40 FBA_CMD7 F26 FBA_CMD7
2
10K_0402_5%
10K_0402_5%
10K_0402_5%
10K_0402_5%
FBA_D41 V22 FBA_D41 FBA_CMD8 F23 FBA_CMD8
FBA_D42 T23 FBA_D42 FBA_CMD9 G22 FBA_CMD9
RV2437
RV2438
RV2439
RV2440
C C
1 DIS@
1 DIS@
1 DIS@
1 DIS@
FBA_D43 U22 FBA_D43 FBA_CMD10 G23 FBA_CMD10
FBA_D44 Y24 FBA_D44 FBA_CMD11 G24 FBA_CMD11
FBA_D45 AA24 FBA_D45 FBA_CMD12 F27 FBA_CMD12
FBA_D46 Y22 FBA_D46 FBA_CMD13 G25 FBA_CMD13
FBA_D47 AA23 FBA_D47 FBA_CMD14 G27 FBA_CMD14
FBA_D48 AD27 FBA_D48 FBA_CMD15 G26 FBA_CMD15
FBA_D49 AB25 FBA_D49 FBA_CMD16 M24 FBA_CMD16
FBA_D50 AD26 FBA_D50 FBA_CMD17 M23 FBA_CMD17
FBA_D51 AC25 K24 FBA_CMD18
FBA_D52
FBA_D53
FBA_D54
AA27
AA26
W26
FBA_D51
FBA_D52
FBA_D53
FBA_CMD18
FBA_CMD19
FBA_CMD20
K23
M27
M26
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_RST
FBA_D54 FBA_CMD21
FBA_D55 Y25 FBA_D55 FBA_CMD22 M25 FBA_CMD22
FBA_D56 R26 FBA_D56 FBA_CMD23 K26 FBA_CMD23 FBA_CMD5
FBA_D57 T25 FBA_D57 FBA_CMD24 K22 FBA_CMD24
FBA_D58 N27 FBA_D58 FBA_CMD25 J23 FBA_CMD25
2
FBA_D59 R27 FBA_D59 FBA_CMD26 J25 FBA_CMD26
FBA_D60 V26 FBA_D60 FBA_CMD27 J24 FBA_CMD27 RV2447
FBA_D61 V27 FBA_D61 FBA_CMD28 K27 FBA_CMD28 10K_0402_5%
FBA_D62 W27 FBA_D62 FBA_CMD29 K25 FBA_CMD29
DIS@
FBA_D63 W25 FBA_D63 FBA_CMD30 J27 FBA_CMD30
1
FBA_CMD31 J26
[21] DQMA[3..0] D19
DQMA0 FBA_DQM0
DQMA1 D14 FBA_DQM1 FBVDDQ_GPU
DQMA2 C17 FBA_DQM2
DQMA3 C22 FBA_DQM3 +1.35V_VGA
[22] DQMA[7..4] P24
DQMA4 FBA_DQM4
DQMA5 W24 FBA_DQM5 1.35V
DQMA6 AA25 FBA_DQM6
DQMA7 U25 FBA_DQM7 FBA_DEBUG0 F22 RV82 1 @ 2 60.4_0402_1%
FBA_DEBUG1 J22 RV83 1 @ 2 60.4_0402_1%
B B
[21] QSA[3..0] E19
QSA0 FBA_DQS_WP0
QSA1 C15 FBA_DQS_WP1
QSA2 B16 FBA_DQS_WP2 FBA_CLK0 D24 CLKA0
B22 D25 CLKA0 [21]
QSA3 FBA_DQS_WP3 FBA_CLK0 CLKA0#
[22] QSA[7..4] R25 N22 CLKA0# [21]
QSA4 FBA_DQS_WP4 FBA_CLK1 CLKA1
W23 M22 CLKA1 [22]
QSA5 FBA_DQS_WP5 FBA_CLK1 CLKA1#
QSA6 AB26 CLKA1# [22]
FBA_DQS_WP6
QSA7 T26 FBA_DQS_WP7
.1U_0402_16V7K
CV52
.1U_0402_16V7K
CV53
.1U_0402_16V7K
22U_0603_6.3V6M
FB_PLLAVDD P22
1 2 1 1
CV51 DIS@
FB_DLLAVDD H22
FB_PLLAVDD
DIS@
DIS@
DIS@
GF117 GF119/GK208 2 1 2 2
A A
N15V-GM_FCBGA595
()*+,-./-0123)45167.8419
DIS@
Security Classification Compal Secret Data
https://Dr-Bios.com
Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
NV(2/5)-MEMORY FBA
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-A721P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 19 of 47
5 4 3 2 1
5 4 3 2 1
[20,33,44,9] DGPU_PWR_EN
RV24 10_0402_5%2 @ +1.05VS to +1.05VS_VGA +3VS_DGPU to +3VS_VGA
RV14 10_0402_5%2 @
[15,20,44] DGPU_PWROK +1.05VS +3VS +3VS_VGA
(From VGA_CORE_VR)
RV1004 10_0402_5%2
[20,33,44] GPU_PWR_EN
1U_0402_6.3V6K
DIS@ 1
1U_0402_6.3V6K
CV60
(From EC) 1
CV118 @
+1.05VS_VGA +5VALW DIS@
D 2 UV11 QV4 D
2
DIS@
1 14 RV1001 1 RS@ 2 0_0805_5% 1 DMG2301U-7 1P SOT23-3
VIN1 VOUT1
1
2 13 CV61
VIN1 VOUT1 3 1
D
0.1U_0402_25V6 DIS@
+5VALW 3 12 1 2 @
4.7U_0603_6.3V6K
DIS@ RV128
ON1 CT1
1
2
470_0603_5%
1U_0603_25V6K
CV63 100K_0402_5% 1 1
4 11 3300P_0402_50V7K
G
2
2
VBIAS GND
1U_0402_6.3V6K
CV58
CV56
RV59
1 DIS@ @
CV119 DIS@
5 10 1 2 @ DGPU_PWR_EN# 1 RV129 2 DIS@ @
ON2 CT2 CV66 +1.35V_VGA 10K_0402_5% 2 2
2
1
D
1U_0402_6.3V6K
1 6 9 1000P_0402_50V7K 1
2 +1.35V VIN2 VOUT2 8
CV120 @
7 RV1002 1 RS@ 2 0_0805_5% 2 QV3 DIS@ DIS@
VIN2 VOUT2 [20,33,44,9] DGPU_PWR_EN
1
G 2N7002_SOT23 CV62 D
1
15 CV57 S .1U_0402_16V7K @ 2
3
2 GPAD 2
1U_0402_6.3V6K
1 0.1U_0402_25V6 (From SOC GPIO_S5_32) QV17 G
1
CV117 DIS@
RV13 1 DIS@ 2 SA00006FD00 DIS@ 2N7002LT1G_SOT23-3
S
[15,20,44] DGPU_PWROK
3
0_0402_5% TPS22966DPUR_SON14_2X3 2
(From VGA_CORE_VR) DIS@ RV130
RV23 10_0402_5%2 2 100K_0402_5%
[20,33,44] GPU_PWR_EN
@ DIS@
2
(From EC) DGPU_PWR_EN#
+1.35V_DGPU to +1.35V_VGA
VGA_CORE discharge
C C
+VGA_CORE
2
RV60
470_0603_5%
@
1
1
D
@ QV11 2 DGPU_PWR_EN#
2N7002LT1G_SOT23-3 G
S
3
B B
A A
https://Dr-Bios.com
Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DGPU_DC/DC Interface
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 20 of 47
5 4 3 2 1
5 4 3 2 1
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
FBA_CMD27 N8 D9 FBA_CMD12 M2 B2
BA1 VDD BA0 VDD
DIS@ CV80
DIS@ CV81
DIS@ CV72
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
FBA_CMD26 M3 G7 1 1 1 FBA_CMD27 N8 D9
BA2 VDD BA1 VDD
DIS@ CV88
DIS@ CV89
DIS@ CV79
K2 FBA_CMD26 M3 G7 1 1 1
VDD K8 BA2 VDD K2
VDD N1 VDD K8
CLKA0 J7 VDD N9 2 2 2 VDD N1
[19] CLKA0
CLKA0# K7 CK VDD R1
PLACE 0.1uF CAPS CLOSEST CLKA0 J7 VDD N9 2 2 2
[19] CLKA0# CK# VDD R9 TO THE MEMORY DEVICES CLKA0# K7 CK VDD R1
PLACE 0.1uF CAPS CLOSEST
VDD CK# VDD R9 TO THE MEMORY DEVICES
FBA_CMD3 K9 VDD
J9 CKE0 A1 PLACE LARGER CAPACITORS FBA_CMD3 K9
FBA_CMD2 K1 CKE1/NC VDDQ A8 J9 CKE0 A1 PLACE LARGER CAPACITORS
J1 ODT0 VDDQ C1 SLIGHTLY FARTHER AWAY FBA_CMD2 K1 CKE1/NC VDDQ A8
FBA_CMD0 L2 ODT1/NC VDDQ C9 J1 ODT0 VDDQ C1 SLIGHTLY FARTHER AWAY
L1 CS0# VDDQ D2 FBA_CMD0 L2 ODT1/NC VDDQ C9
CS1#/NC VDDQ E9 +1.35V_VGA L1 CS0# VDDQ D2
VDDQ F1 CS1#/NC VDDQ E9 +1.35V_VGA
FBA_CMD30 J3 VDDQ H2 VDDQ F1
C RAS# VDDQ 1.35V VDDQ C
FBA_CMD15 K3 H9 FBA_CMD30 J3 H2 1.35V
FBA_CMD13 L3 CAS# VDDQ FBA_CMD15 K3 RAS# VDDQ H9
WE# CAS# VDDQ
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
FBA_CMD13 L3
WE#
10U_0603_6.3V6M
DIS@ CV82
DIS@ CV83
DIS@ CV84
DIS@ CV85
DIS@ CV73
DIS@ CV74
DIS@ CV75
DIS@ CV67
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
A9 1 1 1 1 1 1 1 1
VSS
DIS@ CV90
DIS@ CV91
DIS@ CV86
DIS@ CV87
DIS@ CV76
DIS@ CV77
DIS@ CV78
DIS@ CV68
QSA1 F3 B3 A9 1 1 1 1 1 1 1 1
QSA2 C7 LDQS VSS E1 QSA0 F3 VSS B3
UDQS VSS G8 QSA3 C7 LDQS VSS E1
VSS J2 2 2 2 2 2 2 2 2 UDQS VSS G8
QSA#1 G3 VSS J8 VSS J2 2 2 2 2 2 2 2 2
QSA#2 B7 LDQS# VSS M1 QSA#0 G3 VSS J8
UDQS# VSS M9 QSA#3 B7 LDQS# VSS M1
VSS P1 UDQS# VSS M9
DQMA1 E7 VSS P9 VSS P1
DQMA2 D3 LDM VSS T1 DQMA0 E7 VSS P9
UDM VSS T9 DQMA3 D3 LDM VSS T1
VSS UDM VSS T9
VSS
FBA_CMD5 T2 B1
RESET# VSSQ B9 FBA_CMD5 T2 B1
VSSQ D1 RESET# VSSQ B9
VSSQ D8 VSSQ D1
RV111 1 DIS@ 2 243_0402_1% L8 VSSQ E2 VSSQ D8 +1.35V_VGA
ZQ0 VSSQ E8 RV112 1 DIS@ 2 243_0402_1% L8 VSSQ E2
L9 VSSQ F9 ZQ0 VSSQ E8
ZQ1/NC VSSQ G1 L9 VSSQ F9
VSSQ ZQ1/NC VSSQ
1
G9 G1
VSSQ VSSQ G9 RV115
96-BALL VSSQ 1.33K_0402_1%
SDRAM DDR3L 96-BALL DIS@
H5TC4G63AFR-11C_FBGA96 SDRAM DDR3L
2
H5TC4G63AFR-11C_FBGA96 +VREFD_UV5
B +1.35V_VGA B
1
1
RV113 CV71
1.33K_0402_1% 0.01U_0402_16V7K
1
DIS@ DIS@
RV108 2
Place close to Vram
2
1.33K_0402_1%
CLKA0 DIS@
2
1
+VREFC_UV5
RV2706
162_0402_1%
1
DIS@ 1
RV107 CV70
2
2
A A
https://Dr-Bios.com
Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VRAM_DDR3_A Lower
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-A721P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 21 of 47
5 4 3 2 1
5 4 3 2 1
UV7 @ UV6 @
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
Place close to Vram FBA_CMD27 N8 D9 FBA_CMD27 N8 D9
BA1 VDD BA1 VDD
DIS@ CV100
DIS@ CV101
DIS@ CV102
DIS@ CV112
DIS@ CV113
DIS@ CV114
FBA_CMD26 M3 G7 1 1 1 FBA_CMD26 M3 G7 1 1 1
BA2 VDD K2 BA2 VDD K2
CLKA1 VDD K8 VDD K8
VDD N1 VDD N1
VDD VDD
1
CLKA1 J7 N9 2 2 2 CLKA1 J7 N9 2 2 2
[19] CLKA1
CLKA1# K7 CK VDD R1
PLACE 0.1uF CAPS CLOSEST CLKA1# K7 CK VDD R1
PLACE 0.1uF CAPS CLOSEST
RV2717 [19] CLKA1#
162_0402_1% CK# VDD R9 TO THE MEMORY DEVICES CK# VDD R9 TO THE MEMORY DEVICES
DIS@ VDD VDD
FBA_CMD19 K9 FBA_CMD19 K9
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
.1U_0402_16V7K
DIS@ CV103
DIS@ CV104
DIS@ CV95
DIS@ CV96
DIS@ CV97
DIS@ CV98
DIS@ CV99
DIS@ CV92
DIS@ CV115
DIS@ CV116
DIS@ CV107
DIS@ CV108
DIS@ CV109
DIS@ CV110
DIS@ CV111
DIS@ CV93
A9 1 1 1 1 1 1 1 1 A9 1 1 1 1 1 1 1 1
QSA6 F3 VSS B3 QSA4 F3 VSS B3
QSA5 C7 LDQS VSS E1 QSA7 C7 LDQS VSS E1
UDQS VSS G8 UDQS VSS G8
VSS J2 2 2 2 2 2 2 2 2 VSS J2 2 2 2 2 2 2 2 2
QSA#6 G3 VSS J8 QSA#4 G3 VSS J8
QSA#5 B7 LDQS# VSS M1 QSA#7 B7 LDQS# VSS M1
UDQS# VSS M9 UDQS# VSS M9
VSS P1 VSS P1
DQMA6 E7 VSS P9 DQMA4 E7 VSS P9
DQMA5 D3 LDM VSS T1 DQMA7 D3 LDM VSS T1
UDM VSS T9 UDM VSS T9
VSS VSS
FBA_CMD5 T2 B1 FBA_CMD5 T2 B1
RESET# VSSQ B9 RESET# VSSQ B9
VSSQ D1 VSSQ D1
VSSQ D8 VSSQ D8
RV97 1 DIS@ 2 243_0402_1% L8 VSSQ E2 RV98 1 DIS@ 2 243_0402_1% L8 VSSQ E2
ZQ0 VSSQ E8 ZQ0 VSSQ E8
L9 VSSQ F9 L9 VSSQ F9
ZQ1/NC VSSQ G1 ZQ1/NC VSSQ G1
VSSQ G9 VSSQ G9
VSSQ VSSQ
96-BALL 96-BALL
B SDRAM DDR3L SDRAM DDR3L B
H5TC4G63AFR-11C_FBGA96 H5TC4G63AFR-11C_FBGA96
+1.35V_VGA +1.35V_VGA
1
RV100 RV95
1.33K_0402_1% 1.33K_0402_1%
DIS@ DIS@
2
+VREFC_UV7 +VREFD_UV7
1
1 1
RV94 CV105 RV96 CV106
1.33K_0402_1% 0.01U_0402_16V7K 1.33K_0402_1% 0.01U_0402_16V7K
DIS@ DIS@ DIS@ DIS@
2 2
2
A A
https://Dr-Bios.com
Issued Date 2011/07/15 Deciphered Date 2012/07/15 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
VRAM_DDR3_A Upper
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom LA-A721P 0.2
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 22 of 47
5 4 3 2 1
A B C D E
[6] ENVDD
[6] BKOFF#
R118 1 @ 2 0_0402_5% DISPOFF# LCD/ LED PANEL Conn.
2
R120 1 2 0_0402_5%
[33] EC_BKOFF#
RS@ R119
+LCDVDD 100K_0402_1%
+INVPWR_B+ B+
1
1
+1.8VS @
R1063
W=60mils W=60mils
100K_0402_5% R122 1 RS@ 2 0_0805_5%
1
EDP_AUXN_C 2
R383 EDP_AUXP_C 1 SM010014520 3000ma
10K_0402_5% @
2 220ohm@100mhz 2
1
C149
2
@ DCR 0.04
4.7U_0805_25V6-K
[6] EDP_HPD# 2
R1062
1
100K_0402_5%
D
2
Q13 2 EDP_HPD_CONN
2N7002LT1G_SOT23-3 G
1
S
3
3 2 G1 42
between the AC capacitor and the 4 3 G2 43
connector, to assist source detection 5 4 G3 44
6 5 G4 45
by the sink device. 6 G5
7 46
[6] INVT_PWM_SOC 8 7 G6
DISPOFF#
EDP_HPD_CONN 9 8
10 9
W=60mils 11 10
+LCDVDD 11
12
13 12
14 13
+(W C377 1 2 .1U_0402_16V7K EDP_AUXN_C 15 14
+3VS
)*#+,* +3VS_CMOS
[6]
[6]
EDP_AUXN
EDP_AUXP C376 1 2 .1U_0402_16V7K EDP_AUXP_C 16
17
15
16
C371 1 2 .1U_0402_16V7K EDP_TXP0_C 18 17
[6] EDP_TXP0 18
C372 1 2 .1U_0402_16V7K EDP_TXN0_C 19
[6] EDP_TXN0 20 19
CMOS@
Q4 FHD@ C373 1 2 .1U_0402_16V7K EDP_TXP1_C 21 20
1U_0402_6.3V6K
23
C1087
TS_DETECT
RS@ 25 24
3
1 1 1 25 3
CMOS@ 26
C148 C144 @ 27 26
G
2
.1U_0402_16V7K 10U_0603_6.3V6M 28 27
R114CMOS@ 2 2 USB20_TS_P0_R 29 28
150K_0402_5% USB20_TS_N0_R 30 29
4.7V 31 30
[33] CMOS_ON# d12345^3,++6 R1039 1 B14@ 2 0_0402_5% 32 31
[33] TS_DISABLE# R270 1 B14@ 2 0_0603_5% +3VS_TS 33 32
1 +3VS 33
34
+3VS_CMOS 34
C141 CMOS@ USB20_CAM_N2_R 35
.1U_0402_16V7K USB20_CAM_P2_R 36 35
2 37 36
)*#+,* 38 37
(D/) [28] DMIC_CLK 39 38
[28] DMIC_DAT 40 39
+3VS 40
E-T_0871K-F40N-00L
R1039 R270 ME@
0_0402_5% 0_0603_5% SP010011Z00
+3VS B15@ B15@
1
@ @
4 L6 3 USB20_TS_N0_R R384 R385 @
[30] USB20_TS_N0 4 3 10K_0402_5% 10K_0402_5%
)*#+,*
2
1 2 USB20_TS_P0_R TS_DISABLE# TS_DETECT
[30] USB20_TS_P0 1 2
WCM-2012HS-900T
4 4
@
4 L7 3 USB20_CAM_P2_R
[30] USB20_CAM_P2 4 3
d12345^3,++6
Security Classification Compal Secret Data Compal Electronics, Inc.
1 2 USB20_CAM_N2_R 2013/04/12 2014/04/12 Title
[30] USB20_CAM_N2 1 2 Issued Date Deciphered Date
WCM-2012HS-900T
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
eDP CONN.
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
R135 2 RS@ 1 0_0402_5% Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
https://Dr-Bios.com
Date: Tuesday, February 18, 2014 Sheet 23 of 47
A B C D E
A B C D E
E+*,5,(D/5)KEE
+1.8VS
C381 2 1 .1U_0402_16V7K HDMI_C_TX1- R1071 1 2 619_0402_1%
[6] HDMI_TX1-
C382 2 1 .1U_0402_16V7K HDMI_C_TX1+ R1072 1 2 619_0402_1%
[6] HDMI_TX1+
1
C379 2 1 .1U_0402_16V7K HDMI_C_TX2- R1073 1 2 619_0402_1% +5VS +HDMI_5V_OUT
[6] HDMI_TX2-
[6] HDMI_TX2+ C380 2 1 .1U_0402_16V7K HDMI_C_TX2+ R1074 1 2 619_0402_1% W=40mils R376
HDMI_GND
10K_0402_5%
[6] HDMI_TX0- C383 2 1 .1U_0402_16V7K HDMI_C_TX0- R1075 1 2 619_0402_1%
[6] HDMI_TX0+ C384 2 1 .1U_0402_16V7K HDMI_C_TX0+ R1076 1 2 619_0402_1%
U52
2
C385 2 1 .1U_0402_16V7K HDMI_C_CLK- R1077 1 2 619_0402_1%
[6] HDMI_CLK- [6] HDMI_HPD#
C386 2 1 .1U_0402_16V7K HDMI_C_CLK+ R1078 1 2 619_0402_1%
[6] HDMI_CLK+
6
1
3 1
OUT Q14B
D
2 HDMI_HPD
1
G
1 DMN66D0LDW-7_SOT363-6 S
IN
1
C378
1
5 2
D
+3VS
G Q14A .1U_0402_16V7K R121
DMN66D0LDW-7_SOT363-6 GND 2
S
100K_0402_5%
4
AP2330W-7_SC59-3
2
R136 @ 0_0402_5%
&1,5&D/
1 2
SM070001S10
L8 HDMI@
HDMI_C_CLK+ 1 2 HDMI_R_CK+
1 2
HDMI_C_CLK- 4 3 HDMI_R_CK-
4 3
WCM-2012HS-900T 2 2
R137 0_0402_5% C1002 C1001
1 2 33P_0402_50V8J 33P_0402_50V8J
@ 1 1
@EMI@ @EMI@
C1106
C1107
HDMI_SDATA
HDMI_C_TX0- 4 3 HDMI_R_D0- HDMI_SCLK 15 SDA
4 3 2 2 SCL
@EMI@
@EMI@
14
WCM-2012HS-900T 13 Reserved
2 2 CEC
R139 0_0402_5% HDMI_R_CK- 12 20
.1U_0402_16V7K
.1U_0402_16V7K
1 2 C1006 C1005 1 1 11 CK- GND 21
@ HDMI_R_CK+ 10 CK_shield GND 22
33P_0402_50V8J 33P_0402_50V8J CK+ GND
1 1 HDMI_R_D0- 9 23
+1.8VS @EMI@ @EMI@ D0- GND
8
HDMI_R_D0+ 7 D0_shield
HDMI_R_D1- 6 D0+
R140 0_0402_5% 5 D1-
.1U_0402_16V7K
D1_shield
C61
1 1 2 HDMI_R_D1+ 4
@ HDMI_R_D2- 3 D1+
2 D2-
D2_shield
ESD@
SM070001S10 HDMI_R_D2+ 1
2 L10 HDMI@ D2+
HDMI_C_TX1+ 1 2 HDMI_R_D1+ CONCR_099ATAC19NBLCNF
1 2
2
G
DC232001K00
3 1 HDMI_SCLK HDMI_C_TX1- 4 3 HDMI_R_D1-
[6] HDMI_DDCCLK 4 3
Q57
S
D
2
ME@
G
MESS138W-G_SOT323-3 WCM-2012HS-900T 2 2
3 1 HDMI_SDATA R141 0_0402_5% C1016 C1007
[6] HDMI_DDCDATA 1 2
Q58
S
33P_0402_50V8J 33P_0402_50V8J
MESS138W-G_SOT323-3 @ 1 1
@EMI@ @EMI@
3 R142 0_0402_5% 3
1 2
@
SM070001S10
L12 HDMI@
HDMI_C_TX2+ 1 2 HDMI_R_D2+
1 2
HDMI_C_TX2- 4 3 HDMI_R_D2-
4 3
WCM-2012HS-900T 2 2
R143 0_0402_5% C1092 C1091
1 2 33P_0402_50V8J 33P_0402_50V8J
@ 1 1
@EMI@ @EMI@
&^(
E14@ D1 E14@ D5 E14@ D3
HDMI_SDATA 9 !(* ( 1 HDMI_SDATA HDMI_R_CK- 9 !(* ( 1 HDMI_R_CK- HDMI_R_D0- 9 !(* ( 1 HDMI_R_D0-
HDMI_SCLK 8 !!) ' 2 HDMI_SCLK HDMI_R_CK+ 8 !!) ' 2 HDMI_R_CK+ HDMI_R_D0+ 8 !!) ' 2 HDMI_R_D0+
8 8 8
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDMI CONN.
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
https://Dr-Bios.com
Date: Tuesday, February 18, 2014 Sheet 24 of 47
A B C D E
A B C D E
+HDMI_5V_OUT
W=40mils
1
0822 Changed
07/05 : HSYNC ripple C450
.1U_0402_16V7K
2
Video Filter
JCRT1
L42 EMI@ 6
1 77MHz@1920x1200x60Hz SM01000FH00 BLM15BB470SN1D_2P 11 1
1 2 RED 1
[6] CRT_R 7
L45 EMI@
SM01000FH00 BLM15BB470SN1D_2P CRT_DDC_DAT_CONN 12
1 2 GREEN 2
[6] CRT_G 8 16
L46 EMI@ G
SM01000FH00 BLM15BB470SN1D_2P 13 17
1 2 3 G
BLUE
[6] CRT_B 9
14
10P_0402_50V8J
C648 EMI@
10P_0402_50V8J
C615 EMI@
10P_0402_50V8J
C611 EMI@
10P_0402_50V8J
C647 EMI@
10P_0402_50V8J
C618 EMI@
10P_0402_50V8J
C616 EMI@
RP50 1 1 1 1 1 1 4
CRT_B 8 1 10
CRT_G 7 2 CRT_DDC_CLK_CONN 15
CRT_R 6 3 5
5 4 2 2 2 2 2 2
C-K_80443-5K1-152
150_0804_8P4R_1%
DC060006H00
ME@
CRT Connector
JVGA_HS_R
JVGA_VS_R
2 2
1
C449
.1U_0402_16V7K For CRT Flicker
2
+3VS
1 1
@
C529 C531
U10 +HDMI_5V_OUT
0.1U_0402_16V4Z 0.1U_0402_16V4Z
2 2 1 8 1 2
2
VCC_SYNC BYP
3 RED
C6 0.22U_0402_10V6K
&^(
+3VS +3VS VCC_VIDEO VIDEO1
3 3
1
+HDMI_5V_OUT
7 4 GREEN R31 R33
VCC_DDC VIDEO2 4.7K_0402_5% 4.7K_0402_5% SC300001G00
1 DT1 E14@
[6] CRT_DDC_DATA 10 5 BLUE JVGA_HS_R 6 3 CRT_DDC_DAT_CONN
2
C537 DDC_IN1 VIDEO3 I/O4 I/O2
1 R1083 2 CRT_DDC_DATA 0.1U_0402_16V4Z
2.2K_0402_5% 2 11 9 CRT_DDC_DAT_CONN
[6] CRT_DDC_CLK DDC_IN2 DDC_OUT1 5 2
1 R1092 2 CRT_DDC_CLK VDD GND
2.2K_0402_5% 60Hz@1920x1200x60Hz 13 12 CRT_DDC_CLK_CONN
[6] CRT_VSYNC SYNC_IN1 DDC_OUT2
JVGA_VS_R 4 1 CRT_DDC_CLK_CONN
15 14 JVGA_VS R872 1 2 22_0402_5% JVGA_VS_R I/O3 I/O1
[6] CRT_HSYNC SYNC_IN2 SYNC_OUT1
74kHz@1920x1200x60Hz AZC099-04S.R7G_SOT23-6
SC300001G00
6 16 JVGA_HS R873 1 2 22_0402_5% JVGA_HS_R +HDMI_5V_OUT DT2 E14@
GND SYNC_OUT2 RED 6 3 BLUE
I/O4 I/O2
C851
C852
TPD7S019-15DBQR_SSOP16
1 1
5 2
VDD GND
10P_0402_50V8J
10P_0402_50V8J
2 2
@EMI@
@EMI@
GREEN 4 1
I/O3 I/O1
AZC099-04S.R7G_SOT23-6
4 4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
CRT CONN.
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
https://Dr-Bios.com
Date: Tuesday, February 18, 2014 Sheet 25 of 47
A B C D E
5 4 3 2 1
+3VALW +3V_LAN
RL11
RL18 1 RS@ 2 0_0603_5% 1 2
0_0603_5%
60mil W=60mil 8111G_LDO@
+LAN_VDD
LL1
W=60mils
+LAN_SROUT1.05 1 2
0.1U_0402_16V7K
2
2.2UH +-5% NLC252018T-2R2J-N
0.1U_0402_16V7K
CL1 SWH@
4.7U_0603_6.3V6K
1
1U_0402_6.3V6K 1 1
1 CL15 CL16
CL17
2 SWH@ SWH@
2 2
D D
8111G_LDO@
LL1, CL16, and CL17 close to Pin24
( Should be place within 200 mils )
RJ-45 CONN.
+3V_LAN JLAN1 ME@
+LAN_VDD LED0 1 2 12
Yellow LED-
Rising time (10%~90%) >1mS and <100mS W=40mils RL15 510_0402_5%
+3V_LAN 11
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
0.1U_0402_16V7K
RL1 1 RS@ 2 +LAN_VDDREG Yellow LED+
+3V_LAN RJ45_TX3- 8
0.1U_0402_16V7K
1U_0402_6.3V6K
4.7U_0603_6.3V6K
1 1 1 1 1 PR4-
0_0603_5% 1 1
CL8
7
SWH@
CL9 CL10 CL4 CL5 CL6 CL7 RJ45_TX3+
0.1U_0402_16V7K
PR4+
SWH@
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2 2 2 2 2 RJ45_RX1- 6
0.1U_0402_16V7K
1 1 1 1 PR2-
@ @ 2 2
CL2 CL3 CL20 CL21 RJ45_TX2- 5
PR3-
2 2 2 2 RJ45_TX2+ 4
PR3+
C C
Close to Pin3, Pin8, Pin22, Pin30, Pin22 RJ45_RX1+ 3
PR2+
RJ45_TX0- 2
PR1- 13
Close to Pin23 Close to Pin23 RJ45_TX0+ 1 SHLD2 14
W=60mils +3V_LAN PR1+ SHLD1
LED2 1 2 10
RL16 510_0402_5% Green LED-
CL2 close to Pin 11 9
Green LED+
CL3 close to Pin 32 SANTA_130452-0P
DC234007O00 LANGAN1 LANGAN
1
LANGAN LAN_MDIN0 2 18 PCIE_PRX_DTX_N0_C 1 2PCIE_GTX_C_ARX_N0
MDIN0 HSON PCIE_GTX_C_ARX_N0 [7]
3 19 PLT_RST_BUF# CL12 0.1U_0402_16V7K RL8
LAN_MDIP1 4 AVDD10 PERSTB 20 ISOLATE# PLT_RST_BUF# [15,27,29,33,8] 1K_0402_5%
LAN_MDIN1 5 MDIP1 ISOLATEB 21 PCIE_LAN_WAKE#
@EMI@ RL6 1 2 0_0402_5% LAN_MDIP2 6 MDIN1 LANWAKEB 22 PCIE_LAN_WAKE# [27,33]
2
LAN_MDIN2 7 MDIP2 DVDD10 23 +LAN_VDDREG ISOLATE#
@EMI@ RL7 1 2 0_0402_5% 8 MDIN2 VDDREG 24 +LAN_SROUT1.05 +3V_LAN
LAN_MDIP3 9 AVDD10 REGOUT 25 LED2 TPL1
LAN_MDIN3 10 MDIP3 LED2 26 LED1_GPIO 1 @ 2
11 MDIN3 LED1/GPIO 27 LED0 RL17 10K_0402_5% RL10
+3V_LAN AVDD33 LED0
LANGAN1 LAN_CLKREQ# 12 28 XTLO TPL2 15K_0402_5%
[7] LAN_CLKREQ# PCIE_ATX_C_GRX_P0 13 CLKREQB CKXTAL1 29 XTLI
[7] PCIE_ATX_C_GRX_P0 PCIE_ATX_C_GRX_N0 14 HSIP CKXTAL2 30
[7] PCIE_ATX_C_GRX_N0 CLK_PCIE_LAN 15 HSIN AVDD10 31 2.49K_0402_1% 2 1 RL9
B Green CLK option GCLK@ [8] CLK_PCIE_LAN CLK_PCIE_LAN# 16 REFCLK_P RSET 32
B
NOGCLK@
CL13
1 2 XTLO
UL2 UL2 TL1
10P_0402_50V8J RTL8106EUL-CG QFN 32P E-LAN CTRL RTL8111GUL-CG QFN 32P E-LAN CTRL +V_DAC 1 24 MCT
SA00006N910 TCT1 MCT1 RL19 CL19
SA00006ML10
1
NC
A TL1 350UH_IH-160 A
E14@ S0 X'FORM_ HH-065 10/100 8111G_SWH@
DL2 8106E_SWH@
LAN_MDIN0 1 4 LAN_MDIP1
I/O1 I/O3
FOR 10/100 data transferring 2013/08/27
2 5
GND VDD
https://Dr-Bios.com
Date: Tuesday, February 18, 2014 Sheet 26 of 47
5 4 3 2 1
A B C D E
1 1
+3VS +3VS_WLAN
C1152 1 2 0.1U_0603_6.3V6M
D
JWLAN1 1@
2 1 2 2
GND 3.3VAUX 1 1
3 4 C155 C156
[30] USB20_BT_P4 5 USB_D+ 3.3VAUX 6
BT @ @
G
[30] USB20_BT_N4
2
7 USB_D- LED1# 8 4.7U_0603_6.3V6K 0.1U_0402_16VK7
9 GND PCM_CLK 10 [33] WLAN_PWR_ON# 2 2
SIDO_CLK PCM_SYNC 1
11 12 @ R157 @
13 SDIO_CMD PCM_IN 14 150K_0402_5% C157
15 SDO_DAT0 PCM_OUT 16 0.1U_0402_16VK7
17 SDO_DAT1 LED2# 18 2
19 SDO_DAT2 GND 20
21 SDO_DAT3 UART_W AKE# 22
23 SDIO_W AKE# UART_RX
SDIO_RESET#
24
25 UART_TX 26
27 GND UART_CTS 28
[7] PCIE_PTX_C_DRX_P3 29 PETP0 UART_RTS 30 R161 1 RS@ 2 0_0402_5%
[7] PCIE_PTX_C_DRX_N3 31 PETN0 RESERVED 32 E51TXD_P80DATA [32,33]
R165 1 RS@ 2 0_0402_5%
33 GND RESERVED 34 E51RXD_P80CLK [32,33]
[7] PCIE_PRX_DTX_P3 PERP0 RESERVED
t>BE 35 36
[7] PCIE_PRX_DTX_N3 37 PERN0 COEX3 38
39 GND COEX2 40
[8] CLK_PCIE_WLAN 41 REFCLKP0 COEX1 42 SUSCLK_R R158 1 RS@ 2 0_0402_5%
[8] CLK_PCIE_WLAN# 43 REFCLKN0 SUSCLK 44 PMC_SUSCLK [8]
WL_RST#
GND PERST0# BT_OFF# [9]
[7] WLAN_CLKREQ# R167 1 RS@ 2 0_0402_5% WLAN_CLKREQ#_R 45 46 BT_OFF# R159 1 @ 2 0_0402_5%
CLKEQ0# W _DISABLE2# EC_BT_OFF# [33]
[8] SOC_PCIE_WAKE# R160 1 @ 2 0_0402_5% WAKE#_R 47 48 R166 1 RS@ 2 0_0402_5%
PEW AKE0# W _DISABLE1# EC_WL_OFF# [33]
[26,33] PCIE_LAN_WAKE# R162 1 2 0_0402_5% 49 50
@ 51 GND I2C_DATA 52
53 RSRVD/PETP1 I2C_CLK 54
3 55 RSRVD/PETN1 ALERT 56
E1C+D5d4+5,+*%5E+4*F$1,51G5HdI(/^BH>&5*,+ 3
57 GND RESERVED 58 HdI(/^BH>&.>KtJ5Hd.K&&
59 RSRVD/PERP1 RESERVED 60
61 RSRVD/PERN1 RESERVED 62 HdI(/^BH>&.,/',J5Hd.KE5
63 GND RESERVED 64
65 RESERVED 3.3VAUX 66
67 RESERVED 3.3VAUX
GND
+3VS_WLAN
69 68
MTG77 MTG76
1
+3VS
LCN_DAN05-67306-0102 R163
ME@ @ 100K_0402_5%
2
SP070013F00 Q11
2N7002LT1G_SOT23-3
G
2
@
WL_RST# 1 3
PLT_RST_BUF# [15,26,29,33,8]
S
R164 1 RS@ 2 0_0402_5%
4 4
https://Dr-Bios.com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Mini PCIE(WLAN)
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 27 of 47
A B C D E
A B C D E
600ohms @100MHz 2A
RA2 1 RS@ 2 RA3 1 RS@ 2
P/N: SM01000EE00
0.1U_0402_16VK7
0.1U_0402_16VK7
1U_0402_6.3V6K
0_0603_5% 1 1 0_0603_5%
1
CA4
CA5
CA6
+5VS Place near Pin25
2
2 2
RA1 1 RS@ 2 0_0805_5% +5VS_PVDD
Place RA41 on AGND/DGND moat
0.1U_0402_16VK7
0.1U_0402_16VK7
4.7U_0603_6.3V6K
2 1 1
+5VDDA_CODEC +5VS
Place near Pin1 Place near Pin9
CA2
CA3
CA1
1
1 2 2
Place near Pin26 1
0.1U_0402_16VK7
1U_0402_6.3V6K
+3VDD_CODEC
1 1
CA7
CA11
RA5 1 RS@ 20_0402_5%
1
41
46
26
40
1
9
233@ UA2 233@ RA9
100K_0402_5%
PVDD1
PVDD2
AVDD1
AVDD2
DVDD
DVDD-IO
3
2
LINE1-L 22 5 L2N7002DW1T1G 2N SOT-363
LINE1-R 21 LINE1-L(PORT-C-L) 43 SPK_L1- QA1B
LINE1-R(PORT-C-R) SPK-OUT-L-
6
42 SPK_L2+ 233@
4
24 SPK-OUT-L+
1
RA7 MIC2-R(PORT-F-R) /SLEEVE 32 HP_OUTL
31 HPOUT-L(PORT-I-L) 33 HP_OUTR
+LINE1-VREFO-R
30 LINE1-VREFO-L HPOUT-R(PORT-I-R) Headphone
LINE1-VREFO-R 10 HDA_SYNC_AUDIO
SYNC HDA_SYNC_AUDIO [7]
DMIC_DAT 2 6 HDA_BITCLK_AUDIO
[23] DMIC_DAT GPIO0/DMIC-DATA BCLK HDA_BITCLK_AUDIO [7]
DMIC_CLK RA37 EMI@ 1 2 SBY100505T-301Y-N 0402 DMIC_CLK_R 3
External DMIC [23] DMIC_CLK RA8 1 @ 2 10K_0402_5% GPIO1/DMIC-CLK RA10 1 @EMI@ 2 33_0402_5% @EMI@ CA12 22P_0402_50V8J
RS@
RA11 1 2 0_0402_5% 47 5 HDA_SDOUT_AUDIO
2 [7]
[33] EC_MUTE#
HDA_RST_AUDIO#
11 PDB
RESETB
ALC233-CG SDATA-OUT
SDATA-IN
8 HDA_SDIN0_AUDIO RA12 1 2 33_0402_5%
HDA_SDOUT_AUDIO
HDA_SDIN0 [7]
[7]
For ALC233VB only
+3VS
2
48 +MIC2-VREFO
PC_BEEP 12 SPDIF-OUT/GPIO2
PCBEEP
2
16
PLUG_IN_R 13 MONO-OUT CA13 2 1 2.2U_0402_6.3V6M RA38
14 SENSE A
SENSE B 29
100K_0402_5% Combo Jack
CA14 2 1 2.2U_0402_6.3V6M
233VB@
37 MIC2-VREFO
(Normal Open)
1
CA15 2 1 1U_0402_6.3V6K 35 CBP 7 LDO3 CA16 2 1 2.2U_0402_6.3V6M
CBN LDO3-CAP 39 LDO2
LDO2-CAP 27 LDO1 2 1 233VB@
36 LDO1-CAP RA15 100K_0402_5% PLUG_IN_R RA13 1 2 200K_0402_1% PLUG_IN
+3VDD_CODEC CPVDD PLUG_IN [32]
CA17 2 1 4.7U_0603_6.3V6K
@ 28 CA18 1 2 1U_0402_6.3V6K
233VB@ RA161 2 100K_0402_5% 20 VREF
+3VLP CPVREF 15 JDREF RA17 1 2 20K_0402_1% W=40mils EXT_MIC_SLEEVE RA19 1 2 TAI-TECH FCM1608CF-121T03 0603 HGNDB
JDREF HGNDB [32]
CA19 2 1 2.2U_0402_6.3V6M 19 34 CPVEE 233@ W=40mils EXT_MIC_RING2 RA20 1 2 TAI-TECH FCM1608CF-121T03 0603 HGNDA
MIC-CAP CPVEE HGNDA [32]
HP_OUTL RA22 1 2 47_0402_5% HPOUT_L
HPOUT_L [32]
2 HP_OUTR RA23 1 2 47_0402_5% HPOUT_R
HPOUT_R [32]
RA18 1 @ 2 0_0402_5% 4
49 DVSS 25 CA20
Thermal PAD AVSS1 38
AVSS2 1U_0402_6.3V6K
1
RA18 pop on ALC283, NC on ALC233
2
ALC233-CG_MQFN48_6X6 LINE1-L CA21 2 1 1U_0402_6.3V6K
RA26
RA27
10K_0402_5%
10K_0402_5%
LINE1-R CA22 2 1 1U_0402_6.3V6K @ @
1
RA29 1 2 4.7K_0402_5%
For EMI UA2
ALC233-VB2-CG MQFN 48P
233VB@
RA21 RS@ SA00007BF10 +LINE1-VREFO-R
1 2
3 0_0402_5% RA32 1 2 3
RA24 RS@ 4.7K_0402_5% For Universal Audio Jack
1 2
0_0402_5%
RA25 RS@
1 2
0_0402_5%
RA28
@ 1 2
0_0402_5%
GND GNDA
11/20 Change symbol of JSPK1 to SP02000H700
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
1000P_0402_50V7K
PC Beep 0_0603_5% 0_0603_5%
1 1 1 1 +5VS
G6
JSPK1
EMI@ EMI@ ME@
EMI@ CA28
EMI@ CA29
EMI@ CA30
EMI@ CA31
EC Beep CA23 1 2 0.1U_0402_16V4Z CA25
ESD
[33] BEEP#
4
1 RA34 2 1 2 PC_BEEP @ DA3 4
CA24 1 2 0.1U_0402_16V4Z LA7 LA8 2 2 2 2 SPK_R1-_CONN 6 3 SPK_L2+_CONN
[9] HDA_SPKR I/O4 I/O2
1K_0402_5% 0.1U_0402_16V7K 0_0603_5% 0_0603_5%
PCH Beep
EMI@ EMI@
1
DVT, NO.31 5 2
@ VDD GND
RA36
10K_0402_5%
SPK_R2+_CONN 4 1 SPK_L1-_CONN
2
I/O3 I/O1
AZC099-04S.R7G_SOT23-6
For EMI
https://Dr-Bios.com
A B C D E
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HD Audio Codec_ALC3225
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 28 of 47
5 4 3 2 1
D D
+AV12 +DV12S
+3VS
1 1 1 1
CC1 CC2 CC3 CC4
CC5 1 2 4.7U_0603_6.3V6K
2 2 2 2
0.1U_0402_16V7K
0.1U_0402_16V7K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
CC6 1 2 0.1U_0402_16V7K UCR1
9
+DV33_18 15 3V3_IN
+AV12 7 DV33_18
+Card_3V3 +DV12S 11 AV12
LC1 DV12_S
+Card_3V3 1 2 +Card_3V3_R 10
PBY160808T-301Y-N_0603 Card_3V3 25
1 2 8 GND
RC1 6.2K_0402_1% RREF Close to UCR1
PCIE_PTX_C_DRX_P1 1 12 SD_D1_R RC2 RS@ 1 2 0_0402_5% SD_D1
[7] PCIE_PTX_C_DRX_P1 HSIP SP1
PCIE_PTX_C_DRX_N1 2 13 SD_D0_R RC3 RS@ 1 2 0_0402_5% SD_D0
[7] PCIE_PTX_C_DRX_N1 HSIN SP2
PCIE_PRX_DTX_P1 CC7 1 2 0.1U_0402_16V7K PCIE_PRX_DTX_P1_C 5 14 SD_CLK_R RC9 2 EMI@ 1 33_0402_5% SD_CLK
[7] PCIE_PRX_DTX_P1 1 2 0.1U_0402_16V7K 6 HSOP SP3 16 1 2
PCIE_PRX_DTX_N1 CC8 PCIE_PRX_DTX_N1_C SD_CMD_RRC5 RS@ 0_0402_5% SD_CMD
[7] PCIE_PRX_DTX_N1 HSON SP4 17 1 2
SD_D3_R RC6 RS@ 0_0402_5% SD_D3
SP5 18 SD_D2_R RC7 RS@ 1 2 0_0402_5% SD_D2
C SP6 1 C
CLK_PCIE_Card 3 @EMI@
[8] CLK_PCIE_Card REFCLKP
[8] CLK_PCIE_Card# CLK_PCIE_Card# 4 CC13
+DV33_18 REFCLKN 5.6P 50V D NPO 0402
PLT_RST_BUF# 23 20 SD_WP 2
[15,26,27,33,8] PLT_RST_BUF# PERST# SD_WP
Card_CLKREQ# 24 21 SD_CD#
1U_0402_6.3V6K
2 [7] Card_CLKREQ# CLK_REQ# SD_CD#
CC10
2 1 SD_GPIO1 19 22
+3VS GPIO MS_INS#
RC8 10K_0402_5%
1 RTS5229-GR_QFN24_4X4
SA00004Z900
SD/SDXC
+Card_3V3
JSD1
B SD_D0 7 4 B
D0 VDD
SD_D1 8
D1
SD_D2 9 10 SD_WP CC11
0.1U_0402_16V7K
D2 WP 1 1
CC12
4.7U_0603_6.3V6K
SD_D3 1 11 SD_CD#
D3 CD
3 2 2
SD_CLK 5 VSS1 6
CLK VSS2 12
SD_CMD 2 Shading 13
CMD Shading
TAITW_PSDBTC-09GLBS1N14H0
ME@
A A
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P29-CardRead/RTS5229
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
https://Dr-Bios.com
Date: Tuesday, February 18, 2014 Sheet 29 of 47
5 4 3 2 1
A B C D E
W=80mils 3 &
USB3.0 Conn. 0909
W=80mils +5VALW
EMI@ L25
PCH_USB3_RX0_P 2 1 U3RXDP0 8 JUSB1
+USB3_VCCA [9] PCH_USB3_RX0_P 2 1 E14@ U3TXDP0 9
YSCLAMP0524P SLP2510P8 1 SSTX+
1 1 2 U13 PCH_USB3_RX0_N 3 4 U3RXDN0 U3TXDN0 8 VBUS 1
[9] PCH_USB3_RX0_N 3 4 SSTX-
C483 @ESD@ 1 USB20_P0_L 3
.1U_0402_16V7K 5 OUT DLW21SN900HQ2L-0805_4P 7 D+
IN 2 R454 SM070001S10 USB20_N0_L 2 GND 10
[32,33] USB_EN#
USB_EN# 4
EN
GND
OCB
3 1
0_0402_5%
@ 2
USB_OC0# [9]
R192 2 @ 1 0_0402_5% &^( U3RXDP0
U3RXDN0
6
4
5
D-
SSRX+
GND
GND 11
GND 12
GND 13
SY6288D20AAC_SOT23-5 SC300001G00 SSRX- GND
220U_6.3V_M
C486
L26 EMI@ DT4 E14@ J-L_TNBNRAC70010009
3 4 USB20_P0_L +USB3_VCCA USB20_N0_L 6 3 ME@
1 [9] USB20_P0 3 4 I/O4 I/O2
1 DC23300ET10
+ @
C172 2 1 USB20_N0_L
[9] USB20_N0 2 1
470P_0402_50V7K 5 2
2 2 WCM2012F2SF-670T04-0805_4P PCB Footprint = SW_WCM2012F2S_4P VDD GND
SM070002Z00
@
R193 2 1 0_0402_5% USB20_P0_L 4 1
I/O3 I/O1
AZC099-04S.R7G_SOT23-6
h^H!P"IW1,C
+USB3_VCCA
@
R190 2 1 0_0402_5%
W=80mils
JUSB2
L27 EMI@ 1 5
3 4 USB20_P1_L VCC GND
[9] USB20_P1 3 4 USB20_N1_L 2 6
D- GND
2 1 USB20_N1_L USB20_P1_L 3 7
[9] USB20_N1 2 1 D+ GND
WCM2012F2SF-670T04-0805_4P PCB Footprint = SW_WCM2012F2S_4P 4 8
SM070002Z00 GND GND
5 2
VDD GND
USB20_P1_L 4 1
I/O3 I/O1
AZC099-04S.R7G_SOT23-6
h^H!P"5,hH
3 +5VALW +5V_HUB +3V_HUB 3
RS@
1 R1045 2 +5V_HUB
1 1 1
1 0_0603_5%
C1117 C1118 C1119
C1120 .1U_0402_16V7K .1U_0402_16V7K 10U_0603_6.3V6M +5V_HUB
4.7U_0603_6.3V6M 2 2 2
2
1
19
20
25
0708:for USB debug Port U58 R1046
10K_0402_5%
VDD5
VSS
VD33F
USB20_TS_P0_HUB 12
2
USB20_TS_N0_HUB 11 DP1 1 HUB_OVCJ
USB20_FP_P1 10 DM1 OVCJ 2
[32] USB20_FP_P1 DP2 TESTJ 1
USB20_FP_N1 9 3 HUB_XOUT
[32] USB20_FP_N1 DM2 XOUT
USB20_CAM_P2 8 4 HUB_XIN C1121
[23] USB20_CAM_P2 DP3 XIN
USB20_CAM_N2 7 5 0.01U_0402_16V7K
[23] USB20_CAM_N2 DM3 DM4 USB20_BT_N4 [27] 2
HUB_BUSJ 18 6
HUB_VBUSM 17 BUSJ DP4 21 USB20_BT_P4 [27]
HUB_XRSTJ 16 VBUSM DRV 22 Y9
15 XRSTJ LED1 23 4 1 HUB_XIN
[9] USB20_P3 DPU LED2
14 24
[9] USB20_N3 DMU PWRJ
13
REXT
1
4 4
R197 1 B14@ 2 0_0402_5% USB20_TS_N0_HUB
[23] USB20_TS_N0
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
USB Conn & Hub FE1.1S
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
https://Dr-Bios.com
Date: Tuesday, February 18, 2014 Sheet 30 of 47
A B C D E
A B C D E
K((
,(( SATA HDD1 Conn. 1023 Changed symbal
E+*,5)166+3C1,
JHDD1
1
+5VALW +5VS +5V_ODD C392 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P0 2 GND
[7] SATA_PTX_DRX_P0 RX+
[7] SATA_PTX_DRX_N0 C393 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_N0 3
R147 1 RS@ 2 0_0805_5% 4 RX-
C391 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_N0 5 GND
[7] SATA_PRX_DTX_N0 TX-
1
C394 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P0 6
@ [7] SATA_PRX_DTX_P0 7 TX+
3 1 GND
D
R149 0_0805_5%
10K_0402_5% R128 8
@ Q8 1 RS@ 2 +3V_HDD 9 3.3V
+3VS
2
1 3.3V 1
R150 LP2301ALT1G_SOT23-3 10
G
2
100K_0402_5% @ 11 3.3V
1 2 R280 1 RS@ 2 0_0402_5% HDD_DETECT#_R 12 GND
[33] HDD_DETECT# GND
1 1 13
1 RS@ 2 +5VS_HDD 14 GND
+5VS 5V
1
D C152 C150 15
2 Q9 10U_0603_6.3V6M R129 16 5V
[9] ODD_EN 0.01U_0402_16V7K
G 2 @ 2 0_0805_5% 17 5V
MESS138W-G_SOT323-3
@ 18 GND 23
S
3
Reserved GND1
1
19 24
R170 20 GND GND2
21 12V
100K_0402_5%
+5VS 22 12V
@ 12V
W%*3+5)BW53%1/+5C15:K((!
2
100mils ALLTO_C166KH-122H9-L
10U_0603_6.3V6M
C420
1U_0402_6.3V6K
C161
.1U_0402_16V7K
C397
1 1 1 +3V_HDD C1154 1 2 0.1U_0603_6.3V6M ME@
ESD@
@ +5VS_HDD C1153 1 2 0.1U_0603_6.3V6M
2 2 2
C401 C402 &KZ5?UT ESD@
E14@ E14@
0.01U_0402_16V7K 0.01U_0402_16V7K
C403 C405
E14@ E14@
0.01U_0402_16V7K 0.01U_0402_16V7K SATA ODD Conn.
JODD2
B14@ 1
GND
&KZ5?ST 0822 changed
C401 1 2 0.01U_0402_16V7K SATA_PTX_C_DRX_P1 2
[7]
[7]
SATA_PTX_DRX_P1
SATA_PTX_DRX_N1 C402 1 2
B14@
0.01U_0402_16V7K SATA_PTX_C_DRX_N1 3
4
A+
A-
^BdB5K((5&&)5)166P
C403 1 2
B14@ 0.01U_0402_16V7K SATA_PRX_C_DTX_N1 5 GND
[7] SATA_PRX_DTX_N1 B-
C405 1 2 0.01U_0402_16V7K SATA_PRX_C_DTX_P1 6 JODD1
[7] SATA_PRX_DTX_P1 B+
7 1
B14@ GND SATA_PTX_DRX_P1 2 1
+5V_ODD @ SATA_PTX_DRX_N1 3 2
R710 1 2 0_0402_5% ODD_DETECT#_R 8 4 3
2 80mils 9 DP SATA_PRX_DTX_N1 5 4 2
10 +5V SATA_PRX_DTX_P1 6 5
ODD_MD 11 +5V ODD_DETECT#_R 7 6
12 MD 15 +5V_ODD 8 7
13 GND GND 14 9 8
GND GND ODD_MD 10 9
10 11
ALLTO_C185S1-113H9-L GND 12
ME@ GND
ODD_DA# 1 2 SP011312061 ACES_88058-100N
[33] ODD_DA# R554 0_0402_5% ME@
R555 @ SP010016C00
+3VS
1 2
10K_0402_5%
@
+3VS
+3VS_VGA
&BE5)166 @ @ @ @
Check power rail FD1 FD2 FD3 FD4
+3V_Thermal +5VS
2
RS@
!"#$%
1
0_0402_5% R168
^D^)5C4+,#*%5/+6/1,
1
R169 0_0402_5%
@ R2448 JFAN1
V%*3+W53%1/+5C15E'&& 10K_0402_5% R152 2 1 0_0603_5% +5VS_FAN 1
1
@ RS@ 2 1
[33] FAN_SPEED1 2
U2407 [33] EC_FAN_PWM
3
2
4 3
5 4 H5 @ @ @ @
2 G5
+3V_Thermal 1 10 EC_SMB_CK2 6 HOLEA H14 H15 H16
VDD SMCLK EC_SMB_CK2 [13,14,18,33,9] G6
C167 HOLEA HOLEA HOLEA
3 REMOTE1+ 2 9 EC_SMB_DA2 10U_0603_6.3V6M ACES_85205-04001 3
DP1 SMDATA EC_SMB_DA2 [13,14,18,33,9] 1
1 ME@
1
REMOTE1- 3 8 SP020008X00 @ @
'Wh
1
DN1 ALERT# H22 H23
C2498 REMOTE2+ 4 7 HOLEA HOLEA
2 DP2 THERM#
0.1U_0402_16V4Z REMOTE2- 5 6 H_3P2 H_3P3 H_3P3 H_3P3
DN2 GND
1
EMC1403-2-AIZL-TR_MSOP10 H_2P6X4P0N H_2P6X4P0N
!RR89GG%/JJ/T/J/UA @ @ @
H34 H32 H35
HOLEA HOLEA HOLEA
1
!5)4*66+% H_2P5 H_2P5 H_6P0
REMOTE1+ +3V_Thermal
7Y4G9%>4%hSEJM @ @
1
C2502 E .1U_0402_16V7K
V%*3+W56+*,5:t>BE?
3
2200P_0402_25V7K REMOTE1-
1
2 REMOTE1- 1 @
1
U17 H_2P6N
Q2407 Close to VGA 1
VDD SCLK
8 EC_SMB_CK2
H_2P8X4P8
REMOTE2+
1
Q2408 Close to DIMM @
1
REMOTE1+ 2
D+ SDATA
7 EC_SMB_DA2 H_4P0 H_4P0 H_4P0 H_4P0
REMOTE2+ C251
C2504 2200P_0402_50V7K REMOTE1- 3 6 THM_ALERT#
D- ALERT# EWd,5??K?U5BWW
1
2200P_0402_25V7K C 2
2 REMOTE2- @ C2505 2 Q2408 Z6DKd6/PS%@VF"C%W THERM# 4 5 @ @ @ @ @ @
2200P_0402_25V7K B MMST3904-7-F_SOT323-3 THERM# GND H18 H_2P8X4P6 H7 H8 H9 H11 H28
%%%d8Q#9%X<R>$FG3Q#9W/JF/J%=<Y
2
1
H_2P0N
LANGAN H_2P8 H_3P3 H_3P3 H_2P8X5P1 H_2P8
https://Dr-Bios.com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HDD/ODD/FAN/Screw Hole
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 31 of 47
A B C D E
A B C D E
R259 1 2 0_0402_5%
RP33
0_0804_8P4R_5%
&1,5H?SK&?U
+5VS
@ E14@
@
C163 RP34
.1U_0402_16V7K 0_0804_8P4R_5%
+3VALW E14@
RP33 JTP1
+3VLP C1149 1 2 0.1U_0603_6.3V6M TP_VCC 1 8 B15_VCC_B14_R 1
TP_CLK 2 7 B15_CLK_B14_L 2 1
[33] TP_CLK 2
TP_DATA 3 6 B15_DATA_B14_GND 3
PWR/B conn. ESD@ [33] TP_DATA
1 1 4 5 B15_GND_B14_DATA 4 3
4
@ @ B15_L_B14_CLK 5
<H5&1,5H?S 5
2
C166 C165 0_0804_8P4R_5% B15_R_B14_VCC 6
<H5&1,5H?UK&?U R154 JPWRB1
100P_0402_50V8J
2 2
100P_0402_50V8J B15@
RP34 7
6
GND
2
1
JKB2 100K_0402_5% 1 1 8 8 1
JKB1 KSI1 1 2 1 TP_L 2 7 GND
1
KSI1 1 KSI7 2 1 PWR_LED# 3 2 @ESD@ TP_R 3 6 ACES_88058-060N
KSI7 2 1 KSI6 3 2 ON/OFF# 4 3 D6 4 5 ME@
2 3 [33] ON/OFF# 4
KSI6 3 KSO9 4 5 PSOT24C_SOT23-3 SP010010T00
KSO9 4 3 KSI4 5 4 LID_SW# 6 5 0_0804_8P4R_5%
C169
C168
.1U_0402_16V7K
.1U_0402_16V7K
[33] LID_SW#
1
KSI4 5 4 KSI5 6 5 6 B15@
5 6 1 1
KSI5 6 KSO0 7 7
KSO0 7 6 KSI2 8 7 8 GND RP35
KSI2 8 7 KSI3 9 8 GND @ @ TP_VCC 1 8 B15_R_B14_VCC
8 9
2
KSI3 9 KSO5 10 ACES_88058-060N 2 2 TP_CLK 2 7 B15_L_B14_CLK
KSO5
KSO1
KSI0
10
11
12
9
10
11
KSI[0..7]
KSI[0..7] [33]
KSO1
KSI0
KSO2
11
12
13
10
11
12 SCA00002M00
ESD@
D24
ME@
SP010010T00 > &^( TP_DATA 3
4
6
5
B15_GND_B14_DATA
2
KSO4 14 KSO7 15 B14@
1
KSO7 15 14 KSO8 16 15 ESD@ RP36
KSO8 16 15 KSO6 17 16 SCA00002M00 1 8 B15_DATA_B14_GND
KSO6 17 16 KSO3 18 17 L30ESD24VC3-2 3P C/A SOT23 ESD B15@ TP_L 2 7 B15_CLK_B14_L
KSO3 18 17 KSO12 19 18 D27 SW1 E14@ TP_R 3 6 B15_VCC_B14_R
KSO12 19 18 R94 KSO13 20 19 SMT1-05_4P SW4 4 5
1
19 20
5
6
KSO13 20 +3VS 470_0402_5% KSO14 21 SMT1-05_4P
20 21
&^( &1,5H?U
5
6
KSO14 21 B14@ KSO11 22 4 2 0_0804_8P4R_5%
KSO11 22 21 KSO10 23 22 TP_L 4 2 B14@
KSO10 23 22 KSO15 24 23 3 1 TP_R
KSO15 24 23 KSO16 25 24 3 1
CAPS_LED#_R 25 24 [32,33] KSO16
KSO17 26 25 &1,5H?U5dW5#1W2%+L_U\U!N
CAPS_LED# 26 25 [32,33] KSO17
R94 2 B15@ 1 470_0402_5% CAPS_LED#_R 27 26 &1,5H?SK&?U5dW5#1W2%+L?""\S"N
26 27 28 27
GND2 [33] CAPS_LED# 28
28 R95 2 B15@ 1 470_0402_5% NUM_LED#_R 29 31
GND1 30 29 GND 32 ? ? s)) ? s)) ] ? s)) ? s))
ACES_88514-02601-071
[33] NUM_LED#
1 0.1U_0402_16V7K
1
30 GND
ACES_88514-3001
PWR_LED# C1101 1 2 .1U_0402_16V7K
> Z ! ! )>< ! )>< S ! )>< ! )><
0.1U_0402_16V7K
C252
ME@ ME@ @EMI@
C250
SP01000R500 SP010011A00
B15@ 2 ON/OFF# C1103 1 2 .1U_0402_16V7K E14@ SW3 B15@ SW2
2 SW3 SMT1-05_4P SW2 SMT1-05_4P Q Q (Bd Q (Bd U Q (Bd Q (Bd
@EMI@ SMT1-05_4P B14@ SMT1-05_4P B14@
5
6
5
6
LID_SW# C1102 1 2 .1U_0402_16V7K 4 2 4 2 U U 'E( U > Q U 'E( U >
&^( @EMI@ 3 1
TP_L
3 1
TP_R
S S > S Z ! S > S Z
2
] ] Z ] 'E( ? ] Z ] 'E( 2
1
+3VS LTST-C190KGKT 0603 GRN LH?UKH?SK&?UN D
SC590KGK020 2 Q20
[33,39,8] VCIN1_AC_IN
R172 R172 G 2N7002LT1G_SOT23-3
620_0402_5% 200_0402_5% S C1151 1 2 0.1U_0603_6.3V6M
3
SD028620080 SD028200080
JFP1 LED2 B15@ E14@ +3VLP +3VALW ESD@
R291 1 RS@ 2 0_0402_5% +3VS_FP 1 R172B14@ R278 B15@ JP5
2 1 BATT_LOW_LED# 1 2 1 2 RS@ 1 2 0_0402_5% +VCC_LID 1 R279 2 1
[30] USB20_FP_P1 2 H*CC+,@5LB#E+,N [33] BATT_LOW_LED# +3VLP +3VALW 1
1
3 620_0402_5% 100K_0402_5% 2
&$6Y+,5W,$6C [30] USB20_FP_N1
4 3 LH?UKH?SK&?UN @ RS@ [27,33] E51TXD_P80DATA
3 2
4 0_0402_5% 0_0402_5% [27,33] E51RXD_P80CLK 3
L&1,5H?UK&?UKH?SN 5
5
19-217/S2C-FM2P1VY/3T 0603 ORANGE 4
4
6 SC500005T00 R292 R290 JLED1
6
2
R294 1 @ 2 0_0402_5% 1 ACES_85205-0400
2
2 1
3
7 R173 R173
1 ()[/65>&(5L',++6N 1 ME@
VDD
GND 3 2
0.1U_0402_16V7K
GND
B14@ .1U_0402_16V7K .1U_0402_16V7K SP01001J100 2 1 2
1
FP@ B15@ 10P_0402_50V8J
1 J3
R174 R174 U16
SCA00001L00 330_0402_5% 200_0402_5% 1 2 ON/OFF#
LED4 SD028330080 SD028200080
R174 B15@ E14@ TCS20DLR SOT-23F 3P SHORT PADS
SOC_SATALED# 1 2 1 2
,((5L',++6N [7] SOC_SATALED#
330_0402_5%
+3VS Check power rail, +3VS OK?
Close to JFP1 LH?UKH?SK&?UN B14@
LTST-C190KGKT 0603 GRN
SC590KGK020
3 3
For E14
+3VLP For B14/B15
IO/B
2
ME@ SP010010X00
R155 SP010015H00
100K_0402_5% ACES_88058-120N ACES_50505-0184N-001
14 HGNDB 18 20
[28,32] HGNDB
1
13 GND HGNDA 17 18 G2 19
[28,32] HGNDA
HGNDB 12 GND HPOUT_L 16 17 G1
[28,32] HGNDB [28,32] HPOUT_L
HGNDA 11 12 15 16
[28,32] HGNDA
HPOUT_L 10 11 HPOUT_R 14 15
[28,32] HPOUT_L [28,32] HPOUT_R
9 10 PLUG_IN 13 14
[28,32] PLUG_IN
HPOUT_R 8 9 12 13 +USB_VCCB
[28,32] HPOUT_R
PLUG_IN 7 8 11 12
[28,32] PLUG_IN
6 7 USB20_N2_R 10 11 +5VALW
W=80mils
USB20_N2_R 5 6 +USB_VCCB USB20_P2_R 9 10
2A/Active Low
USB20_P2_R 4 5 +USB_VCCB 8 9
W=80mils
+USB_VCCB
W=80mils 3 4 7 8 U12
+USB_VCCB 2 3 6 7 1
NOVO# 1 2 5 6 5 OUT
[32,33] NOVO# 1 5 IN
USB20_E14_N0_L 4 2
JIO1 USB20_E14_P0_L 3 4 4 GND @ R179
3 [30,33] USB_EN# EN
2 3 USB_OC1#_R 1 2
2 OCB USB_OC1# [9]
NOVO# 1 0_0402_5%
[32,33] NOVO# 1 SY6288D20AAC_SOT23-5
JIO2
W=80mils ME@ 1
1
3
C170 + @
220U_6.3V_M C171
@ESD@ 470P_0402_50V7K
SCA00001L00 D26 2 2
L30ESD24VC3-2 3P C/A SOT23 ESD R188 2 @ 1 0_0402_5%
1
E14@ SM070002Z00
4 L19 3 USB20_E14_N0_L
[30] USB20_E14_N0 4 3
1 2 USB20_E14_P0_L
4
&^( [30] USB20_E14_P0 1
WCM-2012HS-900T
2
4
&1,5&D/ R189 2
@
1 0_0402_5%
R177 2 @ 1 0_0402_5%
SM070002Z00
&1,5&D/
4 L14 3 USB20_P2_R
[9] USB20_P2 4 3
https://Dr-Bios.com
1 2 USB20_N2_R
[9] USB20_N2 1 2 Security Classification Compal Secret Data Compal Electronics, Inc.
WCM-2012HS-900T 2013/04/12 2014/04/12 Title
Issued Date Deciphered Date
R178 2 1 0_0402_5%
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
KB/TP/LED/TPM
@ Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 32 of 47
A B C D E
A B C D E
+3VALW
+3VALW_EC
+3VLP
C1150 1 2 0.1U_0603_6.3V6M L20
FBM-11-160808-601-T_0603 LID_SW# R476 1 2 47K_0402_5%
ESD@ 1 2
+3VALW_EC +EC_VCCA
1 1
+3VLP C185 @
R194 1 @ 2 0_0603_5% +3VALW_EC C184
1@ .1U_0402_16V7K 1000P_0402_50V7K
+3VALW_EC 2 ECAGND 2
R480 2 1 47K_0402_5% EC_RST# C179 1 2
R195 1 2 0_0603_5% 100P_0402_50V8J L21 TP_CLK R478 1 2@ 4.7K_0402_5% +5VS
C509 2 1 .1U_0402_16V7K RS@ FBM-11-160808-601-T_0603 TP_DATA R479 1 2@ 4.7K_0402_5%
2
1 1
1 1 1 1 ECAGND EC_MUTE# R481 1 @ 2 10K_0402_5%
+EC_VCCA
.1U_0402_16V7K
C180
.1U_0402_16V7K
C181
1000P_0402_50V7K
C182
1000P_0402_50V7K
C183
TP_CLK R482 1 2 4.7K_0402_5% +3VS
TP_DATA R483 1 2 4.7K_0402_5%
2 2 @ 2 @ 2
111
125
22
33
96
67
9
U28
EC_VDD0
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/VCC
EC_VDD/AVCC
+3VALW_EC 1 21 +3VALW_EC
[6] SOC_ENVDD GATEA20/GPIO00 GPIO0F DGPU_AC_DETECT [18]
RP12 2 23 BEEP#
1 8 EC_SMB_CK1
[8] EC_KBRST# 3 KBRST#/GPIO01
SERIRQ
BEEP#/GPIO10
GPIO12
26 EC_FAN_PWM
BEEP# [28] Board ID
[8] EC_SERIRQ EC_FAN_PWM [31]
2
2 7 EC_SMB_DA1 4 27 Analog Board ID definition,
3 6 [9] LPC_FRAME# 5 LPC_FRAME# ACOFF/GPIO13 AC_OFF [39]
EC_SMB_CK2 @
4 5 [9] LPC_AD3 7 LPC_AD3 Please see page 3.
EC_SMB_DA2 PWM Output Ra R503
+3VS [9] LPC_AD2 LPC_AD2
8 63 100K_0402_5%
[9] LPC_AD1 10 LPC_AD1 BATT_TEMP/AD0/GPIO38 64 VCIN1_BATT_TEMP [38]
2.2K_0804_8P4R_5% LPC & MISC
[9] LPC_AD0
1
+3VALW_EC LPC_AD0 AD1/GPIO39 65 ADP_I BRDID
12 ADP_I/AD2/GPIO3A 66 ADP_I [38,39]
AD Input BRDID
[9] LPC_CLK_EC CLK_PCI_EC AD3/GPIO3B
2
13 75 ADP_ID 1
[15,26,27,29,8] PLT_RST_BUF# 37 PCIRST#/GPIO05 AD4/GPIO42 76 ADP_ID [37]
EC_RST# @
EC_RST# IMON/AD5/GPIO43 EC_ENVDD [23] R506
R492 1 @ 2 10K_0402_5% EC_SCI# 20 Rb C517
[8] EC_SCI# 38 EC_SCII#/GPIO0E 8.2K_0402_5% .1U_0402_16V7K
[37] ADP_ID_CLOSE GPIO1D 2
1
C511 1 2 PLT_RST_BUF# 68
DAC_BRIG/GPIO3C 70
DA Output EN_DFAN1/GPIO3D GPU_PWR_EN [20,44]
@ESD@ 100P_0402_50V8J KSI0 55 71
56 KSI0/GPIO30 IREF/GPIO3E 72 DGPU_PWR_EN [20,44,9]
ESD request KSI1
57 KSI1/GPIO31 CHGVADJ/GPIO3F EC_WL_OFF# [27]
KSI2
2 KSI3 58 KSI2/GPIO32 83 EC_MUTE# 2
KSI4 59 KSI3/GPIO33 EC_MUTE#/GPIO4A 84 USB_EN# EC_MUTE# [28]
KSI5 60 KSI4/GPIO34 USB_EN#/GPIO4B 85 EC_SLP_S4#_R1 1 R1098 2 USB_EN# [30,32]
61 KSI5/GPIO35 CAP_INT#/GPIO4C 86 EC_SLP_S4# [33,8]
KSI6 PS2 Interface 0_0402_5% @
62 KSI6/GPIO36 EAPD/GPIO4D 87 CMOS_ON# [23]
KSI7 TP_CLK
39 KSI7/GPIO37 TP_CLK/GPIO4E 88 TP_CLK [32]
KSO0 TP_DATA
40 KSO0/GPIO20 TP_DATA/GPIO4F TP_DATA [32]
KSO1
KSO2 41 KSO1/GPIO21 +3VALW_EC
KSI[0..7] KSO3 42 KSO2/GPIO22 97 EC_SLP_S3#
[32] KSI[0..7] 43 KSO3/GPIO23 CPU1.5V_S3_GATE/GPXIOA00 98 EC_SLP_S3# [8]
KSO4
KSO[0..17] 44 KSO4/GPIO24 W OL_EN/GPXIOA01 99 HDD_DETECT# [31]
KSO5 ME_EN
[32] KSO[0..17]
KSO6 45 KSO5/GPIO25 Int. K/B ME_EN/GPXIOA02 109 VCIN0_PH1
ME_EN [7]
KSO6/GPIO26 Matrix VCIN0_PH/GPXIOD00 VCIN0_PH1 [38]
2
KSO7 46 SPI Device Interface
KSO8 47 KSO7/GPIO27 @ @
KSO9 48 KSO8/GPIO28 119 R696 R697
KSO10 49 KSO9/GPIO29 SPIDI/GPIO5B 120 10K_0402_5% 10K_0402_5%
KSO11 50 KSO10/GPIO2A SPIDO/GPIO5C 126
SPI Flash ROM
1
KSO12 51 KSO11/GPIO2B SPICLK/GPIO58 128 VCIN0_PH1
KSO13 52 KSO12/GPIO2C SPICS#/GPIO5A VCIN1_ADP_PROCHOT
KSO14 53 KSO13/GPIO2D
KSO15 54 KSO14/GPIO2E 73
KSO15/GPIO2F ENBKL/AD6/GPIO40 EC_BT_OFF# [27]
KSO16 81 74
KSO17 82 KSO16/GPIO48 PECI_KB930/AD7/GPIO41 89
KSO17/GPIO49 FSTCHG/GPIO50 90 WLAN_PWR_ON# [27]
BATT_CHG_LED#
BATT_CHG_LED#/GPIO52 91 BATT_CHG_LED# [32]
CAPS_LED#
CAPS_LED#/GPIO53 CAPS_LED# [32]
77 GPIO 92 PWR_LED#
[38,39] EC_SMB_CK1 EC_SMB_CK1/GPIO44 PW R_LED#/GPIO54 PWR_LED# [32]
Charger and BATT 78 93 BATT_LOW_LED#
[38,39] EC_SMB_DA1 79 EC_SMB_DA1/GPIO45 BATT_LOW _LED#/GPIO55 95 BATT_LOW_LED# [32]
SM Bus SYSON
[13,14,18,31,9] EC_SMB_CK2 80 EC_SMB_CK2/GPIO46 SYSON/GPIO56 121 SYSON [41]
VR_ON
[13,14,18,31,9] EC_SMB_DA2 EC_SMB_DA2/GPIO47 VR_ON/GPIO57 127 VR_ON [45]
PM_SLP_S4#/GPIO59
3 3
6 100 EC_RSMRST#
[23] TS_DISABLE# 14 PM_SLP_S3#/GPIO04 EC_RSMRST#/GPXIOA03 101 EC_RSMRST# [8]
EC_LID_OUT#
PM_SLP_S5#/GPIO07 EC_LID_OUT#/GPXIOA04 EC_LID_OUT# [8]
15 102 VCIN1_ADP_PROCHOT +1.05VS
[40,42] 3V/5VALW_PG 16 EC_SMI#/GPIO08 PROCHOT_IN/GPXIOA05 103 VCIN1_ADP_PROCHOT [38]
VCOUT1_PROCHOT#
[45] VGATE 17 GPIO0A H_PROCHOT#_EC/GPXIOA06 104 VCOUT1_PROCHOT# [38]
[38] PTC_PROTECT 18 GPIO0B VCOUT0_PH/GPXIOA07 105 VCOUT0_MAIN_PWR_ON [40]
[6] SOC_ENBKL GPIO0C GPO BKOFF#/GPXIOA08 EC_BKOFF# [23]
R1099 1 2 EC_SLP_S4#_R2 19 GPIO 106
[33,8] EC_SLP_S4# GPIO0D PBTN_OUT#/GPXIOA09 BATT_LEN# [38]
0_0402_5% RS@ 25 107 ODD_DA# [31] NUVOTON_VTT R187 1 @ 2 0_0402_5%
28 EC_INVT_PW M/GPIO11 PCH_APW ROK/GPXIOA10 108
[31] FAN_SPEED1 FAN_SPEED1/GPIO14 SA_PGOOD/GPXIOA11 GPIO8_OVERT# [18]
29
[38] ADP_65 30 EC_PME#/GPIO15
[27,32] E51TXD_P80DATA 31 EC_TX/GPIO16 110 VCIN1_AC_IN
[27,32] E51RXD_P80CLK EC_RX/GPIO17 AC_IN/GPXIOD01 VCIN1_AC_IN [32,39,8]
32 112 EC_ON
[8] PMC_CORE_PWROK 34 PCH_PW ROK/GPIO18 EC_ON/GPXIOD02 114 EC_ON [40]
ON/OFF# VCOUT1_PROCHOT# R181 1 RS@ 2 0_0402_5%
[32] NOVO# SUSP_LED#/GPIO19 ON/OFF/GPXIOD03 ON/OFF# [32]
36 GPI 115 LID_SW#
[32] NUM_LED# NUM_LED#/GPIO1A LID_SW #/GPXIOD04 LID_SW# [32]
116 SUSP#
SUSP#/GPXIOD05 117 SUSP# [10,34,41,43]
NUVOTON_VTT R182 1 RS@ 2 0_0402_5% H_PROCHOT# [7]
GPXIOD06 [45] VR_HOT#
118 2 R12 1 @
122 PECI_KB9012/GPXIOD07
AGND/AGND
0_0402_5%
[8] PBTN_OUT# XCLKI/GPIO5D
1
123 124 +V18R D
+3VALW
GND/GND
GND/GND
GND/GND
GND/GND
G @
C515 Q12 S C193
3
4.7U_0603_6.3V6K 2N7002LT1G_SOT23-3 47P_0402_50V8J
1 2 PCIE_LAN_WAKE# KB9012QF-A4_LQFP128_14X14 2 9012@ 2
11
24
35
94
113
69
ECAGND
1 2 HDD_DETECT# 288N P2P KB9012 Latest design guide suggest change to
R488 100K_0402_5%
+3VS 74LVC1G06.
4 4
1 2 FAN_SPEED1
R214 10K_0402_5%
https://Dr-Bios.com
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
EC ENE KB9012
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 33 of 47
A B C D E
A B C D E
+3VALW
VIH=1.2~5.5V Rise Time:
3.3V@100k/0.1uF=3.538ms 1 2 3.3V@330pF = 889.68us
C1143 @ U11 JP36JP@
3.3V@120k/0.1uF=4.272ms 1U_0402_6.3V6K 1 14 +3VS_OUT
5.0V@330pF = 1348us
VIN1 VOUT1 +3VS
R927 2 13
100K_0402_5% VIN1 VOUT1 C976 JUMP_43X118
1 SUSP# 2 1 3VS_ON 3 12 2 1 330P_0402_50V7K 1
ON1 CT1 C1138 2 1@ .1U_0402_16V7K
C980 2 1 +5VALW 4 11
.1U_0402_16V7K VBIAS GND C1139 2 1@ .1U_0402_16V7K
1 2 5VS_ON 5 10 2 1
R926 ON2 CT2 330P_0402_50V7K
0701 update 120K_0402_5% 6 9 C967 JP37JP@
+5VALW VIN2 VOUT2
1 2 7 8 +5VS_OUT +5VS
C979 VIN2 VOUT2
.1U_0402_16V7K 1 2 15 JUMP_43X118
C1144 @ GPAD
1U_0402_6.3V6K TPS22966DPUR_SON14_2X3
+1.8VALW
VIH=1.2~5.5V Rise Time:
3.3V@82k/0.1uF=3.042ms 1 2 1.8V@330pF = 485.28us
C1145 @ U59 JP38JP@
3.3V@47k/0.1uF=1.893ms 1U_0402_6.3V6K 1 14 +1.8VS_OUT 1.35V@330pF = 363.96us
VIN1 VOUT1 +1.8VS
R1055 2 13
82K_0402_5% VIN1 VOUT1 C1123 JUMP_43X79
SUSP# 2 1 1.8VS_ON 3 12 2 1 330P_0402_50V7K
ON1 CT1 C1124 2 1@ .1U_0402_16V7K
C1125 1 2 4 11
2 +5VALW VBIAS GND 2
0701 update .1U_0402_16V7K C1126 2 1@ .1U_0402_16V7K
2 1 1.35VS_ON 5 10 2 1
R1056 ON2 CT2 330P_0402_50V7K
47K_0402_5% 6 9 C1127 JP39JP@
+1.35V VIN2 VOUT2
1 2 7 8 +1.35VS_OUT
VIN2 VOUT2 +1.35VS
C1128
.1U_0402_16V7K 1 2 15 JUMP_43X79
C1146 @ GPAD
1U_0402_6.3V6K TPS22966DPUR_SON14_2X3
1
+1.0VALW U60 +1.0VS R1057
ME4856_SO8 100K_0402_5% @
8 1 R1053
2 7 2 2 22_0603_5%
1
C1129 6 3 C1130 SUSP
2
3 4.7U_0603_6.3V6K 5 4.7U_0603_6.3V6K 2 3
+0.675VS_R
1
1 1 C1080
4
1
.1U_0402_16V7K D
1 @ 2 D
@ESD@ [10,33,41,43] SUSP#
R1052 G Q69 SUSP 2
1
470_0603_5% S 2N7002LT1G_SOT23-3 G
+5VALW R1059 @ Q72 S
1
3
10K_0402_5% 2N7002LT1G_SOT23-3
3
2 1 1.0VS_GATE +1.0VS_R
1
2
10K_0402_5% 1@ D
1
C1131 2 SUSP
D .1U_0402_16V7K G
SUSP 2 S Q71 @
G 2 2N7002LT1G_SOT23-3
3
Q70 S
2N7002LT1G_SOT23-3
3
4 4
https://Dr-Bios.com
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DC INTERFACE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom 0.1
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 34 of 47
A B C D E
5 4 3 2 1
D SLG3NB244VTR_TQFN16_2X3 D
SA000057I00 +RTCBATT
+3VS_VGA +CHGRTC_R
ESD Request
1
+3VALW
1
+3VLP RG12 CG20
2
1 RS@
390_0402_5% 0.1U_0402_16V7K
DVT, NO.10 +3VALW GCLK@ GCLK@ RG10 @
2
0_0402_5%
2
+1.05VS
1 RS@
1
1
RG9
CG3 GCLK@
22U_0603_6.3V6M
+GCLK_VBAT
GCLK@1 1
0_0402_5%2
2
0_0402_5%2 RG8
CG2
For DIS
0.1U_0402_16V7K
CG4
1
RS@ 2.2U_0402_6.3V6M
2 UG1 2 GCLK@
0_0402_5%
RG11 GCLK@ 1 10 14
CG6 VBAT VDD_RTC_OUT
For EMI
2
GCLK@ 1 0.1U_0402_16V7K 15
CG5 GCLK@ +V3.3A
C 2 C
0.1U_0402_16V7K
2 1 +3VS_GCLK 2
GCLK@ 1 CG1 VDD 9 GCLK_32K_R RG1 1 2 0_0402_5% GCLK_32K
CG7 2 0.1U_0402_16V7K 32kHz GCLK@
GCLK_32K [8] SOC_32.768K
0.1U_0402_16V7K
DVT, NO.9
2
VGA_GCLK 11
VDDIO_27M 27MHz
12 GCLK_27MHZ_R RG2 1
GCLK304@
2 22_0402_5% GCLK_27MHZ
GCLK_27MHZ [16] NV_VGA
8
VDDIO_25M_A 25MHz_A
6 GCLK_LAN_25MHZ_R RG3 1
GCLK@
2 33_0402_5%GCLK_LAN_25MHZ
GCLK_LAN_25MHZ [26] LAN
PCH_GCLK 3
VDDIO_25M_B 25MHz_B
5 GCLK_PCH_25MHZ_R RG4 1
GCLK@
2 0_0402_5% GCLK_PCH_25MHZ
GCLK_PCH_25MHZ [8] SOC_25M
GREENCLK_XTALI 1
YG1 GREENCLK_XTALO 16 XTAL_IN
XTAL_OUT
Close to GCLK
GND1
GND2
GND3
GND4
4 3
NC OSC
1 2
OSC NC DVT, NO.8 SLG3NB304VTR_TQFN16_2X3
4
7
13
17
1 GCLK@ 1
GCLK@ CG8 25MHZ_10PF_7V25000014 GCLK@ CG9 GCLK304@
15P_0402_50V8J 12P_0402_50V8J SA000063300
2 2
B
Reserved for Swing Level adjustment B
EMI@
GCLK_LAN_25MHZ RG6 1 2 C_0402 5P_0402_50V8J
EMI@
GCLK_PCH_25MHZ RG7 1 2 C_0402 5P_0402_50V8J
For EMI
A A
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THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
P35-GCLK
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 0.3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: Tuesday, February 18, 2014 Sheet 35 of 47
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" Add Net "EC_SLP_S4#_R1" and "EC_SLP_S4#_R2 by vendor suggestion 33 Add R1098,R1099 V SIV
D
Delete R311,R312,R313,R265,R266,R298,R316,R315,
! Reduce component count,delete 12 pcs resister and add 4 pcs row resister. 32 R314,R302,R303,R304, V SIV
Add RP33,RP34,RP35,RP36
Change CA16,CA13,CA19,CA14 from 0603 to 0402
D Audio vendor suggestion 28 Change CA11 from 4.7u to 1u , unpop CA17. V SIV
"" ESD request to delete XDP test point 8 Delete T198,T199,T200,T209,T210,T211,T212 V SIV
"D Delete 0 ohm due to 15'' ODD can short direct 31 Delete R130,R131,R132,R133 V SIV
B
"F ME request 31 Modify H35 footprint to H_6P0,H8 & H9 to H_3P3 SIT B
"H Vendor request 33 Modify U11.111 connect to +3VLP only,C179.1 connect to +3VLP V SIT
"J Sourcer suggestion 31 Change Q2407,Q2408 P/N from SB000008E00 to SB000002R00 V SIT
!K EMI request
Reserve C1001,C1002,C1005,C1006,C1007,C1016,C1091,C1092,C1101,
V SIT
C1102,C1103,C1104,C1105,C1106,C1107
A A
https://Dr-Bios.com
Issued Date 2013/04/12 Deciphered Date 2014/04/12 Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
HW RIR
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 0.2
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Intel BayTrail-M Platform
Date: Tuesday, February 18, 2014 Sheet 36 of 47
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