Activity 2.2.

3 Universal Gates:
NOR Only Logic Design
Introduction
In this activity you will revisit the voting booth monitoring system introduced in Activity 2.2.2
NAND Logic Design. Specifically, you will be implementing the NOR only combinational logic
circuits for the two outputs Booth and Alarm. In terms of efficiency and gate/IC utilization,
these NOR only designs will be compared with the previously designed AOI and NAND
implementations.

Equipment
 Circuit Design Software (CDS)
 Breadboard (DMS or DLB)
 #22 Gauge solid wire
 Integrated Circuits (74LS02)

Procedure
The truth table and K-Maps for the voting booth monitoring system can be seen in Activity
2.2.3 NAND Logic Design. For your reference, the simplified logic expressions for the outputs
Booth and Alarm are shown below:

Booth= A B+C D
Alarm=A B+B C +C D

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Digital Electronics Activity 2.2.3 Universal Gates: NOR Only Logic Design – Page 1
Conclusion
1. For your NOR implementations, how many ICs (i.e., 74LS02 chips) were required to
implement your circuits? Again, we are counting ICs, not gates.
3 chips

2. In terms of hardware efficiency, how does the NOR implementation compare to the
AOI implementation (refer to Activity 2.2.3 NAND Logic Design)?
It is cheaper and it works

© 2014 Project Lead The Way, Inc.

Digital Electronics Activity 2.2.3 Universal Gates: NOR Only Logic Design – Page 2
3. In terms of hardware efficiency, how does the NOR implementation compare to the
NAND implementation in Activity 2.2.3 NAND Logic Design?
It is simpler and cheaper to build 2

4. NOR gates are available with three inputs (74LS27). Could this chip have been used
for this design? If so, how would it have affected the efficiency of the design?
No it would require a second chip

© 2014 Project Lead The Way, Inc.

Digital Electronics Activity 2.2.3 Universal Gates: NOR Only Logic Design – Page 3
 © 2014 Project Lead The Way, Inc.
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