Esc201T: Introduction to Electronics

Assignment 6-7: Solutions

Question 1:Determine the ac voltage gain of the amplifier A as shown in Fig. 1(a) using the
transistor model shown in Fig. 1(b) and Fig. 1(c) as dotted region. Assume that the device A is biased
properly.

Figure 1 (a) Figure 1 (b) Figure 1 (c)

Solution: (i)
𝑉𝑖 = 𝑉𝑠 2kΩ V0
𝑉0 5 +
𝑉0 = −0.05𝑉𝑖 × 4 × 103 𝑉֜ =− × 4 × 1000 Vs 0.05vi 4kΩ
𝑉𝑠 100 Vi
-
𝑉0
֜ = −200
𝑉𝑠
(ii) 2kΩ V0
+
Vs 4kΩ
Vi 5kΩ
0.05vi
20kΩ
-
𝑉𝑠 × 5 5𝑉𝑠
𝑉𝑖 = =
5+2 7
𝑉0 = −0.05𝑉𝑖 20𝑘Ω||4𝑘Ω
−0.05 × 20 × 4 × 1000
֜𝑉0 = 𝑉𝑖
24
−0.05 × 20 × 4 × 1000 5 𝑉0 −5 × 20 × 4 × 1000 × 5
֜𝑉0 = 𝑉𝑠 ֜ =
24 7 𝑉𝑠 100 × 24 × 7
𝑉0
𝑉𝑠 ֜ = −119.05
𝑉𝑠
Question 2: Carry out dc and ac analysis of the amplifier circuit shown in Figure 2,
for the device X characteristics shown. Sketch 𝑉ix 𝑉ox and 𝑣0 for 𝑣𝑠 = 0.2 sin(𝜔t)

Figure 2
Solution:
When there is both ac and dc source in the circuit, voltages and
currents in general will have a dc component and an ac component. As
a result, two analysis one dc and another ac have to be carried out.
Note the convention in naming voltage (or current) at node X
DC Voltage : 𝑉𝑋 ; AC Voltage : vx ; Net Voltage: 𝑉𝑋 + vx
DC Analysis: Draw the DC circuit obtained by open circuiting the
capacitors.
 Vix = 1.7 V.

Iox = 0.1 1.7 − 1.5 = 20mA

Vox = −20mA x 1K = −20V

AC Analysis: Draw the AC circuit by shorting the DC sources and capacitors.

Vix = Vs = 0.2 sin(ωt)

iox = 0.1vix = 20mA sin(ωt)
Vox = Vo = − iox x (1K || 2K)
= −13.34V sin(ωt)
Vix = VIX + vix = 1.7 + 0.2 sin(ωt)
Iox = IOX + iox = 20mA+ 20mA sin(ωt)
Vox = VOX + vox = −20 −13.34 sin(ωt)
v0 = −13.34V sin(ωt)
Question 3: Determine appropriate Q point (DC value of 𝑉𝑖𝑌 and 𝑉𝑜𝑌 ) so that the
amplifier shown in Figure 3 would properly amplify an input voltage of vs = 0.2
sin(𝜔t). Determine minimum supply voltage VCC for which the amplifier would work
properly.

Figure 3
Solution:

To ensure proper operation of the amplifier we have to make sure that the device Y
always operates in the region 𝑉𝑖𝑦 > 1.5 V and 𝑉𝑜𝑦 > 1V.
𝑉𝑖𝑦 = 𝑉𝐼𝑌 + 𝑣𝑖𝑦 > 1.5V
𝑉𝑜𝑦 = 𝑉𝑂𝑌 + 𝑣𝑜𝑦 > 1V
We need to carry out DC and AC analysis to find AC and DC components of voltages.
 𝑉𝐼𝑌 = 𝑉𝐵
𝑉𝑂𝑌 = 𝑉𝐶𝐶 − 𝐼𝑂𝑌 x 0.2K
𝐼𝑂𝑌 = 0.1 x (𝑉𝐼𝑌 − 1.5)
 𝑣𝑖𝑦 = 𝑣𝑠 = 0.2 sin(𝜔𝑡)
𝑖𝑜𝑦 = 0.1𝑣𝑖𝑦 = 20𝑚𝐴 sin(𝜔𝑡)
𝑣𝑜𝑦 = 𝑣0 = −𝑖𝑜𝑦 x 0.1𝐾 = −2𝑉 sin(𝜔𝑡)
Proper Q-point for Amplification
𝑉𝑖𝑦 = 𝑉𝐼𝑌 + 𝑣𝑖𝑦 > 1.5𝑉 ֜ 𝑉𝐼𝑌 + 0.2 sin(𝜔𝑡) > 1.5
֜ 𝑉𝐼𝑌 > 1.7
 𝑉𝑜𝑦 = 𝑉𝑂𝑌 + 𝑣𝑜𝑦 > 1𝑉
𝑣𝑜𝑦 = 𝑣𝑜 = −2𝑉 sin(𝜔𝑡)
𝑉𝑂𝑌 − 2𝑉 sin 𝜔𝑡 > 1𝑉
֜ 𝑉𝑂𝑌 > 3V

Let us choose 𝑉𝐼𝑌 = 1.8 and 𝑉𝑂𝑌 = 4

𝑉𝑂𝑌 = 𝑉𝐶𝐶 − 𝐼𝑂𝑌 x 0.2K
֜ 𝑉𝐶𝐶 = 4 + 0.03 x 200 = 10 V
Question 4: Carry out dc and ac analysis of the amplifier circuit shown
in Figure 4 on the right to determine bias or Q-point (DC value of IOZ
and VOZ) and AC voltage gain.

Figure 4
Solution:
DC Analysis : Draw the DC circuit obtained by open circuiting the capacitors

−2.5𝑉 + 𝑉𝑖𝑍 + 𝐼𝑂𝑍 x 103 = 0

Since 𝐼𝑜𝑍 vs 𝑉𝑖𝑍 characteristics is very sharp,
𝑉𝑖𝑍 ≈ 1.5 𝑉
𝐼𝑂𝑍 ≅ 1𝑚𝐴
𝑉𝑂𝑍 = 5 − 1 = 4𝑉
AC Analysis: Draw the AC circuit by shorting the DC sources and capacitors

𝑉0
= −1 x 91
𝑉𝑠
Question 5: Calculate the overall voltage gain 𝐺𝑉 = 𝑣0ൗ𝑣𝑠𝑖𝑔 of a common source amplifier, shown in
Figure 5, which has gm = 2 mA/V , 𝑟0 = 50kΩ, RD = 10kΩ, RG = 10MΩ. The amplifier is fed from a signal
source with a resistance, 𝑅𝑠𝑖𝑔 of 0.5kΩ and amplifier output is coupled to a load resistance, RL of
20kΩ.

Figure 5
Solution:

Given 𝑔𝑚 =2mA/V 𝑅𝐷 =10kΩ

𝑟𝑜 =50kΩ 𝑅𝐺 =10MΩ
𝑅𝑠𝑖𝑔 = 0.5MΩ 𝑅𝐿 =20kΩ
The equivalent circuit of the CS Amplifier is ,

𝑣𝑜 = − 𝑔𝑚 ∗ 𝑣𝑔𝑠 ∗ 𝑟𝑜 ∥ 𝑅𝐷 ∥ 𝑅𝐿 ---------------(1)
𝑣𝑔𝑠 = 𝑣𝑠𝑖𝑔 ∗ [ 𝑅𝐺 /(𝑅𝐺 + 𝑅𝑠𝑖𝑔 ) ] ---------------------(2)
From (1) and (2)
𝑣𝑜 = − 𝑔𝑚 ∗ 𝑣𝑠𝑖𝑔 ∗ [ 𝑅𝐺 /(𝑅𝐺 + 𝑅𝑠𝑖𝑔 ) ] * 𝑟𝑜 ∥ 𝑅𝐷 ∥ 𝑅𝐿

The overall voltage gain becomes,

vo
Gv = = -[ g m *R G /(R G + R sig ) ] * r o ∥ R D ∥ R L
vsig
10M
Gv = - 2*10−3 ∗ * 50k ∥ 10k ∥ 20k
10M+0.5k
10 50∗10
= -0.002 * ∗{ k ∥ 20k }
10.0005 50+10
≃ −0.002 ∗ 1 ∗ 8.33k ∥ 20k
8.33∗20
= -0.002 * [ ] ∗ 1000
8.33+20
=-0.002 * 1 *5.882*1000
=-11.76
∴ Gv = -11.76 V/V
Question 6:

The overall voltage gain of the amplifier shown in Figure 6 was measured with resistance
Rs of 1kΩ in place and found to be -10. When Rs is shorted, but the circuit operation
remained linear the gain doubled. What must gm be? What value of Rs is needed to obtain an
overall voltage gain of -8?

+ VDD
RD
CC2
Rsig CC1 vo

vsig + RL
- RG
RS
I
CS

- Vss

Figure 6
The equivalent circuit of the amplifier is:

𝑣𝑖𝑛 = 𝑣𝑔𝑠 + 𝑔𝑚 𝑣𝑔𝑠 𝑅𝑠

𝑣𝑜 = −𝑔𝑚 (𝑅𝐷 ||𝑅𝐿 ) 𝑣𝑔𝑠

𝑣𝑜 𝑔𝑚 (𝑅𝐷 ||𝑅𝐿 )
Voltage gain, 𝐴𝑣 = =−
𝑣𝑖𝑛 1+𝑔𝑚 𝑅𝑠
𝑅𝐺
𝑣𝑖𝑛 = × 𝑣𝑠𝑖𝑔
𝑅𝐺 +𝑅𝑠𝑖𝑔

Overall voltage gain,

𝑣𝑜 𝑣𝑜 𝑣𝑖𝑛 𝑅𝐺 𝑔𝑚 (𝑅𝐷 ||𝑅𝐿 )

𝐺𝑣 = = × =− ×
𝑣𝑠𝑖𝑔 𝑣𝑖𝑛 𝑣𝑠𝑖𝑔 𝑅𝐺 +𝑅𝑠𝑖𝑔 1+𝑔𝑚 𝑅𝑠
𝐺𝑣 1 = −10 for 𝑅𝑠1 = 1 𝑘Ω 𝐺𝑣3 = −8
𝐺𝑣 2 = −20 for 𝑅𝑠2 = 0
𝐺𝑣3 1 + 𝑔𝑚 𝑅𝑆 2 1
= =
𝐺𝑣1 1 + 𝑔𝑚 𝑅𝑆 2 𝐺𝑣2 1 + 𝑔𝑚 𝑅𝑆 3 1 + 𝑔𝑚 𝑅𝑆 3
∴ =
𝐺𝑣2 1 + 𝑔𝑚 𝑅𝑆1
8 1
֜ =
10 1 20 1 + 𝑅𝑠3 × 10−3
֜ =
20 1 + 𝑔𝑚 × 103
20
֜ 1 + 𝑅𝑠3 × 10−3 =
֜ 1 + 𝑔𝑚 × 103 = 2 8

֜ 𝑔𝑚 = 1 𝑚𝐴/𝑉 ֜ 𝑅𝑠3 = 1.5 𝑘Ω

∴ 𝑅𝑠 = 1.5 𝑘Ω for voltage gain of -8.

Question 7: For the circuit shown in Figure 7, determine the labeled node voltages. The MOS
transistors are identical having Vt= 1 V and kn’W/L= 2 mA/V2.

Solution:
If we consider both the devices M1 and M2 to be
identical, then
𝑖𝐷1 = 𝑖𝐷2 = 𝑖𝐷 (1)
Where,
iD 1
𝑖𝐷1 = 𝑘 𝑉𝐺𝑆1 − 𝑉𝑡 2
𝑉𝑡 = 1𝑉 2
𝑤 1
iD1 𝑘𝑛′ = 2 𝑚𝐴/𝑉 2 (= 𝑘1 𝑠𝑎𝑦) 𝑖𝐷2 = 𝑘 𝑉𝐺𝑆2 − 𝑉𝑡 2
𝐿 2
M1 ֜𝑉𝐺𝑆1 = 𝑉𝐺𝑆2 ֜𝑉1 − 𝑉2 = 𝑉2 − 𝑉3
iD2 𝑉3 = 2𝑉2 − 𝑉1 2
M2 𝑉3 10−𝑉1
But, 𝑖𝐷 = = ֜𝑉3 = 10 − 𝑉1 3
1000
From (2) and (3)
1000
Figure 7
iD
10 − 𝑉1 = 2𝑉2 − 𝑉1 ֜2𝑉2 = 10
֜𝑉2 = 5𝑉
 1 2𝑉3 1 𝑉
From (1), take 𝑖𝐷2 = 𝑖𝑑 ֜ 𝑘 𝑉𝐺𝑆2 − 𝑉𝑡 ֜ × 2 × 10−3 × 𝑉2 − 𝑉3 − 1 2 = 3
=
2 1000 2 1000
2 2 2
֜𝑉3 = 𝑉2 − 𝑉3 − 1 ֜𝑉3 = 5 − 𝑉3 − 1 = 4 − 𝑉3
֜𝑉3 = 𝑉32 − 8𝑉3 + 16֜𝑉32 − 9𝑉3 + 16 = 0
On solving, 𝑉3 = 6.56 𝑉; 2.44 𝑉

(i) When 𝑉3 = 6.56 𝑉֜ from 3 , 𝑉1 = 10 − 𝑉3 = 10 − 6.56 = 3.44 𝑉

But 𝑉𝐺𝑆1 = 𝑉1 − 𝑉2 = 3.44 − 5 = −1.56𝑉
This is not feasible since VGS1 must be at least Vt for iD1 to flow.

(ii) When 𝑉3 = 2.44 𝑉֜ 𝑉1 = 10 − 𝑉3 = 10 − 2.44 = 7.56

Which is sufficient to make VGS1≥Vt
⸫ 𝑉1 = 7.56𝑉; 𝑉2 = 5𝑉; 𝑉3 = 2.44𝑉
Question 8: The common source amplifier is designed using MOSFET [𝑣𝑡 = 1V,
k’nW/L = 0.8 mA/V2 and 𝑉𝐴 = 1ൗλn = 50V] as shown in Figure 8.

Figure 8
a) For the MOSFET to operate in saturation region, it is biased such that drain current ID
= 0.1 mA and drain voltage VD = 0.5V. Determine the values of RD and RS.
b) Determine the values of 𝑔𝑚 and 𝑟0 at the bias point.
c) Given 𝑅𝑠𝑖𝑔 = 1 MΩ, RG = 9 MΩ and RL = 85 kΩ, determine the voltage gain from
signal source to load (𝐺𝑣 =𝑣0ൗ𝑣𝑠𝑖𝑔 ).
d) What should be the maximum amplitude of input signal 𝑣𝑠𝑖𝑔 so that the MOSFET
always operates in saturation region?
e) What happens to the output voltage 𝑣𝑜 of the amplifier if amplitude of the input
signal 𝑣𝑠𝑖𝑔 is larger than the value calculated in part d).
Solution:
a) DC Circuit Analysis:
Since 𝑉𝐷 = 0.5 V
12−0.5
𝑅𝐷 = = 115 𝑘Ω
0.1𝑚𝐴
𝑊
𝐼𝐷 = (1/2) * 𝑘𝑛′
∗ ∗ (𝑉𝐺𝑆 − 𝑉𝑇 ) 2
𝐿
0.1=0.5*0.8*(𝑉𝐺𝑆 − 1 ) 2
0.25=(𝑉𝐺𝑆 − 1 ) 2 or (𝑉𝐺𝑆 − 1 ) = ±0.5
Or 𝑉𝐺𝑆 =1.5 or 0.5

For MOSFET to operate in saturation region : 𝑉𝐺𝑆 > 𝑉𝑇

𝑉𝐺𝑆 =1.5 ; 𝑉𝐺 =0
=> 𝑉𝐺𝑆 = 𝑉𝐺 − 𝑉𝑆
=>1.5 = 0-𝑉𝑆
𝑉𝑆 = -1.5 V
−1.5−(−12)
𝑅𝑆 = = 105 kΩ
0.1
 2∗𝐼𝐷 2∗0.1
b) 𝑔𝑚 = = = 0.4mA/V ;
𝑉𝐺𝑆 −𝑉𝑇 1.5−1

𝑉𝐴 50
𝑟𝑜 = = = 500kΩ
𝐼𝐷 0.1
c) Small signal ac signal equivalent:
𝑣𝑔𝑠 = [ 𝑅𝐺 /(𝑅𝐺 + 𝑅𝑠𝑖𝑔 ) ] * 𝑣𝑠𝑖𝑔
𝑣𝑜 = − 𝑔𝑚 ∗ 𝑣𝑔𝑠 ∗ 𝑟𝑜 ∥ 𝑅𝐷 ∥ 𝑅𝐿

𝑣𝑜 = − 𝑔𝑚 ∗ 𝑣𝑠𝑖𝑔 ∗ [ 𝑅𝐺 /(𝑅𝐺 + 𝑅𝑠𝑖𝑔 ) ] * 𝑟𝑜 ∥ 𝑅𝐷 ∥ 𝑅𝐿

𝑣𝑜
𝐺𝑣 = = -[ 𝑔𝑚 *𝑅𝐺 /(𝑅𝐺 + 𝑅𝑠𝑖𝑔 ) ] * 𝑟𝑜 ∥ 𝑅𝐷 ∥ 𝑅𝐿
𝑣𝑠𝑖𝑔
9 1
=- * 0.4 * ( )
9+1 1
500
+115
1
+85
1

= -16.02 V/V
𝐺𝑣 ≃ -16
d) For MOSFET to operate in saturation region:
𝑉𝐺𝑆 ≥ 𝑉𝑡 and 𝑉𝐷𝑆 ≥ 𝑉𝐺𝑆 − 𝑉𝑡
where 𝑉𝐺𝑆 and 𝑉𝐷𝑆 are instantaneous gate to source and drain to source
voltages, respectively.
𝑣𝐺𝑆 = 𝑉𝐺𝑆 + [ 𝑅𝐺 /(𝑅𝐺 + 𝑅𝑠𝑖𝑔 ) ] * 𝑣𝑠𝑖𝑔
9
= 1.5 + ( ) * 𝑣𝑠𝑖𝑔
9+1
=1.5 + 0.9 * 𝑣𝑠𝑖𝑔
𝑣𝐺𝑆,𝑚𝑖𝑛 = 1.5-0.9 *|𝑣𝑠𝑖𝑔 |𝑚𝑎𝑥 = 𝑉𝑡 = 1V
1.5-0.9 *|𝑣𝑠𝑖𝑔 |𝑚𝑎𝑥 = 1
1.5−1
|𝑣𝑠𝑖𝑔 |𝑚𝑎𝑥 = = 0.555V
0.9
|𝑣𝑠𝑖𝑔 |𝑚𝑎𝑥 ≃ 0.56V ----------------------------(A)

Again ,
𝑣𝐷𝑆 = 𝑉𝐷𝑆 + 𝑣𝑜
= 𝑉𝐷𝑆 + 𝐺𝑣 * 𝑣𝑠𝑖𝑔
= (0.5-(-1.5)) – 16*𝑣𝑠𝑖𝑔
𝑣𝐷𝑆 = 2-16*𝑣𝑠𝑖𝑔
𝑣𝐷𝑆 |𝑚𝑖𝑛 = 2 − 16 ∗ |𝑣𝑠𝑖𝑔 |𝑚𝑎𝑥
For MOSFET to operate in saturation
𝑉𝐷𝑆 ≥ 𝑉𝐺𝑆 − 𝑉𝑡
𝑉𝐷𝑆,𝑚𝑖𝑛 = 𝑉𝐺𝑆,𝑚𝑎𝑥 − 𝑉𝑡
2-16*|𝑣𝑠𝑖𝑔 |𝑚𝑎𝑥 = {1.5+0.9*|𝑣𝑠𝑖𝑔 |𝑚𝑎𝑥 } -1
2-16*|𝑣𝑠𝑖𝑔 |𝑚𝑎𝑥 = 0.5+0.9*|𝑣𝑠𝑖𝑔 |𝑚𝑎𝑥
1.5
|𝑣𝑠𝑖𝑔 |𝑚𝑎𝑥 = = 0.0887 V ---------------(B)
16.9

Comparing (A) and (B)

|𝑣𝑠𝑖𝑔 |𝑚𝑎𝑥 = 0.0887 V

e) If 𝑣𝑠𝑖𝑔 > 88.7 mV , the output waveform of MOSFET Amplifier will be

distorted (MOSFET will go in Triode region )
Question 9: A MOS amplifier is shown in Figure 9:
a) Verify that the biasing of the MOS amplifier is proper (Vt= 1V and 𝑘𝑛’ W/L = 2 mA/V2)
b) Find gm and r0 if VA = 1ൗλn=100 V
c) Draw the complete small signal equivalent circuit for the amplifier
d) Find Rin, vgs/vsig, v0/vg, and v0/vsig and Rout

Solution:
+15 V
+15 V
7.5k
10M
V0
Rsig CG CD
10k
VGS CS

Vsig
5M
3k Figure 9

Rin
 𝑤 2𝑚𝐴
(a) Given that, 𝑉𝑡 = 1𝑉, 𝑘𝑛′ = 2
𝐿 𝑉
5×106 5
⸪𝑉𝐺 = 15 × = 15 × = 5𝑉, 𝑉𝐷𝐷 = 15𝑉, 𝑉𝐺𝑆 = 𝑉𝐺 − 𝑉𝑆 , 𝑠𝑖𝑛𝑐𝑒 𝑉𝑆 = 3𝐼𝐷 ֜𝑉𝐺𝑆 = 5 − 3𝐼𝐷
10×106 +5×106 15
𝑘𝑛′ 𝑤 2
𝐼𝐷 = × 𝑉𝐺𝑆 − 𝑉𝑡 = 5 − 3𝐼𝐷 − 1 2
2
2 𝐿 2
𝐼𝐷 = 4 − 3𝐼𝐷 = 16 + 9𝐼𝐷2 − 24𝐼𝐷
2

֜𝐼𝐷 = 1𝑚𝐴 𝑜𝑟 𝐼𝐷 = 1.77 𝑚𝐴

֜𝑉𝐺𝑆 = 5 − 3𝐼𝐷
֜𝑉𝐺𝑆 = 5 − 3 × 1 𝑜𝑟 𝑉𝐺𝑆 = 5 − 3 × 1.77
֜𝑉𝐺𝑆 = 2𝑉 𝑜𝑟 𝑉𝐺𝑆 = −0.31 𝑉 < 𝑉𝑡
֜𝑉𝐺𝑆 = 2𝑉, 𝐼𝐷 = 1 𝑚𝐴
֜𝑉𝐷 = 15 − 7.5 × 103 × 1 × 10−3 = 15 − 7.5 = 7.5 𝑉
֜𝑉𝐺𝐷 = 𝑉𝐺 − 𝑉𝐷 = 5 − 7.5 = −2.5 < 𝑉𝑡 ֜𝑀𝑂𝑆𝐹𝐸𝑇 𝑖𝑠 𝑖𝑛 𝑠𝑎𝑡𝑢𝑟𝑎𝑡𝑖𝑜𝑛
(b)
2𝐼𝐷 2 × 1 × 10−3 𝑚𝐴
𝑔𝑚 = = =2
𝑉𝐺𝑆 − 𝑉𝑡 2−1 𝑉
𝑉𝐴 100 𝜕𝐼𝐷 𝜕 1 ′ 𝑤 2 𝑤 2𝐼𝐷
Or 𝑟0 = = = 100𝑘Ω 𝑔𝑚 = = 𝑘 𝑉𝐺𝑆 − 𝑉𝑡 = 𝑉𝐺𝑆 − 𝑉𝑡 =
𝐼𝐷 1×10−3 𝜕𝑉𝐺𝑆 𝜕𝑉𝐺𝑆 2 𝑛 𝐿 𝐿 𝑉𝐺𝑆 −𝑉𝑡
 Rsig
(c) 𝑣0
+ gmVGS
5M
10M
Vsig VGS 𝑟0 𝑅𝐷
100k 7.5k 𝑅𝐿
- 10k
Rin

5×10
(d) 𝑅𝑖𝑛 = 5𝑀Ω||10𝑀Ω = = 3.33𝑀Ω
5+10
𝑅𝑖𝑛 𝑣𝑔𝑠 3.33 × 106 3.33
𝑣𝑔𝑠 = 𝑣𝑠𝑖𝑔 × ֜ = = = 0.97
𝑅𝑖𝑛 + 𝑅𝑠𝑖𝑔 𝑣𝑠𝑖𝑔 100 × 103 + 3.33 × 106 0.1 + 3.33
𝑣
⸪ 𝑣0 = −𝑔𝑚 𝑣𝑔𝑠 𝑟0 ||𝑅𝐷 ||𝑅𝐿 ֜ 0 = −2 × 10−3 × 4.1 × 103 = −8.2
𝑣𝑔𝑠
𝑣0 𝑣0 𝑣𝑔𝑠
֜ = × = −8.2 × 0.97 = −7.95
𝑣𝑠𝑖𝑔 𝑣𝑔𝑠 𝑣𝑠𝑖𝑔
𝑅𝑡𝑜𝑡 = 𝑟0 ||𝑅𝐷 𝑅𝐿 = 100𝑘Ω 7.5𝑘Ω 10𝑘Ω = 4.1𝑘Ω
Question 10:
The MOS transistor shown in Figure 10, has Vt = 0.9 V and VA = 1ൗλn = 50 V and operates with
VD = 2 V. What is the voltage gain v0 / vi ? What do ‘VD’ and “gain” become when ‘I’ is
increased to 1 mA?

+ VDD

I = 500 μA
10 MΩ CD
vo
CG RG RL
10 kΩ
+
vi
-

Figure 10
For MOSFET to operate in saturation, + VDD
𝑉𝑔𝑠 > 𝑉𝑡
and 𝑉𝐷𝑆 > 𝑉𝐺𝑆 − 𝑉𝑡 I = 500 μA
֜ 𝑉𝑡 > 𝑉𝐺𝑆 − 𝑉𝐷𝑆 10 MΩ CD
֜ 𝑉𝑡 > 𝑉𝐺𝐷 vo
For this circuit, 𝑉𝐺𝐷 = 0 as no current flow in 𝑅𝐺 for DC analysis, CG RG RL
𝑉𝑡 = 0.9 𝑉 > 𝑉𝐺𝐷 = 0 10 kΩ
𝑉𝐺𝑆 = 𝑉𝐷𝑆 = 𝑉𝐷 = 2 𝑉 > 𝑉𝑡 +
vi
-
Given 𝑉𝑡 = 0.9 𝑉; 𝑉𝐴 = 50 𝑉; with 𝑉𝐷 = 2 𝑉

The ac equivalent circuit of the amplifier is,

The dotted box has,
𝑉 50
𝑟𝑜 = 𝐴 = −3 = 100 𝑘Ω [as 𝐼𝐷 = 𝐼 = 0.5 𝑚𝐴 DC current]
𝐼𝐷 0.5×10

2𝐼𝐷 2×0.5×10−3
𝑔𝑚 = = = 0.91 mA/V [since 𝑅𝐺 is large, 𝑉𝐺𝑆 = 𝑉𝐷𝑆 = 𝑉𝐷 ]
𝑉𝐺𝑆 −𝑉𝑡 2−0.9

𝐾 2 𝜕𝐼𝐷 2𝐼𝐷
𝐼𝐷 = 𝑉𝑔𝑠 − 𝑉𝑡 ֜ 𝑔𝑚 = = 𝐾 𝑉𝐺𝑆 − 𝑉𝑡 ֜ 𝑔𝑚 =
2 𝜕𝑉𝐺𝑆 𝑉𝐺𝑆 −𝑉𝑡

From the figure,

𝑣𝑜 = −𝑔𝑚 𝑣𝑔𝑠 [𝑟𝑜 | 𝑅𝐿 as 𝑅𝐺 ≫ 𝑟𝑜 𝑅𝐷 𝑅𝐿
𝑣𝑜 = −𝑔𝑚 𝑣𝑖 [𝑟𝑜 | 𝑅𝐿
𝑣 100×10
֜ 𝑜 = −𝑔𝑚 [𝑟𝑜 | 𝑅𝐿 = −0.91 × 10−3 × × 103
𝑣𝑖 100+10
𝑣𝑜
֜ 𝐴𝑣 = = −8.27
𝑣𝑖

𝑣𝑜
∴ AC voltage gain = = −8.27
𝑣𝑖
When 𝐼 = 1 mA, (that is 𝐼 is doubled)
2
𝐼𝐷,𝑛𝑒𝑤 𝑉𝐺𝑆,𝑛𝑒𝑤 −𝑉𝑡
Then, = 2 =2
𝐼𝐷,𝑜𝑙𝑑 𝑉𝐺𝑆,𝑜𝑙𝑑 −𝑉𝑡
֜ 𝑉𝐺𝑆,𝑛𝑒𝑤 = 𝑉𝑡 + 2 𝑉𝐺𝑆,𝑜𝑙𝑑 − 𝑉𝑡 = 0.9 + 2 2 − 0.9 = 2.46 𝑉 = 𝑉𝐷,𝑛𝑒𝑤
 1
Which implies, 𝐼𝐷 = 𝐾 𝑉𝐺𝑆 − 𝑉𝑡
2
2

𝜕𝐼𝐷
𝑔𝑚,𝑛𝑒𝑤 𝐼𝐷,𝑛𝑒𝑤 𝑔𝑚 = = 𝐾 𝑉𝐺𝑆 − 𝑉𝑡
= = 2 𝜕𝑉𝐺𝑆
𝑔𝑚,𝑜𝑙𝑑 𝐼𝐷,𝑜𝑙𝑑 ∴ 𝑔𝑚 ∝ 𝐼𝐷
֜ 𝑔𝑚,𝑛𝑒𝑤 = 2 × 0.91 mA/V = 1.3 mA/V

Also,
𝑟𝑜,𝑛𝑒𝑤 𝐼𝐷,𝑜𝑙𝑑 1
= =
𝑟𝑜,𝑜𝑙𝑑 𝐼𝐷,𝑛𝑒𝑤 2
𝑟𝑜,𝑜𝑙𝑑 100𝑘
֜ 𝑟𝑜,𝑛𝑒𝑤 = = = 50 𝑘Ω
2 2

Then,
50𝑘×10𝑘
𝐴𝑣,𝑛𝑒𝑤 = −𝑔𝑚,𝑛𝑒𝑤 [𝑟𝑜,𝑛𝑒𝑤 | 𝑅𝐿 = −1.3 × 10−3 × = −10.833
50𝑘+10𝑘
∴ 𝑉𝐷,𝑛𝑒𝑤 = 2.46 V, 𝐴𝑣,𝑛𝑒𝑤 = −10.833