CND 121: Introduction to Silicon Process &

VLSI

Assignment #: 1

Section #: 19

Submitted by:
Student Name ID
Ali Mostafa Said Mostafa v23010630
Abdelrahman Hesham Hassan Oraby v23010224
Mohamed Khaled Alahmady v23010489

Submitted to TA: Mariam Tahar

Date: 23/9/2023
1. PMOS VI Characteristics
Do the same as in Lab 01, but instead of using NMOS, use PMOS and observe the
characteristics of PMOS.

i. Add screenshot from your PMOS schematic:

Figure 1: PMOS IV Schematic

ii. Add screenshot from your waveform viewer showing PMOS IV Characteristics:

Figure 2: PMOS IV Characteristics

iii. Comment on the results:

• As we see from Figure [2], while Length of channel increase Drain Curren 𝑰𝑫𝑺
decrease, we can imagine that while L increase the path for current is increasing (as
combination of resistance in series) so current decrease.
𝑽
• As L increases, Electric filed decrease according to 𝑬 = 𝑳, so as for 𝑽𝒈𝒔 less electric
filed applied to the channel so less current.

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• Also, from saturation quadratic equation:
1 𝑊 2
𝐼𝐷𝑆 = µ𝑛 𝐶𝑜𝑥 ( ) (𝑉𝑔𝑠 − 𝑉𝑡ℎ )
2 𝐿

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