ECE 612

Design of Digital Integrated Circuits

Spring 2014

Lecture 1
Introduction

S. A. Ibrahim
Ain Shams University
ICL
 Course Administration
 Instructor: Dr. Sameh Assem Ibrahim – IC Lab, Third floor, Room 313
 e-mail address: sameh.ibrahim@eng.asu.edu.eg
 Website: http://sites.google.com/site/asuece612s14
 Time & Place: Sat. 4:00 – 7:00 PM (Weekly), Rm. 319
 Reference Material:
 J.M. Rabaey et al., Digital Integrated Circuits: A Design Perspective, 2nd
Edition, Prentice Hall, 2003.
 N. Weste and D. Harris, CMOS VLSI Design: A Circuits and Systems
Perspective, 4th Edition, Addison-Wesley, 2010.
 Notes: collated from a lot of people including Jan Rabaey, Ananda
Chandrakasan, Neil Weste, Elad Alon, Ken Yang, Sudhakar Pamarti, Victor
Rivera, and Dejan Markovic.
 Selected papers
 Grading:
 Design Project (VHDL or Verilog) 30%
 Assignments (2 Cadence Assignments) 20%
 Final 50%
S. A. Ibrahim
2
 What is the Class About?

 Integrated digital circuit design (Custom Digital)

 Transistor-level design

 Understand digital circuit behavior

 Power, area, delay, cost trade-offs

 Modern microprocessor design techniques

 Building blocks
 Design trade-off methodologies

S. A. Ibrahim
3
 Detailed Course Contents

 The CMOS Inverter

 Static Combinational Logic
 Dynamic Combinational Logic
 Sequential Logic
 Semiconductor Memories
 Arithmetic Building Blocks
 Finite State Machines and controllers
 Interconnects
 Timing and clocking

S. A. Ibrahim
4
 Lecture Outline

 History of ICs
 Transistors
 ICs
 Processors
 How and why we went through this path?
 What next?

S. A. Ibrahim
5
 History of ICs – 1928

 The first patents for the

transistor principle were
registered in Germany by
Julius Edgar Lilienfield.
 He proposed the basic

principle behind the MOS

field-effect transistor

Sameh A. Ibrahim
6
 History of ICs – 1936

 Mervin Kelly, Bell Lab's

director of research, felt
that to provide the best
phone service it will need
a better amplifier and
that the answer might lie
in semiconductors.
 He formed a department
dedicated to solid state
science.

Sameh A. Ibrahim
7
 History of ICs – 1945

 Bill Shockley the team leader

of the solid state department
(Bell Labs) hired Walter
Brattain and John Bardeen.
 He designed the first
semiconductor amplifier,
relying on the field effect.
 His device was a small
cylinder coated thinly with
silicon, mounted close to a
small, metal plate.
 The device didn't work, and
Shockley assigned Bardeen
and Brattain to find out why.

Sameh A. Ibrahim
8
 History of ICs – 1947

 Bardeen and Brattain built the point contact

transistor.
 They made it from strips of gold foil on a
plastic triangle, pushed down into contact
with slab of germanium.

Sameh A. Ibrahim
9
History of ICs – 1947 (Cont.)

Sameh A. Ibrahim
10
 History of ICs – 1947 (Cont.)

 Shockley made the

Junction transistor
(sandwich).
 This transistor was
more practical and
easier to fabricate.
 The Junction Transistor
became the central
device of the electronic
age.

Sameh A. Ibrahim
11
 History of ICs – 1948

 Bells Labs unveiled the transistor.

 They decided to name it transistor instead of Point-
contact solid state amplifier.
 John Pierce invented the name, combining
transresistance with the ending common to devices,
like varistor and thermistor.

Sameh A. Ibrahim
12
 History of ICs – 1950’s

 Sony received a license

from Bell Labs to build
transistors.
 In 1946 Sony produced
products for radio repair. In
1950 they decided to build
something for the mass
consumption; the transistor
radio.
 In United States they used
the transistors primarily for
computers and military
uses.
Sameh A. Ibrahim
13
 History of ICs – 1955

 Foundation of Shockley Semiconductor, sowing the

seeds of silicon valley

Sameh A. Ibrahim
14
 History of ICs – 1957

 The traitorous eight abandoned Shockley founding

Fairchild Semiconductor.

Sameh A. Ibrahim
15
 History of ICs – 1958
 Jack Kilby of Texas Instruments invented the Integrated
Circuit (IC)
 It occurred to him that all parts of a circuit could be made
out of the same piece of silicon.
 The entire circuit could be built out of a single crystal
• Reducing the size
• Easier to produce

Sameh A. Ibrahim
16
 History of ICs – 1958 (Cont.)

 An IC is a single
device that contains
an interconnected
array of elements like
transistors, resistors,
capacitors, and
electrical circuits
contained in a silicon
wafer.

Sameh A. Ibrahim
17
 History of ICs – 1968

 Bob Noyce and Gordon Moore, two of the traitorous

eight together with Andy Grove, form Intel Corporation

Sameh A. Ibrahim
18
Intel Processors (1971 – 1995)

Sameh A. Ibrahim
19
Intel Processors (1997 – 2012)

Sameh A. Ibrahim
20
Core i7 Haswell Architecture

Sameh A. Ibrahim
21
 Moore’s Law
 It’s an observation made by Gordon E. Moore, in which
he predicted that the number of transistors, inside an
Integrated Circuit, could be doubled every 24 months.

Sameh A. Ibrahim
22
 Technology Roadmap 2012 (ITRS)
Year 2011 2013 2015 2017 2019 2021 2023 2025

DRAM ½ pitch [nm] 36 28 23 17.9 14.2 11.3 8.9 7.1

Transistor density logic [Mtransistors/cm2] 798 1,596 2,534 4,022 6,385 10,136 16,090 25,541

Maximum wiring levels 12 13 13 14 14 15 15 16

High-perf. phys. gate [nm] 24 20 17 14 11.7 9.7 8.1 6.6

High-perf. VDD [V] 0.9 0.85 0.8 0.75 0.71 0.66 0.62 0.59

Local clock [GHz] 3.744 4.05 4.38 4.737 5.124 5.542 5.994 6.483

High-perf. power [W] 161 149 143 130 133 130

Low-power phys. gate [nm] 26 21 17.6 14.5 11.9 9.8 8.1 6.5

Low-power VDD [V] 0.72 0.67 0.63 0.59 0.55 0.51 0.48 0.44

Low-power power [W] 3 3 3 3 3 3 3 3

S. A. Ibrahim
23
 Scaling

 Technology shrinks by 0.7/generation.

 With every generation, we can integrate 2x more functions per chip; chip cost does not
increase significantly.
 Cost of a function decreases by 2x.
 But …
 How to design chips with more and more functions?
 Design engineering population does not double every two years.
 Hence, a need for more efficient design methods
 Exploit different levels of abstraction
S. A. Ibrahim
24
 Challenges in Digital Design
 Microscopic Issues
 Ultra-high-speed design
 Interconnects
 Noise, crosstalk
 Reliability, manufacturability
 Power dissipation Performance
 Clock distribution
 Macroscopic Issues Design time
Robustness
and resources
 Complexity
 Time-to-market
Area Power
 Millions of gates
 High-level abstraction
 Reuse and IP portability
Bottom Line is $$$
 predictability

S. A. Ibrahim
25
Design Abstraction Levels

Project

Course
Assignments
S. A. Ibrahim
26
 Why Custom Digital?

 Someone has to design and implement the libraries.

 Creating an adequate model of a cell or module requires an
in-depth understanding of its internal operation.
 The library-based approach works fine only when the
design constraints (speed, cost or power) are not stringent.
 Abstraction-based approach is only correct to a certain
degree and becomes worse with scaling. (ex: parasitics)
 Increasing the size of a digital design has a profound effect
on global signals like supply and clock.
 Another impact of technology evolution is that new design
issues and constraints tend to emerge over time.(ex: new
power constraints)
 Troubleshooting a design requires circuit expertise.
S. A. Ibrahim
27
 Example 1
 Problem: Active power increase in microprocessors
 Solution 1: Dynamic voltage-frequency scaling (DVS)

[Burd, JSSC00]
• Feedback loop sets VDD such that FERR=0.
• Ring oscillator delay-matched to CPU critical paths.
• Custom loop implementation → Can optimize CDD.
S. A. Ibrahim
28
 Example 1 Continued
 Sizing has major impact for small delay increments.
 Supply reduction has more impact for large delay
increment.
 Using multiple-supplies is marginally better.
 Combined gives the best of both worlds.
 5% delay improvement can lead to 30+% power
reduction

[Stojanovic, ESSCIRC02]

S. A. Ibrahim
29
 Example 2
 Problem: Increased leakage power
 Solution 1: Power down dynamically.

[Tschanz, ISSCC2003]

S. A. Ibrahim
30
 Example 2 Continued
 Solution 2: Circuit-Level Approaches
 Transistor-level optimization
 Multi-Vth designs
 Increasing length
 Stacking of devices

S. A. Ibrahim
31
 Example 3
 Problem: Device performance limitations due to scaling
 Solution: New Structures/Materials/Devices
 Channel engineering
• Material
• Profile
 New devices

S. A. Ibrahim
32
 Reading
 Chapter 1 of Rabaey.
 Burd et al., “A dynamic voltage scaled microprocessor System”,
IEEE Journal of Solid-State Circuits, vol. 35, no.11, pp. 1571-1580,
Nov. 2000.
 V. Stojanovic et al., “Energy-Delay Tradeoffs in Combinational
Logic using Gate Sizing and Supply Voltage Optimization”,
Proceedings of the 28th European Solid-State Circuits
Conference, 2002. (ESSCIRC 2002), Sep. 2002.
 J. Tschanz et al., “Dynamic-Sleep Transistor and Body Bias for
Active Leakage Power Control of Microprocessors”, ISSCC Digest
of Technical Papers, 2003.

S. A. Ibrahim
33