UNIT 12 TRANSISTORS AND AMPLIFIERS

Structure
12.1 Introduction
Ol>jectives
12.2 Bipolar Junction Transistor (BJT)
12.2.1 Transislor Actroo
12.2.2 V-I(:haracteristics and Biasing
12.2.3 Transistor as a (lo~itrollzdSwitch
12.2.4 Transislor as an Amplifier
12.3 Field Effect Transisfor (FET)
12.3.1 Trnnsistor Action
12.3.2 V-lCh;lractenslics~sti:und Biasing
12.3.3 lians~storas a Co~itrolledSwitcli
12.3.4 Transistor as an Amplifier
12.4 Differential An~plifier
12.4.1 Bipolar Versioa
' 12.4.2 FET Version
12.5 CMOS Inverter
12.6 Sunlmary

12,1 INTRODUCTION
In Unit 11, you were introduced to the characteristics and applicatiol~sof diodcs. I ~ i t h e
present Unit, you will learn about transistors. their classification, properties 'and
applications. Diodes and transistors are the most basic of discrete electronic devlces and are
used in many eleclronic circuils. Even though rnodem electronics largely employs
integrated circuits (IC's), the latter in fact arc nothing but assemblies of a large number of
tr,msistors and other circuit elcnlents, all fabricated in a single se~niconductorchip. The
transistor derives its nanlc as a sl~ortform of fransfer resistor, which describes its action of
transferring a signal current from a low resistaice input circuit to a high resistance output
circuit in a particular configuration.
Unlike a diode which is a two-terminal device, transistors are threc terminal devices with
one tenninal being the illput tenrunal, a second one being the output tcrrninal imd t l ~ ethird
one being thc common terminal for the input as well as the output. The input pair of
terminals may have an input voltage or current as tile co~~trolling quantity 'and the output
pair has its voltage or current controlled by Ule input variable. (Recall the discussion on
controlled or dependent sourccs in Unit 1). If the input voltage controls h e output current
the parameter associated with his linear relationship is tcrn~edthe forwclrd transfer
conductm~e,g,.
lllere arc two types of transistors popularly available, one known as Bipolur Junction
Transistor(BJT) and the other known as Field E B c t Tri~nsistor(FET).The relationship
between input voltage and output current in the case of BJT is exponential. The relationship
of input voltage and output current in the case of FET is a square law. a l e devices if
operated in the proper regions can act as controlled switcl~esor amplifiers. Both these
applications will be highlighted in this Unit. You will also learn about diffelential amplifiers
and inverters,
Objectives
After a study of this unit, you should be able to
* describe the input/output characteristics of the two types of transistors viz,
BJTs and FETs,
describe how to bias these transistors to make them work in the regions of
interest,
explain their use as controlled switel~esand amplifiers,
identify these transistor amplifiers as controlled sources, ana
describe the working of a differential anlplitier and a. CMOS iliverlt*-
Analog Eledda
12.2 BIPOLAR JUNCTION TRANSISTOR (BJT)
A bipolar transistor is a device with two p-n junctions as shown for example in
Figure 12.l(a). This is one of the possible types of BJT known as pnp transistor. The other
type is npn transistor. The symbol for apnp transistor is shown in Figure 12.l(b). Figure
12.1(c) is the symbol for an npn transistor.

F~gure12.1 (4) . 1 he pnp tr~uslstor Figure 12.1 (b) : Syn~bolfor n pnp transistor

3 E
F~gure12.1 (c) : Symbol for an npn transistor

Consider the pnp transistor of Figure 12.l(a). One of the p regions Is heavily doped (p+).
That region is called the emitter (E ). The other p region is called the collector (C ). The n
region sandwiched between these two regions is known as base (B ). This region is made
very thin.
Wllen the EB junction (emitter-basejunction) is forward biased, a large number of holes
which are the majority carriers in the emitter region get injected into the base region and a
small number of eleclro~lsfrom n region get injected into the emitter region constituting the
total emitter current, I,. In order to get good transistor action, the major portion of I, should
be made up of hole current. This is achieved by making the emitter region more heavily
doped UMI the base region. This is said to increase the emitter efficiency. After the holes
get injected into the base, the holes tend to recombine with electrons in the base. This loss of
holes due to recombination c'm be reduced by inaking lhc base very thin. The ratio of the
holes arriving at the BC junction to those injected is termed the base transport.fator. It
must he kept close to one. The BC junction is reverse biased so that the field in the BC
dcplction region easily collects the holes arriving at the junction. Thus, almost the entire
cvrrent at the cnlitter is available at the collector as collector currect, Ic.

Ic = a I,,

where a is very close to 1. This is what is ternled as bipolar transistor action. Restating the
same, when the emitter base junction of a BJT is forward biased and the collector base
junction is reverse biased the collector current is very nearly the same as the emitter current.
The is valid for VBC 2 0 i.e., as long as CB junction is reverse biased for a pnp transistor.
Since
IE = IB + Ic,

IB = IE - Ic

= IE(1-a)

30
i
Bul Transistors and Amplifiers

Ic = a Ip
Therefore,

I
The action in an tipn transistor is similar, except that now all vollage polarities and current
directions are reversed.
Example 12.1 (a)
Lct a = 0.99 for a BJT. Delermine P.
Solution

This indicates a typical value of P.

Example 12.l(b)
Eor the same transistor if Ihe emilter currenl is 1 mA,determine the base mid
collectorcurrents.
Solution
fE= 1 mA. Therefore Ic = 0.99 11iA and

12.2.2 V -I Characteristics and Biasing

Consider the ttyn transistor of Figurc I 2.1(c).
From Uie diode equation in Unit 1 1 , dcnoting I , therein as I,, in tlie present context 'and
taking q = I,

= I,, exp (V,, / VT) as EB junction is nonnally forward biased.

Ic= al,= alEo[exp (VBE/ VT)] (12.4)

as long as BCj&ction remains reverse biased. Therefore, the colleclor current is
expo~ientiallyrelated to Uie BE ti~rwardbills voltage.
As it is necessary for the tr'msistor action to lake place that the EB junction is forward
hiascd arid the collector base junclion is reverse biased, tllc transislor should renlain in this
region throughoul its opralion. This region is hiown as 'Active region' for the uruisistor.
If both the junctions arc forward biased, the Lmnsistor acts as a short or it is said to he in
'Saturation'. When botli the junctions are revcrsed biased the U;~11sistoris said to hc open
or in lhc 'Cut off' region.
12.2.3 Transistor as a Controlled Switch
Figure 12.2(a) shows an nyn transistor with emitter terminal as a comnon terminal between
input and output, Base is taken as the input ternunal .and colleclor is taken as Ule output
terminal. The reverse bias volt;~geis applied to the output Uirough Rc co~uiectedin scries
with a bias supply voltage, Vcc.

vi = vB,, iE = -Lrn
[exp (vBE/ VT)]
-
vo = VCE, iC = ai, (12.6)
Therefore, vo = Vcc - icRc
--
In electronic circuit diagrams.
the d.c. power supplies are
often omitted for the sake of
clarity. lo Figure 12.2(a),
even if the dotted portion is
omitted, it shoitld be taken
that a voltage source of Vcc
volts is connectedbetween the
terminal marked Vcc and the
ground. 4lso all node voltages
wherever spcified are to be
taken
- as referenced to ground.

Figure 12.2 (a) : l'ransistor ~~iverterlswitch

vo = Vcc -a R c [exp (vi VT)I

Figure 12.2(b) shows the output versus input characteristic of the transistor switcwinverter
of Figure 12.2(a).

l vcc

Vr Vi
Figurc 12.2 (b) : Inverter characteristic

Region I
-
vo = Vcc because ic 0. Trarlsistor has not yet started conducting. Only when vi(vBE )
reaches V, called cut-in voltage (= 0.6 V for silicon), does a substantial amount of current
start flowing through Rc. Till that point the Wansislor is 08.
Region I1 :
' 4 =~ V,~ 2 V, ,BE junction is sufficiently forward biased, BCjunction is reverse biased.
Therefore transistor action lakes place and the tr,msistor is said to he in the aclive region.
Eq.(12.8) depicts the output versus input relationship or transfer function. Transistor
amplitiers are operated in the active region.
Regi.01; I11 :
As vi increases vo keeps decreasing. A point is reached when vo = vcE = vBEmaking vcB = 0
After this point the CB junctic~starts getting forward biased. Transistor action stops. Both
junctions are forward biased and the transistor is in the salumtion region.
Example 12.2
F~orat] inverter circuit with Vcc -- 5V and Rc = 1 k Q, sketch vo vs vi assuming that
a silicon transistor is being used. Assume VT= 26 mV, a = 0.99 and a typical value .
ofIEO.Say 10nA.
Solution
I

Figure 12.3 : For solution to Example 12.2

Example 12.3
For the transistor inverter shown in Figure 12.4(a)sketch vo vs vi. For input voltage
levels Vil = 5 V and Vi:!= 0 V and VT= 26 mV,determine the output voltages for a
typical value of IEo if a for the transistor is 0.99.

1
Figure 12.4(;r) : Transistor l~lverteraf Example 12.3

Solution

Vi in volts

Figure 12-4(b) : vo vs vl of inverter of Figure 12.4(a)

-.
Andog Eleclmnia If 0 V is represented as '0' logic level and if 5V is represented as'l' logic level then we
have*,

That is, if Vi = A , Ulen V,, = 2 in logic notation. which you will learn later. The symbol for
transistor inverter which is one of the iil~porkultbuilding blocks of digital circuits is shown
in Figure 12.4(a).
The above analysis depicts the rrpplication of a transistor as an electronic switch. The
voltage on a load comlecled bctween the collector C and the ground can be switched
on or off by switching oSf or on a control voltage at the input (between the base B and
ground). The point to note is that very little current 'and hence power is needed from the
source of tl~econtrol voltage (as the base currelit is negligibly small) while appreciable
amounts of currentlpower car; be switched info or off from the load.
12.2.4 Transistor as an Amplifier
An amplifier is an electronic circuit which Cunlishes an output signal (voltage or current)
that is a faithful replica of the input signal (voltage or current). Ideally an amplifier
draws zero power from the source of the input signal. all the power associated with the
output signal being drawl from tile d.c. power supply energising the amplifier. In this
respect, rul amplifier differs f n m tl~eideal transfonllcr which you studied in Unit 6 and
in which all the output power comes from the source of the input signal. Depending on
the nature of the input a11d outpul signals, an ideal amplifier can be modelled in terms of
oilc of the four controlled sources that were introduced to you in Unit 1.
In the aclive region of operation of a tr'msistor, the transistor can be used as an ampl~fier.
Whereas in the transistor inverter casel the transistor reinains either 'OFF' or 'ON' and only
transits from 'ON' to 'OFF' or 'OFF' to 'ON', a transistor amplifier must be biased so that
when the signal to be amplified appears. tl~etransistor remains in the active region. The

1
** A circuit is said to be in
the gulescent (resting) transistor biased to receive the signal is said to be in quiescent condition**. The collector
condllion when is not CUfCent and the Cn reverse bias voltage known as the operating point of the transistor give
excited by an input signal.
an idea of the signal handling capability of the transistor amplifier.
Considering the circuit of Fi ure 12.2(a) again, if quiescent condition is fixed by a voltage
V,
("
then IEQ = I, exp VBEQ/ VT .
1
Ice = " 'KO ex-
VBEQ

Voe = Vcc - Ice Rc = Vcc - a R, 1,) exp (VBEQ/ V?)

fr-;E 0

L E
Figurz 12.5 . Illput signal 6vl appl~edto the amplifier

Suffix Q indicates quiescent conditions before the signal is applied.

When Ule signal is superinlposed over Ule quiescent conditions with signal as a change 6 v,
as shown in Figure 12.5,
VBE = ~VB+
E VBE~
= 8 v, + vSEQ
34
 Tramistom a d Amplifiers
i, = I,, exp [(e y + v,,) / v~] I
= I,, exp (VnEQI' V,.) oxp (61~~
/ VT)

= . IEQ exp (6vi / V,)

Now

VCJ = VCc- iC Rr = VCc - RC ICL, exp (6 vi / V,)

But

VOQ = Vcc - I,p R,

Therefore

Thc relationship betweell 6voand 6v, crul he assunled to be linear only if

6vi/2VT< 1 or 6Vi < 2VT= 52 mV at roo111 kniperature.
In this situation, termed small sigrial operiition, 6v,{6vj is called Ule voltage gain A , nf.the
amplifier and it is given hy - (Icn / VT) R, wher~operaring mjund the operating point fcP
The negative sign indicates inversion or phasc reversnl. Tlre circuit is known as cotttttlon
e/tzifferampl@er. IcdVTis a small signal paranleter relating change in oulput current with
change in input voltage linearly and is called transco~iductanceg, of the vnnsistnr at its
operating point.

Determine the voltiigc gain of a conunon cmittcr amplifier having Re as 1 k&2 a

' nd
operating at 1 mA collector currcnt.
Solution

Example 12.5
Evaluate the input resismlce Riseen by the source supplying voltage change 6 v; in
Example 12.4.
Solution
Ri= hput resistance
- change in input voltiige
change in input current
 \

wq- SAQ 1
The a of a BJT is given as 0.998. Determine its P. If a changes by 1% by how much
does p change?

SAQ 2
For a BJT evaluate - Ic known as transconductance at any operating point.
6 VBE

SAQ 3
61,.
For a BJT evaluate -at my operating pint.
6 VBE

SAQ 4
For a BJToperating at an emitter current of 1 mA,determine the transconductance

12.3 FIELD EFFECT TRANSISITOR WET)

There are two types of FETs, Junction FET(JFET)and Metal Oxide Semiconductor FET
(MOSFET). The basic characteristic however is the same for both the types namely the
output current and input volwe have n square law relationship.
12.3.1 Transistor Action
JFET comprises a channel (n or p type) between source and drain whose width is controlled
by gate @ or n type) (vide Fiy r e s 12.6(a), (b), (c)). In what follows. we shall discuss the

Gate (GI

Figure 12.6 (a) : An n - channel JFET

4s
Figure 12.6 (b) : Symbol for n - channel JFET Figure 12.6 (c) : Symhol for y - channel JFET

transistor action in relation to an n- channel FET. The pn junction between channel and gate
is having a depletion layer vide Figure 12.7(a) whose width increases as the magnitude of
the reverse bias voltage increases. This control facilitates the dependence of current through
the channel on the reverse bias voltage appearing across the depletion layer. As the gate is
isolated from the chmiel by the reverse biased junction, almost no gate current flows as the
control action takes place. As the voltage Vm increases the current in the channel (I&
increases but the quantum of increase in current progressively decreases for a quantum
change in voltage Vm vide Figure 12,7(b). This is because the depletion layer width
increases as gate to drain voltage is increased for a fixed gate to source voltage. At a point

-
Figure 12.7 (a) :Formation of depletion layer in n channel JFET by biasing

when the depletion layer width almost covers the entire channel over the drain and the
current increase quantum becomes zero, the current reaches a saturation value. This
condition is known as 'pinch off. In the general case, the gate G is kept at a negative
 ID^ LmA)
1 f
Dynamic rrristance
increaser nontinaurty

L l n ~(ohm
r
regton

-
Pigui~:12.7(h) : Ins vs \'ns I'or V c s = 0 ia an rr - chnnnel PET

potential with respect to the scnlrcc S fbr iul n- clliln~lelFET. The saturation current then
dewncls on V,, ;LS sllowll in Figurc 12.8.
12.3.2 V - I Cl~arslcteristicsand Biasing
When V,, is small, I,, = 2 Ims

where I,Ky is known as Ule saturation current for II,, = OV and V p 1s k ~ ~ o as

w ~b le '~~i~irrch
oJr vdtage. It can be see11 U~atI, = 0 for Vm = Vy when thc entire channel Is blocked in
the beginning itsclf.
FETs can be uscd as voltagc variable resistors (VVR)whel working in the region wllare I,,
1s linearly related to V,,., below 'pincll off'. ?hey cim be used for amplifier purposes when
they arc biased to operate in the current saturiltion region beyond 'pinch off.
P;xrmple 12.6
An n-cha~ulclJFET with ch:lr;~cteristicsshc~wnin Figure 12.8 is to he used as a W R .
Detcnrli~le(he chnlncl rcsislarlce for VC;$= 0. Write down the expression for the
voltage dcpttlldellt rcsistanc~.

Figurc 12.11 : J E T Charadcristics for Exlrmplo 12.6

Solution
In ?I)clinear regbn,
 Therefore, Transidon and Amplifiers

s I,, -
2bS.Y for VGs = 0
s v,, IVPl (12.13)

Therefore,
R = 250 i2 for VGs = 0 .
FM VGs < 0 ,

Example 12.7
.
The JFET with characteristics shown in Figure 12.8 is to be used as an amplifier.
Determine its transconductance when VGs = - 1 V.
Solution

Region beyond VDs 2 4V is the region of current salutation for VGS= - 1V.
Depletion MOSFET
The depletion type MOSFET has similar characteristics as JFET.
Construction-wise it is different from JFET and is illustrated in Figure 12.9(a). There is an
insulated layer of Si02 called gate oxide between the channel and the gate contact.
Therefore the gate can be biased negatively so as to deplete the existing channel or
positively to enhance the channel width. However it is nonnally operated in the depletion
mode.

p-substrate
I
F~gure12.9 (a) : Construct~onof n -channr.! b b ISFET
 : Syn~bolfor n - chau~icl
Lqlpure12.9 (I?) Figure 12.9(c) : Symbol for 1) - channel
Ihpletion niode MOSWT Depletion mode MOSFET

Enhancement MOSFET
Consider Figurc 12. I O(a), which shows the construction of an n-channel enhancement
MOSFET.
Here there is no 11 - cha~meldiffuscd between the source and drain. -In order lo create a
channel the substrate lo galc polcl~tialmust be made positive.
-

F
Substrate

Figure 12.106) : ('onstruction of enhancement type n - channel MOSFET

Tbe voltage to be applied to the gate to create an n-channel on the surface is called the
t c ~ e , ~ / ~voltage,
old V,. A k r the cha~mclis created by applying a voltage greater than the
threshold voltage, MOSFET action can be allowed to occur. Mathematically, the equations
a11d V-icharacteristic arc sinlilar to those of depletion mode MOSFET or JFET. But in the
saturation region the drain current is given by

where K is in mnA / v2,VTis the threshold voltage and I,,, is in rnA. The symbols for the
n-channel and y-cha~nelMOSFETS of this type arc shown in Figures 12.10(M and fc).

Figure 12. LO (b) :Symbol for n -channel enhancement Figure 12.10 (c) : Symbol for y -channel enhancement
type MOSFET type MOSFET

12.3.3 Transistor as a Controlled Switch

A I ~ N ) IUle
I ~ different
S~ types of FETs. Ule enchance~nenttype of MOSFET is ideally suited
as n Y *y.~itch V,:, = 0 V) and in order to switch it on, a
hccailse it IS normally off (i.e with
voltage greater than threshold voltage is to be applied to the gate with respect to the source.
 Figure 12.11(a) shows the basic MOS inverter circuit using y-chiumal enhancement type Transiston sod Amplieem
MOSFET. Gate is thc input terminal, source is the common terminal between input aid
output and drain is the output teriniml. Thc supply voltage VDDis applied through a resistor
RD to the drain.
i I'VDO

Figure 12.1 l ( 3 : MOSFET inverter switch

iD = K ( vGS- vTl2for vGS> VT

and V, 2 vGS- VT
in the current saturation region.
Therefore,

As vi is increased from zero until vi > V, the FET is in the cut-off region and lherefore vo
remains at VDDThereafter the FET enters current saturation region and Eq.(12.17)

Figwe 12.11(b) : Transfer characteristic of MOS-Transistor switch

describes thc rransfer characteristic. In the active region when vo 5 vi - VTthe circuit enters
suluration region.
In order to use the MOSFET as a switch the following conditions are to be satisfied.
vi c VTfor the switch to be 'OFF'; vi = 0 is a convenient voltage
vi > VGs, (vide Figure 12.11(b)) for the switch to be 'ON' where vo = VDsl + 0

12.3.4 Transistor as an Amplifier

In the' active region of oppa(ion the MC)SFET can be vred as in amplifier. The transistor
biasing should be such a$ to iruinttin it in the Wive region when the signal is present e.g.
 *
for the circuit of Figure 12.1l(a), vi > V, d v, vi - Vr far tfre bLI1SFET to renuin in
active rcgkm. In this regim if Vre quiescew cordition is fixed by r r a g e V,,yQthen
2
lDe= ( V,,Q - Vr)

Vru.(! = V,),) - K ( V,S(! - VT) R,

suffix Q indicating quiescent miiditio~lsh e l m the signal is applied.
When Lhe signal is superimposed over the quiescent conditions with signal change as Svi
+ 6 vi - VT) 2
iD = R (VGsTQ

The relatialship hecomes line'u viz.,

= -2KR" (Yay - VT)6 vi
o~ltywhen 8vi < < 2 (VW, - VT).

where K,,, = 2K (V,, - ),V is known as the transconductance of the FET around the

quiescent co~idition

Example 12.8
For the MOS transistor inverter shown in Figure 12.11(a), VDD = 10 V ,Rn = 1 kQ ,
K = 5 IIIA 1 V* and VT= 2 V, Sketch vo as a hnction of v, . For input voltages
Yil = 0 md Vt2= 10 V obtain the output voltages.
 Exa- 1t P

-
Determine tbe transconductance, g,,, and the voltage gain of a MOSFET amplifier
lum ia '
12.11(a) with K = 5 mA/V , VDD = 10 V and operating at
VGsQ= 3 V w i t h R D = 1 k 9 .

-ce gf,,=2x5(3-2)=10mS

Voltage gain = - g, R, -
=-lo" 103 = - 1 0
It may be noted that for coupling the input signal at the ix~putand decoupling the output
from the quiescent d.c. voltage, capacitors (C,) are used. These are called Coupling
Capacitors.
Now that we have discussed the characteristics of BJT's and FET's let us briefly review the
associated biasing arrangements.
A simple scheme of a biasing bipolar transistor, acting as an ~nplifieris given in
Figure 12.13 (a) (SAQ 5). Biasing of FET ( lor hoCh anplificatirm swiichhlg ) is done
hy *plying appropriale d.c. voltages will1 respect to t l source.
~
The use of hipolar transistor as a swilch is illustrated in SAQ 7.
SAQ 5
For thc transistor amplifier s h n in Figure 12.13(a), & m i n e Ic- snd Va for ,
Vcc = 10 V. Assume a = 0.99.

mn
a Y
+-
'I G
w
I L

SAQ 6
-
For the amplifier circuit of SAQ 5, evaluate the small signal voltagt gain, 6vo and
6vi
6vi
small signal input resistance, 7. Assume an appropriate value d VT.
&i

SAQ 7
Fur the trmsisw switch shown in Figure 12.13(b), dctermirw the v r l u of RB so u ro
~ t r e to W a t i ~ VBE
d r i the . = 0.6 V rrd M = 0.W.
 Figure 12.13(b) :For SAQ 7

The amplifiers studied in Sections 12.2.4 and 12.3.4 can amplify only input voltages
which are referelxed to ground, i.e.. voltages between a node and the ground. They
are therefore called single-ended input amplifiers. A differential amplifier, as its name
suggests, un amplify the difference between two input voltages, each of which may
he referenced to gound. Therefore, it un amplify input voltages between two lodes,
neilher of which need he grounded. The diiferential amplifier is a basic block of
most of the present day Analog ICs and some of the Digital ICs. This block outperformsany
of the single transistor amplifiers discussed so far both in biasing technique as well as
dynamic performance charilcteristic. Thereiore, it is not any longer necessary for us to study
the diffe~ntways of biasing a single transistor BJT or FET. Further, the operational
amplifier (opamp) IC which has now hecome vely popular in its applications has this block
as the primary unit. Since biasing either the differential amplifier or the opamp involves
t Vcc

Figure 12.14(a) : BJT differential amplifies

just connecting dual supplies f V, to its supply terminals, the users do not have to any
longer worry about proper biasing for optimised performance of the amplifier device.
12.4.1 Bipolar Version
Consider differential input circuit shown in Figure 12.14 which is a symmetric network.
Let
vid = vil - v2 = vBEl- vBn

iEl= IED exp (v,,, / VT ) and in = Im exp (vBn / VT)

icl = a iEl , i , = a im
The differential output voltage v, = (i, - icl) R,
= - a R c ( i m -),i
 - = exp - vBE2)/ VT] = exp (vid/ VT)
[(vBE1
,i
iEl - in exp (v,/ VT)- 1 - (iEl - in)
-- -
,i + in exp (v,/ VT)+ 1 10

(im - im, = lo tmh k)

Figure 12.14 (b) :vo versus Vid characteristic of the circuit of Figure 12.14(a)

Therefore,

Figure 12.4(b) shows the variation of vo w.r.t. vid.

For small input signals, say
lviJ << mvT,
voltage gain = v&, = - g,, Rc where

- --aIo
. 7 -
- - - a I O / 2 , -being
I,,
the operating current of the transistors.
~ V T VT 2

-Y
-vcc
Figurn 12.15 (a) : Differential input differential , Figure 12.15 (b) :Differential input single
output opamp. ended output opamp. ,

Therefore, the differential amplifier also gives the same voltage gain as that of a
common-emitter bipolar stage operating at quiescent current I, /2with a collector resistance
of Re
The differential amplifier itself can be represented as the basis of a differentid-input
differential output opamp. as shown in Figure 12.15(a). A specid case of this v m p is the
single ended output opamp as shown in Figure 12.15(b). The applications of such opamps
ate discussed in Units 13 and 14.
12.4.2 FET Version
'Ihe differential MQSFET amplifier is shown in Figure 12.16.
The analysis is similar to that of the BJT
version.

Using KVL around the loop constituted by

the RDresistors and the output terminals,

Figure 12.16 : FET/MOSFET differedisl w e

Thus iDl = -
I0 vo
--
2 %

"in
Therefore, vo = RD -
VP

= gmRD vkl,
where g, is the transconbuctanceof the FET differential amplifier.

125 CMOS INVERTER

Figure 12.17(a) shows a CMOS inverter which b e h g s to tbe most popular logic family
used in VLSI (Very L q e Scale Integrated Circuits). It is also used in analog ICs as an
output stage.
i
 Figure 12.17 (a) : CMOS Inverter Figure 12.17 (b) : CMOS Inverter Characteristic

Using MOSFETs which are having identical characteristics,

in the re~ionwhere v, 2 v,, - V, and bounded by lines

VT and v0 = vi + VT ,
I
v0 = vi-
! I I
the gain 6v0 /6vi is infinite as depicted in Figure 12.17(h). The MOS inverter can be used as
a NOTgate* when the circuit operatcs with one of the transislors off i.e., when vi = -V, a
w k n vi = + Vss,. The advantage of this operation is that the current drawn from the bias
tho use of logic gates
source is always zero. Thcrcfore, the CMOS logic family has Ule lowest power dissipation
possible amongst all logic families available today.
As an amplifier stage when the MOSFETs are in the current saturation region (region BC)
with a load resistance RL, the voltage gain can be shown to be - g,,,RL as in th6 case of other
transistor amplifier stages discussed so far.
Example 12.10
Show that the CMOS inverter amplifier gain in Figure 12.18** n q a l to - g ,RL
where g, is Ute transconductance of Ule inverter shge ( = gml + g , ~= 2gml).

a simplified .symbol for

Figure 12.18 : CMCS inverter with load

- .C

For the CMOS amplifier shown in Figure 12.18 using ide~~tical

MOSFETs, we have
for vi = 0 ,
IiDl( = liD2l and I V GSI ~ = IvGS~I=VSS
Analog Ekcironicn Therefore

R", = 2 6 vi

I I
= 4 K (Vss- V , ) = -4

SAQ 8
For lhe enhanceinent type MOSFET shown in Figure 12.19, detennine ID and Vns.

Figure 12.19 : For SAQ I)

For the common-source amplifier shown i11 Figure 12.19. detennine the voltage gain

SAQ 10
For the differential amplifier shown in Figure 12.20, detennine the operating current
of the transistors and the voltage gain. The figure shows bnth the input terminals
grounded (vjl = vj? = 0)

1""'

figure 12.20 : For SAQ 10

 T r d s t o r s and Amplifiem
SAQ 11
For the CMOS inverter shown in Figure 12.18, determine the voltage gain if
~ & = 6 v a n d ~I ~k = ~K =. ~ ~ ~ A / V ~ ~ ~ ~ I V ~ = ~ V ~ ~ ~ ~ I ~ ~ M O S F E T S .

12.6 SUMMARY
This unit introduced you to bipolar and field effect tr;uisistors, their actions and
characteristics, their operating modes as swilches (cc~~trolled) as well as amplifiers. It then
cxplailied how these basic devices can be configured as differential amplifiers a ~ inverters.
~ d
IL also brought out the fact Lhat an Operational Amplifier Uie ust: of wliich we shall study in
greater detail in the next two units is nothing bul a sophisticated differential amplifier.

12.7 ANSWERS TO SAQs

b
t SAQ 1

SAQ 2

= lc
-
VT
SAQ 3
-EkeLrolrla SAQ 4
lE = 1 d .vT=26mv
SIC IC a IE x 0.998 = 38.4 mS
Therefore g, = -= - - --
~ V B E VT VT 26 x

SAQ 5

SAQ 6

:.Voltage gain = -143

sv; v* 26
x 0.99 x 100 = 2765 S2
-6ii
= - P =I- c~ 0.931
Input resistance = 2.765 ldl
SAQ 7
--- - lg nwst be greater tl1a11-
ICmax
RR P

= 50M
SAQ 8
los = K(VGs - 2) "orvDs 2 V{;s - 2 in the current saturation region

Since 10 V is greater than 3 - 2 = 1 V the assumption that the FET is in the saturation
region is valid.
SAQ 9

= 20 mS su~ceV, = 3 V
Voltage gain = - g,,, RD = -20 x 2 = - 40.
r
SAQ 10
'O-O"
4
mA = 21E'2.35 rnA

SAQ 11
IDS = K(VGs - 2)'

= 2~12~4=96mS
Therefore, voltage gain = - 2gm x lo3
= - 2 ~ 9 6 x 1 0 - % I$=-192