Inrush Current Minimization in Reduced Device

2020 3rd International Conference on Energy, Power and Environment: Towards Clean Energy Technologies | 978-1-6654-2536-0/21/$31.00 ©2021 IEEE | DOI: 10.1109/ICEPE50861.2021.9404426

Count Multilevel Inverter Interfacing PV System

Priyanka Sen
Department of Electrical Engineering,
C.V. Raman Global University,
Bhubaneswar, India, 752054
psen466@gmail.com
Vandana Jha
Department of Electrical Engineering,
C.V. Raman Global University,
Bhubaneswar, India, 752054
vandanajha.electrical@gmail.com
Ashwin Kumar Sahoo
Department of Electrical Engineering,
C.V. Raman Global University,
Bhubaneswar, India, 752054
ashwinsahoo@yahoo.com

Abstract—Switched capacitor (SC) based multilevel inverters
(MLIs) are evolving rapidly for varieties of dc-ac power
conversion applications. This is due to the voltage balancing
ability without any complicated control circuit and voltage
boosting ability. Even with these major advantages of SC
topologies, a key issue in these circuits is the high inrush current
while sudden charging and discharging of capacitors. This issue
has been addressed in this work by proposing a new SCMLI
circuit consisting lower number of switches and a single source.
The merits of the proposed circuit such as voltage balancing of
capacitors without adding closed loop control, voltage boosting
and single source requirements has motivated the authors to
employ the same circuit in photovoltaic (PV) application. The
proposed SCMLI is interfaced with the PV systems through dc-dc
boost converter. The dc-dc boost converter allows voltage
boosting additional to the boosting capability of SC network and
assist in minimizing the inrush current due to presence of
inductor. The advantages of the proposed structure are verified
by a detailed comparison with existing configurations and
extensive simulation study of the proposed circuit in integration
with the PV system.
Index Terms—switched capacitor multilevel inverter
(SCMLI), photovoltaic (PV) system, inrush current, reduced
switch, selective harmonic elimination (SHE), self-voltage balance.
I. INTRODUCTION
Recently production of green energy is the aim of every
country as pollution is the major concern for all. So, renewable
energy sources like PV and wind energy are more popular in
recent days. Use of renewable energy sources for charging the
Electric vehicles also started a new era in research. The
weakness of PV and wind is their low voltage range and
presence of high harmonics in output. The outputs are therefore
required to be enhanced before connecting it to the grid. To feed
the power generated by renewable energy sources inverter is
necessary. The conventional three-level inverters used for this
purpose cause high power loss which results in low quality
output. The output of these kinds of inverter also contains more
harmonics. To reduce these harmonics again high cost, bulky
passive filters are required. Thus, it is proposed to interface
multilevel inverters (MLIs) to improve the efficiency of
photovoltaic (PV) and wind energy systems that can reduce the
size of filters [1]–[7].
The MLI is the precious invention in the era of power
electronics and renewable energy system. The harmonic
distortions present in renewable energy systems can be removed
by MLIs and which results improved quality of output. The
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modular nature, low electromagnetic interference and reduced
voltage stress on the switches are the additional reason behind
the popularity of MLI [8], [9]. The several conventional
topologies are invented like neutral point clamped (NMLI),
flying capacitor MLI (FMLI) and cascaded H bridge MLI
(CMLI) which are more beneficial than conventional three level
inverters. But there are several challenges in using these
topologies for medium as well as high power applications such
as need of larger number of components, lack of proper voltage
balance and complexity of the control strategy. Conventional
NMLIs and FMLIs can cause module failure because of series
connection of switches. Conversely, the use of CMLIs is more
trust worthy in this concern. Number of switches, number of
diodes and capacitor used in conventional CMLI topologies
raise another issue of switching loss and voltage stress on
switches which decrease the efficiency of system. To solve the
issue reduced switch topologies are proposed by the researcher
[1], [10], [11].
As MLI require number of dc sources for production of
desired number of levels in output, multiple numbers of PV
panels are required to be utilized in the system. This raises
challenges of requirement of number of maximum power point
tracking (MPPT) control system as well as number of dc-dc
converter, which increases the complexity of the circuit. As
solution to these problems, researchers proposed several
topologies of MLI with lower number of dc sources. To
eradicate this issue single input MLI systems are proposed in
[8], [12]. To increase the input supply voltage from a PV panel
fed to MLI requires voltage boosting by transformer along with
the dc-dc converter, but the transformers require heavier
magnetic core in general. The supplied voltage can be boosted
to multiple times by the use of switched capacitor circuit (SC).
It also reduces the requirement of number of components and
switches used. Just by applying proper switching strategy, these
can give enhanced output voltage [13]. To get better voltage
balance SC based self-balanced MLI topologies has been
proposed by researchers. For reduction in number of dc sources
used and components used, a new SC topology has been
proposed in [8]. In recent research a cross-switched hybrid
inverter containing only one dc source which produces 13-level
triple increase in voltage output [12]. A reduction of stress on
the individual switch is noticed in nine-level SCMLIs in [13].
As a summary, it can be said that by the use of SC concept with
MLI, can improve the voltage gain several times.
It is clearly observable from the above discussion that
reduction in the number PV panel used, reduction of number of

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switches and enhancement of the output voltage with better load
handling capabilities are the requirement of SCMLI design in
the application of PV integrated system. .As per the analysis
given above, a standalone PV system design with fewer
components, MLI with voltage boosting ability and current
handling capability is put forwarded in this paper. In Section II
the design of new SCMLI is described, i.e., PS. With a single-
input source with boost converter with two capacitors it is
designed. Section III describes the design consideration for the
proposed system. After the analysis of operation of proposed
structure, in Section IV a comparative study is given, by
comparing the PS structures with the existing MLI designs. The
LSFC SHE control technique is explained in Section V, which
is incorporated with MPPT Control technique for controlling
the operation of the proposed system. In Section VI, the
simulation with results at different test conditions is presented.
The conclusion described in Section VII.
II. ADVANCED SYSTEM DESCRIPTION
The system with PV, design using MLI interfacing is highly
popular to utilize the sun power effectively. Conventional MLI
interfacing PV systems as shown in Fig. 1 consists of several
PV panels in the input from which ac power can be obtained by
through dc-dc power converters which boosts the PV voltage as
well facilitate maximum power tracking operation. In this
regard, several structures have been evolved as discussed in the
prior section. Such structures reduce the number of
components, but the control complexity is high due to presence
of multiple PV panels and lacks in boosting the voltage
actively. This can be achieved using SC based structure, which
assists in significant reduction in number of components,
number of inputs and diminishes control complexity by
enabling inherent voltage balancing of capacitors. Without
interlinking of any magnetic stage the structures consisting of
SC network can boost the voltage appreciably. A proper control
scheme need to be developed in this regard that can control the
switches such that no additional control circuit will be
employed for voltage balancing, thereby achieves enhancement
in overall system efficiency.
The proposed system comprises of a front-end boost
converter. The boost converter is used to further feed the power
to the active SC network as shown in Fig. 2. The SC network
consists of 3 switches (T1-T3). The SC network also consists of
2 capacitors (C1 and C2) that enable voltage boosting. The
output of the SC network (VSC) is only positive, whereas the full
ac cycle (+ve and -ve polarity) can be obtained by using H-
Bridge consisting of switches (T4-T7). Therefore, the proposed
circuit creates a 5-level output ( ±Vdc, ±2Vdc, 0) . The PV power
generally requires boosting the voltage magnitude to match
with the required grid or load power. Thus, a SC converter can
serve the purpose. This implies a proposed system as the ability
to boost the voltage using only the SC network. However, a
major issue in the circuit consisting SC is the charging current
spike which is very high in magnitude. This high charging
current/inrush current can eventually damage the power
switches and reduces the reliability of SCs. To overcome this
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issue, the boost converter additionally interfaced in the input
side of the proposed circuit along with the SC network. In other
words, the boost converter provides soft charging of the
capacitor in the SC network and thus increases the reliability of
the overall system. The issue with the inrush current can also
avoided by connecting an inductor in the charging loop.
However, a higher voltage boosting is not possible. The circuit
operation (Table I) is analyzed as follows:
Step-1 (VO=Vdc)
In this state, the switches T1, T3, T4, T5 are conducting. So,
the capacitors (C1 and C2) are charged and positive polarity of
output is obtained.
Step-2 (VO=2Vdc)
The switch combination T2, T4, T5 is conducting and as T2 is
conducting both capacitor C1 and C2 discharges to produce the
required output.
Step-3 (VO=0)
In this state, either the upper switches of H-Bridge (T4- T6)
conducts or the lower switches of H-Bridge (T5-T7) conduct.
Step-4 (VO= -Vdc)
In this state, T1, T3, T6, T7 conducts and C1 and C2 are
charged.
Step-5 (VO= -2Vdc)
In this state, T2, T6, T7 conducts and C1 and C2 discharges.
For the 5-level circuit operation, the peak of the

fundamental load voltage (ac output) is  =  = 2  .
where d is duty cycle of dc-dc converter and maximum output

voltage is  , when the modulation index (m) is 1.
III. DESIGN CONSIDERATION FOR PROPOSED SYSTEM
To reduce inrush current, it is necessary that the boost
converter operates in continuous conduction mode. So a slightly
larger value of inductor (Lb) assists in reducing the current
ripple. Lb can be calculated as follows:
 () (   () )
 ≫ (1)
∆  (  )
where Vdc(min) is minimum input voltage, VSC is the output of
dc-dc stage, Vd is the forward voltage drop of diode, ∆  is the
input current,  is the switching frequency.
In the proposed circuit, it is important to calculate the value
of SCs (C1 and C2) depending on the discharging quantity of the
capacitors (∆! ) and permissible voltage ripple. Considering
about the 5% of the voltage ripple, the value of capacitance is
given as follows:
∆"
C1= C2≫ (2)
#% & 
 (a) (b)
Fig. 1. (a) Multi-input MLI based PV interfaced system and (b) staircase output voltage of an MLI

Fig. 2. Developed PV-MLI systems with inherent boosting and inrush current handling ability

TABLE I. SWITCHING SEQUENCE OF THE SCMLI handling the inrush current. This structure uses a greater number
of switches, so efficiency is less due to switching loss. M3 has
Conducting switches Vo boosting ability, but this structure causes more switching loss as
more no of switches are used. The topology contains two
T1-T3-T4-T5 Vdc
T2-T4-T5 2Vdc
capacitors without inrush current handling capability. In M4 and
T4-T6(or) T5-T7 0 M5 structure the switch count is low as compared to all other
T1 -T3-T6-T7 -Vdc structures but does not have the boosting ability. The design
T2-T6-T7 -2Vdc proposed in M6 switch count is less with voltage boosting
capability. The structure uses 2 capacitors without inrush current
IV. A COMPARATIVE STUDYBETEWN NEW DESIGN AND handling feature which can reduce the system reliability. M7
EARLIER CONFIGURATIONS uses less no of switches as compared to M1, M2, M3 structure
with the use of capacitor but it does not have the boosting
The proposed system is compared with state-of-art MLIs to capability and inrush current handling ability. The M8 design
verify the feasibility of the circuit on the base of number of uses lower number of switches with 3 capacitors and also has
switches used, source count, the inrush current handling ability, the boosting capability. But it is incapable of handling the inrush
boosting ability, number of capacitors used. The conventional current.
five-level CHB MLI consists of 8 switches with 2 sources, but it The proposed design contains lower number of switches
does not have the boosting ability. The M1 structure has reduced compared to all the discussed structures except M4, M5. The
the source count compared to conventional CHB MLI, but does topology uses 2 capacitors with inrush current handling
not have boosting ability. It also uses higher number of switches capability. This is not achieved in most of the discussed design.
as compared to other structures. Whereas M2 design has same It can also boost the voltage. Table II gives a comparison among
component as M1 with one capacitor, it has capability of different MLI configurations.

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 TABLE II. COMPARITIVE ANALYSIS OF SINGLE-PHASE FIVE-LEVEL MLI DESIGNS
CHB MLI M1 M2 M3 M4 M5 M6 M7 M8
Parameters PS
[14] [5] [5] [15] [11] [16] [17] [2] [3]
Number of switches (Nsw) 8 10 10 13 5 5 7 8 7 7
No of Sources 2 1 1 1 2 2 1 1 1 1
Number of capacitors 0 1 1 2 0 0 2 2 2 2
Inrush current handling
No No Yes No No No No No No Yes
ability
Boosting ability No Yes Yes Yes No No Yes No Yes Yes

V. CONTROLOF THE DEVELOPED PV SYSTEM VI. SIMULATION RESULTS

The key control objective of the PV system is the tracking
of peak power under any change insolation. As the insolation
varies throughout a day, thus tracking of peak power in every
instant becomes more crucial. Moreover, the I-V characteristic
of a PV panel is highly non-linear. Thus, to track the peak power
requires an efficient algorithm. The early developed perturb and
observe (P&O) and incremental conductance (InC) control
MPPT control schemes are widely used in the PV system to
track the peak power. This is due to the simplicity in
implementation of these control schemes. However, it is
noteworthy that tracking of peak power under sudden variation
in insolation or partial shading condition (due to cloud or any
object) is unfeasible using the conventional control algorithms
[18]. Therefore, robust MPPT schemes such as particle swarm
optimization, genetic algorithm, grey wolf optimization, JAYA
algorithm, etc. are developed more recently to track the global
power. The proposed control system uses the InC technique to
track the peak PV power which in turn controls the dc converter
and maintains the dc voltage across the SC-stage [10], [19].
Furthermore, to control the switches in the SCMLI,
fundamental frequency based control (FFC) scheme is used in
this work. Selective harmonic elimination control and nearest
level control are the two widely used FFC techniques. The
former technique is implemented with the aim to eliminate the
low-order harmonics while controlling the output. As the
proposed MLI produces a 5-level output, only 3rd order
harmonics is targeted to eliminate from the output voltage and
the nonlinear equations are solved in this regard using particle
swarm optimization method [20]. The fitness function
evaluation using the FFC scheme gives the optimum value at
0.91 modulation index. Thereby, the switching angles
corresponding to the same are used to check the performance of
the MLI. The fundamental value is preserved while controlling
the output voltage using the FFC scheme and the total harmonic mostly inductive loads are used. As the proposed design is for
distortion (THD) is reduced as the dominant harmonic is practical use, its performance is tested with change in load from
eliminated. Fig. 3 shows the overall control block diagram.
The proposed system shown in Fig. 2 contains seven IGBT
switches and two SCs simulated to judge the performance of the
standalone PV system. One PV panel of 100 W is considered in
the simulation that is having the maximum voltage of 24.25 V
and maximum current is 4.13 A at MPP. The boost converter
used in proposed system boosts the voltage to about 40 V that
consists of a 0.4 mH inductor. The SCs of 2200 μF are selected
each. The voltage across these capacitors is represented by VC1
and VC2, whereas the current through the capacitors are
represented by IC1 and IC2. Two types of loads are used to verify
the performance of the proposed system. One is resistive load of
30 Ω another is inductive load of 30 Ω and 0.1 H. To analyze the
performance of the proposed model, three different situations
are taken into consideration and results are analyzed herein after.
Case-1 (With dynamic change in Modulation index)
To verify the performance of the proposed system using the
FFC technique, along with the angles corresponding to 0.91
modulation index a low modulation index is also taken. From
0.04 sec to 0.08 sec, low modulation index (0.25) is used and
form 0.08 sec to 0.12 sec high modulation index (0.91) is
chosen. With these dynamic change in the modulation index the
proposed system is able perform successfully as shown in Fig. 4.
Fig. 4(a) shows the output voltage (Vo) and load current (Io)
changes with change in modulation index. With low modulation
index the capacitor voltage ripple is less and inrush current is
lower whereas with high modulation index the capacitor voltage
ripple is more and the inrush current is higher. This can be
verified from the results shown in Fig. 4(a).
Case-2 (With dynamic load change)
In practical situation the load changes dynamically and
R-load to RL-load at 0.08 sec. From the results shown in Fig.
4(b) it can verified that the system runs successfully with sudden
change in load. The capacitor voltage ripple and the inrush
current reduce with increase in loading. Further, the result
confirms the self-balancing ability of the SCMLI.

Case-3 (With change in output frequency)

The frequency is varied from 50 Hz to 100 Hz, to test the

operability of the SCMLI under frequency variation. The system
Fig. 3. The total control strategy of the proposed MLI interfacing PV system can perform effectively with high frequency as well. From the

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results shown in Fig. 4(c) it can be verified that high frequency proposed SCMLI is one of the suitable structures for high
operation results in low ripple in capacitor voltage and frequency ac microgrids. Fig. 4(d) shows THD analysis, where
minimization of inrush current through the capacitors. Thus, the the 3rd harmonic is eliminated at high modulation index.

(a) (b) (c)

(d)
Fig. 4. Results under (a) Case-1, (b) Case-2, (c) Case-3, (d) Harmonic spectra of load voltage and load current

VII. CONCLUSION complex voltage balancing control schemes. Further, the

In this paper, a novel SCMLI circuit has been analyzed,
which requires smaller number of switches and a single source
to produce a 5-level output. The input is supplied from a PV
panel and the dc-dc converter is used to boost the input voltage.
Further, self-balancing and twice voltage boosting has been
achieved using the SC stage. The capacitors in the SC stage
allow voltage boosting without any magnetic component and
inductor in the dc-dc converter has successfully reduced the
inrush current, which one of the major issues in all the SCMLIs
reported till date. A detailed comparative study justifies the
development of the presented circuit over other 5-level MLIs.
Extensive simulation study under severe dynamic conditions
validates the voltage balancing ability, boosting feature and thus
the successful application of the proposed MLI in PV system.

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 REFERENCES
[1] P. R. Bana, K. P. Panda, R. T. Naayagi, P. Siano, and G. Panda,
“Recently Developed Reduced Switch Multilevel Inverter for
Renewable Energy Integration and Drives Application: Topologies,
Comprehensive Analysis and Comparative Evaluation,” IEEE Access,
vol. 7, pp. 54888–54909, 2019.
[2] G. V. Bharath, A. Hota, and V. Agarwal, “A New Family of 1-φ Five-
Level Transformerless Inverters for Solar PV Applications,” IEEE
Transactions on Industry Applications, vol. 56, no. 1, pp. 561–569, Jan.
2020.
[3] R. Barzegarkhoo, Y. P. Siwakoti, and F. Blaabjerg, “A New Switched-
Capacitor Five-Level Inverter Suitable for Transformerless Grid-
Connected Applications,” IEEE Transactions on Power Electronics,
vol. 35, no. 8, pp. 8140–8153, Aug. 2020.
[4] P. R. Bana, K. P. Panda, S. Padmanaban, and G. Panda, “Extendable
Switched-Capacitor Multilevel Inverter with Reduced Number of
Components and Self-Balancing Capacitors,” IEEE Transactions on
Industry Applications, pp. 1–1, 2020.
[5] S. S. Lee, C. S. Lim, Y. P. Siwakoti, and K.-B. Lee, “Dual-T-Type
Five-Level Cascaded Multilevel Inverter With Double Voltage
Boosting Gain,” IEEE Transactions on Power Electronics, vol. 35, no.
9, pp. 9522–9529, Sep. 2020.
[6] K. P. Panda, P. R. Bana, and G. Panda, “Design and Control of An
Asymmetrical Cascaded Compact Module Multilevel Inverter for PV
System,” in TENCON 2019 - 2019 IEEE Region 10 Conference
(TENCON), 2019, pp. 2616–2621.
[7] K. P. Panda, P. R. Bana, and G. Panda, “Design and Control of A
Switched-Diode Multilevel Inverter for Photovoltaic Application,” in
2019 IEEE Milan PowerTech, 2019, pp. 1–6.
[8] P. Panda, P. R. Bana, and G. Panda, “A Switched-Capacitor Self-
Balanced High-Gain Multilevel Inverter Employing a Single DC
Source,” IEEE Transactions on Circuits and Systems II: Express Briefs,
pp. 1–1, 2020.
[9] P. R. Bana, K. P. Panda, and G. Panda, “Power Quality Performance
Evaluation of Multilevel Inverter With Reduced Switching Devices and
Minimum Standing Voltage,” IEEE Transactions on Industrial
Informatics, vol. 16, no. 8, pp. 5009–5022, Aug. 2020.
[10] P. Sen, P. R. Bana, and K. P. Panda, “Firefly Assisted Genetic
Algorithm for Selective Harmonic Elimination in PV interfacing
Authorized licensed use limited to: Univ of Calif Santa Barbara. Downloaded on June 30,2021 at 20:46:08 UTC from IEEE Xplore. Restrictions apply.
Reduced Switch Multilevel Inverter,” International Journal of
Renewable Energy Research (IJRER), vol. 9, no. 1, pp. 32–43, Mar.
2019.
[11] K. P. Panda, S. S. Lee, and G. Panda, “Reduced Switch Cascaded
Multilevel Inverter with New Selective Harmonic Elimination Control
for Standalone Renewable Energy System,” IEEE Transactions on
Industry Applications, vol. 55, no. 6, pp. 7561–7574, 2019.
[12] K. P. Panda, P. R. Bana, and G. Panda, “A Reduced Device Count
Single DC Hybrid Switched-Capacitor Self-Balanced Inverter,” IEEE
Transactions on Circuits and Systems II: Express Briefs, pp. 1–1, 2020.
[13] K. P. Panda, P. R. Bana, and G. Panda, “A Single Source Switched-
Capacitor Based Multilevel Inverter for Photovoltaic Application,” in
2020 IEEE International Conference on Power Electronics, Smart Grid
and Renewable Energy (PESGRE2020), Kerala, India, 2020, pp. 1–6.
[14] C. Cecati, F. Ciancetta, and P. Siano, “A Multilevel Inverter for
Photovoltaic Systems With Fuzzy Logic Control,” IEEE Transactions
on Industrial Electronics, vol. 57, no. 12, pp. 4115–4125, 2010.
[15] A. Khodaparast, J. Adabi, and M. Rezanejad, “A step-up switched-
capacitor multilevel inverter based on 5-level T-type modules,” IET
Power Electronics, vol. 12, no. 3, pp. 483–491, Mar. 2019.
[16] K. P. Panda, P. R. Bana, and G. Panda, “FPA Optimized Selective
Harmonic Elimination in Symmetric–Asymmetric Reduced Switch
Cascaded Multilevel Inverter,” IEEE Transactions on Industry
Applications, vol. 56, no. 3, pp. 2862–2870, May 2020.
[17] F. B. Grigoletto, “Multilevel Common-Ground Transformerless
Inverter for Photovoltaic Applications,” IEEE Journal of Emerging and
Selected Topics in Power Electronics, pp. 1–1, 2020.
[18] S. K. Prince, K. P. Panda, and G. Panda, “Kalman filter variant
intelligent control for power quality improvement in photovoltaic active
power filter system,” International Transactions on Electrical Energy
Systems, vol. n/a, no. n/a, p. e12239.
[19] P. R. Bana, K. P. Panda, S. Padmanaban, L. Mihet-Popa, G. Panda, and
J. Wu, “Closed-Loop Control and Performance Evaluation of Reduced
Part Count Multilevel Inverter Interfacing Grid-Connected PV System,”
IEEE Access, vol. 8, pp. 75691–75701, 2020.
[20] K. P. Panda and G. Panda, “Application of swarm optimisation-based
modified algorithm for selective harmonic elimination in reduced
switch count multilevel inverter,” IET Power Electronics, vol. 11, no. 8,
pp. 1472–1482, Jul. 2018.