`Title: Basic Logic Gates and Combinational Circuits

Objective(s)

• To investigate the behavior of the AND, OR and NOT gate.

Apparatus

• Digital Design Experimenter

• 7408 IC
• 7432 IC
• 7404 IC
Pre-Lab Assignment
1. What is the difference between the CMOS and TTL logic families?
2. Find the data sheet for the IC’s to be used in this lab
Introduction
In general, logic circuits have one or more inputs and only one output. The circuits respond to
various input combinations, and a truth table shows the relationship between a circuits’ input
combination and its output.
The digital design experimenter is an instrument primarily used to construct and test digital
circuits. The basic digital design experiment consists of a breadboard, power supply, several
logic level switches and logic level indicators.
Procedure
Activity #1: The AND Logic Gate

1. Figure 6.1
1. Figure 6.1 shows the pin layout for the 7408 IC which contains four AND logic gates.
2. Connect Vcc to 5 volts and GND to ground of the power supply respectively.
3. Choose one of the AND gates. Connect the inputs A and B to separate logic switches
and the output Y, to a logic indicator.
4. Set inputs A and B to each set of logic levels listed in table 6.1 and record the output
level observed.

Logic Switches Output Logic Level

(0/1)
A B Y
0 0
0 1
1 0
1 1
Table 6.1

Activity #2: The OR Logic Gate

Figure 6.2
1. Figure 6.2 shows the pin layout for the 7432 IC which contains four OR logic gates.
2. Connect Vcc to 5 volts and GND to ground of the power supply respectively.
3. Choose one of the OR gates. Connect the inputs A and B to separate logic switches
and the output Y, to a logic indicator.
 4. Set inputs A and B to each set of logic levels listed in table 6.2 and record the output
level observed.

Logic Switches Output Logic Level

(0/1)
A B Y
0 0
0 1
1 0
1 1
Table 6.2
Activity #3: The NOT Logic Gate

Figure 6.3
1. Figure 6.3 shows the pin layout for the 7404 IC which contains six NOT logic gates.
2. Connect Vcc to 5 volts and GND to ground of the power supply respectively.
3. Connect a logic level switch to input A and a logic level indicator to output Y.
4. Set inputs A and B to each set of logic levels listed in table 6.3 and record the output
level observed.

Logic Output Logic

Switches Level (0/1)
A Y
0
1
Table 6.3
Activity #4: Combinational Logic Circuit

Figure 6.4
 1. Construct the circuit of figure 6.4 using the 7408 IC and 7432 IC (make sure to
connect Vcc and GND to both ICs).
2. Connect toggle switches to inputs A, B and C and connect the output Q to a logic
level indicator.
3. For each combination in table 4. Observe the output state and record the state in table
6.4.

Logic Level Inputs Output Level

A B C Y
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Table 6.4
Questions
1. The output of an AND gate is __________ whenever any input is LOW.
2. The output of an OR gate is LOW only when __________________.
3. The output of an inverter is always ___________ the input.
4. Write the Boolean exoression for the circuit of figure 6.4.