CHAPTER 1: Digital logic and Digital system

1.2 Overview and history of computer architecture

Overview computer organization and architecture
Computer organization and architecture is
 The study of the structure, behavior and design of computer.
 The interface between the hardware and the lowest level of software.
Why Study computer organization and architecture?
 Design better program, including system software such as compilers, OS, device
drivers, embedded system.
 Optimize program behavior,
 Evaluate computer system performance,
 Understand time, space and price tradeoffs.
Computer Architecture VS Computer Organization
the architecture of a computer system can be considered as a catalogue of tools or attributes that
are visible to the user such as instruction sets, number of bits used for data, addressing techniques,
etc. Whereas, Organization of a computer system defines the way system is structured so that all
those catalogued tools can be used. The significant components of Computer organization are
ALU, CPU, memory and memory organization.

Computer Architecture Computer Organization

Computer Architecture is concerned with the Computer Organization is concerned with the
way hardware components are connected structure and behavior of a computer system as seen
together to form a computer system. by the user.

It acts as the interface between hardware and It deals with the components of a connection in a
software. system.

Computer Architecture helps us to Computer Organization tells us how exactly all the
understand the functionalities of a system. units in the system are arranged and interconnected.
A programmer can view architecture in Whereas Organization expresses the realization of
terms of instructions, addressing modes and architecture.
registers.

While designing a computer system An organization is done on the basis of architecture.

architecture is considered first.

Computer Architecture deals with high-level Computer Organization deals with low-level design
design issues. issues.

Architecture involves Logic (Instruction Organization involves Physical Components (Circuit

sets, Addressing modes, Data types, Cache design, Adders, Signals, Peripherals)
optimization)

Classification of computer by its operating principle:

1. Analog computer  provide continuous information,
Data is not a number, it is a physical quantity: like pressure, speed,
voltage, temperature.
Ex: analog clock, car speedometer
Medical/electronic equipments, Radio/TV signal.
2. Digital computer >provides discrete information,
Data in the form of numbers, symbols.
Ex: calculator, automobile dashboard components, mini, micro,
mainframe, super computers.
3. Hybrid computer exhibit features of both analog and Digital.
Ex: cement plant, gas pumping station.
History of Computer Architecture:
First Generation (1945-1958) (ENIAC)
 Vacuum tubes based processing
 Assembly language programming
 Drum/magnetic core memory for storage
Two models of design:
(1) Harvard Architecture: (relay-based computer)
 Physically separate storage and signal pathways for instruction and data.
 Stored instruction on punched tape, data in relay latches.
(2) Von-Neumann Architecture: (stored-program computer)
 Single storage structure to hold both the set of instructions and the data
 Bottleneck is data transfer rate between CPU and memory is very low.
Modern CPU design incorporate aspects of both architectures: Harvard architecture is used as
the CPU accesses the cache – on chip cache memory is divided into an instruction cache and data
cache. Von-Neumann architecture is used for off chip memory access.
Second Generation: (1958-1964) (IBM 709)
 Transistors based processing
 First OS – handled one program at a time
 High-level languages
 Reduced the computational time from milliseconds to microseconds.
Third Generation: (1964-1974) (IBM 360)
 Integrated Circuits(IC) based processing
 Semi-conductor memory
 Time sharing, graphics, structured programming
 Cache memory
Fourth Generation: (1974 – present)
 VLSI (Very Large Scale ICs) based processing
 Single chip processor, and single board computer
 Personal computer
 Object Oriented Programming
 Artificial Intelligence
1.3 Fundamental building blocks (logic gates, flip-flops, counters, registers, PLA)
Logic Gates
o The logic gates are the main structural part of a digital system.
o Logic Gates are a block of hardware that produces signals of binary 1 or 0 when input logic
requirements are satisfied.
o Each gate has a distinct graphic symbol, and its operation can be described by means of
algebraic expressions.
o The seven basic logic gates include: AND, OR, XOR, NOT, NAND, NOR, and XNOR.
o The relationship between the input-output binary variables for each gate can be represented
in tabular form by a truth table.
o Each gat e has one or two binary input variables designated by A and B and one binary
output variable designated by x.

1. AND GATE:
The AND gate is an electronic circuit which gives a high output only if all its inputs are high. The
AND operation is represented by a dot (.) sign.
 2. OR GATE:
The OR gate is an electronic circuit which gives a high output if one or more of its inputs are high.
The operation performed by an OR gate is represented by a plus (+) sign.

3. NOT GATE:
The NOT gate is an electronic circuit which produces an inverted version of the input at its output.
It is also known as an Inverter.

4. NAND GATE:
The NOT-AND (NAND) gate which is equal to an AND gate followed by a NOT gate. The NAND
gate gives a high output if any of the inputs are low. The NAND gate is represented by a AND
gate with a small circle on the output. The small circle represents inversion.
 5. NOR GATE:
The NOT-OR (NOR) gate which is equal to an OR gate followed by a NOT gate. The NOR gate
gives a low output if any of the inputs are high. The NOR gate is represented by an OR gate with
a small circle on the output. The small circle represents inversion.

6. Exclusive-OR/ XOR GATE:

The 'Exclusive-OR' gate is a circuit which will give a high output if one of its inputs is high but
not both of them. The XOR operation is represented by an encircled plus sign.

7. EXCLUSIVE-NOR/Equivalence GATE:
The 'Exclusive-NOR' gate is a circuit that does the inverse operation to the XOR gate. It will give
a low output if one of its inputs is high but not both of them. The small circle represents inversion.
Boolean algebra
Boolean algebra can be considered as an algebra that deals with binary variables and logic
operations. Boolean algebraic variables are designated by letters such as A, B, x, and y. The basic
operations performed are AND, OR, and complement. A Boolean Algebra is an algebra (set,
operations, elements) consisting of a set B with >= 2 elements, together with three operations –
(AND, OR, NOT) – defined on the set.

Boolean Expression and Variables

Boolean expression is an expression that produces a Boolean value when evaluated, i.e. it produces
either a true value or a false value. Whereas Boolean variables are variables that store Boolean
numbers.

P + Q = R is a Boolean phrase in which P, Q, and R are Boolean variables that can only store two
values: 0 and 1. The 0 and 1 are the synonyms for false and True and are used in Boolean Algebra,
sometimes we also use “Yes” in place of True and “No” in place of False. Thus, we can say that
statements using Boolean variables and operating on Boolean operations are Boolean Expressions.

Truth Table
Table containing all the possible values of the logical variables and the combination of the variable
along with the given operation is called the truth table. The number of rows in the truth table
depends on the total Boolean variables used in that function. It is given by using the formula,
Number of Rows in Truth Table = 2n

where “n” is the number of Boolean variables used.

Truth Tables in Boolean Algebra

A truth table represents all the combinations of input values and outputs in a tabular manner. All
the possibilities of the input and output are shown in it and hence the name truth table. In logic
problems, truth tables are commonly used to represent various cases. T or 1 denotes ‘True’ & F or
0 denotes ‘False’ in the truth table. Example: Draw the truth table of the conditions A + B and A.B
where A and b are Boolean variables.
Solution: The required Truth Table is,

A B X = A + B Y = A.B

T T T T

T F T F

F T T F

F F F F

Rules of Boolean algebra:

Examples of Boolean algebra simplifications using logic gates

In this section, we will look at some of the examples of Boolean algebra simplification using Logic
gates.

1. F1 = xyz'
2. F2 = x + y'z

3. F3 = xy' + x'z

4. F4 = x'y'z + x'yz + xy'

The purpose of Boolean algebra – is to facilitate the analysis and design of digital circuits.

It provides a convenient tool to:

1. Express in algebraic form a truth table relationship between binary variables.

2. Express in algebraic form the input-output relationships of logic diagrams.
3. Find simpler circuits for the same function.
Standard Forms: Another way to express Boolean function is in standard form. In this form, the
terms that form the function may contain one, two, or any number of variables.
1. The sum of products,
2. The product of sums.
Sum of products form: is a Boolean expression containing AND terms, called product terms, of
one or more variables each. The sum denotes the ORing of these terms.
Ex: F = y’ + xy + x’yz’
Product of sum form: is a Boolean expression containing OR terms, called sum terms. Each term
may have any number of variables. The product denotes the ANDing of these terms.
Ex: F = x(y’ +z)(x’ + y + z’)

Map Simplification
The Map method involves a simple, straightforward procedure for simplifying Boolean
expressions. Map simplification may be regarded as a pictorial arrangement of the truth table
which allows an easy interpretation for choosing the minimum number of terms needed to express
the function algebraically. The map method is also known as Karnaugh map or K-map.
Each combination of the variables in a truth table is called a mid-term.
Note: When expressed in a truth table a function of n variables will have 2^n min-terms,
equivalent to the 2^n binary numbers obtained from n bits.

There are four min-terms in a two-variable map. Therefore, the map consists of four squares, one
for each min-term. The 0's and 1's marked for each row, and each column designates the values of
variable x and y, respectively. Tutorial

Two-variable map:
Representation of functions in the two-variable map:

Three variable map

There are eight min-terms in a three-variable map. Therefore, the map consists of eight squares.

Three variable map:

 The map was drawn in part (b) in the above image is marked with numbers in each row
and each column to show the relationship between the squares and the three variables.
 Any two adjacent squares in the map differ by only one variable, which is primed in one
square and unprimed in the other. For example, m5 and m7 lie in the two adjacent squares.
Variable y is primed in m5 and unprimed in m7, whereas the other two variables are the
same in both the squares.
 From the postulates of Boolean algebra, it follows that the sum of two min-terms in
adjacent squares can be simplified to a single AND term consisting of only two literals.
For example, consider the sum of two adjacent squares say m5 and m7: m5+m7 =
xy'z+xyz= xz(y'+y)= xz.
 Four variables K-map:

 The number of squares in a map of n variables is 2n.

 The minterm numbers are assigned in an orderly arrangement such that adjacent squares
represent minterms that differ by only one variable.
 Each variable under bracket contains half of the squares in the map where that variable
appears unprimed-1 (uncomplemented). The variable appears with a prime-0
(complemented) in the remaining half of the squares.
Adjacent squares:Minterms of adjacent squares in the map are identical except for one variable,
which appears complemented (O) in one square and uncomplemented (1) in the adjacent square.

According to this definition of adjacency, the squares at the extreme ends of the same horizontal
row are also to considered adjacent. The same applies to the top and bottom squares of a column.
As a result, the four corner squares of a map must also be considered to be adjacent.

K-map Simplification procedure:

1. A Boolean function represented by a truth table is plotted into the map by inserting 1’s in
those squares where the function is 1.
2. The squares containing 1’s are combined in groups of adjacent squares. These groups must
contain a number of squares that is, an integral power of 2.(Give preference to largest
possible group)
3. Groups of combined adjacent squares may share one or more squares with one or more
groups.
4. Each group of squares represents an algebraic form, and the OR of those terms gives the
simplified algebraic expression for the given function.
Example (1): Simplify the Boolean function F(x, y, z) = ∑(3, 4, 6, 7)

simplified function F = yz + xz’

Note:

 Two adjacent squares are combined in the third column. This column belongs to both Y
and Z , so produces the term YZ.
 The remaining two squares with 1’s in the two corners of the second row one adjacent and
belong to row X and the two column’s of Z’, so they produce the term XZ’.
Example (2): Simplify the following Boolean function: F (x, y, z) = ∑(0,2,4,5,6)

simplified function F = z’ + xy’

Note:

 The four squares in the first and fourth columns are adjacent and represent the term Z’.
 The remaining square marked with a 1 belongs to minterm 5 and can be combined with the
square of minterm 4 to produce the term XY’.
Example (3): F(x,y,z) = Σ (2,3,4,5)

First, 1 is marked in each min-term that represents the function. Hence, 010, 011, 100, 101 are
marked with 1's. Subsequently, we have to find possible adjacent squares. These are indicated in
the map by two rectangles, each enclosing two 1's.

Example (4): Simplify F(w, x, y, z) = ∑(0,1,2,4,5,6,8,9,12,13,14)

simplified function F = y’ + w’z’ + xz’

Note:

 The function contain 1’s in the first two columns, when taken as a group, give the term y’.
 The two 1’s on the top first column are combined with the two 1’s on the top last column,
to give the term w’z’.
 The remaining 1 in the square of minterm 14 is combined with minterm 6 to give the term
xz’.
Don’t Care conditions: The 1’s and 0’s in the map represent the minterms that make the function
equal to 1 or 0. These are occasions when it does not matter if the function produces 0 or 1 for a
given minterm.

Since the function may be either 0 or 1, we say that we don’t care what the function output is to
be for this minterm. Minterms that may produce either 0 or 1 for the function are said to be don’t
care conditions and are marked with an X in the map.

These don’t care conditions can be used to provide further simplification of the algebraic
expression.

When choosing adjacent squares for the function in the map, the X’s may be assumed to be either
0 or 1, whichever gives the simplest expression. In addition, an X need not be used at all if it does
not contribute to be simplification of the function.

Example: Simplify: F(w, x, y ,z) = ∑(1, 3, 7, 11, 15)

d(w, x, y, z) = ∑(0, 2, 5)

The 1’s and x’s are combined in any convenient manner so as to enclose the maximum number of
adjacent squares.

Note that don’t care minterm 5 was not included in the first case (a) and minterm 0 was not included
in the second case (b), because it does not contribute to the simplification of the expression.
Combinational circuit:
A combinational circuit consists of logic gates whose outputs, at any time, are determined by
combining the values of the inputs. It means that output depends only on its current inputs.
Features of Combinational Circuit

 In this output depends only upon present input.

 Its Speed is fast.
 Easy designed.
 There is no feedback between input and output.
 It is time independent.
 Elementary building blocks are Logic gates.
 Used for both arithmetic and Boolean operations.
 Combinational circuits don’t have the capability to store any state.

Design procedure of a Combinational Circuit

The design procedure of a combinational circuit involves the following steps:
1. The problem is stated.
2. The total number of available input variables and required output variables is determined.
3. The input and output variables are allocated with letter symbols.
4. The exact truth table that defines the required relationships between inputs and outputs is
derived.
5. The simplified Boolean function is obtained from each output.
6. The logic diagram is drawn.
 Some useful combinational circuits are:
1. Multiplexer(MUX): A MUX is a digital switch that has multiple inputs (sources) and a single
output (destination). The select lines determine which input is connected to the output.

MUX Types:
 2-to-1 (1 select line)
 4-to-1 (2 select lines)
 8-to-1 (3 select lines)
 16-to-1 (4 select lines)
2. Demultiplexer(DEMUX): A DEMUX is a digital switch with a single input (source) and a
multiple outputs (destinations). The select lines determine which output the input is connected
to.

DEMUX Types
 1-to-2 (1 select line)
 1-to-4 (2 select lines)
 1-to-8 (3 select lines)
 1-to-16 (4 select lines)
 3. Arithmetic Logic Unit circuits:
a. Adder
b. Subtractor
Adder
The combinational circuit that performs the addition of two bits is called a half adder and the one
that performs the addition of three bits (two significant bits and a previous carry) is a full adder.
Half- Adder
A Half-adder circuit needs two binary inputs and two binary outputs. The input variable shows the
augend and addend bits whereas the output variable produces the sum and carry. We can
understand the function of a half-adder by formulating a truth table. The truth table for a half-adder
is:

 'x' and 'y' are the two inputs, and S (Sum) and C (Carry) are the two outputs.
 The Carry output is '0' unless both the inputs are 1.
 'S' represents the least significant bit of the sum.
The simplified expressions is:
S = x'y+xy', C = xy
The logic diagram for a half-adder circuit can be represented as:
Full - Adder
This circuit needs three binary inputs and two binary outputs. The truth table for a full-adder is:

 Two of the input variable 'x' and 'y', represent the two significant bits to be added.
 The third input variable 'z', represents the carry from the previous lower significant position.
 The outputs are designated by the symbol 'S' for sum and 'C' for carry.
 The eight rows under the input variables designate all possible combinations of 0's, and 1's that
these variables may have.
 The input-output logical relationship of the full-adder circuit may be expressed in two Boolean
functions, one for each output variable.
 Each output Boolean function can be simplified by using a unique map method.
Maps for a full-adder:

The logic diagram for a full-adder circuit can be represented as:

Half Subtractor
The half subtractor is also a building block for subtracting two binary numbers. It has two inputs
and two outputs. This circuit is used to subtract two single bit binary numbers A and B. The 'diff'
and 'borrow' are two output states of the half subtractor. Truth Table

The SOP form of the Diff and Borrow is as follows:

Diff=A'B+AB'
Borrow = A'B
 'A' and 'B' are the input variables whose values are going to be subtracted.
 The 'Diff' and 'Borrow' are the variables whose values define the subtraction result, i.e.,
difference and borrow.
 The first two rows and the last row, the difference is 1, but the 'Borrow' variable is 0.
 The third row is different from the remaining one. When we subtract the bit 1 from the bit
0, the borrow bit is produced.

Full Subtractor

The Half Subtractor is used to subtract only two numbers. To overcome this problem, a full
subtractor was designed. The full subtractor is used to subtract three 1-bit numbers A, B, and C,
which are minuend, subtrahend, and borrow, respectively. The full subtractor has three input states
and two output states i.e., diff and borrow. Truth Table
In the above table,
o 'A' and' B' are the input variables. These variables represent the two significant bits that are
going to be subtracted.
o 'Borrowin' is the third input which represents borrow.
o The 'Diff' and 'Borrow' are the output variables that define the output values.
o The eight rows under the input variable designate all possible combinations of 0 and 1 that
can occur in these variables.
Maps for a full- Subtractor:

Diff=xy' z'+x' y' z+xyz+x'yz' Borrow=x' z+x' y+yz

The full subtractor logic circuit can be constructed using the 'AND', 'XOR', and NOT gate with
an OR gate.
4. Decoder: A decoder is a logic circuit that accepts a set of inputs that represents a binary
number and activates only the output that corresponds to the input number. In other words,
a decoder circuit looks at its inputs, determines which binary number is present there, and
activates the one output that corresponds to that number; all other outputs remain inactive

There are 2N possible input combinations, from A0 to AN1. For each of these input
combinations only one of the M outputs will be active HIGH (1), all the other outputs are
LOW (0).
5. Encoder: An encoder is a combinational logic circuit that essentially performs a “reverse”
of decoder functions. An encoder accepts an active level on one of its inputs, representing
digit, such as a decimal or octal digits, and converts it to a coded output such as BCD or
binary. Encoders can also be devised to encode various symbols and alphabetic characters.
The process of converting from familiar symbols or numbers to a coded format is called
encoding.
Advantages of Combinational Circuit

 Simplicity: Combinational circuits are very easy to implement and absence of memory or
feedback element has made it more straightforward which is reducing complexity in digital
systems and providing faster prototype building mechanism.
 Real-time Operation: Combinational circuits don’t face any delay which is very much
essential for quick-response applications like data transmission and signal processing.
 Deterministic Behavior: Combinational circuits generate output based on present input
only which ensures predictable and repeatable results which is essential for applications in
which consistency and reliability is required.

Disadvantages of Combinational Circuit

 Limited Functionality: As it provides output only based on present input and there is no
way to store previous data so we can’t use this circuit to any memory-based applications
or where previous data is recalled for doing operations.
 Lack of Flexibility: Once the design of logic gates is done then for changing a small design
required the entire redesigning of the circuits which is monotonous and time-consuming.
 Increased Complexity for Large Designs: For large designs the number of logic gates will
increase gradually which means the management of input and output ports will become
very complex. This may lead to higher production costs and increased design errors.
Sequential Circuit
Sequential circuits consist of combinational logic as well as memory elements (used to store
certain circuit states). Outputs depend on BOTH current input values and previous input values
(kept in the storage elements).
Design Procedure of Sequential Logic Circuits

1. This procedure involves the following steps

2. First, derive the state diagram
3. Take as the state table or an equivalence representation, such as a state diagram.
4. The number of states may be reduced by the state reduction technique
5. Verify the number of flip-flops needed
6. Choose the type of flip-flops to be used
7. Derive excitation equations
8. Using the map or some other simplification method, derive the output function and the flip-
flop input functions.
9. Draw a logic diagram or a list of Boolean functions from which a logic diagram can be
obtained.

Features of Sequential Circuit

 In this output depends upon present as well as past input.
 Speed is slow.
 It is designed tough as compared to combinational circuits.
 There exists a feedback path between input and output.
 This is time dependent.
 Mainly used for storing data.
 Sequential circuits have capability to store any state or to retain earlier state.
 As sequential circuits are clock dependent they need triggering.
 These circuits have memory element.
 It is not easy to use and handle.
Some useful combinational circuits are:
1. Flip-Flops:
 The most common types of flip flops are:
1. SR Flip-Flop
2. D Flip-Flop
3. JK Flip-Flop
4. T Flip-Flop
2. Counters: A counter is a sequential circuit consisting of a set of flip-flops which go through a
sequence of states on the application of clock pulses.
A counter that follows the binary number sequence is called a binary counter
n-bit binary counter: n flip-flops, count in binary from 0 to 2ⁿ-1
Counters are available in two types:
a. Synchronous Counters
b. Ripple Counters
3. Registers: A register is an extension of a flip-flop that can store multiple bits.
Registers are commonly used as temporary storage in a processor. They are faster and more
convenient than main memory.
Ex: 4-bit register
Shift register
Physical considerations in Integrated Circuits:

Fan In: The fan-in defined as the maximum number of inputs that a logic gate can accept. If
number of input exceeds, the output will be undefined or incorrect.

Fan Out: The fan-out is defined as the maximum number of inputs (load) that can be connected
to the output of a gate without degrading the normal operation.

Propagation delay: the propagation delay, or gate delay, is the length of time which starts when
the input to a logic gate becomes stable and valid to change, to the time that the output of that logic
gate is stable and valid to change.

Register transfer notation [R1]  [R2] + [R3], Where R1, R2, R3 are registers
Advantages of Sequential Circuits:

 Memory: Sequential circuits have the ability to store binary values, which makes them ideal
for applications that require memory elements, such as timers and counters.
 Timing: Sequential circuits are commonly used to implement timing and synchronization
in digital systems, making them essential for real-time control applications.
 State machine implementation: Sequential circuits can be used to implement state
machines, which are useful for controlling complex digital systems and ensuring that they
operate as intended.
 Error detection: Sequential circuits can be designed to detect errors in digital systems and
respond accordingly, improving the reliability of digital systems.
Disadvantages of Sequential Circuits:

 Complexity: Sequential circuits are typically more complex than combinational circuits and
require more components to implement.
 Timing constraints: The design of sequential circuits can be challenging due to the need to
ensure that the timing of the inputs and outputs is correct.
 Testing and debugging: Testing and debugging sequential circuits can be more difficult
compared to combinational circuits due to their complex structure and state-dependent
outputs.