Electrical Engineering Department

Benha Faculty of Engineering

Benha University

Microprocessors and
Microcontrollers E1328
#Lecture_3
Dr. Mahmoud Adel Hassan,
Ph.D. Degree in Engineering Sciences in
Electrical Engineering,
Email: m_adel25@bhit.bu.edu.eg
# Second Semester 2022/2023
Outline
➢ MCS-51TM Family

➢ The 8051 hardware architecture

➢ Timing and The Machine Cycle

➢ I/O Port Structure

➢ Simple Hardware and Software Example

MCS-51TM Family
The MCS-51TM is a family of microcontroller ICs developed, manufactured, and marketed by
Intel Corporation.

The generic MCS-51TM IC is the 8051, the first device in the family offered commercially. Its
features are:
• 4K bytes ROM (factory mask programmed)
• 128 bytes RAM
• Four 8-bit I/O (Input/Output) ports
• Two 16-bit timers
• Serial interface
• 64K external code memory space
• 64K external data memory space
• Boolean processor (operates on single bits)
• 210 bit-addressable locations
• 4 μs multiply/divide
The 8051 hardware architecture
Port 0 is a dual-purpose port on pins 32-39 of the 8051 IC. In minimum-component designs, it
is used as a general purpose I/O port. For larger designs with external memory, it becomes a
multiplexed address and data bus.
Port 1 is a dedicated I/O port on pins 1-8. The pins, designated as P1.0, P1.1, P1.2, etc., are
available for interfacing to external devices as required. No alternate functions are as signed for
Port 1 pins; thus, they are used solely for interfacing to external devices.

Port 2 (pins 21-28) is a dual-purpose port serving as general purpose I/O, or as the highbyte of
the address bus for designs with external code memory or more than 256 bytes of external data
memory.
The 8051 hardware architecture
Port 3 is a dual-purpose port on pins 10-17. As well as general-purpose i/o, these pins are
multifunctional, with each having an alternate purpose related to special features of the 8051.
The 8051 hardware architecture
PSEN (Program Store Enable)

The 8051 has four dedicated bus control signals. Program Store Enable ( PSEN ) is an output signal on
pin 29. It is a control signal that enables external program (code) memory. It usually connects to an
EPROM's (Erasable Programmable Read-Only Memory) Output Enable (OE ) pin to permit reading of
program bytes.

The ( PSEN ) signal pulses low during the fetch stage of an instruction, which is stored in external
program memory. The binary codes of a program (opcodes) are read from EPROM, travel across the data
bus, and are latched into the 8051's instruction register for decoding. When executing a program from
internal ROM (8051/8052), ( PSEN ) remains in the inactive (high) state.
The 8051 hardware architecture
ALE (Address Latch Enable)
The 8051 similarly uses ALE for demultiplexing the address and data bus. When Port 0 is used in its
alternate mode—as the data bus and the low-byte of the address bus. ALE is the signal that latches the
address into an external register during the first half of a memory cycle. This done, the Port 0 lines are
then available for data input or output during the second half of the memory cycle, when the data transfer
takes place.
EA (External Access)
The EA input signal on pin 31 is generally tied high (+5 V) or low (ground). If high, the 8051 executes
programs from internal ROM when executing in the lower 4K of memory. If low, programs execute from
external memory only (and PSEN pulses low accordingly).
RST (Reset)
The RST input on pin 9 is the master reset for the 8051. When this signal is
brought high for at least two machine cycles, the 8051 internal registers are
loaded with appropriate values for an orderly system start-up. For normal
operation, RST is low.
The 8051 hardware architecture
On-Chip Oscillator Inputs

The 8051 features an on-chip oscillator that is typically driven by a

crystal connected to pins 18 and 19.

The nominal crystal frequency is 12 MHz for

most ICs in the MCS-51TM family.

Complementary Metal Oxide Semiconductor (CMOS)

No Connection (NC)
Power Connections

The 8051 operates from a single +5 volt supply. The Vcc connection is on pin 40, and the Vss
(ground) connection is on pin 20.
Timing and The Machine Cycle
A machine cycle consists of the steps that a computer’s processor executes whenever it receives
a machine language instruction. It is the most basic CPU operation.
• A machine cycle consists of a fixed number of clock cycles. This is different for different kind of
CPU.

• One complete oscillation of the clock source is called a pulse. Two pulses forms a state and six states
forms one machine cycle.

• Thus, 8051 family needs 12 clock cycles for one machine cycle. A microcontroller may require 1 or
machine cycles to complete an instruction. More complex instructions require more number of
machine cycles
I/O Port Structure
• Using P1.X
as input pin

When P1.X is used as input, a ‘1’ needs to be written to the latch. This will turn OFF M1. Both
the Pin P1.X and input to the Pin buffer are pulled HIGH, by the Load. An external circuit can
overcome the high-impedance pull-up and drive the pin low for Input to be 1 or leave the input
high as 1.
• Using P1.X as
output pin-
case1

When P1.X is used as output pin, the data 1/0 is to be written to the latch. Accordingly, transistor
M1 will be ON/OFF and the Pin will be connected to VCC via pull-up if M1 is OFF or will be
grounded if M1 is ON. The Tri-state buffer will not be enabled.
• Using P1.X as output pin-case2
Simple Hardware and Software Example
Using Microcontroller 8051 design a
control circuit to read a signal of switch
C1
U1
input and display its status on display 19
XTAL1 P0.0/AD0
39
22p 38
P0.1/AD1
X1 37
LED. C2 CRYSTAL 18
XTAL2
P0.2/AD2
P0.3/AD3
P0.4/AD4
36
35
34
P0.5/AD5
33
P0.6/AD6
22p 9 32
RST P0.7/AD7

• First; the hardware connections are: Vcc

P2.0/A8
P2.1/A9
21
22
23
P2.2/A10
29 24
PSEN P2.3/A11
30 25
ALE P2.4/A12
31 26
EA P2.5/A13
27
P2.6/A14
28
P2.7/A15
U1(P1.0)
C3 1
P1.0 P3.0/RXD
10
1uF 2 11
P1.1 P3.1/TXD
3 12
P1.2 P3.2/INT0
4 13
P1.3 P3.3/INT1
5 14
P1.4 P3.4/T0
6 15
P1.5 P3.5/T1
7 16
P1.6 P3.6/WR
R1 8
P1.7 P3.7/RD
17
8k2
D1 AT89C51
DIODE-LED

G1
Simple Hardware and Software Example
• Second; the software program
org 00h
Draw flow chart
Start
SETB P3.0

Read the status of mov A,P3

SW
ANL A,#01h
If SW is
No pressed
cpl A

yes mov P1,A

Output = 1
end

End
C1
U1
19 39
XTAL1 P0.0/AD0
22p 38
P0.1/AD1
X1 P0.2/AD2
37
CRYSTAL 18 36
C2 XTAL2 P0.3/AD3
35
P0.4/AD4
34
P0.5/AD5
33
P0.6/AD6
22p 9 32
RST P0.7/AD7
21
P2.0/A8
Vcc

29
P2.1/A9
P2.2/A10
22
23
24
Push Button is pressed
PSEN P2.3/A11
30 25
ALE P2.4/A12
31 26
EA P2.5/A13
27
P2.6/A14
28
P2.7/A15
U1(P1.0)
C3 V=0.0199005
1
P1.0 P3.0/RXD
10
1uF 2
P1.1 P3.1/TXD
11 C1
3
P1.2 P3.2/INT0
12 U1
4 13
P1.3 P3.3/INT1 19 39
5 14 XTAL1 P0.0/AD0
P1.4 P3.4/T0 22p 38
6 15 P0.1/AD1
7
P1.5 P3.5/T1
16 X1 P0.2/AD2
37
P1.6 P3.6/WR CRYSTAL 18 36
R1 8
P1.7 P3.7/RD
17 C2 XTAL2 P0.3/AD3
35
8k2 P0.4/AD4
34
D1 AT89C51 P0.5/AD5
33
DIODE-LED P0.6/AD6
22p 9 32
RST P0.7/AD7
21
P2.0/A8
G1
Vcc 22
P2.1/A9
23
P2.2/A10
29 24
PSEN P2.3/A11
30 25
ALE P2.4/A12
31 26
EA P2.5/A13
27
P2.6/A14
28
P2.7/A15
U1(P1.0)
C3 V=2.573621 10
Push Button doesn`t pressed 1uF 2
3
P1.0
P1.1
P1.2
P3.0/RXD
P3.1/TXD
P3.2/INT0
11
12
4 13
P1.3 P3.3/INT1
5 14
P1.4 P3.4/T0
6 15
P1.5 P3.5/T1
7 16
P1.6 P3.6/WR
R1 8
P1.7 P3.7/RD
17
8k2
D1 AT89C51
DIODE-LED

G1