Experiment No.

VOLTAGE FOLLOWER
Aim: To design and setup a voltage follower circuit with OPAMP IC 741C and observe the
waveforms.
Equipments/Components:

Sl. Name and Specification Quantity required

No

1 Dual power supply +/- 15V 1

2 Function generator (0- 1

1MHz)

3 Oscilloscope 1

4 Bread board 1

5 IC 741C 1

6 Probes and connecting wires As required.

Principle:
A voltage follower (also called a unity-gain amplifier or buffer amplifier or isolation
amplifier) is an op-amp circuit which has a voltage gain of 1. This means that the op amp
does not provide any amplification to the signal. It is called a voltage follower because the
output voltage follows the input voltage; means the output voltage is same as the input
voltage. Though the gain is unity, this circuit offers high input impedance and low output
impedance and hence it is used as buffer , which is used to isolate a low impedance load
from a voltage source to eliminate any loading that might occur.

Circuit Diagram
741 pin diagram
Design:
The voltage follower is a non-
inverting amplifier with unity gain.
A = 1+ R f / Ri = 1
Or R f / Ri = 0
Therefore R f = 0

Procedure:

1. Check the components.

2. Setup the circuit on the breadboard and check the connections.
3. Switch on the power supply.
4. Give 2Vpp/ 1 KHz sine wave as input.
5. Observe input and output on the two channels of the oscilloscope simultaneously.
6. Note down and draw the input and output waveforms on the graph.
7. Verify that the input and output waveforms are same in magnitude and phase.

Result:
Observation:
V=
i

Vo =
Voltage gain = Vo / Vi
Phase difference between input and output Waveforms =
Graph:

INVERTING AMPLIFIER
Aim: To design and setup an inverting amplifier circuit with OP AMP 741C for a gain of
10, plot the waveforms, observe the phase reversal, measure the gain.
Equipments/Components:
 Sl .N Name and Specification Quantity required
o

1 Dual power supply +/- 15V 1

2 Function generator (0 - 1
1MHz)

3 Oscilloscope 1

4 Bread board 1

5 IC 741C 1

6 Resistors 2

7 Probes and connecting wires As required.

Principle:

It is a closed loop mode application of opamp and employs negative feedback. The R f

and R are the feedback and input resistance of the circuit respectively. The input terminals
i

of the opamp draws no current because of the large differential input impedance. The
potential difference across the input terminals of an opamp is zero because of the large open
loop gain. Due to these two conditions, the inverting terminal is at virtual ground potential.
So the current flowing through Ri and Rf are the same.

I=I
i f

That is Vin/R = - Vo /R
i f

Therefore V /V = A = - R / R
o in v f i,

Here the –Ve sign indicates that the output will be an amplified wave with 180 0

phase shift (inverted output). By varying the R or R the gain of the amplifier can be varied
f i,

to any desired value.

Procedure

1. Check the components.

2. Setup the circuit on the breadboard and check the connections.
3. Switch on the power supply.
4. Give 1 Vpp / 1 KHz sine wave as input.
5. Observe input and output on the two channels of the oscilloscope simultaneously. 6. Note
down and draw the input and output waveforms on the graph. 7. Verify the input and output
waveforms are out of phase.
8. Verify the obtained gain is same as designed value of gain.

(Note: The experiment may be repeated for different values of gain)

Circuit Diagram:
Design:
Gain of an inverting amplifier Av = V /V = - R / R
o in f i

The required gain = 10,

That is Av = - R / R = 10
f i

Let R = 1KΩ, Then R = 10KΩ

i f

Result:

Observations:
Vin = 1 Vpp
Vo=?
Gain, Av = Vo/Vin =?
Observed phase difference between the input and the output on the CRO =?

Graph:

NON- INVERTING AMPLIFIER

Aim: To design and setup a non-inverting amplifier circuit with OPAMP IC 741C for a
gain of 11, plot the waveform, observe the phase reversal, measure the gain.
Equipments/Components:

Sl .N Name and Specification Quantity required

 o

1 Dual power supply +/- 15V 1

2 Function generator (0 - 1
1MHz )

3 Oscilloscope 1

4 Bread board 1

5 IC 741C 1

6 Resistors 2

7 Probes and connecting wires As required.

Principle:

It is a linear closed loop mode application of op-amp and employs negative feedback. The
R and R are the feedback and input resistance of the circuit respectively. There will be no
f i

phase difference between the output and input. Hence it is called non-inverting amplifier.

Av = V / V = 1+ R / R
o in f i,

Here the +Ve sign indicates that the output will be an amplified wave in phase with
the input. By varying the R or R the gain of the amplifier can be varied to any desired value.
f i,

Procedure

1. Check the components.

2. Setup the circuit on the breadboard and check the connections.
3. Switch on the power supply.
4. Give 1 Vpp / 1 KHz sine wave as input.
5. Observe input and output on the two channels of the CRO simultaneously. 6. Note down
and draw the input and output waveforms on the graph.
7. Verify the input and output waveforms are in phase.
8. Verify the obtained gain is same as designed value. \

(Note: The experiment may be repeated for different values of gain)

Circuit Diagram
Design:
Gain of an inverting amplifier Av=V /V = 1+R / R
o in f i,

Let the required gain be 11,

Therefore Av= 1+R / R = 11
f i

R / R = 10
f i

Take R = 1KΩ, Then R = 10KΩ

i f

Result:
Observations:
Vin = 1Vpp
Vo = ?
Gain Av = Vo/Vin =?
Observed phase difference between the input and the output on the CRO =?
Graph:

EXPERIMENT 2

DESIGN WIEN BRIDGE OSCILLATOR USING OP-AMP 741 AND

determine the frequency of OSCILLATION

AIM:
 To design the Wien Bridge oscillator using OP-AMP IC for producing a frequency of
fo = 1000Hz.

REQUIREMENTS:

S.No Equipment and Range Quantity

Components
1. Resistor 3.1,30,60kΩ 2,1,1
2. Capacitor 0.05µF 1
3. Op-amp IC741 2
4. Dual RPS (0-30)v 1
5. AFO - 1
6. CRO - 1
7. Bread board - 1
8. Connecting wires - few

THEORY:

The Wien bridge oscillator is the most commonly used audio frequency oscillator
because of its simplicity and stability. Figure shows the Wien bridge oscillator in which
Wien bridge circuit is connected between the amplifier input terminals and the output
terminal. The bridge has a series RC network in one arm and a parallel RC network in the
adjoining arm. In the remaining two arms of the bridge, resistors R1 and Rf are connected.
The phase angle criterion for oscillation is that the total phase shift around the circuit must
be 0o. This condition occurs only when the bridge is balanced. The frequency of oscillation
fo is exactly the resonant frequency of the balanced Wien bridge and is given by, fo = 1/(2π
R C ).

DESIGN:
fo=1kHz
fo = 1/(2π R C ) and Rf = 2R1
Choose C=0.05μ F
So R= 1/ (2π 1000×0.05μ F) =3.1KΩ
Take R1=10R=30 KΩ and Rf=2R1= 60 KΩ

CIRCUIT DIAGRAM:
TABULATION:

Sweep – X-Axis Magnitude – Y-Axis

Time
Time/Div. No. of Frequency Magnitude/ No. of Amplitude
Period T
(s) Divisions f=1/T Division (V) Divisions (V)
(s)

MODEL GRAPH:

PROCEDURE:
1. Construct the circuit with the values obtained in the design.
2. Observe the output wave form on an Oscilloscope. Adjust Rf to obtain a sine wave
output.
3. Measure the frequency of oscillator and voltage amplitude.

INFERENCE:
Thus the Wein bridge oscillator is designed to produce the required frequency.

OBSERVATION:

Frequency of oscillation fo

i.Theoretical = ii. Practical =

EXPERIMENT 3
Design Square wave generator using IC 741 and calculate the duty cycle of the generated
waveform.
Equipments/Components:

Sl .N Name and Specification Quantity required

o

1 Dual power supply +/- 15V 1

2 Function generator (0- 1

1MHz)

3 Oscilloscope 1

4 Bread board 1

5 IC 741C 1

6 Probes and connecting wires As required.

Principle:

Waveform generator using IC741 is a circuit which generates Sine wave, Square wave and
Triangular wave. This circuit is a combination of Wien Bridge oscillator, Zero crossing
detector (Comparator with zero reference voltage) and Integrator. The Wien Bridge
oscillator generates Sine wave which is fed to the input of Zero crossing detector. This
detector gives the square wave output which is connected to the input of the Integrator
which in turn produces the Triangular wave output.
The frequency of oscillations of the Square wave is given by
fo = 1/2πRC

It is the open loop/ saturation mode operation of op-amp. Here the signal is given the non-
inverting terminal. So the output signal is in phase with the input signal. Such a circuit is
called non-inverting zero crossing detector. In open loop configuration, the gain of the
opamp is very high, so when the input voltage is above zero voltage, output of the circuit
goes to + Vsat which is approximately +13V. Similarly when the input voltage is below
zero voltage, the output goes to - Vsat which is approximately -13V .

CIRCUIT DIAGRAM
PROCEDURE
1. Switch OFF the power supply.
2. Connect the components/equipment as shown in the circuit diagram.
3. Switch ON the power supply.
4. Connect the input to the channel-1 of CRO and output to the channel-2 of CRO.
5. Observe the square wave output at channel-2 and note down the amplitude and time period, T of
the wave form.
6. Verify that the frequency of oscillation of both the input and the output waves is same. Also verify
that both the input and the output waves are in same phase.
7. Plot the output waveform in accordance with the input waveform.

CALCULATIONS:
THEORETICAL Frequency of Oscillation
fo =1/2πRC =
PRACTICAL Frequency of Oscillation
fo = 1/T =

EXPECTED WAVEFORMS:

EXPERIMENT 4

ASTABLE MULTIVIBRATOR USING OP AMP

Aim: Design an Astable Multivibrator using IC- -555 Timer and calculate the duty cycle and pulse
width of the generated waveform.

Equipments/Components:

Sl. No Name and Specification Quantity required

1 Dual power supply +/- 15V 1

2 Function generator (0- 1MHz) 1

3 Oscilloscope 1

4 Bread board 1

5 IC 741C 1

6 Resistor 5

7 Capacitor 0.1µF 1

8 Diode 1N4001 2

9 Probes and connecting wires As required.

Principle:
In this circuit, the opamp is operated in saturation mode and the output swings
between +Vsat and –Vsat giving square wave output. This circuit is also called free running
oscillator or square wave generator . A positive feedback with feedback factor β = R / 1

(R +R ) is provided to the non-inverting terminal. When Vo= +Vsat, the capacitor C starts to
1 2

charge to + Vsat through R. when the capacitor voltage crosses +βVsat, output switches
from +Vsat to –Vsat. Now the voltage appearing at the non-inverting terminal is –βVsat and
capacitor discharges through R towards -Vsat. When the capacitor voltage crosses –βVsat,
the output switches from –Vsat to + Vsat and this process continues to generate square
wave output with time period T=T + T = 2RC ln[(1+β)/(1-β)]. In asymmetrical astable
on off

multivibrators, the charging and discharging time of capacitor is made unequal to get
asymmetrical square wave with different T and T .on off

Procedure:

1. Check the components.

2. Setup the symmetric astable multivibrator circuit on the breadboard and check the
connections.
3. Switch on the power supply.
4. Observe output and capacitor voltage on two channels of the oscilloscope
simultaneously.
5. Draw the waveforms on the graph.
6. Measure the frequency of oscillation and duty cycle .
7. Repeat the procedures for asymmetric astable multivibrator.

(Note: The experiment may be repeated for different values of frequency and duty cycle)

a) SYMMETRICAL ASTABLE MULTIVIBRATOR

Circuit Diagram:

N
ote: Use 10KΩ pot instead of R = 4.7KΩ resistor and vary it for accurate time period .

Design:
Given f = 1 KHz
So T = 1/f = 1ms
And β = R / (R +R )
1 1 2

Let R = 10KΩ , and R =10KΩ

1 2

Then β = 0.5
Therefore T= 2.2RC =1ms
Let C = 0.1µF
Then R = 4.7KΩ

b) ASYMMETRCAL ASTABLE MULTIVIBRATOR

Circuit Diagram: Note:

Use two 10KΩ potentiometers instead of R and R resistor and vary it for accurate time period.
f1 f2

Design:
Given f = 1 KHz
So T = T + T = 1/f = 1ms
on off

Also Duty cycle = T /(T +T ) = 0.66 or 66% Solving above two equations, T = 0.66ms
on on off on

T = 0.33ms
off

For β=0.5,
T = 1.1R C = 0.66ms
on f1

Let C = 0.1µF
Then R = 6.2KΩ = 5.6KΩ (Std)
f1

Similarly T = 1.1R C = 0.33ms

off f2

Then R = 3KΩ = 3.3 KΩ (Std)

f2

Observation:
a) Symmetrical astable multivibrators
V (p-p)= ?
o

f=?
Duty cycle = ?

b) Asymmetrical astable multivibrators

V (p-p)= ?
o

f=?
Duty cycle = ?

Graph:
a) Symmetrical astable multivibrators

b) Asymmetrical astable multivibrators

EXPERIMENT 5

MONOSTABLE MULTIVIBRATOR USING OPAMP

Aim: Design aMonostable multivibrator using IC-555 Timer and calculate the pulse width of the
generated waveform.
Equipments/Components

Sl. No. Name and specification Quantity

1 Dual Power Supply +/-15V 1

2 Resistors 4

3 Capacitor 0.1μF;0.01μF 1 each

4 IC µA 741 1

5 Function generator (0-1)MHz 1

6. Oscilloscope 1

7. Diode 1N 4001 2

8 Bread board 1
9 Connecting wires and probes As required

Principle:

The monostable multivibrator is also called as one shot multivibrator. The circuit produces
a single pulse of specified duration in response to each external trigger pulse. It always has
one stable state (+Vsat). When an external trigger is applied, the output state changes and
the new state is called quasi stable state (-Vsat). The circuit remains in this state for a fixed
interval of time and then it returns to the original state after this interval. This time interval
is determined discharging of the capacitor from 0.7V to -βVsat.The time period of quasi
stable state or the delay is given by
T = 0.69RC

Procedure:

1. Check the components.

2. Setup the monostable multivibrator circuit on the breadboard and check the connections.
3. Switch on the power supply.
4. Put the function generator output to square wave mode. Adjust the amplitude to 5V.
5. Observe trigger input , output and capacitor voltage on different channels of the
oscilloscope simultaneously.
6. Draw the waveforms on the graph.
7. Measure the time delay .

(Note: The experiment may be repeated for different values of time delay)

Circuit Diagram:

Design:
Time Period T= 0.69RC
Let T = 1ms; and C = 0.1µF.
Then R = 15KΩ
Feedback factor β = R /(R +R )
2 1 2

Let β = 0.5 or 1/2

R /(R +R ) = 1/2
2 1 2

If R =10KΩ ; R =10KΩ
1 2

For triggering circuit

R C = 0.0016t
d d

Let t = 3ms and C = 0.01 µF; then Rd = 470Ω

d

D & D are diodes 1N 4001

1 2

Observations:
Measured time period or delay =?
Graph:

EXPERIMENT 6
DESIGN A SECOND ORDER ACTIVE LOWPASS FILTER

AIM:
Design a 2nd order active low pass filter using IC741 Op-Amp

REQUIREMENTS:
 S.No Equipment and Range Quantity
Components
1. Resistor 1.5k,10k,5.86K 2,2,1
2. Capacitor 0.1µF 2
3. Op-amp IC741 1
4. Dual RPS (0-30)v 2
5. AFO - 1
6. CRO - 1
7. Bread board - 1
8. Connecting wires - few

THEORY:
A low-pass filter is an electronic filter that passes low frequency signals but
attenuates (reduces the amplitude of) signals with frequencies higher than the cutoff
frequency. The actual amount of attenuation for each frequency varies from filter to filter. A
low-pass filter is the opposite of a high-pass filter. A band- pass filter is a combination of a
low-pass and a high-pass. Low-pass filters exist in many different forms, including
electronic circuits (such as a hiss filter used in audio), anti-aliasing filters for conditioning
signals prior to analog-to-digital conversion, digital filters for smoothing sets of data,
acoustic barriers, blurring of images, and so on. Low-pass filters provide a smoother form of
a signal, removing the short-term fluctuations, and leaving the longer-term trend.

DESIGN:
For a 2nd order Filter,

F H = 1 / 2π RC Hz Let FH =1 KHz and R = 1.5 KΩ

1 * 103 = 1 / 2π*1.5* 103*C C = 0.1µF
The pass band gain of the filter, AF = (1+R f / R1)
For a second order filter, AF = 1.586,
1.586= (1+R f / R1)
Let R1 = 10KΩ
1.586= (1+R f /10KΩ)

RF = 5.86kΩ

PROCEDURE:
1. Connect the Low pass filter circuit as shown in the diagram.
2. Give an input signal Vi of 1-V (p-p) and measure the output voltage for different
frequency.
 3. Plot the frequency response 20 log(Vo/Vi ) versus input frequency and find 3db
frequency.
4. Determine the cut-off frequency.

CIRCUIT DIAGRAM:

TABULATION:
Input Voltage Vi= (Volts)

S.No Frequency Hz Output Voltage Vo(volts) Gain=20log(Vo/Vi)

MODEL GRAPH:

RESULT:

Thus, the frequency response of a second order low pass filter are plotted.

OBSERVATION:

Cutoff frequency of LPF

i. Theoretical = ii. Practical =

EXPERIMENT 7
DESIGN A SECOND ORDER ACTIVE HIGH PASS FILTER

AIM:
To obtain the frequency response of an active high pass filter for the desired cut off
frequency.

REQUIREMENTS:

S.No Equipment and Range Quantity

Components
 1. Resistor Capacitor 10,1.5,5.86 1,2,1
2. Op-amp Dual RPS kΩ 2200pF 2
3. AFO CRO IC741 (0-30)v 1
4. Bread board - 2
5. Connecting wires - 1
6. - 1
7. - 1
8. few

THEORY:
HPF is the complement of the Low pass filter and can be obtained simply by
interchanging R and C in the low pass configuration. The frequency response of a
second-order high-pass filter is opposite to that of a second-order low-pass filter. A high-
pass filter attenuates the output voltage for all frequencies below the cutoff frequency.
Above the cutoff frequency, the magnitude of the output voltage is constant.
DESIGN:
For a 2nd order Filter,

F H = 1/2πRC Hz Let FH = 1 KHz and R = 1.5KΩ

1 * 103 = 1 / 2π*1.5* 103*C C = 0.1µF
The pass band gain of the filter,
AF = (1+R f / R1)
For a second order filter, AF = 1.586,
1.586= (1+R f / R1)
Let R1 = 10KΩ
1.586= (1+R f /10KΩ )
RF = 5.86kΩ

CIRCUIT DIAGRAM:
PROCEDURE:

1. Connect the high pass filter circuit as shown in the diagram.

2. Give an input signal Vi of 1-V (p-p) and measure the output voltage for different
frequency.
3. Plot the frequency response 20 log(Vo/Vi ) versus input frequency and find 3db
frequency.
4. Determine the cut-off frequency.
TABULATION:
Input Voltage Vi= (Volts)

S.No Frequency Hz Output Voltage Vo(volts) Gain=20log(Vo/Vi)

MODEL GRAPH:

RESULT:
Thus, the frequency response of a second order high pass filter is plotted.
OBSERVATION:
Cutoff frequency of HPF

i. Theoretical = ii. Practical =

EXPERIMENT 8

DESIGN AND TESTING OF SECOND ORDER ACTIVE BAND PASS

FILTER

AIM:
To obtain the frequency response of an active band pass filter for the desired cut off
frequency.

REQUIREMENTS:

S.No Equipment and Range Quantity

Components
1. Resistor 10,33,5.8kΩ 2,4,2
2. Capacitor 2200pF,470pF 2,2
3. Op-amp IC741 2
4. Dual PS (0-30)v 2
5. AFO - 1
6. CRO - 1
7. Bread board - 1
8. Connecting wires - few

THEORY:
A wide band pass filter can be formed by cascading a HPF and LPF section. If the
HPF and LPF are of the first order, then the band pass filter(BPF) will have a roll off rate
of -20 dB/decade. A wide band pass filter formed by cascading I order HPF and I order LPF
is shown in the circuit diagram.
DESIGN:
For a 1st order Filter,
F= 1/2πRC Hz

(i) For High pass section

Let FL = 400Hz and R = 7.95 KΩ
400 = 1 / 2π*7.95* 103*C
C = 0.05µF
(ii) For low pass section
Let FH = 2 KHz And R = 7.95 kΩ
2 * 103 = 1 / 2π*7.95* 103*C
C = 0.01µF

The pass band gain of the filter,

AF = (1+R f / R1)

For a first order filter, AF =2, Let R1 = 10KΩ

RF = 10 kΩ

The Center frequency FC = FH*FL

PROCEDURE:

1. Connect the Band pass filter circuit as shown in the diagram.

2. Give an input signal Vi of 1 V (p-p) and measure the output voltage for different
frequency.
3. Plot the frequency response 20 logVo/Vi versus input frequency and find 3db
frequency.
4. Determine the cut-off frequency fh and fl .

CIRCUIT DIAGRAM:
TABULATION:
Input Voltage Vi= (Volts)

S.No Frequency Hz Output Voltage Vo(volts) Gain=20log(Vo/Vi)

1
2
3
4

MODEL GRAPH:
RESULT:
Thus the frequency response of a first order band pass filter is plotted.

OBSERVATION:
Lower cutoff frequency
i. Theoretical = ii. Practical =
Upper cutoff frequency
i. Theoretical = ii. Practical =

EXPERIMENT 9

DESIGN AND TESTING OF SECOND ORDER ACTIVE BAND

REJECT FILTER

Objective: To design an active band reject filter circuit and observe its frequency response.

Equipments:

S.No Equipment and Range Quantity

Components
1. Resistor 10,33,5.8kΩ 2,4,2
2. Capacitor 2200pF,470pF 2,2
3. Op-amp IC741 2
4. Dual PS (0-30)v 2
5. AFO - 1
6. CRO - 1
7. Bread board - 1
8. Connecting wires - few
Theory:

This kind of filter passes all frequencies above and below a particular range set by the
component values. Stopband filters can be constructed using a low-pass and a high pass filter.
However, rather than the cascaded configuration used for the pass-band filter, a parallel
arrangement is required. A low-frequency f1 can pass through the low-pass filter, and a
higher-frequency f2 can use the parallel path. However, a frequency such as fo in the
reject-band is higher than the low pass critical frequency and lower than the high-
pass critical frequency, and is therefore prevented from contributing to the levels of
Vo above0.707Vmax.

CIRCUIT DIAGRAM:
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. Apply sine wave of amplitude 4Vp-p to the non inverting input terminal.
3. Values the input signal frequency.
4. Note down the corresponding output voltage.
5. Calculate gain in db.
6. Tabulate the values.
7. Plot a graph between frequency and gain. 8. Identify stop band and pass band from the graph.

OBSERVATIONS:
MODEL GRAPH:

RESULT:
The response of band pass filter and band reject filter are verified, plotted and tabulated the values in
tabular column.

EXPERIMENT-10
PHASE LOCKED LOOP (PLL) USING IC 565
AIM: Calculate the lock range and capture range of PLL using IC-565.
APPARATUS REQUIRED:
1. C.R.O
2. Function Generator
3. DC power supply
4. CDS board / Bread Board
5. Connecting wires
COMPONENTS REQUIRED:
1. LM 565 IC - 01
2. Resistors: 10K - 01
680Ω - 02
3. Capacitors: 0.1µ F - 01
1µ F - 01
0.01µ F – 01
THEORY:
The figure shows the phase-locked loop (PLL) in its basic form. The PLL consists of i) a phase
detector ii) a low pass filter and iii) a voltage controlled oscillator as shown. The phase detector, or
comparator compares the input frequency fIN with the feedback frequency fOUT. The output of the
phase detector is proportional to the phase difference between fIN and fout. The output voltage of a
phase detector is a dc voltage and therefore is often referred to as the error voltage. The output of the
phase detector is then applied to the low-pass filter, which removes the high-frequency noise and
produces a dc level. This dc level, in turn, is the input to the voltage-controlled oscillator (VCO). The
filter also helps in establishing the dynamic characteristics of the PLL circuit. The output frequency of
the VCO is directly proportional to the input dc level. The VCO frequency is compared with the input
frequencies and adjusted until it is equal to the input frequencies. In short, the phase-locked loop goes
through three states: free running, capture, and phase lock. Before the input is applied, the phase-
locked loop is in the free-running state. Once the input frequency is applied, the VCO frequency starts
to change and the phase-locked loop is said to be in the capture mode. The VCO frequency continues
to change until it equals the input frequency, and the phase-locked state. When phase locked, the loop
tracks any change in the input frequency through its repetitive action. Lock Range: The range of
frequencies over which the PLL can maintain lock with incoming signal is called the “ Lock Range”
or “Track Range” FL= 8f0/V where V= + V –(–V), where f0 is free running frequency. Capture
range: The range of frequencies over which the PLL can acquire lock with an input signal is called the
capture range.

CIRCUIT DIAGRAM:
PROCEDURE:

1. Apply +5v to pin 10 and –5v to pin 1 of LM565

2. Connect R1= 10KΩ resistor from pin 8 to10 and C1 =0.01µ F capacitor from pin 9 to 1.
3. Connect 680Ω resistor from pin 2 & pin 3 to ground.
4. Connect pin 4(VCO o/p) to CRO and measure its frequency. This frequency is called the free
running frequency, fo.
5. Calculate f0 theoretically using the formula f0 = 1.2 /4R1C1 and compare it with practical value.
6. Connect the circuit as shown in fig.
7. Apply square wave at the input with amplitude of 2Vpp and also connect it to channel 1 of CRO.
8. Connect pin 4(VCO o/p) to channel 2 of CRO.
9. Vary the input signal frequency in steps and measure its corresponding o/p frequency.
10. Find the lock range and capture range from the obtained data.

RESULT:
Free running frequency, lock range and capture range of PLL are measured practically and compared
with theoretical values.
TABULAR COLUMN:

INPUT
OUTPUT
SL. NO FREQUENCY IN FC IN Hz FL IN Hz
FREQUENCY IN Hz
Hz