EC 432 - Lecture # 2
ELECTRONIC CIRCUITS 2
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Hani Fikry – Khaled Shehata
Reviewing Amplifiers
Same frequency
Different amplitude
Single supply:e.g. 5V Split supply:e.g. +5V,-5V
Single Supply Voltage Amp
Saturated output near or at supply rails
i f i er
mp l
ar A
n e
Li
* Input bias is a must
* Output contains DC component
* No input bias
* Output contains no DC component
Split
Supply
Voltage
Amp
Output saturates
near or at the +ve
and –ve rails
Cascaded Voltage Amps
For each stage :output = Gain per stage x input
For all stages :output = overall Gain x input
Overall Gain vs. Gain per
Stage
20 mV p-p 200 mV p-p 4000 mV p-p
Overall Gain = Gain 1 x Gain 2 x Gain 3
Overall Gain in dB = Gain 1in dB + Gain 2 in dB + Gain 3 in dB
Gain in dB = 20 log Gain
= 20 log (2000) = 20 x 3.3 = 66 dB
Gains in dB
Gain (dB) 20 dB 20 dB 26 dB (log 2 =0.3)
Overall Gain (dB) = 20 + 20 + 26 = 66 dB
66 dB = 20 log vo/vi log 2000 = log 2 + log 1000 = 3.3
vo = vi x log –1 66/20 = vi x log –1 3.3 = vi x 2000 = 4 V p-p
1-mV Reference and “dBmV”
Overall Gain (dB) = 66 dB
Gain (dB) 20 dB 20 dB 26 dB (log 2 =0.3)
Input dBmV= 6 dBmV= 20 log v / 1 mV Output dBmV= 72
72 = 20 log vo / 1 mV
vo =1 mV x log –1 72/20 = 1 mV x log –1 3.6 = 1mV x 4000
= 4 V p-p
Common dB Values for Voltage Ratios
dB = 20 log (v2/v1)
Voltage ratio v2/v1 dB
100 40
10 20
2 6 Gain
1.4 3
1.12 1
1 or Unity gain 0 No gain
½ -6
1/10 -20 Loss
1/100 -40
Voltage, Current and Power
Gain
dB for Voltage, Current and Power Ratios
For power ratio : dB = 10 log (P2/P1)
P = V2/R
For voltage ratio: dB = 10 log (V22/V12) = 20 log (V2/V1)
P = I2 R
For current ratio: dB = 10 log (I22/I12) = 20 log (I2/I1)
1-mW power referenced dB dBm = 10 log (P / 1 mW)
1-mV voltage referenced dB dBmV = 20 log (V / 1 mV)
1-mA current referenced dB dBmA = 20 log (I / 1 mA)
Common dB Values for Voltage and Power
Ratios
Voltage ratio dB Power ratio dB
v2/v1 P2/P1
100 40 100 20
10 20 10 10
2 6 2 3
1.4 3
1.12 1 1.26 1
1 0 1 0
½ -6 ½ -3
1/10 -20 1/10 -10
1/100 -40 1/100 -20
Voltage Amplifier Small Signal (Linear)
Equivalent Circuit
Output impedance
(output resistance)
Open-Circuit Gain
(voltage-controlled
voltage source: VCVS)
Input impedance
(input resistance)
Voltage Amplifier Small Signal (Linear)
Ideal Equivalent Circuit
Infinite Input Impedance Zero Output Impedance
Gain = Open-circuit Gain
Voltage Amplifier Small Signal (Linear)
Ideal Equivalent Circuit
No input loading No output drop
Example 1
How much are the input resistance, the output resistance
and the open-circuit gain?
Solution: 2 k , 500 , and 50
Example 2
How much is the Gain if the input-signal source is ideal
And the output is loaded with 500 ?
Solution: 25
Example 3
How much is the Gain if the signal source output resistance
is 2 k and the output is loaded with 500 ?
Compare to the ideal-amplifier gain.
Solution: 12.5 (Gain = input source voltage / output voltage)
If the amplifier is ideal the Gain = 50
Current Amplifier Small Signal (Linear)
Equivalent Circuit
Ideal
Non-ideal
Operational Amplifiers
Three signal terminal
and a GND
Double-ended or Single-ended Output
Differential Input
• Output = Gain x (Differential Input)
• Differential Input = v+ - v-
• Very high Gain [v3/(v2-v1)]
• Very high input impedance
• Very low output impedance
• Opamps are DC coupled
• No response to “common-mode” input
Operational Amplifiers
Differential Input Single-ended Output
• Again : Output = Gain x (Differential Input)
• Differential Input = v+ - v-
• If v+ = v- , output = 0 but v+ = v- 0
• v+ = v- ( 0) is called “common-mode”
input
• Opamps amplify differential-mode input
• Opamps reject common-mode input (like
Common-Mode Signals
(Single-Ended vs Differential Amplifiers)
• Opamps do not amplify common-mode input signals
• Ideally the output is zero
• Practically very small output may appear
Common-Mode Signals
(Single-Ended vs Differential Amplifiers)
Opamp Power Supply
• Split power supply is usually used
• Supply GND also represents the signal GND
• Zero differential input gives zero output
v3
V+
Opamp
Transfer
Function slope
v2-v1
Gian very high
Output saturates V-
near or at V+ and V-
supply rails
Operational Amplifiers
Three signal terminal
and a GND
Double-ended or Single-ended Output
Differential Input
• Output = Gain x (Differential Input)
• Differential Input = v+ - v-
• Very high Gain [v3/(v2-v1)]
• Very high input impedance
• Very low output impedance
• Opamps are DC coupled
• No response to “common-mode” input
The Ideal Opamp
Ideally: Zi= , Zo= 0 , A= v2=v1 since v3 is finite
The Virtual Ground Concept
Virtually
Grounded
(not wired
to GND)
Ideally: Zi= , Zo= 0 , A= V2=GND V1=0 (virtual GND)
The Opamp Internal Stages
An opamp is a cascade of 4 stages
Differential High Gain Level-Shift Output
Amplifier Amplifier Stage Buffer
Stage Stage Stage
To reject To get To shift output DC To drive
common-mode very high to allow for large loads
signal gain large swing by reducing ro
Fig. 10.1 The 741 op-amp circuit. Q11, Q12, and R5 generate a reference bias current, IREF, Q10, Q9, and Q8 bias the input stage, which is
composed of Q1 to Q7. The second gain stage is composed f Q16 and Q17 with Q13 acting as active load. The class AB output stage is
formed by Q14 and Q20 with biasing devices Q18 and Q19 and an input buffer Q23. Transistors Q15, Q21, Q24, and Q22 serve to protect the
amplifier against output short circuit and are normally off.
Bias circuit
The 2 current-mirror
bias circuit provides 2I
-ve feed-back to
Stabilize Q-point
Bias circuit is replaced by bias current and voltage sources
Output short-circuit protection – normally OFF
2I
Differential input stage: EF + CB
Diffamp load
2I
High-gain stage: EF + CE EF
2I
Output stage: low ro class AB
741
Fig. 10.1 The 741 op-amp circuit. Q11, Q12, and R5 generate a reference bias current, IREF, Q10, Q9, and Q8 bias the input stage, which is
composed of Q1 to Q7. The second gain stage is composed f Q16 and Q17 with Q13 acting as active load. The class AB output stage is
formed by Q14 and Q20 with biasing devices Q18 and Q19 and an input buffer Q23. Transistors Q15, Q21, Q24, and Q22 serve to protect the
amplifier against output short circuit and are normally off.
