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Cascaded Multilevel

Inverter
GROUP MEMBER :
MUHAMMAD SHOAIB (16-E-795)
ALI MUZAFFAR (16-E-816)
KHURAM NAZIR (16-E-797)
MOHSIN ABDULLAH (16-E-794)
SUPERVISOR NAME :
ENGR. AHSAN ZAFAR
OUTLINE OF PRESENTATION

 Abstract
 Problem Statement
 Literature Review
 Proposed Solution
 Methodology
 Time Line/Resources
 References
Abstract

 A multilevel inverter is a power electronic device which is capable


of providing desired alternating voltage level at the output using
multiple lower level DC voltages as an input.
 The project is mainly focused on the development of cascaded type
multilevel inverter for domestic application and elimination of
harmonic distortion and its effects[1].
 The topology which we will use is suitable for any number of levels.
COMPARISON OF MULTILEVEL
TOPOLOGY
TOPOLOGY TYPE ADVANTAGE DISADVANTAGE
Diode clamped Switching frequency is low. Clamping uses many diodes.
multilevel inverter Control method is simple. Difficult to control real power flow.
Inverter efficiency is high.
Capacitor clamped Isolated DC supply. Unbalance voltage.
multilevel inverter Does not require additional clamping diodes. Inverter control complicated.
Switching losses are high.
Cascaded H-bridge Soft-switching techniques For achieving modularity it demand
multilevel Least number of components. higher number of isolated dc sources
Optimized circuit layout and packaging
possible.
PROBLEM STATEMENT

The conventional inverter will produce a high total


harmonic distortion.

Conventional inverter has resulted in higher switching


losses and less efficiency.

The conventional two-level inverter topology has some


large drawback than adopted topology.
Proposed Solution

 Increase the number of voltage level.


 Reduced the number of switch.

LITERATURE REVIEW

 The multi-level inverter is to synthesize a near sinusoidal voltage


from several levels of dc voltages[1].
 The need of multilevel inverter is to give a high output power from
medium voltage source
 Multilevel inverters have become more popular over the years in electric high
power applications with less disturbances in voltage and the possibility to function
at lower switching frequencies than ordinary two level inverter
OBJECTIVE

To develop a cascaded H-bridge multilevel inverter


that can produce Three-level output.

To simulate cascaded topology with PWM by using


MATLAB/Simulink.
METHODOLOGY
Time line

 This project will be completed in approximately 8 months.

Days to
N Start Date End Date complete
Search Project & Defend 9/16/2019 10/31/2019 46
10/31/201
Literature Review MLI 9 11/30/2019 31
11/30/201
10% Project completion Report 9 12/20/2019 21
12/20/201
20% Project completion Report 9 1/8/2020 20
Mid-Way Presentation 1/8/2020 2/10/2020 34
80% Project Completion Report 2/10/2020 3/16/2020 36
100% Project Completion 3/16/2020 4/24/2020 40
Resources

 Ieee Xplore Research papers


 International Journal of Electrical Engineering
 Power Electronics circuits, devices and applications by M.
H. Rashid
Reference
 [1] J. S. Lai and F. Z. Peng, “Multilevel converters – A new breed of
power converters,” IEEE Trans. Ind. Applica, vol. 32, no. 3, pp.
509-517, May/June 1996
 [] Shubhada Doifode1, Subroto Dutt2, Rahul Shende3,” A Study of
Multilevel Inverter Topologies” International Journal of Advanced Research in
Electrical, Electronics and Instrumentation Engineering Vol. 4, Issue 6, June
2015.
 Rajesh Kr Ahuja, Lalit Aggrawal, Pankaj Kumar, “Simulation of single
phase multilevel inverters with simple control strategy using MATLAB”,
International Journal of Advanced Research in Electrical, Electronics and
Instrumentation Engineering, volume 2, Issue 10,October 2013
 JOSEPHINE R L,” PWM CONTROL FOR HYBRID CLAMPED
MULTILEVEL INVERTERS” Journal of Electrical Engineering.
 International Journal of Advanced Research in Electrical , Electronics and
Instrumentation Engineering
(An ISO 3297: 2007 Certified Organization)
Vol. 2, Issue 10, October 2013
THANK YOU

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