Received May 27, 2019, accepted June 26, 2019, date of publication June 28, 2019, date of current

version July 18, 2019.

Digital Object Identifier 10.1109/ACCESS.2019.2925652

Design of High-Efficiency Isolated

Bidirectional DC/DC Converter With
Single-Input Multiple-Outputs
RONG-JONG WAI , (Senior Member, IEEE), AND ZHI-FU ZHANG
Department of Electronic and Computer Engineering, National Taiwan University of Science and Technology, Taipei 106, Taiwan
Corresponding author: Rong-Jong Wai (rjwai@mail.ntust.edu.tw)
This work was financially supported in part by the Ministry of Science and Technology of Taiwan under Grant MOST
108-2221-E-011-080-MY3.

ABSTRACT This study mainly develops a high-efficiency isolated bidirectional DC/DC con-
verter (HEIBDC) with a single input and multiple outputs. For the requirement of multiple output voltages
with only one single input source, the proposed HEIBDC can achieve the objectives of high-efficiency power
conversion and bidirectional power flow. The proposed HEIBDC can be operated at two modes, including
the step-down mode and the step-up mode. At the step-down mode, the high-voltage DC bus transmits extra
energy to charge the bidirectional input power source. At the step-up mode, it can transmit the energy from
the input power source to the high-voltage DC bus for the possible utilization of a later DC/AC inverter,
and from the auxiliary source (e.g., a battery module) to supply power for peripheral devices. The proposed
HEIBDC uses a coupled inductor to increase the step-up/step-down voltage ratio and adopts an auxiliary
inductor to indirectly adjust the voltage of the auxiliary output terminal. Moreover, the utilization of voltage
clamping and soft switching in the proposed HEIBDC is helpful for accomplishing the goal of high-efficiency
power conversion. In addition, the effectiveness of the proposed HEIBDC is verified by experimental results
of a 600W prototype in practical applications. The experimental results reveal that the maximum power
conversion efficiency at the step-up mode or the step-down mode is measured to exceed 96%.

INDEX TERMS High-efficiency power conversion, DC/DC converter, bidirectional power flow, isolated
framework, multiple outputs, auxiliary source, soft switching.

I. INTRODUCTION tional converters have high step-up/step-down voltage ratios

Bidirectional DC/DC converters have been widely used
in many applications, such as the hybrid electric vehicle,
space-crafts, uninterruptible power systems, hybrid micro-
grid systems, and so on [1]–[4]. In recent years, the vigor-
ous development of solar, fuel cell, and other clean energy
sources provides a low-pollution power selection [5]–[7].
In these systems, all of them always need an energy storage
system to supply a constant power or respond to emergency
loading. In order to avoid squandering too many convert-
ers for charging and discharging energy storage systems,
the development of bidirectional DC/DC converter for sav-
ing cost is necessary. Moreover, the requirements of energy
storage devices are most important because of clean energy
without the energy storage property. Although many bidirec-
The associate editor coordinating the review of this manuscript and
approving it for publication was Bora Onat.
and satisfy various voltage levels, non-isolated topologies
always exist dangerous issues such as systems shut-down
and output load destroyed. The power converters proposed
in [8]–[14] belong to non-isolated bidirectional topologies.
Even though Yu et al. [9] had the property of zero-voltage
switching, many power switches were used and only low
voltage ratios were obtained. Although a CLLC resonant tank
in [10] was newly designed to minimize the correspond-
ing switching losses, the values of capacitor and inductor
were strictly considered for promising all switches to work
with the soft-switching characteristic, and an intact control
system was required to guarantee the operation stability.
Although a simple structure was proposed in [11], it can-
not achieve the application with high-voltage ratios. In [12],
the leakage energy was recycled to protect power switches,
and the soft-switching property was utilized for achieving
high-efficiency power conversion. But, it still belonged to

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FIGURE 1. (a) System configuration of high-efficiency isolated bidirectional DC/DC converter; (b) Relation of bidirectional power flow
control; (c) PI voltage control scheme.
be a low-power application. Besides, complicated control
stages were required for performing precise response behav-
ior in [13]. Even though the soft-switching technique used in
non-isolated converters [8]–[14] could be applied to isolated
converters, more power switches and passive components are
always required so that the corresponding cost and volume
will be inevitably increased.
For the advantages of galvanic isolation, the flyback oper-
ation with a simple control scheme is the most popular topol-
ogy for DC converters [15]–[21]. In [15], [16], the flyback
structures were used for LED drivers. Although the struc-
ture of a bridgeless flyback rectifier was presented in [17],
it caused the high ripple currents on output diodes to possibly
degenerate the conversion efficiency. In [18], [19], several
diodes loop were designed, and the corresponding power loss
was increased rapidly. Moreover, the circuit with two output
terminals plus the zero-voltage switching feature was inves-
tigated in [20], and the flyback topology was also used for
the low-power photovoltaic micro-grid application in [21].
In order to improve the power conversion efficiency, soft-
switching techniques have been widely used in many appli-
cations. For achieving zero-voltage switching (ZVS) turn-on
of the switches, an additional lossless snubber circuit is
always adopted. For recycling the leakage inductance energy
and accomplishing the soft-switching techniques, some inter-
esting results were given in [22]–[26]. Wai and Liaw [27]
presented a high-efficiency power conversion method by
recycling the leakage inductance energy for the application
with high voltage ratios. Despite the high voltage ratios
in [28], most switches with the hard-switching property will
decrease the power conversion efficiency, especially for high
power applications. While the property of soft switching and
the requirement of less switches were demonstrated in [29],
the non-isolated operation with a low conversion ratio could
be improved further. Although Pires et al. [30] introduced the
battery charging and discharging system with a wide conver-
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sion range, two inductors to be required will complicate the
control topology, and power loss of diodes will decrease the
power conversion efficiency.
For accomplishing the objectives of high-efficiency power
conversion, low manufacturing cost and multiple functions
features, a high-efficiency isolated bidirectional DC/DC con-
verter (HEIBDC) topology is proposed in this study, and an
experimental prototype is built to validate the corresponding
theoretical analyses. This study is organized into five sec-
tions. Following the introduction, the operation principle and
steady-state analyses of the proposed HEIBDC are presented
in Section II. In Section III, the circuit design consideration
and the components selection guideline of the proposed con-
verter are explained in detail. In Section IV, experimental
results are provided to validate the effectiveness of the pro-
posed converter. Finally, conclusions are drawn in Section V.
II. OPERATION PRINCIPLE AND
STEADY-STATE ANALYSES
The system configuration of the proposed HEIBDC topology
is depicted in Fig. 1(a). The major symbol representations are
summarized as follows. In Fig. 1(a), the low-voltage-side cir-
cuit (LVSC) is composed of the low-voltage switch (S1 ), the
secondary-side winding (Ls ) of the coupled inductor (Tr ), and
the low-voltage terminal (VFC ). By turning the low-voltage
switch (S1 ) on/off to draw/release energy to the primary
side (Lp ) of the coupled inductor (Tr ). Then, the clamped
circuit is composed of the low-voltage clamped capaci-
tor (C1 ) and the low-voltage clamped switch (S2 ). It mainly
absorbs the energy stored in the secondary-side leakage
inductor (Lks ) for protecting the low-voltage switch (S1 )
and releasing energy to the output terminal. Moreover, the
middle-voltage balanced circuit has the high-voltage clamped
capacitor (C2 ), the high-voltage clamped switch (S3 ), and
the primary-side winding (Lp ) of the coupled inductor (Tr ).
It mainly absorbs energy stored in the primary-side leakage
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inductor (Lkp ) for protecting the high-voltage switch (S4 )

and releasing energy to the output terminal. In addition,
the high-voltage-side circuit (HVSC) has the high-voltage
switch (S4 ) and the high-voltage DC bus terminal (VBUS )
for providing a bidirectional current path between the LVSC
and the HVSC. Furthermore, the auxiliary circuit contains
the auxiliary inductor (Laux ), the output diode (D1 ), and
the auxiliary source terminal (VO2 ). It can charge the aux-
iliary source for peripheral components usage. VFC (IFC ) and
VBUS (IBUS ) denote the voltages (currents) of the input power
source and the output terminal at the LVSC and the HVSC,
respectively; the corresponding output powers are expressed
as PFC and PBUS . VO2 and ILaux express the output voltage
and current in the auxiliary circuit; the corresponding output
power is denoted as PO2 . T1∼T4 are the corresponding driving
signals for S1 ∼ S4 , respectively.
The relation of the bidirectional power flow control is
depicted in Fig. 1(b). At the step-down mode, the total output
power of the HEIBDC is denoted as PO = PFC + PO2 ; and
the total output power of the HEIBDC is expressed as PO =
PBUS + PO2 at the step-up mode. As for the stable operation
of the proposed HEIBDC, a proportional-integral (PI) con-
troller in Fig. 1(c) is adopted without complex mathematical
dynamic models. In Fig. 1(c), the voltage tracking error at the
step-down mode is defined as eFC = VFC ∗ − V , where V ∗ FIGURE 2. Equivalent circuit of HEIBDC: (a) Step-down mode; (b) Step-up
FC FC mode.
is the voltage command of the output terminal at the LVSC.
Moreover, the voltage tracking error at the step-up mode is
defined as eBUS = VBUS ∗ ∗
− VBUS , where VBUS is the voltage Figure 2(b) shows the equivalent circuit of the proposed
command of the output terminal at the HVSC. HEIBDC operated at the step-up mode. The equivalent
There are two types of characteristic waveforms and circuit of the coupled inductor (Tr ) are composed of the
operation modes for the proposed HEIBDC including the primary-side winding (Lp ), the secondary-side winding (Ls ),
step-down mode and the step-up mode. To simplify the math- the secondary-side magnetizing inductor (Lms ), and the sec-
ematic derivations, all of the voltages across switches and ondary leakage inductor (Lks ). The coupling coefficient of the
diodes are neglected. Besides, it is assumed that the low- coupled inductor (Tr ) at the step-up mode can be denoted as
voltage clamped capacitor (C1 ) and the high-voltage clamped
capacitor (C2 ) are large enough to be considered as constant ks = Lms /(Lks + Lms ) (3)
voltage sources VC1 and VC2 , respectively. The equivalent
circuit, voltage definition and current definition are illustrated In Fig. 2(a) and 2(b), (CS1 , CS2 , CS3 , CS4 ) and (DS1 , DS2 ,
in Fig. 2. For describing the operational modes more clearly, DS3 , DS4 ) are the intrinsic capacitances and the body diodes
the step-down mode and the step-up mode are depicted of four power switches, respectively. In order to simplify
in Fig. 2(a) and 2(b), respectively. theoretical analyses, four power switches and diodes are
Figure 2(a) shows the equivalent circuit of the proposed considered as ideal components. The detailed operational
HEIBDC operated at the step-down mode. The equivalent processes at the step-down mode and the step-up mode are
circuit of the coupled inductor (Tr ) are composed of the described as follows:
primary-side winding (Lp ), the secondary-side winding (Ls ),
the primary-side magnetizing inductor (Lmp ), and the primary A. STEP-DOWN MODE
leakage inductor (Lkp ). By defining the turns ratio (N ) to be Figures 3 and 4 show the characteristic waveforms and the
equal Np /Ns and labeling the voltage of vLp and vLs across the operation principle of the proposed HEIBDC at the step-down
windings Lp and Ls , the turns ratio (N ) can be represented as mode, respectively. The power flow forwards from the HVSC
to the LVSC, and one describes the operational modes at
vLp /vLs = N (1) the step-down mode via the equivalent circuit in Fig. 2(a).
At the step-down mode, the switch S4 is served as the
Moreover, the coupling coefficient of the coupled induc- main switch and is controlled for regulating the voltage of
tor (Tr ) at the step-down mode can be expressed as the LVSC. Moreover, the switches (S1 and S3 ) are operated
synchronously and have complementary trigger signals to the
kp = Lmp /(Lkp + Lmp ) (2) switch (S4 ). The duty cycles of power switches are defined as

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FIGURE 3. Characteristic waveforms of HEIBDC at step-down mode.
d4 for S4 , d1 for S1 and S3 , and d2 for S2 . One switching cycle
is denoted as TS .
1) Mode 1[t0 ∼ t1 ]: At the beginning of this mode, the
switch (S4 ) is turned on under the condition of zero voltage
switching (ZVS). The input current magnetizes the primary-
side magnetizing inductor (Lmp ) from the high-voltage DC
bus (VBUS ). Moreover, the partial energy at the high-voltage
side transfers to the secondary-side winding (Ls ) via magnetic
coupling, and the body diode (DS2 ) is conducted to transmit
the energy into the capacitor (C1 ). In addition, the energy
passed through the auxiliary inductor (Laux ) and the out-
put diode (D1 ) charges the auxiliary source. At this mode,
the voltage VBUS can be presented as
VBUS = −vLp − vLkp (4)
Because the voltage vLkp is equal to vLp (1 − kp )/kp , (4) can
be rearranged as
VBUS = −vLp − vLp (1 − kp )/kp = −vLp /kp (5)
87546
Since the voltage of the primary-side magnetizing induc-
tor (Lmp ) is equal to vLp , one can obtain
vLp = −kp VBUS (6)
Moreover, the voltage across the low-voltage clamped capac-
itor can be expressed as
VC1 = −vLs (7)
2) Mode 2 [t1 ∼ t2 ]: At time t = t1 , the body
diode (DS2 ) has been conducted (i.e., the voltage across
the low-voltage clamped switch (S2 ) is zero) at mode 1.
At this mode, S2 is turned on under the ZVS condition to
alleviate the switching loss. Moreover, the conduction loss
caused by the current passed through the body diode also can
be reduced. The energy stored in the low-voltage clamped
capacitor (C1 ) and the partial energy at the high-voltage
side releases to the auxiliary source via the Ls - Laux - D1
path. When the energy stored in C1 releases completely, this
mode ends.
3) Mode 3 [t2 ∼ t3 ]: At the beginning of this mode,
the switch (S4 ) is turned off as time t = t2 . The energy stored
in the leakage inductor (Lkp ) still needs to release energy,
the current direction could not be changed immediately. As a
result, the body diode (DS3 ) is conducted, and the correspond-
ing energy is absorbed by the high-voltage clamped capaci-
tor (C2 ). Because the value of the magnetizing inductor (Lmp )
is larger than the value of Lkp , the current (iLmp ) passed
through the magnetizing inductor can be almost recognized
as a constant current, and its current descendant slope is much
fewer with the one of iLkp . Moreover, the current of iLmp
by way of the flyback energy behavior is transferred to the
secondary-side current (iLs ). In addition, the body diode (DS1 )
is conducted, and the energy is released to charge the output
source (VFC ). Furthermore, the energy stored in the auxiliary
inductor (Laux ) still needs to release energy and charge the
auxiliary source continuously.
4) Mode 4 [t3 ∼ t4 ]: At time t = t3 , the body diode
(DS1 and DS3 ) have been conducted at the previous mode.
At this mode, the switches (S1 and S3 ) are turned on under
the ZVS condition to alleviate the switching loss. By the
synchronous rectification, the conduction losses caused by
the currents passed through the body diodes can be reduced.
Moreover, the current of iLmp by way of the flyback energy
behavior is transferred to the secondary-side current (iLs ),
and the output source (VFC ) is charged via the low-voltage
switch (S1 ). Simultaneously, the energy stored in the high-
voltage clamped capacitor (C2 ) is released to the low-voltage
side via the coupled inductor (Tr ). In addition, the energy
stored in the auxiliary inductor (Laux ) still needs to release
and charges the auxiliary source continuously. When the
current (iLaux ) gradually decays to zero, this mode ends.
5) Mode 5 [t4 ∼ t5 ]: At time t = t4 , the current (iLaux )
is dropped to zero. Except for the path of the auxiliary
inductor (Laux ), the other operation at the mode 5 is similar
to the one at mode 4, the current (iLmp ) by way of the fly-
back energy behavior induces the secondary-side current (iLs )
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FIGURE 4. Operation principle of HEIBDC at step-down mode.

and charges the output source (VFC ) via the low-voltage
switch (S1 ). Simultaneously, the energy stored in the high-
voltage clamped capacitor (C2 ) is released to the low-voltage
side via the coupled inductor (Tr ). The voltage across the
secondary-side winding can be given by
VFC = vLs
Because the voltage across the primary-side magnetizing
inductor (Lmp ) is equal to vLp , one can obtain
vLp = kp VC2 = NVFC
According to (9), the voltage across the high-voltage clamped
capacitor can be expressed as
VC2 = NVFC /kp
6) Mode 6 [t5 ∼ t6 ]: At the beginning of this mode,
the switches (S1 and S3 ) are turned off. Because the leak-
age inductor (Lkp ) still needs to release energy, the body
diode (DS4 ) is conducted, and the corresponding current is
back to the high-voltage DC bus (VBUS ). Because the voltage
of the high-voltage DC bus (VBUS ) is higher than the voltage
(8)
of the output source (VFC ), the voltage polarity of the coupled
inductor reverses at once, and the current ascendant slopes
of iLs and iLkp reverse at the same time. When time t = t6 ,
the body diode (DS4 ) is conducted, and the corresponding
(9) across voltage (vS4 ) is zero. The switch (S4 ) is turned on
under the ZVS condition to reduce the switching loss. After
that, the magnetizing inductor (Lmp ) will be magnetized again
by the input voltage (VBUS ), and one switching cycle is
(10) completed.

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Due to the coupled inductor with a good coupling effect,
the leakage energy is much smaller than the energy of a fer-
rite powder core. Because the proposed circuit topology has
excellent voltage clamping property, the leakage energy can
be fully absorbed. For simplifying mathematical derivations,
the following conditions are assumed: (i) kp = 1; (ii) the dead
time interval can be ignored, and d1 + d4 = 1. To derive
the voltage gain of the proposed HEIBDC at the step-down
mode, the voltages of VC1 and VC2 should be obtained
in advance. Applying the principle of the volt-second bal-
ance theorem [31] for the secondary-side winding (Ls ) and
the primary-side magnetizing inductor (Lmp ) can obtain the
following relations:
VFC d1 TS + (−VC1 )(1 − d1 )TS = 0
(−VBUS )d4 TS + VC2 (1 − d4 )TS = 0
According to (11) and (12), the voltages of VC1 and VC2 can
be calculated as
VC1 = (d1 VFC )/(1 − d1 )
VC2 = (d4 VBUS )/(1 − d4 )
Substituting (10) into (12), the voltage gain (GV 1 ) of the
proposed HEIBDC at the step-down mode from the HVSC
to the LVSC can be represented as
VFC 1 d4
GV 1 = = ·
VBUS N 1 − d4
For calculating the discharge time of the auxiliary inductor
between modes 3 and 4, the time interval can be denoted
as dx Ts = [(t3 − t2 ) + (t4 − t3 )]. By using the volt-second
balance theorem [31], the average voltage of the auxiliary
inductor (Laux ) should be equal to zero during one complete
switching cycle (TS ), and one can obtain
(VFC − vLs − VO2 )d4 TS + (−VO2 )dx TS = 0
According to (15) and vLs = −VBUS /N , the auxiliary voltage
gain (GVL1 ) of the proposed HEIBDC at the step-down mode
can be expressed as
VO2 d4
GVL1 = = (17)
VBUS N (1 − d4 )(d4 + dx )
Then, the average current (iD1 (avg) ) of the diode (D1 ) can be
represented as
1 1 1 magnetizes the secondary-side magnetizing inductor (Lms )
iD1 (avg) = [ iD1 (max) d4 TS + iD1 (max) dx TS ]
TS 2 2 continuously, and the partial energy of the LVSC still trans-
where the maximum current (iD1 (max) ) of the auxiliary induc-
tor (Laux ) can be expressed as
iD1 (max) = (VO2 /Laux )dx TS
By assuming that the average current (iD1 (avg) ) is equal to the
auxiliary source current, one can obtain
iD1 (avg) = (VO2 /RO2 ) (21)
where RO2 is the equivalent load at the auxiliary circuit. From
(20) and (21), the duty cycle (dx ) at the step-down mode can
be given by
q
−d4 + d42 + [8Laux /(RO2 TS )]
dx = (22)
2
By substituting (22) into (17), the voltage gain (GVL1 ) of the
proposed HEIBDC from the high-voltage DC bus (VBUS ) to
the auxiliary source (VO2 ) can be rearranged as
VO2 2d4
(11) GVL1 = = q
VBUS N (1 − d )(d + d 2 + [8L /(R T )]
(12) 4 4 4 aux O2 S
(23)
B. STEP-UP MODE
(13) Figures 5 and 6 perform the characteristic waveforms and the
operation principles of the proposed HEIBDC at the step-up
(14) mode, respectively. The power flow forwards from the LVSC
to the HVSC, and one describes the operational modes at the
step-up mode with the equivalent circuit in Fig. 2(b). At the
step-up mode, the switch (S1 ) is served as the main switch and
is controlled for regulating the voltage of the HVSC. More-
over, the switches (S2 and S4 ) are operated synchronously and
(15)
have complementary trigger signals to the switch (S1 ). The
duty cycles of power switches are defined as d1 for S1 , d2 for
S2 and S4 , and d3 for S3 .
1) Mode 1[t0 ∼ t1 ]: At the beginning of this mode,
the switch (S1 ) is turned on under the ZVS condition. The
input current magnetizes the secondary-side magnetizing
inductor (Lms ) from the low-voltage input source (VFC ). The
partial energy of the LVSC is transferred to the primary-side
(16) winding (Lp ) via magnetic coupling, and the body diode (DS3 )
is conducted to transmit energy into the capacitor (C2 ). More-
over, the energy stored in the auxiliary inductor (Laux ) still
needs to release energy for charging the auxiliary source
continuously. When the current (iLaux ) gradually decays to
zero, this mode ends.
2) Mode 2 [t1 ∼ t2 ]: At time t = t1 , the current (iLaux ) has
dropped to zero at mode 2. Except for the path from the auxil-
iary inductor to the auxiliary source, other operation is similar
to the one at mode 1. The low-voltage input source (VFC )
(18)
fers to the primary-side winding (Lp ) via magnetic coupling.
The body diode (DS3 ) is conducted to transmit energy into the
capacitor (C2 ). During modes 1 and 2, the voltage relationship
(19) can be given by

Substituting (19) into (18), the average current (iD1 (avg) ) of VFC = vLs + vLks (24)
the diode (D1 ) can be calculated as Because the voltage (vLks ) is equal to vLs (1 − ks )/ks , (24) can
VO2 dx TS be rearranged as
iD1 (avg) = (d4 + dx ) (20)
2Laux VFC = vLs /ks (25)

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FIGURE 5. Characteristic waveforms of HEIBDC at step-up mode.
Since the voltage across the secondary-side magnetizing
inductor (Lms ) is equal to the value of vLs , one can obtain
vLs = ks VFC
According to (24) and (25), the voltage across the high-
voltage clamped capacitor can be expressed as
vLp = VC2 = ks NVFC
3) Mode 3 [t2 ∼ t3 ]: At time t = t2 , the body diode (DS3 )
has been conducted (i.e., the voltage across the high-voltage
clamped switch (S3 ) is zero) at the previous mode. At this
mode, the switch (S3 ) is turned on under the ZVS condition
to alleviate the switching loss. By synchronous rectification,
the conduction loss caused by the current passed through the
body diode can be reduced. The partial energy stored in the
primary-side winding still charges the capacitor (C2 ). After-
ward, the energy stored in the high-voltage clamped capac-
itor (C2 ) is recycled to the low-voltage input source (VFC ).
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When the energy stored in the capacitor (C2 ) has been com-
pletely released, this mode ends.
4) Mode 4 [t3 ∼ t4 ]: At the beginning of this mode,
the switches (S1 and S3 ) are turned off. The body diode (DS2 )
is conducted to transmit the leakage energy for charging the
capacitor (C1 ), and the partial energy is delivered to charge
the auxiliary source via the Laux - D1 - VFC path. While
the energy stored in the secondary-side magnetizing induc-
tor (Lms ) by way of the flyback energy behavior is transferred
to the primary-side winding (Lp ), the body diode (DS4 ) is
conducted for releasing energy from the primary-side wind-
ing (Lp ) to the high-voltage DC bus (VBUS ). At this mode,
the voltages across Ls and Lp can be given by
vLs = −VC1 (28)
vLp = −VBUS (29)
5) Mode 5 [t4 ∼ t5 ]: The body diode (DS2 and DS4 ) have been
conducted at mode 4. At this mode, the switches (S2 and S4 )
are turned on under the ZVS condition to alleviate the switch-
ing loss. By the synchronous rectification, the conduction
loss caused by the current passed through the body diode
can be reduced. It transmits energy from the primary-side
winding (Lp ) to the high-voltage DC bus (VBUS ) continuously.
After the low-voltage clamped capacitor (C1 ) stores energy
completely, it begins to release energy for both the secondary-
side winding (Ls ) and the auxiliary inductor (Laux ). The low-
voltage input source (VFC ) in series with the inductors of
Ls and Laux transmits partial stored energy to the auxiliary
source via the diode (D1 ). When the energy stored in the
capacitor (C1 ) has been completely released, this mode ends.
6) Mode 6 [t5 ∼ t6 ]: At time t = t5 , the switches (S2 and S4 )
are turned off. Because the energy stored in the primary-
side winding (Lp ) still needs to release, the body diode (DS4 )
is conducted to transmit energy for the high-voltage DC
bus (VBUS ). Since the leakage energy in the secondary-side
winding still needs to release, the body diode (DS1 ) is con-
ducted to transfer the leakage energy for the low-voltage input
source (VFC ). Because the body diode (DS1 ) is conducted
and the voltage across the low-voltage switch (S1 ) is zero,
(26) the switch (S1 ) can operate under the ZVS condition at the
next mode. Simultaneously, the energy stored in the auxiliary
inductor (Laux ) begins releasing energy to charge the auxil-
iary source. When the current (iLp ) gradually drops to zero,
(27) the operation over one switching cycle is completed.
For simplifying mathematical derivations, the following
assumptions are made: (i) ks = 1; (ii) the dead time interval
can be ignored, and d1 +d4 = 1. In order to derive the voltage
gain of the proposed HEIBDC at the step-up mode, the volt-
ages of VC1 and VC2 should be obtained in advance. Applying
the principle of the volt-second balance theorem [31] to the
primary-side winding (Lp ) and the secondary-side magnetiz-
ing inductor (Lms ), one can obtain the following relations:
VFC d1 TS + (−VC1 )(1 − d1 )TS = 0 (30)
(−VBUS )d4 TS + VC2 (1 − d4 )TS = 0 (31)
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 R.-J. Wai, Z.-F. Zhang: Design of High-Efficiency Isolated Bidirectional DC/DC Converter With SIMOs

FIGURE 6. Operation principle of HEIBDC at step-up mode.

From (30) and (31), the voltages of VC1 and VC2 can be dx Ts = [(t6 − t5 ) + (t1 − t0 )]. Because the average voltage
calculated as of the auxiliary inductor (Laux ) is zero during a complete
switching cycle via the volt-second balance theorem [31], one
VC1 = [d1 /(1 − d1 )]VFC (32)
can obtain
VC2 = [d4 /(1 − d4 )]VBUS (33)
By substituting (27) into (31) and using the relation of d4 = (VFC − vLp − VO2 )(1 − d1 )TS + (−VO2 )dx TS = 0 (35)
1 − d1 , the voltage gain (GV 2 ) of the proposed HEIBDC
at the step-up mode from the LVSC to the HVSC can be By substituting (28) into (35), the voltage gain (GVL2 ) of the
represented as proposed HEIBDC at the step-up mode from the LVSC to the
VBUS d1 auxiliary source can be represented as
GV 2 = =N· (34)
VFC 1 − d1
For calculating the discharge time of the auxiliary induc- VO2 1
GVL2 = = (36)
tor at modes 1 and 6, the time interval can be denoted as VFC 1 − d1 + dx

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Then, the average current (iD1 (avg) ) in the diode (D1 ) can be circuit is also set at 100W. Furthermore, this converter is
expressed as operated with a 50kHz switching frequency (fS = 50kHz),
1 1 1 and the coupling coefficients could be simplified as kp =
iD1 (avg) = [ iD (max) (1 − d1 )TS + iD1 (max) dx TS ] ks = 1 because the proposed topology has a good voltage-
TS 2 1 2
(37) clamped performance.

where the maximum current (iD1 (max) ) of the auxiliary induc-

tor (Laux ) can be given by
iD1 (max) = (VO2 /Laux )dx TS (38)
By substituting (38) into (37), the average current (iD1 (avg) )
of the diode (D1 ) can be rearranged as
VO2 dx TS
iD1 (avg) = (1 − d1 + dx ) (39)
2Laux
To make an assumption of the average current (iD1 (avg) ) to be
equal to the auxiliary source current, one can obtain
FIGURE 7. Voltage gain GV 1 and duty cycle d4 with respect to different
iD1 (avg) = (VO2 /RO2 ) (40) turns ratios N.

From (39) and (40), the duty cycle (dx ) at the step-up mode
can be calculated as
p
−(1 − d1 ) + (1 − d1 )2 + [8Laux /(RO2 TS )]
dx = (41)
2
By substituting (41) into (36), the voltage gain (GVL2 ) of the
proposed HEIBDC from the low-voltage input source (VFC )
to the auxiliary source (VO2 ) can be rearranged as
VO2 2
GVL2 = = p
VFC 1 − d1 + (1 − d1 )2 + [8Laux /(RO2 TS )]
(42)
III. DESIGN GUIDELINE OF CIRCUIT COMPONENTS
In this study, the proposed high-efficiency isolated bidirec-
tional DC/DC converter (HEIBDC) is assumed to be operated
at the step-down mode with the high-voltage DC bus 200V.
For this case, a 200V power supply is utilized for the high-
voltage source to imitate the energy stored state from the
high-voltage side. Moreover, two output terminals have two
voltage levels, which one is 13V ∼ 15V for charging the input
source, and the other one is 25V ∼ 29V for charging the
auxiliary source. To demonstrate the proposed HEIBDC at
the step-down mode, the maximum power (PFC ) at the low-
voltage-side circuit (LVSC) is set at 500W (i.e., the equivalent
load RFC = 0.45), and the maximum power (PO2 ) at
the auxiliary circuit is set at 100W (i.e., the equivalent load
RO2 = 8.41). On the other hand, the proposed HEIBDC is
assumed to be operated with one input source 12V ± 10% at
the step-up mode. For this case, a 12V power supply is uti-
lized for the input source to imitate the energy released state
from the LVSC. In addition, two output terminals have two
voltage levels, which one is the high-voltage DC bus 200V,
and the other one is 25V ∼ 29V for charging the auxiliary
source. For validating the proposed HEIBDC at the step-
up mode, the maximum power (PBUS ) at the high-voltage-
side circuit (HVSC) is set at 500W (i.e., the equivalent load
RBUS = 80), and the maximum power at the auxiliary
FIGURE 8. Voltage gain GV 2 and duty cycle d1 with respect to different
turns ratios N.
From (15), the voltage gain (GV 1 ) from the HVSC to
the LVSC, and the duty cycle (d4 ) with respect to different
turns ratios (N ) is depicted in Fig. 7. As for (34), the volt-
age gain (GV 2 ) from the LVSC to the HVSC, and the duty
cycle (d1 ) with respect to different turns ratios (N ) is depicted
in Fig. 8. According to Figs. 7 and 8, the turns ratios of the
coupled inductor (Tr ), the value of the auxiliary inductor,
and the specifications of power switches can be determined.
By considering VBUS = 200V and VFC = 15V at the step-
down mode, the voltage gain GV 1 = 0.075 can be obtained.
At the step-up mode, the voltage gain GV 2 = 16.67 also can
be obtained because of VFC = 12V and VBUS = 200V.
By substituting the voltage gain GV 1 = 0.075 into Fig. 7,
and considering VBUS = 200V and N = 10, the duty
cycle (d4 ) for the power switch (S4 ) is 0.43. By substituting
the voltage gain GV 2 = 16.67 into Fig. 8, and considering
the turns ratio N = 10, the duty cycle (d1 ) of the power
switch (S1 ) is 0.625. Basically, the values of d4 = 0.43
and d1 = 0.625 are reasonable for the proposed HEIBDC
in practical applications. From (23) and (42), the voltage
gains from the HVSC (or the LVSC) to the auxiliary source
GVL1 (GVL2 ) at the duty cycle d4 = 0.43 (d1 = 0.625)
with respect to different auxiliary inductors (Laux ) is depicted

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FIGURE 9. Voltage gains GVL1 and GVL2 at d4 = 0.43 and d1 = 0.625 with
respect to different values of Laux .
in Fig. 9. By considering VO2 = 29V and VBUS = 200V
in (23), the voltage gain from the HVSC to the auxiliary
source GVL1 = 0.145. As a result, the value of the auxiliary
inductor (Laux ) can be obtained as Laux = 4µH at the step-
down mode. By considering VO2 = 25V and VFC = 12V
in (42), the voltage gain from the LVSC to the auxiliary
source GVL2 = 2.083. Thus, the value of the auxiliary
inductor (Laux ) can be obtained as Laux = 4.2µH at the
step-up mode. Regardless of the operation at the step-down
mode or the step-up mode, it has to produce the voltage range
25V ∼ 29V for charging the auxiliary source. The compro-
mised choice of the auxiliary inductor is Laux = 4.1µH in
this study.
In order to select appropriate power switches and diode,
the corresponding voltage and current stresses should be
considered. The proposed topology in this study has favorable
voltage-clamping performance to absorb the leakage energy
for effectively transmitting to the output terminals. Therefore,
the destroyed phenomena of power switches because of volt-
age spike on the leakage inductors (i.e., Lkp or Lks ) can be
prevented by the designed clamped capacitor. When the pro-
posed HEIBDC is operated at the step-down mode, the max-
imum voltage stresses of power switches (S1 and S3 ) are
VFC /(1 − d1 ) and VBUS /(1 − d4 ) at the mode 1, respectively;
the maximum voltage stresses of power switches (S2 and S4 )
are VFC /(1 − d1 ) and VBUS /(1 − d4 ) at the mode 5, respec-
tively. When the proposed HEIBDC is operated at the step-
up mode, the maximum voltage stresses of power switches
(S2 and S4 ) are VFC /(1 − d1 ) and VBUS /(1 − d4 ) at the
mode 1, respectively; the maximum voltage stresses of power
switches (S1 and S3 ) are VFC /(1−d1 ) and VBUS /(1−d4 ) at the
mode 5, respectively. According to above analyses, regardless
of operating at the step-down mode or the step-up mode, the
maximum voltage stresses of power switches (S1 and S2 ) are
VFC /(1 − d1 ), and the one of power switches (S3 and S4 )
is VBUS /(1 − d4 ). By substituting the values of d1 = 0.57,
d4 = 0.43, VFC = 15V, and VBUS = 200V into VFC /(1 − d1 )
and VBUS /(1 − d4 ) at the step-down mode, the maximum
voltage across power switches (vS1 , vS2 ) and (vS3 , vS4 ) are
35V and 351V, respectively. On the other hand, the maximum
voltage across power switches (vS1 , vS2 ) and (vS3 , vS4 ) are
87552
32V and 320V by substituting the values of d1 = 0.625, d4 =
0.375, VFC = 12V, and VBUS = 200V into VFC /(1 − d1 ) and
VBUS /(1 − d4 ) at the step-up mode. If the ringing phenomena
caused by stray inductances and the intrinsic capacitances are
further considered, the power MOSFETs with 75V voltage
rating for the switches (S1 and S2 ), and the ones with 500V
voltage rating for the switches (S3 and S4 ) can be selected.
By analyzing both the mode 5 at the step-down mode
and the mode 2 at the step-up mode, the relation of vD1 =
VO2 + [(Laux (diD1 /dt)] holds, and the diode (D1 ) is reversed
bias at this time interval. Since no current flow is passed
through the diode (D1 ), the ascendant slope of this diode
current (diD1 /dt) is equal to zero. Moreover, the value of
VLaux is exactly equal to zero, and the relation of vD1 = VO2
can be obtained. Because the voltage level of the auxiliary
source is set at 25V ∼ 29V, and the stray inductances effect
is considered, a fast switching diode with 100V voltage rating
can be selected for the diode (D1 ), and the corresponding
reverse-recovery current can be further reduced.
For ensuring the proposed HEIBDC operated at the con-
tinuous conduction mode (CCM), the minimum value of the
primary-side magnetizing inductor (Lmp ) inside the coupled
2 2 V
inductor (Tr ) should be designed as Lmp(min) = N (1−d 2fS
4) FC
· IFC
according to the mode 5 at the step-down mode. Moreover,
the minimum value of the secondary-side magnetizing induc-
tor (Lms ) inside the coupled inductor (Tr ) should be designed
2
as Lms(min) = (1−d 1)
2N 2 fS
· VIBUS
BUS
according to the mode 5 at the
step-up mode. When the switching frequency (fS = 50kHz)
and the output currents at the full-load condition (IFC =
33.3A and IBUS = 2.5A) are considered, the values of Lmp =
146.4µH and Lms = 1.1µH can be obtained. In order to
manufacture the couple inductor (Tr ) easily, the number of
winding turns in the primary side of the coupled inductor
is designed as Np = 20, and its measured inductor value
is Lmp = 180µH. Because the ratio of the primary and
secondary inductors in the coupled inductor is square pro-
portional to the turns ratio (N = 10), the value of Lms can be
determined as 1.8µH, and the winding turns in the secondary
side of the coupled inductor is designed as Ns = 2 in this
study.
Due to the selection of a high switching frequency (fS =
50kHz) in the proposed HEIBDC, the factors of lower equiv-
alent series resistance and faster dynamic response should
be considered in the design of clamped capacitors (i.e., low-
voltage clamped capacitor (C1 ) and high-voltage clamped
capacitor (C2 )) for reducing the corresponding voltage and
current stress. In this study, the cutoff frequencies of the
Lmp −C2 filter and the Lms −C1 filter should be designed to be
at least ten times smaller than the switching frequency [32].
Because of the selection of Lmp = 180µH and Lms =
1.8µH, the low-voltage clamped capacitor (C1 ) and the high-
voltage clamped capacitor (C2 ) have to be chosen larger than
56.3µF and 5.63µF, respectively. In order to cope with unpre-
dictable effect in practical applications, the practical values
of C1 and C2 are selected 72µF and 6.8µF, respectively.
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The metalized-polyester film capacitors are adopted because TABLE 1. Circuit components of HEIBDC.
of having many distinguishing characteristics, such as low
equivalent series resistance, fast dynamic response, and fast
charging and discharging.
For the stable operation of the proposed HEIBDC, the feed-
back control is used to solve the problem of the output
voltage varied with load variations, and a digital signal
processor (DSP) TMS320F28335 manufactured by Texas
Instruments is adopted to satisfy the requirement of feed-
back control and stable operation. In this control scheme,
a conventional proportional-integral (PI) controller without
complex mathematical dynamic models is utilized. In this
study, the output voltages (i.e., the low-voltage source (VFC )
at the step-down mode, and the high-voltage DC bus (VBUS ) at
the step-up mode) of the proposed HEIBDC are controllable
via the conventional PI control framework, and the voltage
level of the auxiliary source (VO2 ) is regulated by the design
of the auxiliary inductor (Laux ). Although the voltage of the
TABLE 2. Preset electrical specifications of HEIBDC.
auxiliary source (VO2 ) cannot be regulated freely, the prede-
termined voltage range by the design of the auxiliary induc-
tor (Laux ) is appropriate to provide the floating charge voltage
for an energy storage device (e.g., battery module) as the
load in the auxiliary circuit. Even though it is easy to realize
multiple dc outputs with a flyback converter by adding more
transfer windings, the current stress of the main power switch
in the flyback converter will be larger than the one in the
proposed HEIBDC under the same output power, and the
leakage energy cannot be recycled in the flyback converter
with multiple windings. In order to lower manufacturing
cost and improve the power conversion efficiency for the
single-input multiple-outputs converter, the power switches up-and-down counters and comparators in the DSP. Then,
with low current rating can be selected and the auxiliary the corresponding PWM duty cycles are sent to gate drivers
inductor can be adopted in the proposed HEIBDC to recycle for driving power switches.
the partial leakage energy for further charging the auxiliary The measured waveforms of the switches and diode of the
source. According to small-signal modeling and control sta- proposed HEIBDC operated at the step-down mode under
bility analyses [26], proportional and integral gains in the PO = PFC + PO2 = 600W are depicted in Fig. 11, where
PI voltage controller at the step-down mode are selected as the input voltage at the high-voltage-side circuit (HVSC)
kpd = 2.2 and kid = 1, respectively. Moreover, the ones at is considered as VBUS = 200V. From Fig. 11(a)-11(d),
the step-up mode are selected as kpu = 0.1 and kiu = 0.03, the body diodes of four switches (S1 , S2 , S3 and S4 ) have
respectively. been conducted before power switches are turned on. It is
obvious that four switches (S1 , S2 , S3 and S4 ) are turned
IV. EXPERIMENTAL RESULTS on under the property of zero-voltage switching (ZVS).
In order to verify the effectiveness of the proposed high- As a result, switching losses can be reduced. Moreover,
efficiency isolated bidirectional DC/DC converter (HEIBDC) the power switches (S1 and S2 ) are clamped at 35V, and the
in practical applications, the experimentations of the pro- power switches (S3 and S4 ) are clamped at 351V. As can be
posed HEIBDC operated at the step-down mode and the seen from Fig. 11(e), the reverse-recovery current inside the
step-up mode are provided in this section. According to the diode (D1 ) is approximately zero due to the selection of a fast
circuit analyses in Section II, the circuit components and switching diode. The corresponding waveforms of the input
the preset electrical specifications of the proposed HEIBDC voltage (VBUS ) and two output voltages (VFC and VO2 ) are
are summarized in Tables 1 and 2, respectively. The practical depicted in Fig. 12. From Fig. 12, the output voltage can be
photographs of the proposed HEIBDC and the experimen- stably controlled via the feedback control. The voltage ripple
tal equipment are depicted in Fig. 10(a) and 10(b), respec- percentages of VO2 and VFC at the step-down mode are 0.76%
tively. The PI control methodologies in Fig. 1(c) and the and 0.85%, respectively.
analog/digital (A/D) sampling action are carried out in a By considering the output power PO = PBUS + PO2 =
32-bit floating point DSP TMS320F28335 with a sampling 575W and the input voltage VFC = 12V at the step-up mode,
frequency of 20kHz. The PWM duty cycles are produced by the energy can be transmitted from the low-voltage input

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FIGURE 10. Practical photograph: (a) Converter prototype;
(b) Experimental equipment.
FIGURE 11. Experimental waveforms of switches and diode at step-down
mode under PO = 600W (a) S1 ; (b) S2 ; (c) S3 ; (d) S4 ; (e) D1 .
source (VFC ) to the high-voltage DC bus terminal (VBUS )
and the auxiliary source (VO2 ). The measured waveforms of
switches and diode of the proposed HEIBDC operated at the
step-up mode are depicted in Fig. 13. From Fig. 13(a)-13(d),
the body diodes of four switches (S1 , S2 , S3 and S4 ) have been
conducted before power switches are turned on. Thus, these
power switches (S1 , S2 , S3 and S4 ) are operated under the ZVS
condition to further reduce the corresponding switching loss.
87554
FIGURE 12. Experimental waveforms of input and output voltages at
step-down mode under PO = 600W.
FIGURE 13. Experimental waveforms of switches and diode at step-up
mode under PO = 575W: (a) S1 ; (b) S2 ; (c) S3 ; (d) S4 ; (e) D1 .
FIGURE 14. Experimental waveforms of input and output voltages at
step-up mode under PO = 575W.
Moreover, the power switches (S1 and S2 ) are clamped at 32V,
and the power switches (S3 and S4 ) are clamped at 320V. Due
to the selection of a fast switching diode, no reverse-recovery
current is inside the diode (D1 ) as shown in Fig. 13(e).
In addition, the corresponding waveforms of the input volt-
age (VFC ) and two output voltages (VBUS and VO2 ) are
depicted in Fig. 14. As can be seen from Fig. 14, two output
voltages are stably controlled at the predetermined levels. The
voltage ripple percentages of VO2 and VBUS at the step-up
mode are 0.71% and 0.55%, respectively.
In spite of operating at the step-down mode or the step-up
mode, all power switches (S1 , S2 , S3 and S4 ) in the pro-
posed HEIBDC are operated under the ZVS condition to
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R.-J. Wai, Z.-F. Zhang: Design of High-Efficiency Isolated Bidirectional DC/DC Converter With SIMOs
reduce switching losses, and stable output voltage levels
can be exactly regulated by the feedback control and the
design of the auxiliary inductor. By observing the output
terminals at the step-down mode, the output voltage 15V
for the low-voltage source and the output voltage 28V for
the auxiliary source guarantee to stably supply the charging
power. By observing the output terminals at the step-up mode,
the output voltage 200V for the high-voltage DC bus (e.g., for
driving a DC motor or taking as an inverter input voltage) and
the output voltage 25V for the auxiliary source are ensured to
stably supply power for various applications.
FIGURE 15. Measured transient responses of HEIBDC under step load
change: (a) Step-down mode with PI controller; (b) Step-down mode
without PI controller; (c) Step-up mode with PI controller; (d) Step-up
mode without PI controller.
The transient responses of the proposed HEIBDC at the
step-down mode and the step-up mode with/without PI con-
troller under step load changes are depicted in Fig. 15. As can
be seen from Fig. 15(a), the output voltages at the step-down
VOLUME 7, 2019
mode with the PI controller will be back to the preset voltage
levels after the loading or unloading transient variation. How-
ever, the output voltages at the step-down mode without the PI
controller have steady-state voltage errors, i.e., there are 0.5V
and 0.4V steady-state voltage errors in VO2 and VFC , respec-
tively, as shown in Fig. 15(b). At the step-up mode, the output
voltages with the PI controller as shown in Fig. 15(c) also
quickly return to the preset voltage levels after the loading
or unloading transient variation. Unfortunately, the output
voltages at the step-up mode without the PI controller have
15V and 1V steady-state voltage errors in VBUS and VO2 ,
respectively, as shown in Fig. 15(d). It is obvious that the volt-
age levels for the low-voltage terminal, the auxiliary source
terminal and the high-voltage DC bus terminal can be stably
adjusted by PI controllers.
FIGURE 16. Measured transient responses of HEIBDC under nominal
input voltage variation: (a) Step-down mode; (b) Step-up mode.
The output voltage responses of the proposed HEIBDC
under the corresponding nominal input voltage to be varied
±10% at the step-down mode and the step-up mode are
depicted in Fig. 16(a) and 16(b), respectively. Although the
output voltage of the auxiliary circuit only can be adjusted
at the setting range 25V ∼ 29V, the output voltages of the
LVSC and the HVSC can be precisely controlled to be 15V
and 200V at the step-down mode and the step-up mode,
respectively. In addition, the waveforms including the power
conversion efficiency and two output powers of the proposed
HEIBDC operated at the step-down mode and the step-up
mode are depicted in Fig. 17(a) and 17(b), respectively.
In the experiments, the converter efficiency is evaluated via
Power Analyzer WT500 equipment, manufactured by the
hboxYokogawa Electric Corporation. The bandwidth of the
WT500 is 0.5Hz to 100kHz, and the accuracy of the mea-
sured power is within ±0.1%. The experimental results reveal
that the maximum efficiency at the step-down operation is
measured to be 98.2% under the output power about 400W in
Fig. 17(a). The maximum efficiency at the step-up operation
is measured to be 96.4% under the output power 300W in
Fig. 17(b). Because the input voltage VFC = 12V in the
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TABLE 3. Parasitic parameters of components.

the power consumptions on power switches and diodes are

denoted as PS1 , PS2 , PS3 and PS4 for switches S1 , S2 , S3
and S4 , respectively; PD1 for D1 ; PDS2 for DS2 ; PDS3 for DS3 .
Moreover, the power consumptions in the coupled induc-
tor contain the copper loss (Pcu ) and the core loss (Pfe ).
Because body diodes (DS1 and DS4 ) inside power switches
(S1 and S4 ) are only conducted in a tiny time interval, and
metalized-polyester film capacitors are used, the correspond-
ing power consumptions can be neglected in power loss anal-
yses. In addition, the turn-on resistance of power switches
and the forward voltages of diodes can be represented as
Rds and VF , respectively. By the amp-second balance the-
ory [31], the charging and discharging currents on the capac-
itors (C1 and C2 ) can be expressed as IS2(rms) = IDS2 (rms) and
FIGURE 17. Experimental power analyses of HEIBDC: (a) Power IS3(rms) = IDS3 (rms) , respectively. Thus, one can obtain the
conversion efficiency at step-down mode; (b) Power conversion efficiency following relations:
at step-up mode; (c) Power loss ratio at step-down mode; (d) Power loss
ratio at step-up mode. 2
PS1 = IS1(rms) Rds(S1) = (PFC /VFC )2 Rds(S1) (43)
PS2 = 2
IS2(rms) = (C1 1VC1 /TS ) Rds(S2)
Rds(S2) 2
(44)
LVSC at the step-up mode is lower than the output voltage PDS2 = IDS2 (rms) VF(DS2 ) = (C1 1VC1 /TS )VF(DS2 ) (45)
VFC = 15V in the LVSC at the step-down mode, the value of 2
PS3 = IS3(rms) Rds(S3) = (C2 1VC2 /TS )2 Rds(S3) (46)
IFC at the step-up mode is larger than the one at the step-down
mode for the same power. Thus, the corresponding copper PDS3 = IDS3 (rms) VF(DS3 ) = (C2 1VC2 /TS )VF(DS3 ) (47)
loss and conduction loss at the step-up mode are also larger
2
PS4 = IS4(rms) Rds(S4) = (PBUS /VBUS )2 Rds(S4) (48)
than the ones at the step-down mode. As can be seen from PD1 = ILaux(rms) VF(D1) = (PO2 /VO2 )VF(D1) (49)
Fig. 17, the power conversion efficiency at the step-up mode 2
Pcu = IS1(rms) 2
R(Ls ) + IS4(rms) R(Lp )
is lower than the one at the step-down mode for the same
power. = (PFC /VFC )2 R(Ls ) + (PBUS /VBUS )2 R(Lp ) (50)
Owing to the hard-switching condition and the leakage α Bβ f in [34],
According to the relation of Pfe = Cm feq S
inductor of the transformer, it is really difficult to realize
high power conversion efficiency with a traditional flyback the maximum core loss can be calculated as Pfe(max) = 8W
converter. Fortunately, the proposed HEIBDC absorbs the via the datasheet of EE-55 ferrite core, and the practical
leakage energy of the coupled inductor and adopts the soft- core loss in the proposed converter with the typical value of
switching technique for all switches to achieve the objective β = 2.5 can be rearranged as
of high-efficiency power conversion. In order to explain the
practical fS /Btest ftest )
Pfe = Pfe(max) (B2.5 2.5
(51)
power conversion efficiency of the proposed HEIBDC, the
power losses caused by main circuit components [33] are It is assumed that 1VC1 and 1VC2 are 1% variation, and
introduced later. At the step-down mode or the step-up mode, parasitic parameters are summarized in Table 3. As a result,

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TABLE 4. Performance comparisons of bidirectional converters with other literatures.
the total power loss in the proposed HEIBDC can be repre-
sented as
Ploss = PS1 + PS2 + PS3 + PS4 + PDS2
+ PDS3 + PD1 + Pcu + Pfe
From (52), the calculation of the power conversion efficiency
at the step-down mode can be expressed as
PFC + PO2
ηstep−down =
PFC + PO2 + Ploss
On the other hand, the calculation of the power conversion
efficiency at the step-up mode can be denoted as
PBUS + PO2
ηstep−up =
PBUS + PO2 + Ploss
As can be seen from Fig. 17(a), the calculated maximum
efficiency is 98.509% at the step-down mode by substituting
the powers (PFC = 370W and PO2 = 30W) at the maximum
power conversion efficiency into (53). The corresponding
power loss ratio of the proposed HEIBDC at the step-down
mode is depicted in Fig. 17(c). As can be seen from Fig. 17(b),
the calculated maximum efficiency is 97.177% at the step-
up mode by substituting the powers (PBUS = 270W and
PO2 = 30W) at the maximum power conversion efficiency
into (54). The corresponding power loss ratio of the proposed
HEIBDC at the step-up mode is depicted in Fig. 17(d). The
above experimental results agree well with those obtained
from theoretical analyses given in Section II and the prototype
manufacturing considerations given in Section III. Accord-
ing to the experimental verification, the proposed HEIBDC
can achieve the objectives of bidirectional operations, gal-
vanic isolation, multiple outputs, and high power conversion
efficiency.
In order to exhibit the advantages of the proposed
HEIBDC, comprehensive comparisons of bidirectional con-
verters in previous literatures are summarized in Table 4.
VOLUME 7, 2019
As can be seen from the tabular data, numerous circuit
frameworks belong to single-input single-output (SISO) bidi-
rectional DC/DC converters without the function of multi-
ple output voltages [11], [12], [14], [24]–[26], [28]–[30].
(52) Chen et al. [26] proposed an actively clamped bidirectional
flyback converter, and all switches in [26] had zero-voltage-
switching characteristics. However, the high voltage gain per-
formance of this SISO converter is not provided in [26], and it
belongs to a low-power application. Moreover, the topology
(53)
in the previous work [27] belongs to a single-input multiple-
output (SIMO) bidirectional DC/DC converter to be similar
to the proposed one with the isolated structure plus four
power switches in this study. Although Wai and Liaw [27]
(54) presented a high-efficiency power conversion method by
recycling the leakage inductance energy for the application
with high voltage ratios, the additional clamped diode will
generate extra power loss in the converter [27]. In order to
further improve the power conversion efficiency in [27] and
save the manufacturing cost, the proposed HEIBDC uses the
body diode of the power switch (S2 ) to replace the clamped
diode (D2 ) in [27].
In order to display the extra power loss caused by the
clamped diode (D2 ) in [27], the power electronics simula-
tion software (PSIM) developed by Powersim Corporation is
adopted to simulate the converter in [27] and the proposed
HEIBDC operated at the step-up mode under the same con-
ditions. As for numerical simulations as shown in Fig. 18,
the switching frequency, the input voltage, the output volt-
age, the auxiliary output voltage, and the total output power
are set as fs = 100kHz, VFC = 12V, VBUS = 200V,
VO 2 = 25V ∼ 30V and PO = 1kW, respectively. The
simulated circuit frameworks of the converter in [27] and
the proposed HEIBDC are depicted in Fig. 18(a) and 18(b),
respectively, where the dotted boxes are the major compara-
tive components between two converters. As can be seen from
Fig. 18(c), the power losses caused by the clamped diode (D2 )
87557
 R.-J. Wai, Z.-F. Zhang: Design of High-Efficiency Isolated Bidirectional DC/DC Converter With SIMOs
FIGURE 18. Power loss comparisons of converter in [27] and proposed HEIBDC: (a) Simulated circuit of [27]; (b) Simulated circuit
of HEIBDC; (c) Voltage and current waveforms of clamped diode (D2 ) and power switch (S2 ) in [27]; (d) Voltage and current
waveforms of power switch (S2 ) in HEIBDC.
and the power switch (S2 ) are measured about 22.52W, and
the power conversion efficiency of the converter in [27]
is 88%. By observing Fig. 18(d), the power loss caused by
the power switch (S2 ) without the clamped diode (D2 ) is
only about 13.2W, and the power conversion efficiency of the
proposed HEIBDC is 94%. From Fig. 18(c) and 18(d), it is
obvious that additional clamped diode (D2 ) in [27] indeed
generates extra power loss (PD 2 = 4.53W) in the con-
verter than the proposed HEIBDC. Consequently, the power
conversion efficiency of the proposed HEIBDC is higher
than the one of the converter in [27], and the number of
circuit components can be decreased with the same as the
function of voltage clamping. Wai et al. [35] investigated a
coupled-inductor-based high-efficiency bidirectional single-
input multiple-output (BSIMO) converter to accomplish the
bidirectional power control with the properties of voltage
clamping and soft switching. However, the function of gal-
vanic isolation in this study was ignored in [35]. Although
Wai and Jheng [36] also proposed a high-efficiency SIMO
coupled-inductor-based DC/DC converter, the functions of
bidirectional operation and galvanic isolation in this study
were not considered in [36]. According to the aforementioned
comparisons, the proposed HEIBDC with isolated and bidi-
rectional circuit framework indeed yields superior innovation
than previous researches in [27], [35], [36] to be studied by
the same authors’ group.
87558
As high step-up or step-down behaviors obviously can
be demonstrated by electrical specifications in [12], [14],
[24], [25], [27], [28] and [30], the bidirectional power control
design similar to the one in the proposed HEIBDC has been
reported. Although the power conversion efficiency of the
framework operated at the step-up mode in [12] is slightly
larger than the one in the proposed HEIBDC, a large amount
of power switches and capacitors in [12] are only used
for SISO system, so that the manufacturing cost in [12] is
inevitably increased. In addition, the power conversion effi-
ciency of the proposed HEIBDC operated at the step-down
mode is higher than all the ones in Table 4. Furthermore, the
converters with a quadratic gain may be operated with sen-
sitive voltage-gain and non-isolated structure for low power
applications in [30]. Owing to hard-switching conditions,
the power consumptions on power switches will degenerate
the power conversion efficiency. In this study, all switches
with the soft-switching property are adopted for improving
the power conversion efficiency. As can be seen from com-
prehensive comparisons with other literatures in Table 4, the
proposed HEIBDC indeed performs high power conversion
efficiency, isolated property, and appropriate manufacturing
cost under the laboratory experimental prototype.
In order to further reduce the voltage stresses on the high-
voltage switch (S4 ) and high-voltage clamped switch (S3 ),
the position of the high-voltage clamped capacitor (C2 ) can
VOLUME 7, 2019
R.-J. Wai, Z.-F. Zhang: Design of High-Efficiency Isolated Bidirectional DC/DC Converter With SIMOs
be moved to be connected in series with the primary-side
winding. By this case, the voltage stresses on the high-voltage
switch (S4 ) and high-voltage clamped switch (S3 ) can be
clamped to VBUS , and the energy stored in the leakage induc-
tor (Lkp ) also can be absorbed. However, a higher capacitor
value for C2 should be chosen to deliver the same power as
the proposed HEIBDC. In the future works, a new circuit
framework to reduce the voltage stresses on power switches
can be further investigated.
V. CONCLUSIONS
This study has successfully developed a high-efficiency
isolated bidirectional DC/DC converter (HEIBDC) with
step-down and step-up bidirectional functions, and this
coupled-inductor-based converter is applied well to galvanic
isolation and single input terminal plus two output terminals.
The proposed HEIBDC incorporates a coupled inductor, four
power switches, two clamped capacitors, one auxiliary induc-
tor and one output diode to achieve the objectives of high-
efficiency power conversion, zero voltage switching (ZVS)
turn-on, bidirectional operation, and single-input multiple-
outputs. A 600W prototype has been built and verified the
theoretical analyses with the practical behaviors. From the
experimental verification, the maximum power conversion
efficiency is over 96%, and the corresponding voltage level
can be adjusted by the feedback control and the design of the
auxiliary inductor.
The major advantages of the proposed HEIBDC are recited
as follows: F1) The circuit by utilizing four power switches
achieves the goals of the bidirectional operation, the galvanic
isolation, multiple output terminals, and high conversion effi-
ciency. 2) The voltage stresses across power switches can be
clamped to be specific voltage levels, so that power switches
with lower turn-on resistances can be selected to decrease the
conduction losses, and it will further decrease the switching
losses via the soft-switching technique. 3) A feedback con-
trol system can be applied with a digital signal processor,
instead of a traditional analog control circuit. 4) The closed-
loop control method is adopted to stabilize the output volt-
age for load variations. 5) Multiple output terminals with
bidirectional operation make the circuit power flow flexibil-
ity. 6) The auxiliary source supplies energy for peripherals
instead of another power subsystems, and benefits as saving
the manufacturing cost and simplifying complicated power
systems.
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RONG-JONG WAI (M’99–SM’05) was born in
Tainan, Taiwan, in 1974. He received the B.S.
degree in electrical engineering and the Ph.D.
degree in electronic engineering from Chung
Yuan Christian University, Chung Li, Taiwan,
in 1996 and 1999, respectively.
From 1998 to 2015, he was with Yuan Ze
University, Chung Li, where he was the Dean
of General Affairs, from 2008 to 2013, and the
Chairman of the Department of Electrical Engi-
neering, from 2014 to 2015. Since 2015, he has been with the National
Taiwan University of Science and Technology, Taipei, Taiwan, where he is
currently a Distinguished Professor, the Dean of General Affairs, and the
Director of the Energy Technology and Mechatronics Laboratory. He is a
chapter-author of the Intelligent Adaptive Control: Industrial Applications
in the Applied Computational Intelligence Set (Boca Raton, FL: CRC Press,
1998) and the coauthor of the Drive and Intelligent Control of Ultrasonic
Motor (Tai-chung, Taiwan, R.O.C.: Tsang-Hai, 1999), the Electric Control
(Tai-chung, Taiwan, R.O.C.: Tsang-Hai, 2002), and the Fuel Cell: New
Generation Energy (Tai-chung, Taiwan, R.O.C.: Tsang-Hai, 2004). He has
authored more than 170 conference papers, over 180 international journal
papers, and 57 inventive patents. His research interests include power
87560
electronics, motor servo drives, mechatronics, energy technology, and con-
trol theory applications. The outstanding achievement of his research is for
contributions to real-time intelligent control in practical applications and
high-efficiency power converters in energy technology.
Dr. Wai is a Fellow of the Institution of Engineering and Technol-
ogy (U.K.) and a Senior Member of the Institute of Electrical and Elec-
tronics Engineers (USA). He received the Excellent Research Award,
in 2000, and the Wu Ta-You Medal and Young Researcher Award from
the National Science Council, R.O.C., in 2003. In addition, he was a
recipient of the Outstanding Research Award from the Yuan Ze University,
R.O.C., in 2003 and 2007, respectively; the Excellent Young Electrical
Engineering Award and the Outstanding Electrical Engineering Professor
Award from the Chinese Electrical Engineering Society, R.O.C., in 2004
and 2010, respectively; the Outstanding Professor Award from the Far
Eastern Y. Z. Hsu-Science and Technology Memorial Foundation, R.O.C.,
in 2004 and 2008, respectively; the International Professional of the Year
Award from the International Biographical Centre, U.K., in 2005, respec-
tively; the Young Automatic Control Engineering Award from the Chinese
Automatic Control Society, R.O.C., in 2005; the Yuan-Ze Chair Professor
Award from the Far Eastern Y. Z. Hsu-Science and Technology Memorial
Foundation, R.O.C., in 2007, 2010, and 2013, respectively; the Electric
Category-Invent Silver Medal Award, in 2007, the Electronic Category-
Invent Gold and Silver Medal Awards, in 2008, the Environmental Protection
Category-Invent Gold Medal Award, in 2008, the Most Environmental
Friendly Award, in 2008, the Power Category-Invent Bronze Medal Award,
in 2012, and the Electronic Category-Invent Gold and Silver Medal Awards
from the International Invention Show and Technomart, Taipei, R.O.C.,
in 2015; the University Industrial Economic Contribution Award from the
Ministry of Economic Affairs, R.O.C., in 2010; the Ten Outstanding Young
Award from the Ten Outstanding Young Person’s Foundation, R.O.C.,
in 2012; the Taiwan Top 100 MVP Managers Award from the MANAGER
Today Magazine, R.O.C., in 2012; the Outstanding Engineering Profes-
sor Award from the Chinese Institute of Engineers, R.O.C., in 2013; the
Green Technology Category-Scientific Paper Award from the Far Eastern
Y. Z. Hsu-Science and Technology Memorial Foundation, R.O.C., in 2014;
the Scopus Young Researcher Lead Award-Computer Science from Taiwan
Elsevier, in 2014; the Outstanding Research Award from the National Taiwan
University of Science and Technology, R.O.C., in 2016 and 2018, respec-
tively; and the Most Cited Researchers Award (2016) (Field: Electrical &
Electronics Engineering).
ZHI-FU ZHANG was born in Taichung, Taiwan,
in 1994. He received the B.S. and M.S. degrees
in electronic and computer engineering from the
National Taiwan University of Science and Tech-
nology, Taiwan, in 2017 and 2019, respectively.
His research interests include power electronics
and dc-dc converter.
VOLUME 7, 2019