BCD

COUNTER
•A BCD counter counts in binary‐coded
decimal from 0000 to 1001 and back
to 0000. Because of the return to 0
after a count of 9, a BCD counter
does not have a regular pattern,
unlike a straight binary count.
•To derive the circuit of a BCD
synchronous counter, it is necessary to
go through a sequential circuit design
procedure.
STEP 1: DERIVE A STATE DIAGRAM FOR THE CIRCUIT.

0000 0001 0010 0011 0100

1001 1000 0111 0110 0101

STATE DIAGRAM FOR BCD COUNTER

STEP 2: CHOOSE
THE TYPE OF
FLIP-FLOPS TO
BE USED
 STEP 3: EXCITATION TABLE OF THE FLIP FLOPS

Truth Table of T Flip Flop

T Qn
0 Memory
1 Toggle/Complement
 CHARACTERISTIC TABLE OF
T FLIP FLOP
Truth Table of T Flip Flop
Qn T Qn+1
T Qn
0 0 0
0 Memory 0 1 1
1 Complement 1 0 1
1 1 0
CHARACTERISTIC TABLE EXCITATION TABLE OF T
OF T FLIP FLOP FLIP FLOP

Qn T Qn+1 Qn Qn+1 T
0 0 0 0 0 0
0 1 1 0 1 1
1 0 1 1 0 1
1 1 0 1 1 0
STEP 4: GET THE FLIP FLOP INPUTS
 Qn Qn+1 T
0 0 0
0 1 1
1 0 1
1 1 0
EXCITATION TABLE OF T FLIP FLOP
STEP 5:
OBTAIN THE
SIMPLIFIED
EQUATIONS
USING K-
MAP
•The flip‐flop input equations can
be simplified by means of maps.
The unused states for minterms 10
to 15 are taken as don’t‐care
terms.
LET: Q8 = A
Q4 = B
Q2 = C
K-MAP FOR TQ8
Q1 = D
C’D’ C’D CD CD’
A’B’ 0 0 0 0
A’B 0 0 1 0
AB X X X X
AB’ 0 1 X X
TQ8 = AD + BCD
TQ8 = Q8Q1 + Q4Q2Q1
LET: Q8 = A
Q4 = B
Q2 = C
K-MAP FOR TQ4
Q1 = D
C’D’ C’D CD CD’
A’B’ 0 0 1 0
A’B 0 0 1 0
AB X X X X
AB’ 0 0 X X
TQ4 = CD
TQ4 = Q2Q1
LET: Q8 = A
Q4 = B
Q2 = C
K-MAP FOR TQ2
Q1 = D
C’D’ C’D CD CD’
A’B’ 0 1 1 0
A’B 0 1 1 0
AB X X X X
AB’ 0 0 X X
TQ2 = A’D
TQ2 = Q8’Q1
LET: Q8 = A
Q4 = B
Q2 = C
K-MAP FOR TQ1
Q1 = D
C’D’ C’D CD CD’
A’B’ 1 1 1 1
A’B 1 1 1 1
AB X X X X
AB’ 1 1 X X
TQ1 = 1
TQ1 = 1
THE SIMPLIFIED FUNCTIONS ARE:
TQ1 = 1

TQ2 = Q8’Q1

TQ4 = Q2Q1

TQ8 = Q8Q1 + Q4Q2Q1

STEP 6: DRAW THE LOGIC DIAGRAM