Professional Documents
Culture Documents
Chapter Four: Memory Organization
Chapter Four: Memory Organization
Memory Organization
1
Outline
Classification of Memories
Memory types: RAM, ROM
Memory Chip Capacity & Organization
Electrical Signals
Organization of a Typical memory chips
− RAM
− Reprogrammable ROMs
EPROM
EEPROM
2
Classification of Memories
• Memory in a MP system is where information (data &
instructions) is kept.
• It can be classified in to two main types:
– Main memory (RAM & ROM)
• It is a memory unit that communicate directly with the CPU. Main memories
are fabricated from semiconductors. only programs & data currently needed by
the processor reside in main memory.
– Storage memory (Disks , CD ROMs, etc.)
• Devices that provide backup storage are called secondary (auxiliary ) memory.
These are constructed from magnetized materials
• The simple view of RAM is that it is made up of registers that are
made up of flip-flops (or memory elements).
– The number of flip-flops in a “memory register” determines the size of
the memory word.
• ROM on the other hand uses diodes instead of the flip-flops to
permanently hold the information. 3
Memory
RWM
ROM Disks Tape
(RAM)
MROM
SRAM DRAM
Floppy
PROM
Flash
memory
Bubble H/D
EPROM
EEPROM
(EAROM) Optical
4
Memory hierarchy
Optical Disk
Cost cheap,
Magnetic Tape size
5
Semiconductor Technologies for memories
• Bipolar Technology:- high speed
• MOS Technology :- less space (high density), less
power consumption.
PMOS technology –earlier
NMOS technology -speed, density
CMOS technology -less power consumption
(Complementary Metal Oxide Semi-conductor)
6
Types of semiconductor memory
• Semiconductor memories can be classified as:
Volatile memories –in which information stored is lost when power
supply is off. E.g. RAMs
Nonvolatile memories– in which information is not lost even when
power is off. E.g. ROMs
• In both RAM & ROM, accessing is random & the memory access time is
independent of the memory location.
RAM -- allows temporary storage, allows read/write operation,
available in bipolar & MOS technologies:
Bipolar RAMs– are very fast.
- Access time for TTL RAMs is 20 to 50ns.
- Access time for ECL RAMs is much less---10ns.
MOS RAMs –access time is 25 to 500ns.
- SRAMs store information in flip-flops.
- DRAMs store information in capacitive stray.
ROM – allows permanent storage, allows read only operation,
available in bipolar & MOS technologies.
7
Types of ROMs
1. MROM:- Mask-Programmed ROM (MPROM) or simply ROM.
– Programmed by manufacturer according to the customer’s specifications.
The P can only read from such memory. It cannot be reprogrammed
by a user.
– A photographic negative (mask) is used to control the electrical
interconnections on the chip.
2. PROM: Programmable ROM.
It is one time user programmable ROM.
ones it is user programmed it serves as a ROM. i.e. it cannot
reprogrammed again.
both ROM & PROM consists fusible-link in each cell. Blowing off or
retaining the fuse decides whether the cell contains a 1 or a 0.
it is programmed by PROM programmer (apparatus). The Process of
storing information in ROM is called programming or burning the ROM
8
3. EPROM: Erasable Programmable ROMs
can be erased & reprogrammed by user several times.
it is programmed by EPROM programmer by applying special voltage
levels ( 10 to 25v).
It is erased by exposing it to UV light applied through a window on the chip.
Disadvantage: - erased/programmed out of chip.
- all cells erased,
- take more time to erase/program(15 to 20min).
Advantage: High density, low cost per bit, high speed, reliable, widely available
UV light
Memory cell
D IN D OUT
D Q
WR
EN
EN
RD (a) A memory cell latch with
two tri-state Buffers
11
Memory Chip Capacity & Organization…
I7 I0
64kb memory.
• Each register contains 8 D Latch WR Input Buffer
flip-flops.
• The I/P and O/P buffers are each of A0 MR1 0000H
216 =65536
A1 MR2 0001H
Decoder
8 Tri-state buffers.
Three cases:
a) Smaller word size chips can be connected to make up an 8-bit word memory.
b) More than one memory chips can be arranged to make up the memory capacity for a µP.
Need of additional chip select (CS) signal- which allows us to expand memory size by
using multiple chips.
c) There are more address lines but less memory chip are sufficient. Two solution:
. Absolute decoding
. Partial decoding– leaving some address lines as don’t care.
14
Chip Select
• Usually, each memory chip has a CS (Chip Select) input. The chip
will only work if an active signal is applied on that input
• To allow the use of multiple chips in the make up of memory, we need
to use a number of the address lines for the purpose of “chip selection”
– These address lines are decoded to generate the necessary CS
inputs for the memory chips to be used.