QUESTION

Figure shows ionization process of an SE

particle? Explain how an SE current pulse is
generated? Where does the charge collection
occur?
When an energetic particle strikes the semiconductor
material it loses energy through Coulombic
interactions. This process creates an electron-hole
pair BY IONIZATION
Charge collection OCCURS in reverse-biased junctions
because of the greater thickness of the depletion region

These would include the drain/well and drain/substrate

junctions in CMOS transistors.
QUESTION

Explain what type of masking effect prevents the

single event transient from reaching to storage
element.
 Electrical Masking

It consists on the attenuation of an erroneous pulse after

passing a number of subsequent gates to the point that
the pulse does not affect the output.

Short pulses will be attenuated via electrical masking

QUESTION

if we set, the 2nd input of AND gate to logic 0

(instead of logic 1 shown), what sort of masking
effect would be present in addition to the Electrical
Masking ?
Logical masking.
 Explain Temporal masking?
or latching window masking.

The timing of the narrow pulse at the input of a latch should

coincide with the rising edge of a clock and satisfy also the
setup and hold time requirements
 QUESTION

• Explain what are the effects of newer

technologies on the electrical, logical and
temporal masking
• The reduction in the number of gates between latches
affects to logical and electrical masking.

• Newer technologies produce stronger SE pulses that

cannot be electrically masked so easily (remember VDD
goes down).

• As working frequencies raise, since there is more

latching clock edge now present, the probability that
a combinational fault is latched (becomes an error) is
higher.
The probability of this overlap to occur increases with
clock frequency and the width of the injected transient fault.
Question: In older technologies like 1 m and above, the Single
Event Transients generated due to radiation in commercial
application did not cause any concern.

Assume, the figure above is for an older technology. The figure

below shows that an SET transient is generated at node x. It
also shows that nothing reaches to the output, so output stays
remain at 0.

Figure out which of the following statement is false (only one

answer is incorrect):
a) In older technologies, the circuit nodes capacitances
were large due to the fact that transistor areas were in
micro-meter squares so charges did not create enough
voltage.
b) In older technologies, the voltage swings were high,
which made the SET transients unimportant.
c) In older technologies the SET pulse width was very
short compared to normal logic pulse .This made SET
unimportant.
d) We can expect more electrical masking in older
technologies compared to newer technologies.
e)In newer technologies like 90 nm, we can expect there
would be more timing window or latching window
masking compared to older technologies.
a) In older technologies, the circuit nodes capacitances
were large due to the fact that transistor areas were in
micro-meter squares so charges did not create enough
voltage.
b) In older technologies, the voltage swings were high,
which made the SET transients unimportant.
c) In older technologies the SET pulse width was very
short compared to normal logic pulse .This made SET
unimportant.
d) We can expect more electrical masking in older
technologies compared to newer technologies.
e)In newer technologies like 90 nm, we can expect there
would be more timing window or latching window
masking compared to older technologies.
QUESTION

TRUE/ FALSE

If an SET created on a circuit node, this always

mean and SEU error (soft error) will be created.
FALSE

When a particle strikes and creates a pulse at a node,

researchers generally refer to it as a single-event
transient (SET) fault. At the moment the particle strikes
and has created a pulse, it has not yet generated
any soft error. (SEU is not yet created).

No masking should occur, before and SEU created from

an SET pulse.
For an SET to cause false data in a circuit and for the data to
propagate to a point where it can do harm, the situation must
satisfy the following conditions:

A disturbance must be strong enough to generate a signal

on any one of the nodes in a circuit. This can happen
anywhere in a circuit, at any time. We can only
probabilistically predict its occurrence.

Such signals are rather narrow spikes. Therefore, the

combinational logic must be fast enough to propagate
such a signal. Or spikes should have enough width and
be comparable to a logic pulse.
For this narrow pulse to propagate through the
combinational logic, the path it takes must be logically
Enabled

Finally, for this narrow pulse to do damage later on,

it must be latched.