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Unit - 4 Specification of DAC & ADC
Unit - 4 Specification of DAC & ADC
&
ADC Specification
DAC Specification
DAC Specification
• Resolution
• Linearity
• Accuracy
• Monotonicity
• Settling time
• Stability
• Offset Voltage
• Temperature Sensitivity
Resolution
•• It is smallest change in the analog output voltage of DAC. The resolution
is equal to the value of LSB and some time called as the step size.
voltage.
voltage
Example
•
• 10 bit DAC Resolution
Linearity
• It tells about the linear characteristics of DAC
linearity error.
Linearity
Accuracy
• Accuracy tells about the ability of a DAC to produce accurate output
– Relative Accuracy
• Absolute Accuracy
• Relative Accuracy
• That is the output increases and not decrease for the increment in binary
input.
• For a monotonic DAC, the error must be less than LSB at each output
voltage level.
Settling Time
•• It is defined as the time required for DAC output to settle within
LSB range of its final value for a given digital binary input.
conversion.
Stability
DAC.
voltage.
characteristics line starts from origin. Doing this so, increases gain error.
• The offset voltage is adjusted by selecting a proper scaling factor ‘k’ of DAC.
Differentia Non Linearity Error
sensitivity.
• For a particular digital input, the output voltage changes due to changes in
• The output voltage sensitivity ranges from to (ppm-parts per million) for
practical DACs.
ADC Specification
DAC Specification
• Resolution
• Accuracy
• Conversion time
• Quantization Error
• Analog Error
• Dither
Resolution
•• The
minimum change in input analog signal which is accepted
for conversion is given by resolution.
given by
resolution.
Linearity and Linearity Error
• It is linear characteristics of ADC.
• Linearity is the measure of accuracy and tells how close the output
error.
represents 001 as binary output, then the input of 0.7V will represent only 001 as
output.
• During DAC process, this 001 will be only restored as 1V and not as 0.7V.
noise.
Differential Non-linearity Error(DNL)
• The analog input voltage levels that produces any two successive binary output
codes should differ only by 1 LSB. Otherwise it may result in DNL error.
• DNL error is zero, because for every 1V change in input causes output to evenly
convert.
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