Switched-Capacitor Circuits

By
GSV. PRABHUJI
ROLL NO:1221209122
M.TECH(VLSI)

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 Why Switched Capacitor

 Better tolerance; typically ± 1.0%.

 Better matching -typically ± 0.1%.
 Better Linearity.
 Wider range.
 Speed and precision considerations.

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Continuous-time feedback amplifiers

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Using Capacitors

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Use of Resistor to define bias point

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Basic Switched-Capacitor Amplifier

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 Advantages
 Compatibility with cmos technology.

 Good accuracy of time constants.

 Good voltage linearity.

 Good temp characteristics.

 High accuracy determined by gain.

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 Disadvantages
 Clock Feedthrough.

 Requires non overlapping clock.

 Bandwidth of signal less than clock frequency.

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MOSFETS as SWITCHES

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Nmos and Pmos switches

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Cmos Switch

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 Precision Considerations
Channel charge injection

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 Types of Errors due to CCI
 Gain Error.

 DC Offset.

 Non linearity.

In many applications, the first two can be tolerated or corrected

whereas the last cannot .

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Clock Feedthrough

REMEDIES TO REDUCE CCI

 Addition of dummy device.

 Use of complementary Switches.

 Differential Sampling circuit.

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Switched-Capacitor Amplifiers
 Unity Gain Buffer.

 Unity Gain Sampler.

 Non inverting amplifier.

 Switched capacitor Integrator.

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Unity Gain Buffer
 S1 ON - SAMPLE MODE.
 S1 OFF - HOLD / BUFFER MODE

 It suffers from low precision due to

CCI From S1.

 Input dependent CCI.

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Unity Gain Sampler.

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Switched capacitor Integrator

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Modeling Resistor Using SC ckts

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Simulation

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 Net List
.MODEL nmos nmos (LEVEL=1 VTO=0.7 GAMMA=0 PHI=0.9
NSUB=9E+14 LD=0.08E-6 UO=350 LAMBDA=0.1 TOX=9E-9 PB=0.9
CJ=0.56E-3 CJSW=0.35E-11 MJ=0.45 MJSW=0.2 CGDO=0.4E-9 JS=1.0E-8)

M1 1 2 3 0 nmos w=0.5u l=0.5u

M2 4 5 1 0 nmos w=0.50u l=0.5u
V1 2 3 PULSE 0 3v 1u 1n 1n 3u 10u 10
V2 3 0 1V
V3 5 0 PULSE 0 3v 6u 1n 1n 3u 10u 10
V4 4 0 0.5V
C1 0 1 100pf ic=-0.5v
H1 6 0 v2 -1
R1 6 7 1k
C2 0 7 1m
.END

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Output

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 References
 Advanced Analog IC Design By Prof Y.CHIU

 Design of Analog cmos integrated ckts By BEHZAD RAZAVI

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Thank u

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