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Analog To Digital Converters: Byron Johns Danny Carpenter Stephanie Pohl Harry "Bo" Marr October 4, 2005
Analog To Digital Converters: Byron Johns Danny Carpenter Stephanie Pohl Harry "Bo" Marr October 4, 2005
Converters
Byron Johns
Danny Carpenter
Stephanie Pohl
Harry “Bo” Marr
October 4, 2005
Presentation Outline
Introduction: Analog vs. Digital?
Examples of ADC Applications
Types of A/D Converters
A/D Subsystem used in the
microcontroller chip
Examples of Analog to Digital Signal
Conversion
Successive Approximation ADC
First Presenter
Byron Johns
Analog Signals
Analog signals – directly measurable quantities
in terms of some other quantity
Examples:
Thermometer – mercury height rises as
temperature rises
Car Speedometer – Needle moves farther
right as you accelerate
Stereo – Volume increases as you turn the
knob.
Digital Signals
Digital Signals – have only two states. For
digital computers, we refer to binary states, 0
and 1. “1” can be on, “0” can be off.
Examples:
Light switch can be either on or off
Converters
Flash ADC
Delta-Sigma ADC
Dual Slope (integrating) ADC
Successive Approximation ADC
Flash ADC
Consists of a series of comparators, each
one comparing the input signal to a unique
reference voltage.
Advantages Disadvantages
Simplest in terms of
operational theory Lower resolution
Expensive
Most efficient in terms For each additional
of speed, very fast output bit, the number
limited only in terms of of comparators is
comparator and gate
propagation delays
doubled
i.e. for 8 bits, 256
comparators needed
Sigma Delta ADC
Over sampled input
signal goes to the
integrator
Output of integration is
compared to GND
Iterates to produce a
serial bit stream
Output is serial bit
stream with # of 1’s
proportional to Vin
Outputs of Delta Sigma
Sigma-Delta
Advantages Disadvantages
0 5 10 15 20 25
Resolution (Bits)
ADR1 - result 1
Analog Multiplexer
Result ADR2 - result 2
A/D Converter Register ADR3 - result 3
Interface
ADR4 - result 4
Stuctural Diagram of ADC on
HC11
PE0
8-bits CAPACITIVE DAC
AN0
WITH SAMPLE AND HOLD VRH
PE1
AN1
PE2
SUCCESSIVE APPROXIMATION
AN2
REGISTER AND CONTROL VRL
PE3
AN3 ANALOG
MUX
PE4
AN4
PE5
INTERNAL
AN5
DATA BUS
PE6
MULT
SCAN
CCF
CD
CC
CB
CA
AN6
PE7
AN7 ADCTL A/D CONTROL
Conversion Sequence
E Clock cycles:
1 0 0 1 1 - 0 0
Bit: 7 6 5 4 3 2 1 0
• ADPU: Power up (1) wait 100ms, No conversion (0)
• CSEL: use internal system clock (1), use E-clock (0)
• IRQE: Falling Edge interupt (1), low level interrupt (0)
• DLY: Delay enabled (1), Delay disabled (0)
• CME: Monitor Clock (1), Don’t monitor clock (0)
•CR[1:0] = Divide E clock by 1, 4, 16, 64.
• pg 38 in reference manual
Analog to Digital Results
Register: $1031 - $1034
ADR2 ($1032)
0 0 0 0 0 0 1 0
Bit: 7 6 5 4 3 2 1 0