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Announcements: 1. Information You'd Like To Get From This Course
Announcements: 1. Information You'd Like To Get From This Course
p = dw/dt = (dw/dq)(dq/dt) = vi
• Concept:
As a positive charge q moves through a drop in voltage
of amount v, it loses energy
energy change = qv
rate is proportional to # charges/sec
i - v +
Note that we have used the “ground” symbol ( ) for the reference
node on the DVM. Often it is labeled “C” for “common.”
EE 42 and 100, Fall 2005 Week 1 8
Sign Convention for Power
Passive sign convention
p = vi p = -vi
i i i i
_ _
+ +
v v v v
_ + _ +
Conservation of energy
total power delivered
equals
total power absorbed
Aside: For electronics these are un-
realistically large currents – mA is
more typical than A (1 mA = 0.001A)
vi (W) p (W)
918
- 810
- 12
- 400
- 224
1116
– resistor
passive elements, incapable of
– inductor generating electric energy
– capacitor
vs +_ vs=vx +_ vs=ix +_
independent
EE 42 and 100, Fall 2005 voltage-controlled
Week 1 current-controlled
13
Other Independent Voltage Source Symbols
Sinusoidal AC source
v(t) = Vpeaksin(t)
veffective v peak / 2
(In US, veff = 120 V, so
Vpeak = 170 V)
is is=vx is=ix
independent
EE 42 and 100, Fall 2005 voltage-controlled
Week 1 current-controlled
17
Electrical Resistance
• Resistance: Electric field is proportional to current
density, within a resistive material. Thus, voltage is
proportional to current. The circuit element used to
model this behavior is the resistor.
R
Circuit symbol:
I I1
wire I3
I2 I4
Sponge Constriction
Figure 0.3 Resistor (left), schematic symbol (left center), and two alternative water models (right)
Material resistivity
= (-cm)
T
L
W
Example:
Consider an 8 resistor. What is its conductance?
Example:
i2
i3
i1
i4
15 mA
3 formulations of KCL:
1.
2.
3.
EE 42 and 100, Fall 2005 Week 1 35
Generalization of KCL
• The sum of currents entering/leaving a closed
surface is zero. Circuit branches can be inside this
surface, i.e. the surface can enclose more than one
node!
i2
i3
5A
2A i
+ –
loop v1 voltage loop v2 voltage
“drop” “rise”
_ (negative drop)
+
Formulation 2:
Algebraic sum of voltage drops around loop = 0
• Voltage rises are included with a minus sign.
(Handy trick: Look at the first sign you encounter on each element when tracing the loop.)
Formulation 3:
Algebraic sum of voltage rises around loop = 0
• Voltage drops are included
EE 42 and 100, Fall 2005 Week 1with a minus sign. 39
A Major Implication of KVL
• KVL tells us that any set of elements that are
connected at both ends carry the same voltage.
• We say these elements are connected in parallel.
+ +
va vb
_ _
1 2
+ + +
va vb vc
-
3
Path 1:
Path 2:
Path 3:
EE 42 and 100, Fall 2005 Week 1 41
An Underlying Assumption of
KVL
• No time-varying magnetic flux through the loop
Otherwise, there would be an induced voltage (Faraday’s Law)
I
• KCL tells us that the same
current (I) flows through
R1
every resistor
R2
+ • KVL tells us
VSS
R3
R4
R2
+ R2
+
+ – V2 VSS + – V2
VSS
R3 R3
R4 R4 R5
R R
V 2 V V ≠ 2 V
2 SS 2 SS
R R R R R R R R
1 2 3 4 1 2 3 4
Correct, if nothing else because R5 removes condition
isEEconnected to nodes
42 and 100, Fall 2005 of1 resistors in series
Week 45
Resistors in Parallel
Consider a circuit with two resistors connected in parallel.
Find their “equivalent resistance”.
x
• KVL tells us that the
I1 I2 same voltage is dropped
across each resistor
ISS R1 R2
Vx = I1 R1 = I2 R2
• KCL tells us
I I
+ +
eq
V R1 R2 R3 V Req
Potential
d e
I1 I2
+ I
I1 I2 I3 V V
I R1 R2 R3 1 1 1
R1 R 2 R 3
V 1/R 3
I3 I
R3 1/R
1 1/R 2 1/R 3