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Fundamentals of

Bus Bar Protection


&
LBB Protection
By
Abhay Kumar, DGM _Engg. S/S
POWERGRID, CC, Gurgaon
Outline

• Bus arrangements
• Bus components
• Bus protection techniques
• CT Saturation
• Application Considerations:
 High impedance bus differential relaying
 Low impedance bus differential relaying
 Special topics
 LBB (or BFR) Protection
Single bus - single breaker
ZONE 1

1 2 3 ---- n-1 n

• Distribution and lower transmission voltage levels


• No operating flexibility
• Fault on the bus trips all circuit breakers
Multiple bus sections - single breaker with
bus tie
ZONE 2
ZONE 1

• Distribution and lower transmission voltage levels


• Limited operating flexibility
Double bus - single breaker with bus tie
ZONE 1

ZONE 2

• Transmission and distribution voltage levels


• Breaker maintenance without circuit removal
• Fault on a bus disconnects only the circuits being connected to
that bus
Main and transfer buses
MAIN BUS

ZONE 1

TRANFER BUS

• Increased operating flexibility


• A bus fault requires tripping all breakers
• Transfer bus for breaker maintenance
Double bus – single breaker w/ transfer bus
ZONE 1

ZONE 2

• Very high operating flexibility


• Transfer bus for breaker maintenance
• Tripping of Bus Bar protection means loosing
all feeders connected to that bus
Double bus - double breaker
ZONE 1

ZONE 2

• High operating flexibility


• Line protection covers bus section between two CTs
• Fault on a bus does not disturb the power to circuits
Breaker-and-a-half bus
ZONE 1

ZONE 2

• Used on higher voltage levels


• More operating flexibility
• Requires more breakers
• Tie CB covered by line or other equipment protection
Ring bus L1 L2

TB1

B1 B2

TB1

L3 L4

• Higher voltage levels


• High operating flexibility with minimum breakers
• Separate bus protection not required at line positions
Bus components breakers
BUS 1

BUS 2

ISO 1 ISO 2

Low Voltage circuit breakers

CB 1
ISO 3
BYPASS

SF6, EHV & HV - Synchropuff


Disconnect switches & auxiliary contacts
BUS 1

BUS 1
BUS 2
+

ISOLATOR 1
7B 7A

ISO 1 ISO 2 ISOLATOR 1 OPEN


F1a Contact Input F1a On
F1c Contact Input F1c On
F1b

BUS 1

ISOLATOR 1
+
CB 1
7B 7A
ISO 3
BYPASS
ISOLATOR 1 CLOSED
F1a Contact Input F1a On
F1c Contact Input F1c On
F1b

-
Current Transformers
BUS 1

BUS 2

ISO 1 ISO 2

Gas (SF6) insulated current


transformer

Oil insulated current transformer


(35kV up to 800kV)
CB 1
ISO 3
BYPASS

Bushing type (medium


voltage switchgear)
Protection Requirements
• High bus fault currents due to large number of circuits
connected:
– CT saturation often becomes a problem as CTs may not be sufficiently
rated for worst fault condition case
– large dynamic forces associated with bus faults require fast clearing
times in order to reduce equipment damage
• False trip by bus protection may create serious problems:
– service interruption to a large number of circuits (distribution and sub-
transmission voltage levels)
– system-wide stability problems (transmission voltage levels)
• With both dependability and security important, preference is
always given to security
Bus Protection Techniques
• Interlocking schemes
• Overcurrent (“unrestrained” or “unbiased”)
differential
• Overcurrent percent (“restrained” or
“biased”) differential
• Linear couplers or arc flash protection
• High-impedance bus differential schemes
• Low-impedance bus differential schemes
Interlocking Schemes
• Blocking scheme typically used
• Short coordination time
required
50
• Care must be taken with
possible saturation of feeder

B LO C K
CTs
50 50 50 50 50
• Blocking signal could be sent
over communications ports
(peer-to-peer)
• This technique is limited to
simple one-incomer
distribution buses
Overcurrent (unrestrained) Differential
• Differential current derived by
summation of all feeder currents
connected to the bus
• CT ratio matching may be required
• On external faults, saturated CTs
51 yield spurious differential current
• Time delay used to cope with CT
saturation
• Instantaneous differential OC
function useful on integrated
microprocessor-based relays
• May maloperate on CT saturation
on external fault
Linear Couplers

ZC = 2  – 20  - typical coil impedance

(5V per 1000Amps => 0.005 @ 60Hz )

59
0V
40 V 10 V 10 V 0V 20 V
External
Fault
If = 8000 A

2000 A 2000 A 0A 4000 A


Linear Couplers
Esec= Iprim*Xm - secondary voltage on relay terminals

IR= Iprim*Xm /(ZR+ZC) – minimum operating current

where,
Iprim – primary current in each circuit
Xm – liner coupler mutual reactance (5V per 1000Amps => 0.005 @ 60Hz )
ZR – relay tap impedance
ZC – sum of all linear coupler self impedances
If = 8000 A Internal Bus
Fault

40 V 59
0V 10 V 10 V 0V 20 V

0A 2000 A 2000 A 0A 4000 A


Linear Couplers

• Fast, secure and proven


• Require dedicated air gap CTs, which may not be used for any
other protection
• Cannot be easily applied to reconfigurable buses
• The scheme uses a simple voltage detector – it does not
provide benefits of a microprocessor-based relay (e.g.
oscillography, breaker failure protection, other functions)
High Impedance –Differential
Operating signal created by
connecting all CT secondaries in
parallel
• CTs must all have the same ratio
• Must have dedicated CTs
– Overvoltage element operates on
voltage developed across resistor
59
connected in secondary circuit
• Requires varistors or AC shorting
relays to limit energy during
faults
– Accuracy dependent on
secondary circuit resistance
• Usually requires larger CT cables
to reduce errors  higher cost

Cannot easily be applied to reconfigurable buses and


offers no advanced functionality
Percent Differential

• Percent characteristic used


to cope with CT saturation
and other errors
• Restraining signal can be 87
51

formed in a number of
ways
• No dedicated CTs needed
• Used for protection of re-
configurable buses possible
I DIF  I 1  I 2  ...  I n
I RES  I 1  I 2  ...  I n I RES  max  I 1 , I 2 , ..., I n 
Low Impedance Percent Differential
– Individual currents sampled by protection and summated digitally
• CT ratio matching done internally (no auxiliary CTs)
• Dedicated CTs not necessary
– Additional algorithms improve security of percent differential
characteristic during CT saturation
– Dynamic bus replica allows application to reconfigurable buses
• Done digitally with logic to add/remove current inputs from differential
computation
• Switching of CT secondary circuits not required
– Low secondary burdens
– Additional functionality available
• Digital oscillography and monitoring of each circuit connected to bus zone
• Time-stamped event recording
• Breaker failure protection
Digital Differential Algorithm Goals
– Improve the main differential algorithm operation
• Better filtering
• Faster response
• Better restraint techniques
• Switching transient blocking
– Provide dynamic bus replica for reconfigurable bus bars
– Dependably detect CT saturation in a fast and reliable manner,
especially for external faults
– Implement additional security to the main differential algorithm to
prevent incorrect operation
• External faults with CT saturation
• CT secondary circuit trouble (e.g. short circuits)
Low Impedance Differential (Distributed)
– Data Acquisition Units (DAUs)
installed in bays
52 52 52 – Central Processing Unit (CPU)
processes all data from DAUs
DA U DA U DA U
– Communications between
DAUs and CPU over fiber using
proprietary protocol
– Sampling synchronisation
between DAUs is required
CU – Perceived less reliable (more
hardware needed)
co pp er
fi be r
– Difficult to apply in retrofit
applications
Low Impedance Differential (Centralized)

– All currents applied to a single


52 52 52 central processor
– No communications, external
sampling synchronisation
necessary
– Perceived more reliable (less
hardware needed)
– Well suited to both new and
CU
retrofit applications.
co pp er
CT Saturation
CT Saturation Concepts
– CT saturation depends on a number of factors
• Physical CT characteristics (size, rating, winding resistance,
saturation voltage)
• Connected CT secondary burden (wires + relays)
• Primary current magnitude, DC offset (system X/R)
• Residual flux in CT core
– Actual CT secondary currents may not behave in the same manner as
the ratio (scaled primary) current during faults
– End result is spurious differential current appearing in the summation
of the secondary currents which may cause differential elements to
operate if additional security is not applied
CT Saturation
No DC Offset
• Waveform remains fairly
symmetrical

Ratio Current CT Current

With DC Offset
• Waveform starts off being
asymmetrical, then
symmetrical in steady state
Ratio Current CT Current
External Fault & Ideal CTs
d iffere ntia l

t1

t0 restraining
– Fault starts at t0
– Steady-state fault conditions occur at t 1

Ideal CTs have no saturation or mismatch errors thus


produce no differential current
External Fault & Actual CTs
d iffere ntia l

t1

t0 restraining
– Fault starts at t0
– Steady-state fault conditions occur at t 1

Actual CTs do introduce errors, producing some differential


current (without CT saturation)
External Fault with CT Saturation
t2
d iffere ntia l

t1

t0 restraining
– Fault starts at t0, CT begins to saturate at t1
– CT fully saturated at t2

CT saturation causes increasing differential current that


may enter the differential element operate region.
Some Methods of Securing Bus Differential
– Block the bus differential for a period of time (intentional delay)
• Increases security as bus zone will not trip when CT saturation is present
• Prevents high-speed clearance for internal faults with CT saturation or
evolving faults
– Change settings of the percent differential characteristic (usually Slope 2)
• Improves security of differential element by increasing the amount of
spurious differential current needed to incorrectly trip
• Difficult to explicitly develop settings (Is 60% slope enough? Should it be
75%?)
– Apply directional (phase comparison) supervision
• Improves security by requiring all currents flow into the bus zone before
asserting the differential element
• Easy to implement and test
• Stable even under severe CT saturation during external faults
High-Impedance Bus
Differential Considerations
High Impedance Voltage-operated Relay
• 59 element set above max possible voltage developed across
relay during external fault causing worst case CT saturation
• For internal faults, extremely high voltages (well above 59
element pickup) will develop across relay
High Impedance Voltage Operated Relay
Ratio matching with Multi-ratio CTs
• Application of high impedance differential relays with CTs of
different ratios but ratio matching taps is possible, but could lead
to voltage magnification. It is not recommended
• Voltage developed across full winding of tapped CT does not
exceed CT rating, terminal blocks, etc.
High Impedance Voltage Operated Relay
Ratio matching with Multi-ratio CTs
• Use of auxiliary CTs to obtain correct ratio matching is also
possible, but these CTs must be able to deliver enough voltage
necessary to produce relay operation for internal faults.
Electromechanical High Impedance Bus
Differential Relays

• Single phase relays


• High-speed

•  
High impedance voltage sensing
High seismic          
IOC unit
P -based High-Impedance Bus Differential
Protection Relays

Operating time: 20 – 30ms @ I > 1.5xPKP


High Impedance Module for Digital
Relays

RST = 2000 - stabilizing resistor to limit the current


through the relay, and force it to the lower impedance CT
windings.
MOV – Metal Oxide Varistor to limit the voltage to
1900 Volts
86 – latching contact preventing the resistors from
overheating after the fault is detected
High-Impedance Module
+
Overcurrent Relay
High Impedance Bus Protection - Summary
• Fast, secure and proven
• Requires dedicated CTs, preferably with the same CT ratio and
using full tap
• Can be applied to small buses
• Depending on bus internal and external fault currents, high
impedance bus diff may not provide adequate settings for both
sensitivity and security
• Cannot be easily applied to reconfigurable buses
• Require voltage limiting varistor capable of absorbing significant
energy
• May require auxiliary CTs
• Do not provide full benefits of microprocessor-based relay
system (e.g. metering, monitoring, oscillography, etc.)
Low-Impedance Bus
Differential Considerations
P-based Low-Impedance Relays
• No need for dedicated CTs
• Internal CT ratio mismatch compensation
• Advanced algorithms supplement percent differential protection
function making the relay very secure
• Dynamic bus replica (bus image) principle is used in protection of
reconfigurable bus bars, eliminating the need for switching
physically secondary current circuits
• Integrated Breaker Failure (BF) function can provide optimal
tripping strategy depending on the actual configuration of a bus
bar
Small Bus Applications
2-8 Circuit Applications
• Up to 24 Current Inputs • Different CT Ratio Capability for
• 4 Zones Each Circuit
• Zone 1 = Phase A • Largest CT Primary is Base in
• Zone 2 = Phase B Relay
• Zone 3 = Phase C
• Zone 4 = Not used
Medium to Large Bus Applications
9-12 Circuit Applications
• Relay 1 - 24 Current Inputs • Relay 2 - 24 Current Inputs
• 4 Zones • 4 Zones
• Zone 1 = Phase A (12 currents) • Zone 1 = Not used
• Zone 2 = Phase B (12 currents) • Zone 2 = Not used
• Zone 3 = Not used • Zone 3 = Phase C (12 currents)
• Zone 4 = Not used • Zone 4 = Not used
• Different CT Ratio Capability for Each Circuit
• Largest CT Primary is Base in Relay

CB 11 CB 12
Large Bus Applications

87B phase A

87B phase B

87B phase C

Logic relay
(switch status,
optional BF)
Large Bus Applications
For buses with up to 24 circuits
Summing External Currents
Not Recommended for Low-Z 87B relays

CT-1
• Relay becomes combination
of restrained and unrestrained
CT-2
elements
• In order to parallel CTs:
CT-3
– CT performance must be closely
I 1 = Error

matched
• Any errors will appear as
CT-4
I2 = 0

differential currents
– Associated feeders must be
I3 = 0

I DIFF = Error Maloperation if


radial
I REST = Error Error > PICKUP • No backfeeds possible
– Pickup setting must be raised to
accommodate any errors
Definitions of Restraint Signals
iR  i1  i2  i3  ...  in “sum of”

1
iR   i1  i2  i3  ...  in  “scaled sum of”
n

iR  n i1  i2  i3  ...  in “geometrical average”

iR  Max  i1 , i2 , i3 ,..., in  “maximum of”


“Sum Of” vs. “Max Of” Restraint Methods
• “Sum Of” Approach • “Max Of” Approach
– More restraint on external faults; – Less restraint on external faults;
less sensitive for internal faults more sensitive for internal faults
– “Scaled-Sum Of” approach takes – Breakpoint settings for the
into account number of percent differential characteristic
connected circuits and may easier to set
increase sensitivity – Better handles situation where
– Breakpoint settings for the one CT may saturate completely
percent differential characteristic (99% slope settings possible)
more difficult to set
Bus Differential Adaptive Approach
R eg ion 2
(hig h d iffe re ntia l
c urre nts)
d iff e re n tia l

R eg ion 1
(lo w d iffe re ntia l
c urre nts )

re s tra ining
Bus Differential Adaptive Logic Diagram

DIFL

AND
DIR

OR
87B BIASED OP
OR

SAT
AND

DIFH
Phase Comparison Principle
• Internal Faults: All fault (“large”) currents are approximately in
phase.

• External Faults: One fault (“large”) current will be out of phase

Secondary Current of
Faulted Circuit
• No Voltages are required or needed (Severe CT Saturation)
Phase Comparison Principle Continued…

E xternal Fault C on ditions Internal Fau lt C onditio ns

 Ip   Ip 
imag   imag  
 ID  I p  OP E R AT E  ID  I p  OP E R ATE
   
B LOC K B L OC K
 Ip   Ip 
ID - Ip real   ID - I p real  
Ip  ID  I p   ID  I p 
   
Ip
B LOC K
B L OC K
OP E R AT E OP E R ATE
CT Saturation
t2
d iffere ntia l

t1

t0 restraining
– Fault starts at t0, CT begins to saturate at t1
– CT fully saturated at t2
CT Saturation Detector State Machine
NORMAL

SAT := 0

The differential
current below the saturation
first slope for condition
certain period of
time EXTERNAL
FAULT

SAT := 1
The differential-
The differential restraining trajectory
characteristic out of the differential
entered characteristic for
certain period of time
EXTERNAL
FAULT & CT
SATURATION

SAT := 1
CT Saturation Detector Operating Principles

• The 87B SAT flag WILL NOT be set during internal faults,
regardless of whether or not any of the CTs saturate.
• The 87B SAT flag WILL be set during external faults,
regardless of whether or not any of the CTs saturate.
• By design, the 87B SAT flag WILL force the relay to use the
additional 87B DIR phase comparison for Region 2

The Saturation Detector WILL NOT Block the Operation of


the Differential Element – it will only Force 2-out-of-2
Operation
CT Saturation Detector - Examples
– The oscillography records on the next two slides were captured from a
B30 relay under test on a real-time digital power system simulator
– First slide shows an external fault with deep CT saturation (~1.5 msec
of good CT performance)
• SAT saturation detector flag asserts prior to BIASED PKP bus
differential pickup
• DIR directional flag does not assert (one current flows out of zone),
so even though bus differential picks up, no trip results
– Second slide shows an internal fault with mild CT saturation
• BIASED PKP and BIASED OP both assert before DIR asserts
• CT saturation does not block bus differential
– More examples available (COMTRADE files) upon request
CT Saturation Example – External Fault 200

150

100 ~1 ms
50

current, A
0

-50

-100

-150

-200
0.06 0.07 0.08 0.09 0.1 0.11 0.12
time, sec

The bus differential The CT saturation flag


protection element is set safely before the
picks up due to heavy pickup flag
CT saturation

Despite heavy CT
saturation the
external fault current
The element is seen in the
The
does not opposite direction
directional flag
maloperate
is not set
CT Saturation – Internal Fault Example

The bus differential


protection element
picks up
The saturation
flag is not set - no
directional
decision required

All the fault currents


are seen in one
direction

The
The element directional
operates in flag is set
10ms
Applying Low-Impedance Differential Relays
for Busbar Protection
Basic Topics
– Configure physical CT Inputs
– Configure Bus Zone and Dynamic Bus Replica
– Calculating Bus Differential Element settings
Advanced Topics
– Isolator switch monitoring for reconfigurable buses
– Differential Zone CT Trouble
– Integrated Breaker Failure protection
Configuring CT Inputs
– For each connected CT circuit enter Primary rating
and select Secondary rating.
– Each 3-phase bank of CT inputs must be assigned
to a Signal Source that is used to define the Bus
Zone and Dynamic Bus Replica

Some relays define 1 p.u. as the maximum primary


current of all of the CTs connected in the given Bus
Zone
Per-Unit Current Definition - Example
Current Primary Secondary Zone
Channel
CT- F1 3200 A 1A 1
1
CT- F2 2400 A 5A 1
2
CT- F3 1200 A 1A 1
3
CT- F4 3200 A 1A 2
4
• For Zone 1, 1 F5
CT- p.u. = 32001200
APA 5A 2
• For5Zone 2, 1 p.u. = 5000 AP
CT- F6 5000 A 5A 2
6
Configuration of Bus Zone
– Dynamic Bus Replica associates a status signal with
each current in the Bus Differential Zone
– Status signal can be any logic operand
• Status signals can be developed in programmable logic
to provide additional checks or security as required
• Status signal can be set to ‘ON’ if current is always in the
bus zone or ‘OFF’ if current is never in the bus zone
– CT connections/polarities for a particular bus zone
must be properly configured in the relay, via either
hardwire or software
Configuring the Bus Differential Zone
Bus Zone settings defines the boundaries of the Differential
Protection and CT Trouble Monitoring.

1. Configure the physical CT Inputs


• CT Primary and Secondary values
• Both 5 A and 1 A inputs are supported by the UR hardware
• Ratio compensation done automatically for CT ratio differences up to 32:1
2. Configure AC Signal Sources
3. Configure Bus Zone with Dynamic Bus Replica
Dual Percent Differential Characteristic

High Set
(Unrestrained)

High Slope

Low Slope
High
Breakpoint

Min Pickup Low


Breakpoint
Calculating Bus Differential Settings
– The following Bus Zone Differential element parameters need to be set:
• Differential Pickup
• Restraint Low Slope
• Restraint Low Break Point
• Restraint High Breakpoint
• Restraint High Slope
• Differential High Set (if needed)
– All settings entered in per unit (maximum CT primary in the zone)
– Slope settings entered in percent
– Low Slope, High Slope and High Breakpoint settings are used by the CT
Saturation Detector and define the Region 1 Area (2-out-of-2 operation
with Directional)
Calculating Bus Differential Settings –
Minimum Pickup

– Defines the minimum differential current required for


operation of the Bus Zone Differential element
– Must be set above maximum leakage current not zoned off in
the bus differential zone
– May also be set above maximum load conditions for added
security in case of CT trouble, but better alternatives exist
Calculating Bus Differential Settings – Low
Slope

– Defines the percent bias for the restraint currents from


IREST=0 to IREST=Low Breakpoint
– Setting determines the sensitivity of the differential element
for low-current internal faults
– Must be set above maximum error introduced by the CTs in
their normal linear operating mode
– Range: 15% to 100% in 1%. increments
Calculating Bus Differential Settings – Low
Breakpoint
– Defines the upper limit to restraint currents that will be
biased according to the Low Slope setting
– Should be set to be above the maximum load but not
more than the maximum current where the CTs still
operate linearly (including residual flux)
– Assumption is that the CTs will be operating linearly (no
significant saturation effects up to 80% residual flux) up to
the Low Breakpoint setting
Calculating Bus Differential Settings – High Breakpoint

– Defines the minimum restraint currents that will be


biased according to the High Slope setting
– Should be set to be below the minimum current where
the weakest CT will saturate with no residual flux
– Assumption is that the CTs will be operating linearly (no
significant saturation effects up to 80% residual flux) up
to the Low Breakpoint setting
Calculating Bus Differential Settings – High
Slope
– Defines the percent bias for the restraint currents IRESTHigh
Breakpoint
– Setting determines the stability of the differential element
for high current external faults
– Traditionally, should be set high enough to accommodate the
spurious differential current resulting from saturation of the
CTs during heavy external faults
– Setting can be relaxed in favour of sensitivity and speed as
the relay detects CT saturation and applies the directional
principle to prevent maloperation
– Range: 50% to 100% in 1%. increments
Calculating Unrestrained Bus Differential
Settings

– Defines the minimum differential current for unrestrained operation


– Should be set to be above the maximum differential current under
worst case CT saturation
– Range: 2.00 to 99.99 p.u. in 0.01 p.u. increments
– Can be effectively disabled by setting to 99.99 p.u.
Dual Percent Differential Characteristic

High Set
(Unrestrained)

High Slope

Low Slope
High
Breakpoint

Min Pickup Low


Breakpoint
Reconfigurable Buses
C-3 C-5
NO RTH B US

B -1 S -1 S -3 S -5
B -5

CT-1 CT-7
CT-2 B -2 CT-3 B -3 CT-4 B -4 CT-5

B -7

CT-6
CT-8
B -6
S -2 S -4 S -6

S O UTH B US

C-1 C-2 C-4

Protecting re-configurable buses


Reconfigurable Buses
C-3 C-5
NO RTH B US

B -1 S -1 S -3 S -5
B -5

CT-1 CT-2 B -2 CT-4 B -4 CT-7


CT-3 B -3
CT-5

B -7

CT-6
CT-8
B -6
S -2 S -4 S -6

S O UTH B US

C-1 C-2 C-4

Protecting re-configurable buses


Reconfigurable Buses
C-3 C-5
NO RTH B US

B -1 S -1 S -3 S -5
B -5

CT-1 CT-2 B -2 CT-4 B -4 CT-7


CT-3 B -3
CT-5

B -7

CT-6
CT-8
B -6
S -2 S -4 S -6

S O UTH B US

C-1 C-2 C-4

Protecting re-configurable buses


Reconfigurable Buses
C-3 C-5
NO RTH B US

B -1 S -1 S -3 S -5
B -5

CT-1 CT-7
CT-2 B -2 CT-3 B -3 CT-4 B -4 CT-5

B -7

CT-6
CT-8
B -6
S -2 S -4 S -6

S O UTH B US

C-1 C-2 C-4

Protecting re-configurable buses


Isolators
– Reliable “Isolator Closed” signals are needed for the
Dynamic Bus Replica
– In simple applications, a single normally closed contact
may be sufficient
– For maximum safety:
• Both N.O. and N.C. contacts should be used
• Isolator Alarm should be established and non-valid combinations (open-
open, closed-closed) should be sorted out
• Switching operations should be inhibited until bus image is recognized
with 100% accuracy
• Optionally block 87B operation from Isolator Alarm
– Each isolator position signal decides:
• Whether or not the associated current is to be included in the
differential calculations
• Whether or not the associated breaker is to be tripped
Isolator – Typical Open/Closed Connections
Switch Status Logic and Dyanamic Bus Replica

Isolator Open Isolator Closed Isolator Position Alarm Block Switching


Auxiliary Auxiliary
Contact Contact
Off On CLOSED No No

Off Off LAST VALID After time delay Until Isolator


until Position is valid
On On CLOSED acknowledged

On Off OPEN No No

NOTE: Isolator monitoring function may be a built-in feature or user-


programmable in low impedance bus differential digital relays
Differential Zone CT Trouble
– Each Bus Differential Zone may a dedicated CT Trouble
Monitor
– Definite time delay overcurrent element operating on the
zone differential current, based on the configured
Dynamic Bus Replica
– Three strategies to deal with CT problems:
1. Trip the bus zone as the problem with a CT will likely evolve
into a bus fault anyway
2. Do not trip the bus, raise an alarm and try to correct the
problem manually
3. Switch to setting group with 87B minimum pickup setting
above the maximum load current.
Differential Zone CT Trouble
• Strategies 2 and 3 can be accomplished by:
 Using undervoltage supervision to ride through the period from
the beginning of the problem with a CT until declaring a CT
trouble condition
 Using an external check zone to supervise the 87B function
 Using CT Trouble to prevent the Bus Differential tripping (2)
 Using setting groups to increase the pickup value for the 87B
function (3)
Differential Zone CT Trouble – Strategy #2
Example
87B operates
Undervoltage condition
CT OK

• CT Trouble operand is used to rise an alarm


• The 87B trip is inhibited after CT Trouble
element operates
• The relay may misoperate if an external fault
occurs after CT trouble but before the CT trouble
condition is declared (double-contingency)
Example Architecture for Large Busbars
Dual (redundant) fiber with
3msec delivery time between
neighbouring IEDs. Up to 8
relays in the ring

Phase A AC signals and


trip contacts

Phase B AC signals and Phase C AC signals and


trip contacts trip contacts

Digital Inputs for isolator


monitoring and BF
Example Architecture – Dynamic Bus Replica and Isolator Position

Iso
l ato
n r
os itio Pos
itio
o r P n
l at
Iso Phase A AC signals wired
here, bus replica configured
here

Phase B AC signals wired Phase C AC signals wired


here, bus replica configured here, bus replica configured
here here
Iso io n
lat sit
o rP r Po
os
itio l ato
n Iso
Auxuliary switches wired here;
Isolator Monitoring function
configured here
Example Architecture – BF Initiation &
Current
v.
Supervision
B
nt Sup FI
niti
rre ate
Cu & Cu
i at e& rren
F Init Phase A AC signals wired
t Su
pv.
B
here, current status monitored
here

Phase B AC signals wired Phase C AC signals wired


p v.
here, current status monitored here, current status monitored Su
BF here here r ent
Ini C ur
tia
te e&
&
Cu it iat
rr In
en
tS BF
up
v. Breaker Failure
elements configured
here
Example ArchitectureTrip
– Breaker Failure Tripping
Bre
a ker
p F
ai lO ail
Op
F
a ker
Bre Phase A AC signals wired
here, current status monitored Trip
Trip here

Phase B AC signals wired Phase C AC signals wired


here, current status monitored here, current status monitored
here here
Br Trip Op
eak l
er Fai
Fa r
il O ake
e
p Br
Breaker Fail Op command
generated here and send to trip
appropriate breakers
IEEE 37.234
• “Guide for Protective Relay Applications to
Power System Buses” is currently being
revised by the K14 Working Group of the IEEE
Power System Relaying Committee.
Why Breaker Failure Protection ?

FAULT
B C
A
3 4

1 2 5 6
LOAD LOAD
7 8
LOAD

Figure 1 - Remote Breaker Clearing


Basic Breaker Failure Scheme

62-1
50BF Breaker Failure
AND Timer
BFI Scheme Output
Timing Chart

50BF
CURRENT
PROTECTIVE
DETECTOR
FAULT CLEARED
RELAY BREAKER MARGIN
TIME INTERRUPT TIME RESET TIME TIME
TIME

AUX
62-1 BREAKER FAILURE TIMER TIME TRIP LOCAL BACKUP BREAKER
BFI RELAY INTERRUPT TIME
TIME
TRANSFER TRIP
TIME
FAULT OCCURS REMOTE BACKUP BREAKER
TOTAL FAULT CLEARING TIME INTERRUPT TIME
Two Components
• Current Detector
• Breaker Failure Timer
Current Detector
• Detects current flow
• Pick up for minimum fault
• If phase current set above load current
• If ground current set above unbalance
• Drop out not delayed by dc offset
• Use 52a only if no current
Timer
• Longer than it takes the breaker to clear a
fault
• Shorter than the Critical Clearing Time plus
some margin.
• Could be longer for Line to Ground Faults than
for Three Phase Faults
Critical clearing Time
• Dictated by Transient Stability limit
• Results from Stability Study
• Typically taken as 100mSec.
Total Clearing Time
The sum of :
BFI pick up + Breaker Failure Timer + Auxiliary
trip relay time + Local back up breaker time +
(Transfer trip time if remote)
Transient Stability time
• Severity of Fault
• Loading on System
• Mass of Generators
• Type of Fault
Circuit Breaker Failure Modes
• Failure to Trip
• Failure to Clear
Failure to Trip
• Contacts do not open after trip circuit
energized.
• Short or open in Trip coil
• Mechanical problem with breaker
Failure to Clear

• Contacts open but fault not extinguished.


• Current continues to flow
• Mechanical or Dielectric problem
• Why auxiliary switches not reliable
Breaker Failure ReTrip

62-1
50BF Breaker Failure
AND Timer
BFI Scheme Output

62-2
Re-Trip the
Timer
Breaker

(Time Delay May be Zero Time)


Elimination of 50BF Reset Time

50BF

Enables 50BF
Breaker Failure
AND
Scheme Output
62-1

BFI Timer
Addition of Control Timer

Control
timer
50BF
Enabled only after Breaker Failure
62-1 times out AND
Scheme Output
62-1
Enable
BFI Timer
Breaker Failure Seal-In

62-1
50BF Breaker Failure
AND Timer
OR Scheme Output
BFI
Minimum Fault Current
• Use where current magnitude may not be
enough to pick up current detector
• Transformers
• Generators
• Harmonic Filters
Minimum Fault Current

62-1
BFI Breaker Failure
50BF AND Timer
OR Scheme Output
52a
Ring Bus Application

21/ 21/
79 79

Ring Bus
Ring Bus
• Separate Ct inputs into relay
• Careful of current distribution after one
breaker opens in setting current detectors.
• Another Working group (K5) to look into this
issue.
Distributed Breaker Failure

GOOSE

Breaker Failure
Protection

Relay Relay Relay

Trip

Fault Point
Design Considerations
• Total Breaker Failure clearing time should be
less than system stability limit.
• Independent of type of failure detected
• Should operate during loss of dc to breaker
Conclusions
• BFP should operate only when desired
• Timer setting should allow adequate margin between
backup breaker clearing and system critical clearing
time.
• Multiple timers can be used for different types of
faults
• Use auxiliary contacts as last resort for BFI.
Conclusions
• Phase current detectors should be set above load to
protect from scheme operating during testing.
• Seal in circuits should be used to insure breaker
failure scheme does not drop out prematurely
• Care should be taken when applying breaker failure
to ring bus and breaker and one half .
THANKS

ABHAY KUMAR
DGM, POWERGRID
abhaykumar@powergridindia.com

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