BMM 2020 & TT2020

Lecture 10
Sequential Circuits: Latches & Flip-flop

January 18, 2014

 CAPAIAN PEMBELAJARAN
• Mahasiswa dapat menjelaskan kerja dari
masing-masing komponen dasar rangkaian
Sequential.

°10/24/22
January 18, 2014
 Overview
• Circuits require memory to store intermediate
data
• Sequential circuits use a periodic signal to
determine when to store values.
– A clock signal can determine storage times
– Clock signals are periodic

• Single bit storage element is a flip flop

• A basic type of flip flop is a latch
• Latches are made from logic gates
– NAND, NOR, AND, OR, Inverter

January 18, 2014

Penggunaan Rangkaian sequensial
• Rangkaian Logika Kombinasional, hasil operasinya
akan merespon terhadap kombinasi input yang
diberikan.
– Hanya bisa menjumlahkan dua bilangan.
– Untuk menjumlahkan bilangan ketiga, diperlukan
penyimpanan informasi hasil penjumlahan
sebelumnya.
• Contoh : 2+1 +5
– 2 + 1 = 3……….3 disimpan, kemudian :
– 3 + 5 = 8 (a sequential operation);
• To handle this, we need sequential logic capable of
storing intermediate (and final) results.
January 18, 2014
 Rangkaian Sequensial

Clock
a periodic external event (input)
Clock
synchronizes when current state changes happen
keeps system well-behaved
makes it easier to design and build large systems
January 18, 2014
 S-R Latch with NORs
R (reset) Q S R Q Q’
1 10 0 Undefined
1 0 1 0 Set
Q 0 1 0 1 Reset
S (set) 0 0 0 1 Stable
1 0

° S-R latch made from cross-coupled NORs

° If Q = 1, set state
° If Q = 0, reset state
° Usually S=0 and R=0
° S=1 and R=1 generates unpredictable results
January 18, 2014
 S-R Latch with NANDs
S S R Q Q’
Q
0 0 1 1 Disallowed
0 1 1 0 Set
1 0 0 1 Reset
Q’
R 1 1 0 1 Store
1 0
° Latch made from cross-coupled NANDs
° Sometimes called S’-R’ latch
° Usually S=1 and R=1
° S=0 and R=0 generates unpredictable results

January 18, 2014

 S-R Latch with control input

° Occasionally, desirable to avoid latch changes

° C = 0 disables all latch state changes
° Control signal enables data change when C = 1
° Right side of circuit same as ordinary S-R latch.
January 18, 2014
 NOR S-R Latch with Control Input
Latch is level-sensitive, in regards to C
Only stores data if C’ = 0
R’
Q

C’

Latch operation Q’
S’
enabled by
C Outputs change
when C is low:
Input sampling RESET and SET
enabled by gates Otherwise: HOLD
January 18, 2014
 D Latch
° Q0 indicates the previous state (the previously stored value)

X
D S
Q
C

Q’

Y R
X Y C Q Q’
D C Q Q’
0 0 1 Q0 Q0’ Store
0 1 0 1
1 1 1 0 0 1 1 0 1 Reset
X 0 Q0 Q0’ 1 0 1 1 0 Set
1 1 1 1 1 Disallowed
X X 0 Q0 Q0’ Store
January 18, 2014
 X
D Latch
D S
Q
C

Q’

Y R
D C Q Q’
0 1 0 1
1 1 1 0
X 0 Q0 Q0’
° Input value D is passed to output Q when C is high
° Input value D is ignored when C is low
January 18, 2014
 D Latch Latches on following
edge of clock

E
x D
Q x
z
E C
z

° Z only changes when E is high

° If E is high, Z will follow X

January 18, 2014

 D Latch Latches on following
edge of clock

E
x D
Q x
z
E C
z

° The D latch stores data indefinitely, regardless of

input D values, if C = 0
° Forms basic storage element in computers

January 18, 2014

 Symbols for Latches

° SR latch is based on NOR gates

° S’R’ latch based on NAND gates
° D latch can be based on either.
° D latch sometimes called transparent latch
January 18, 2014
 Summary
• Latches are based on combinational gates (e.g. NAND,
NOR)
• Latches store data even after data input has been
removed
• S-R latches operate like cross-coupled inverters with
control inputs (S = set, R = reset)
• With additional gates, an S-R latch can be converted to a
D latch (D stands for data)
• D latch is simple to understand conceptually
– When C = 1, data input D stored in latch and output as Q
– When C = 0, data input D ignored and previous latch value output at Q
• Next time: more storage elements!

January 18, 2014

 Flip flops
• Latches respond to trigger levels on control inputs
– Example: If G = 1, input reflected at output

• Difficult to precisely time when to store data with

latches
• Flip flops store data on a rising or falling trigger
edge.
– Example: control input transitions from 0 -> 1, data input appears at output
– Data remains stable in the flip flop until until next rising edge.

• Different types of flip flops serve different functions

• Flip flops can be defined with characteristic
functions.
January 18, 2014
 Clocking Event
° What if the output only changed on a C transition?

Positive edge triggered

D C Q Q’
D Q
0 0 1
C Q’ 1 1 0
X 0 Q0 Q0 ’

Hi-Lo edge Lo-Hi edge

January 18, 2014
 Master-Slave D Flip Flop
° Consider two latches combined together
° Only one C value active at a time
° Output changes on falling edge of the clock

January 18, 2014

 D Flip-Flop
° Stores a value on the positive edge of C
° Input changes at other times have no effect on
output

Positive edge triggered

D C Q Q’
D Q
0 0 1
1 1 0
C Q’
X 0 Q0 Q0’

D gets latched to Q on the rising edge of the clock.

January 18, 2014
 Clocked D Flip-Flop
° Stores a value on the positive edge of C
° Input changes at other times have no effect on
output

January 18, 2014

Positive Edge-Triggered J-K Flip-Flop

°Created from D flop J K CLK Q Q’

°J sets 0 0  Q0 Q0’
0 1  0 1
°K resets 1 0  1 0
°J=K=1 -> invert output 1 1  TOGGLE

January 18, 2014

 Clocked J-K Flip Flop
° Two data inputs, J and K
° J -> set, K -> reset, if J=K=1 then toggle output

Characteristic Table

January 18, 2014

Positive Edge-Triggered T Flip-Flop

°Created from D flop

T C Q Q’
°T=0 -> keep current
0  Q 0 Q0’
°K resets 1  TOGGLE
°T=1 -> invert current

January 18, 2014

 Asynchronous Inputs

• J, K are synchronous inputs

o Effects on the output are synchronized with the CLK input.
• Asynchronous inputs operate independently of the synchronous
inputs and clock
o Set the FF to 1/0 states at any time.

January 18, 2014

Asynchronous Inputs

January 18, 2014

 Parallel Data Transfer
° Flip flops store outputs from combinational logic
° Multiple flops can store a collection of data

January 18, 2014

 Summary
• Flip flops are powerful storage elements
– They can be constructed from gates and latches!

• D flip flop is simplest and most widely used

• Asynchronous inputs allow for clearing and
presetting the flip flop output
• Multiple flops allow for data storage
– The basis of computer memory!

• Combine storage and logic to make a computation

circuit
• Next time: Analyzing sequential circuits.

January 18, 2014

 S1 Terapan
• Gunakan Multisim untuk merancang rangkaian
penyimpan 3 bit data secara paralel.
• Kemudian data tersebut dihapus
• Diisi lagi dengan data baru

°10/24/22
January 18, 2014