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Lecture 15 (New)
Lecture 15 (New)
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
• Contents:
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS
MEMR
IOR
MEMW
IOW
http://www.talktoanit.com/A+/aplus-website/lessons-io-principles.html
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS
http://www.kids-online.net/learn/click/details/ioports2.gif
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS
8-bit data ports
• 8088 I/O operation is applicable to all x86 CPUs.
– The 8-bit port uses the D0–D7 data bus for I/O devices.
• Register AL is used as the source/destination
for IN/OUT instructions.
– To input or output data from any other registers,
the data must first be moved to the AL register.
• Instructions OUT and IN have the following formats:
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS
how to use I/O instructions
• I/O instructions are used in programming 8- and
16-bit peripheral devices.
– Printers, hard disks, and keyboards.
• For an 8-bit port (fixed IO addressing), use immediate
addressing:
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS
how to use I/O instructions
• 16-bit port address instruction using register indirect
addressing mode with register DX.
– This program toggles port address 300H continuously.
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.1: 8088 INPUT/OUTPUT INSTRUCTIONS
how to use I/O instructions
Example 11-1 Temperature Alarm
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2 I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• I/O address decoding is similar to memory address
decoding.
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• Communicating with I/O devices using IN and OUT
instructions is referred to as peripheral I/O.
– Some designers also refer to it as isolated I/O.
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
Memory mapped I/O decoding Isolated I/O decoding
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• Decoding 8 bit I/O Port Addresses:
Fixed I/O instructions uses 8-bit I/O port address
that appear on A15 – A0 as 0000H – 00FFH.
Only A7 – A0 address lines are decoded and higher
lines are ignored. However, personal computers do
not used fixed I/O instructions and always use 16 –
bit I/O address line.
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
In figure 11-10, it can be seen that only lower 8
address lines are used to address any I/O device.
Each Yx connection is attached to single I/O device.
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• Only A7-A0 address lines are connected to decoder.
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• VHDL code for figure 11-11:
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• Decoding 16 Bit I/O port addresses:
PC systems typically use 16-bit I/O addresses.
What is the main difference between decoding 8 bit
I/O addresses and 16 bit I/O addresses?
The only difference is the number of address lines
engaged. 8-bit I/O addresses need decoding of A7-
A0 lines while 16 bit I/O addresses need decoding
of A15-A0.
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
• As we are decoding 16
address lines, all of them
cannot be covered through
PLD. So a small NAND
circuit can be incorporated
to cover all address lines.
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey
11.2: I/O PORT ADDRESS DECODING (FROM Barry
B. Brey)
The x86 PC
© 2010, 2003, 2000, 1998 Pearson Higher Education, Inc.
Assembly Language, Design, and Interfacing
Pearson Prentice Hall - Upper Saddle River, NJ 07458
By Muhammad Ali Mazidi, Janice Gillespie Mazidi and Danny Causey