Dieu Khien Logic3

i Hc Nng Trng i Hc Bch Khoa Khoa in B mn T ng - o Lng
GIO TRNH MN HC IU KHIN LOGIC

MN HC DNH CHO CC SINH VIN KHOA IN KHO CHNH QUY S n v hc trnh: 4 (60 tit)
Ngi bin son: Lm Tng c Nguyn Kim nh
Nng, thng 11 nm 2005
Chng 0: L thuyt c s
B mn T ng o Lng Khoa in
CHNG 0: L THUYT C S (3T)

0.1. Khi nim v logic trng thi: + Trong cuc sng hng ngy nhng s vt hin tng p vo mt chng ta nh: c/khng; thiu/; cn/ht; trong/c; nhanh/chm...hai trng thi ny i lp nhau hon ton. + Trong k thut (c bit k thut in - iu khin) khi nim v logic hai trng thi: ng /ct; bt /tt; start /stop + Trong ton hc lng ho hai trng thi i lp ca s vt hay hin tng ngi ta dng hai gi tr 0 &1 gi l hai gi tr logic. Cc nh khoa hc ch xy dng cc hm & bin trn hai gi tr 0 &1 ny. Hm v bin c gi l hm & bin logic. C s tnh ton cc hm & s gi l i s logic. i s ny c tn l Boole (theo tn nh bc hc Boole). 0.2. Cc hm c bn ca i s logic v cc tnh cht c bn ca chng: B0.1_ hm logic mt bin: Tn hm Bng chn l x Hm khng Y0 Hm lp Hm o Y1 Y2 0 0 0 1 1 1 0 1 0 1 Thut ton logic Y0 = 0 Y0 = x x Y1 = Y2 = x K hiu s kiu khi in kiu rle t Ghi ch Hm lun bng 0
Hm n v Y3
Hm lun Y3 = 1 bng 1 Y3 = x + x B 0.2_ Hm logic hai bin y = f(x1 ,x2 ) Hm hai bin, mi bin nhn hai gi tr 0 &1, nn c 16 gi tr ca hm t y0 y15. Bng chn l x1 0 0 1 1 x2 0 1 0 1 Y0 Y1 0 0 0 0 0 0 0 1 Thut ton logic Y 0 = x 1. x 2+ x 1 .x2 Y1 = x1.x2 K hiu s Kiu khi in Kiu rle t Ghi ch Hm lun bng 0
Tn hm Hm khng Hm v
Hm cm Y2 x1
0 0 1 0 Y2 = x 1 . x 2
Bin son: Lm Tng c - Nguyn Kim nh
Chng 0: L thuyt c s
Hm lp Y3 x1 Hm cm Y4 x2 Hm lp Y5 x2 Hm hoc Y6 loi tr
0 0 1 1 Y3 = x 1 0 1 0 0 Y4 = x 1. x2 0 0 1 1 Y5 = x 2 Y6 = x 1. x2+ 0 1 1 0 x1 . x 2 Y6 =x1 x2 0 1 1 1 Y7 = x 1 + x 2 1 0 0 0 Y8 = x 1 . x 2 0 1 1 1 Y9= x 1 x 2 Cng module
Hm hoc Y7 Hm piec Hm cng du Hm o x1 Hm ko theo x1 Hm o x2 Hm ko theo x2 Hm cheffer Hm n v Y8 Y9
Y10 1 1 0 0 Y10 = x 1 Y11 1 0 1 1 Y11 = x 2 + x1 Y12 1 0 1 0 Y12 = x 2 Y13 1 1 0 1 Y13 = x 1 + x2 Y14 1 1 1 0 Y14 = x 1 + x 2 Y15 1 1 1 1 Y15 = x 1 +x1
x2 0 1
x1
0 1
1 1
x2 0 1
x1
0 1 1
1 1 0
x2 0 1
x1
0 1 1
1 0 1
x2 0 1
x1
0 1 1
1 0 0
1 1 Y15 = 1
Y14 = x 1 + x 2
Y13 = x 1 + x2
Y12 = x 2
Chng 0: L thuyt c s
x1 0 x2 0 1 1 0
1 1 1
x1 0 x2 0 1 1 0
1 1 0
x1 0 x2 0 1 1 0
1 0 1
x1 0 x2 0 1 1 0
1 1 1
Y11 = x 2 + x1
Y10 = x 1
Y9= x 1 x 2
Y8 = x 1 . x 2
x2 0
x1
0 1
1 1
x2 0
x1
0 0
1 1
x2 0
x1
0 1
1 1
x2 0 1
x1
0 1 0
1 1 1
1 0 1 Y7 = x 1 + x 2
1 1 0 Y6 =x1 x2
1 0 1 Y5 = x 2
Y4 = x 1. x2
x2 0
x1
0 1
1 1
x2 0 1
x1
0 1 0
1 1 1
x2 0
x1
0 1
1 1
x2 0
x1
0 0
1 0 0
1 0 1 Y3 = x 1
Y2 = x 1 . x 2
1 0 1 Y1 = x1.x2
1 0 Y0 = 0
* Ta thy rng: cc hm i xng nhau qua trc (y7 v y8 ) ngha l: y0 = y 15, y1 = y 14, y2 = y 13 * Hm logic n bin: y = f(x1,x2,x3,..,xn). 1 bin nhn 21 gi tr n bin nnhn 2n gi tr; m mt t hp nhn 2 gi tr Do vy hm c tt c l 2 2 . 1 V d: 1 bin to 4 hm 2 2 2 2 bin to 16 hm 2 2 3 3 bin to 256 hm 2 2 Kh nng to hm rt ln nu s bin cng nhiu. Tuy nhin tt c kh nng ny u c hin qua cc hm sau: Tng logic Nghch o logic Tch logic
Chng 0: L thuyt c s
nh l - tnh cht - h s c bn ca i s logic: 0.2.1. Quan h gia cc h s: 0 .0 = 0 0 .1 = 0 1 .0 = 0 0 +0 = 0 0 +1 = 1 1 +0 = 1 1 +1 = 1 0 =1 1 =0 y l quan h gia hai hng s (0,1) hm tin ca i s logic. Chng l quy tc php ton c bn ca t duy logic. 0.2.2. Quan h gia cc bin v hng s: A.0 = 0 A .1 = A A+1 = 1 A +0 = A A.A =0 A+A =1 0.2.3. Cc nh l tng t i s thng: + Lut giao hon: A .B =B .A A +B =B +A + Lut kt hp: ( A +B) +C =A +( B +C) ( A .B) .C =A .( B .C) + Lut phn phi: A ( B +C) =A .B +A .C 0.2.4. Cc nh l c th ch c trong i s logic: A .A =A A +A =A nh l De Mogan: A.B = A + B A+ B = A .B Lut hm nguyn: A =A. 0.2.5. Mt s ng thc tin dng: A ( B +A) = A A + A .B = A A B +A . B = A A + A .B = A +B
Chng 0: L thuyt c s
A( A + B ) = A .B (A+B)( A + B ) = B (A+B)(A + C ) = A +BC AB+ A C + BC = AB+ A C (A+B)( A + C )(B +C) =(A+B)( A + C ) Cc biu thc ny vn dng tinh gin cc biu thc logic, chng khng ging nh i s thng. Cch kim chng n gin v p dng nht chng minh l thnh lp bng s tht. 0.3. Cc phng php biu din hm logic: 0.3.1. Phng php biu din thnh bng: * Nu hm c n bin th bng c n+1 ct .( n ct cho bin & 1 ct cho hm ) * 2n hng tng ng vi 2n t hp bin. Bng ny gi l bng s tht hay l bng chn l. V d: Trong nh c 3 cng tc A,B,C.Ch nh mun n chiu sng khi cng tc A, B, C u h hoc A ng B, C h hoc A h B ng C h . Vi gi tr ca hm y cho trn ta biu din thnh bng nh sau: Cng tc n A B 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 n C Y 0 1 sng 1 0 0 1 sng 1 0 0 1 sng 1 0 0 0 1 0
* u im ca cch biu din ny l d nhn v t nhm ln . * Nhc im: cng knh, c bit khi s bin ln. 0.3.2. Phng php biu din hnh hc: a) Hm mt bin biu din trn 1 ng thng: b) Hm hai bin biu din trn mt phng0:
x1
10
11
00
01
x2
Chng 0: L thuyt c s
c) Hm ba bin biu din trong khng gian 3 chiu:

X2
010 011
110
111 X1 000 100 101
001
X3
d) Hm n bin biu din trong khng gian n chiu 0.3.3. Phng php biu din biu thc i s: Bt k trong mt hm logic n bin no cng c th biu din thnh cc hm c tng chun y v tch chun y . a) Cch vit di dng tng chun y (chun tc tuyn): - Ch quan tm n nhng t hp bin m hm c gi tr bng mt. - Trong mt t hp (y bin) cc bin c gi tr bng 1 th gi nguyn (xi). - Hm tng chun y s l tng chun y cc tch . Cng tc n A B C 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 n Y 0 1 x 1 1 x 0 1
0 1 2 3 4 5 6 7
Hm Y tng ng 4 t hp gi tr cc bin ABC = 001, 011, 100, 111 Y= A B C + A BC +A B C +ABC * n gin trong cch trnh by ta vit li:
Bin son: Lm Tng c - Nguyn Kim nh 6
Chng 0: L thuyt c s
f = 1, 3 ,4 ,7 Vi N =2 ,5 (cc th t t hp bin m khng xc nh ) b) Cch vit di dng tch /chun y ( hi tc tuyn ): - Ch quan tm n t hp bin hm c gi tr ca hm bng 0. - Trong mi tng bin xi = 0 th gi nguyn xi = 1 th o bin xi . - Hm tch chun y s l tch cc tng , t bng trn hm Y tng ng 2 t hp gi tr cc bin: A+B+C = 0 +0 +0, 1 +1 +0 A +B +C, A + B +C Y =( A +B +C )( A + B +C ) * n gin trong cch trnh by ta vit li: f = (0,6) Vi N =2 ,5 (cc th t t hp bin m khng xc nh ). 0.3.4. Phng php biu din bng bng Karnaugh: - Bng c dng hnh ch nht, n bin 2n mi tng ng vi gi tr ca 1 t hp bin. - Gi tr cc bin c sp xp theo th t theo m vng (nu khng th khng cn l bng Karnaugh na!). *Vi iu s lc v m vng: Gi s cho s nh phn l B1B2B3B4 G3G2G1G0 (m vng) th c th tnh nh sau: Gi = Bi+1 Bi V d: G0 = B1 B0 = B1 B0 +B1 B0 G1 = B2 B1 = B2 B1 +B2 B1 G2 = B3 B2 = B3 B2 +B3 B2 G3 = B4 B3 = 0 B3 =1.B3 +0. B3 = B3 x1 0 1 x2 0 1 0 1 x1 x2 x3 00 01 11 00 x3 x4 00 x1x2 00 01 11 10 01 11 10
Chng 0: L thuyt c s
x 3 x 4x 5 000 001 011 010 110 111 101 100 x 1x 2 00 01 11 10
x 4x 5x 6 000 001 011 010 110 111 101 100 x1x2 x3 000 001 011 010 110 111 101 100 0.4. Phng php ti thiu ho hm logic: Mc ch ca vic ti u ho hm logic thc hin mch: kinh t n gin, vn bo m chc nng logic theo yu cu. Tm dng biu din i s n gin nht c cc phng php sau: 0.4.1. Phng php ti thiu hm logic bng bin i i s: Da vo cc biu thc phn 0.3 ca chng ny . y =a ( b c + a) + (b + c )a b = a b c + a + ba b + c a b = a
Chng 0: L thuyt c s
Phng php 1 : y = a ( b c + a) + (b + c )a b = a b c + a + ba b + c a b = a hoc y = a ( b c + a) + (b + c )a b = a b c + a(b+ b )(c+ c )+a b c = a b c + abc + ab c + a b c + a b c +a b c m5 m7 m6 m5 m4 m4 (Phng php 2: dng bng s cp phn sau)
V d 1:
V d 2:
Chng 0: L thuyt c s
V d 3:
V d 4:
V d 5:
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Chng 0: L thuyt c s
0.4.2. Phng php ti thiu ho hm logic bng bng Karnaugh: Tin hnh thnh lp bng cho tt c cc v d phn (1) bng cch bin i biu thc i s sao cho 1 t hp c mt y cc bin. V d: Cho h thng c s nh sau h thng ny iu khin hai l si L1, L2 v ca s S. Cc thng s u vo ca l nhit hai mc 10oC & 20oC v m mc 2%.
Hnh 0.1: M t hot ng ca h thng l si
A tc ng khi t0 < 10oC (u o a) B tc ng khi t0 > 20oC (u o b) C tc ng khi m 2% (u o c) (+) tc ng (-) khng tc ng iu kin c th c cho bng sau: m W < 2% Nhit + + t0 20oC oC 0 oC 20 > t >10 + + 0 oC t < 10 + + + Thit b chp L2 S L1 hnh L L1 L L2 Ca s A 0 0 0 0 1 B 0 0 1 1 0 C 0 1 0 1 0 L1 1 1 x x 1 L2 1 0 x x 0 W 2% + L1 L L1 S 1 0 x x 1 + L2 L L2 + S Ca s
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Chng 0: L thuyt c s
1 0 1 0 1 0 1 1 0 0 1 1 1 1 1 1 1 1 Lp bng Karnaugh cho ba hm L1 ,L2 ,S L1 = B . C + A ; L2 = A C +A B C + B C ; S = B + C 0.4.3. Phng php ti thiu hm logic bng thut ton Quire MC.Cluskey: a) Mt s nh ngha: + L tch y ca cc bin. - nh 1 l hm c gi tr bng 1. - nh 0 l hm c gi tr bng 0. - nh khng xc nh l hm c gi tr khng xc nh x (0 hoc1). + Tch cc tiu: tch c s bin l cc tiu (t bin tham gia nht) hm c gi tr bng 1 hoc l khng xc nh x. + Tch quan trng: l tch cc tiu hm c gi tr bng 1 tch ny. V d: Cho hm f(x1,x2,x3) c L = 2,3,7 (tch quan trng) N =1,6 (tch cc tiu) C th nh du theo nh phn hoc thp phn. b) Cc bc tin hnh: Bc 1: Tm cc tch cc tiu (1) Lp bng biu din cc gi tr hm bng 1 v cc gi tr khng xc nh x ng vi m nh phn ca cc bin. (2) Sp xp cc t hp theo th t tng dn (0,1,2,...), t hp gm: 1 ch s 1 2 ch s 1 3 ch s 1 (3) So snh t hp th i v i+1 & p dng tnh cht xy +x y = x. Thay bng du - & nh du v vo hai t hp c. (4) Tin hnh tng t nh (3).
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Chng 0: L thuyt c s
Bng a s s nh thp phn phn x1x2x3x4 2 0010 3 0011 6 0110 12 1100 7 0111 13 1101 14 1110 15 1111
s ch s 1 1 2
3 4
Bng b s s c s thp 2 phn x1x2x3x4 2 0010v 3 0011v 6 0110v 12 1100v 7 0111v 13 1101v 14 1110v 15 1111v
Bng c Lin x1x2x3x4 kt 2,3 2,6 3,7 6,7 6,14 12,13 7,15 13,15 14,15 001-v 0-10v 0-11v 011-v -110v 110-v -111v 11-1v 111-v
Bng d
2,3,6,7 0-12,6,3,7 6,7,14,15 -116,14,7,15 12,14,13,15 11--
T hp cui cng khng cn kh nng lin kt na, y chnh l cc tch cc tiu ca hm f cho & c vit nh sau: 0-1- (ph cc nh 2,3,6,7): x1 x3 -11- (ph cc nh 6,7,14,15): x2,x3. 11-- (ph cc nh 12,13,14,15): x1,x2. V d sau :( v d ny s gii thch cc bc trn ). Ti thiu ho hm logic bng phng php Quire MC.Cluskey vi f(x1,x2,x3,x4), vi cc nh 1 l L = 2,3,7,12,14,15; nh c gi tr khng xc nh l N = 6,13. Bc 2: Tm tch quan trng tin hnh theo i bc (i =0 n ) cho n khi tm c dng ti thiu. Li : Tp cc nh 1 ang xt bc nh i (khng quan tm n nh khng xc nh x na). Zi: Tp cc tch cc tiu sau khi qua cc bc tm tch cc tiu bc 1 Ei : L tp cc tch quan trng. c thc hin theo tht ton sau:
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Chng 0: L thuyt c s
Bt u
Cho hm vi tp L&N
1.Tm cc tch cc tiu
2.Tm cc tch cc tiu ti thiu nh 1
3. Vit ra cc hm cc tiu
Kt thc
*Tip tc v d trn: ( Bc 2) L0 = (2,3,7,12,14,15) Z0 =( x1 x3,x2x3,x1x2 ) Tm E0 ? Lp bng E0: Z0 x1 x3 x2x3 x1x2 L0 2 (x) 3 (x) 7 x x 12 14 x x 15 x
Ly nhng ct ch c 1 du x v y l tch quan trng. Tm L1 t L0 sau khi loi nhng nh 1ca L0. Z1 t Z0 sau khi loi nhng tch khng cn thit. f = x1 x3 +x1x2 0.5. Bi tp: 1) Dng hai phng php ti thiu bng Quire MC.Cluskey & Karnaugh ti thiu ho cc hm sau: 1) f (x1x2x3x4) = [2,3,7,(1,6)]
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Chng 0: L thuyt c s
2) f (x1x2x3x4) = [2,3,7,12,14,15(6,13)] 3) f (x1x2x3x4) = [0,2,3,10,11,14,15] 4) f (x1x2x3x4) = [1,6,(3,5,7,12,13,14,15)] 5) f (x1x2x3x4) = [(3,5,12,13,14,15),6,9,11] 6) f (x1x2x3x4) = [0,2,3,4,6] (*)n gin biu thc sau dng bng Karnaugh: 1) f = x1 x 2 x3 +x1x2 x3 + x1x2 x3+ x1 x 2 x3 2) f = x1 x 2 x3 + x1 x 2 x3 + x1 x2 x3+ x1 x 2 x3 3) f = x1 x 2 x3 x 4 + x1 x2 x3 x 4 + x1 x 2 x3 x 4 + x1 x2x3 +x1 x 2 x3 x 4 +x1 x 2 x3 x4 + x1 x 2 x3 x 4 4) f = ( x3 + x 4 )+ x 1 x3 x 4 +x1 x 2 x3 + x1 x 2 x3x4 +x1x3 x 4 (*) 1) Mch iu khin my photocopy c 4 ng vo & 1 ng ra. Cc ng vo n cc cng tc nm dc theo ng di chuyn ca giy. Bnh thng cng tc h v cc ng vo A, B, C, D c gi mc cao. Khi giy chy qua mt cng tc th n ng v ng vo tng ng xung thp. Hai cng tc ni n A & D khng bao gi ng cng lc (giy ngn hn khong cch gia hai cng tc ny). Thit k mch c ng ra ln cao mi khi c hai hoc ba cng tc ng cng lc, cng bn k v li dng cc t hp khng cn quan tm .
Hnh 0.2: M t hot ng ca my in Cc bi tp ny c trch t bi tp kt thc chng 2. (Mch s _Ng.Hu Phng) 2) Hnh v ch giao im ca trc l chnh vi ng ph. Cc cm bin pht hin c xe c t li C,D (trc l chnh ) & li A ,B (trc ph). Tn hiu ca cm bin
15
Chng 0: L thuyt c s
l thp khi khng c xe v cao khi c xe n giao thng c kim sot theo quy lut sau: a) n xanh cho trc l chnh mi khi c hai li D & C. b) n xanh cho trc l chnh mi khi li C hoc D c xe nhng c hai li A & B khng c xe. c) n xanh cho trc l ph mi khi li A hoc B c xe nhng trong khi c hai li C & D khng c xe. d) n xanh cho trc l chnh khi cc li u khng c xe. Cc ng ra ca cm bin l cc ng vo ca mch iu khin n giao thng. Mch c ng ra T lm n trc l chnh xanh khi ln cao v ng ra P lm n trc l chnh xanh khi n gin biu thc ti a trc khi thc hin mch. (*) Bi tp dng gin xung:
a b b c y 0 0 1 10 0 0 1 0 0 1 1 1 0 0 1 1 0 00 0 1 1 1 00 0 1 0 0 1 1 1 1 00 0 1 1 1 0 1 1 1 00 0 0 1 1 1 1 1
1) y = a b c +ab 2) y = ab+ ac +b c 3) S = a1 + b a 2 a3 + b ( a1 a2 + a3)
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Chng 1: Mch t hp v mch trnh t
B mn T ng - o Lng _ Khoa in
CHNG 1: MCH T HP V MCH TRNH T 1.1. M hnh ton hc ca mch t hp: - Mch t hp l mch m trng thi u ra ca mch ch ph thuc v t hp cc trng thi u vo cng thi im m khng ph thuc vo thi im trc . - Mch t hp thng c nhiu tn hiu u vo (x1 ,x2 ,x3) v nhiu tn hiu u ra (y1 ,y2 ,y3 ). Mt cch tng qut c th biu din theo m hnh ton hc nh sau:
Vi: y1 =f(x1 ,x2 ,,xn ) y2 =f(x1 ,x2 ,,xn ) . . ym =f(x1 ,x2 ,,xn )
Hnh 1.1: M hnh ton hc ca mch t hp - Cng c th trnh by di dng vector nh sau: Y =F(X) 1.2. Phn tch mch t hp: - T yu cu nhim v cho ta bin thnh cc vn logic, tm ra bng chc nng ra bng chn l. - c thc hin theo cc bc sau: Vn logic thc
Bng chc nng
Bng chn l
Bng karnaugh
Biu thc logic
Hnh 1.2: Bc phn tch mch t hp 1. Phn tch yu cu: Xc nh no l bin u vo. Xc nh no l bin u ra. Tm ra mi lin h gia chng vi nhau. iu ny i hi ngi thit k phi nm r yu cu thit k, y l mt vic kh khn nhng rt quan trng trong qu trnh thit k. 2. K bng chn l: - Lit k thnh bng v mi quan h tng ng vi nhau gia trng thi tn hiu u vo vi trng thi hm s u ra Bng ny gi l bng chc nng.
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- Tin hnh thay gi tr logic (0 ,1) cho trng thi ta c bng chn l. V d:
Hnh 1.3: S iu khin bng n Y thng qua 2 cng tc A&B Bng chc nng: Kha A Ngt Ngt ng ng Kha B Ngt ng Ngt ng Kha C Tt Tt Tt Sng Bng chn l: A 0 0 1 1 B 0 1 0 1 C 0 0 0 1
1.3. Tng hp mch t hp: Nu s bin tng i t th dng phng php hnh v. Nu s bin tng i nhiu th dng phng php i s. c tin hnh theo s sau: Bng karnaugh hoc PP. Mc.cluskey biu thc ti thiu s logic s mch in
biu thc logic Hnh 1.4: Phng php tng hp mch logic 1.4. Mt s mch t hp thng gp trong h thng: Cc mch t hp hin nay thng gp l: B m ha (m ha nh phn, m ha BCD) thp phn, u tin. B gii m (gii m nh phn, gii m BCD_ led 7 on) hin th k t. B chn knh. B cng, b so snh.
B kim tra chn l. ROM , EPROM B dn knh, phn knh. 1.5. Khi nim v mch trnh t (hay mch dy) _ sequential circuits: - u ra ch b kch hot x1 Z 1 khi cc u vo c m ch m ch x2 Z2 kch hot theo mt trnh trnh t Y1 t hp y1 t no . iu ny Y2 y2 khng th thc hin bng mch logic t hp thun 2 ty m cn n c tnh 1 nh ca FF. Hnh 1.5: M hnh ton hc ca mch iu khin trnh t
A
A B Y
A B
Hnh 1.6: Nguyn l lm vic ca cng AND
A B J CLK K Q Y A
A B Y
>th i gian
thie t la p ye u ca u cu a FF
B Y
B ln cc AA A ln cc BB ln cao cao tr tr ln cao caotr tr
c ca FF_JK Hnh 1.7: Nguyn l lm viY R 1.6. Mt s phn t nh trong mch trnh t: S 1. Rle thi gian:
T S1L S2L
S3L
Hnh 1.8: S relay thi gian
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2.Cc mch lt: Loi ng b Khng FF ng b
Pr R Q CL S Q Clr
S R
Pr Q Q Clr
R-S
Pr D Q CL Q Clr
Pr D Q Q Clr
Bng chn Bng kch hnh trng thi Gin xung l 01 CL Qn R S Qn+1 QnQn+1R S 0X X0 0 0 0 0 0 0 x 0 1 0 R 0 0 1 1 0 1 0 1 10 0 1 0 0 1 0 1 0 S 0 1 1 x 1 1 0 x Q 1 0 0 1 1 0 1 1 Q 1 1 0 0 1 1 1 x Q'= S+ R Q RS=0 CL 1 Qn D Qn+1 QnQn+1D 0 0 0 0 0 0 1 1 00 D 0 1 1 0 1 1 0 1 0 0 1 0 0 Q 1 1 1 1 1 1
Q
Pr J CL K Q Clr Q
J-K
Q'n+1=D Khi J = 1 Qn J K Qn+1 QnQn+1J K 0X & K =1 th 0 0 0 0 0 0 0x 0 Q lun thay 0 0 1 0 0 1 1x i trng 0 1 0 1 1 0 x1 thi ngha 0 1 1 1 1 1 x0 l mch b 1 0 0 1 dao ng 1 0 1 0 nn JK ch 1 1 0 1 lm vic 1 1 1 0 ch ng b Q' =
n+1
1X 1 X1
X0
CL J K Q Q
Pr T Q CL Q Clr
Cng khng c ch khng ng b
Qn T Qn+1 0 0 0 0 1 1 1 0 1 1 1 0 Q'n+1=TQ
QnQn+1T 0 0 0 0 1 1 1 0 1 1 1 0
1 00 1 1 0
CL T Q Q
20
1.7. Phng php m t mch trnh t: Sau y l mt vi phng php nu ra phn tch v tng hp mch trnh t. 1.7.1.Phng php bng chuyn trng thi: Sau khi kho st k qu trnh cng ngh, ta tin hnh lp bng. v d ta c bng nh sau: Trng Tn hiu vo Tn hiu ra thi x1 x2 x3 ... Y1 Y2 ... S1 S1 S2 S3 0 1 S2 S1 S2 0 0 S3 S2 S3 1 1 S4 S5 ... Cc ct ca bng ghi: bin u vo (tn hiu vo): x1, x2, x3 ; hm u ra y1, y2, y3 - S hng ca bng ghi r s trng thi trong cn c ca h (S1 ,S2 ,S3). - giao gia ct tn hiu vo xi vi hng trng thi Sj ghi trng thi ca mch. Nu trng thi mch trng vi trng thi hng l trng thi n nh. - giao gia ct tn hiu ra Yi v hng trng thi Sj chnh l tn hiu ra tng ng. * iu quan trng l ghi y v ng cc trng thi trong cc ca bng, c hai cch: Cch 1: Nm r d liu vo, nm su v quy trnh cng ngh ghi trng thi n nh hin nhin. Ghi cc trng thi chuyn r rng (cc trng thi n nh 2 d dng nhn ra). Cc trng thi khng bit chc chn th trng v s b sung sau. Cch 2: Phn tch xem tng in trng thi. Vic ny l logic, cht ch, r rng. Tuy nhin rt kh khn, nhiu khi khng phn bit c cc trng thi tng t nh sau. -
21
V d ta c bng sau: Bin(x) Trng thi(S) S1 S2 S3 S4 S5 S2/1 S4/1 S1/1 S3/1 S5/0 S4/1 S2/0 S1/1 S4/0 S3/0 S3/0 S4/1 S1/1 S2/0 S4/0
1.7.2. Phng php hnh trng thi: M t cc trng thi chuyn ca mt mch logic tng t. hnh gm: cc nh, cung nh hng, trn cung ny ghi tn hiu vo/ra & kt qu. Phng php ny thng dng cho hm ch mt u ra. a. hnh Mealy: hnh Mealy chnh l s chuyn trng thi thnh hnh. ta thc hin chuyn t bng trng thi sang hnh: Bng c 5 trng thi; l nm nh ca hnh. Cc cung nh hng trn ghi hai thng s: bin tc ng, kt qu hm khi chu s tc ng ca bin.
/1
0
(++)/1
0
3
(+)/1
4
0
0
/1
0
5
/0
Hnh 1.10: hnh Mealy b. hnh Moore: hnh Moore cng thc hin chuyn bng trng thi thnh hnh. T bng trng thi hay t hnh Moore ta chuyn sang hnh nh sau: Vi nh l cc gi tr trng thi: cung nh hng; bin ghi tc ng.
Bc 1: T cc bng trng thi ta tm ra cc trng thi & gi tr tng ng. V d: bng bn c 5 trng thi t S1 S5 nhng ch c: S1 c gi tr S1/1; S5 c gi tr S5/0 Cn cc trng thi: S2 , S3 , S4 c 2 gi tr 0 & 1 nn ta c 6 nh. Vy tng cng, hnh Moore c 8 nh. nh ny gn tng ng vi cc Q, t Q1 n Q8 . Q1 = S2/0 ; Q2 = S3/0 ; Q3 = S4/0 ;Q4 = S5/0 ; Q5 = S1/1 ; Q6 = S2/1 ; Q7 = S3/1 Q8 = S4/1 Bc 2: Tin hnh thnh lp bng nh sau: (T bng trng thi ta tin hnh in nh Qi vo v d gc u bn tri, ging vi S2 bn bng trng thi ta c S4 /1 Q8 in Q8 vo ny, tng t nh vy cho n ht). ct tn hiu ra l kt qu ca tng nh Q tng ng. Bc 3: Tin hnh v th Moore tng t hnh Mealy. * th Moore c nhiu nh hn hnh Mealy. Nhng bin u ra n gin hn Mealy.

Q1/0 Q2/0 Q3/0

Q4/0
( + + )

Q5/1
(+)
Q6/1
Q7/1
Q8/1
(++)
(+)
Hnh 1.11: hnh Moore 1.7.3. Phng php lu : Phng php ny m t h thng mt cch trc quan, bao gm cc khi c bn sau: 1) Khi ny biu th gi tr ban u chun b sn sng hoc cho h thng hot ng. 2) Thc hin cng vic (x l, tnh ton ...). 3) Khi kim tra iu kin v a ra mt trong hai quyt nh. 4) Kt thc cng vic. V d ta c s thut ton sau: Chuyn a) sang hnh Moore; hnh c su nh, nm nh l trng thi ca z, mt nh cn li l trng thi bt u v kt thc.
1.8 Grafcet_Cng c m t mch trnh t trong cng nghip: 1.8.1. Hot ng theo logic trnh t ca thit b trong cng nghip: Trong dy chuyn sn xut cng nghip my mc thng hot ng theo trnh t logic cht ch nhm m bo cht lng sn phm, an ton cho ngi v thit b. Cu trc hot ng trnh t ca dy chuyn a ra yu cu cho iu khin ng thi cng gi cho ta s phn nhm logic ca hot ng trnh t bi cc tp hp con ca my mc v cc thut ton iu khin bng chng trnh con. S khi ca h iu khin qu trnh c th hin theo s sau: Tn hiu vo
Cu trc iu khin trnh t
Qu trnh
Hnh 1.12: S khi ca h iu khin qu trnh Mt qu trnh cng ngh bao gm ba hnh thc hot ng sau: + Hon ton t ng + Bn t ng + Bng tay Trong qu trnh h thng lm vic, m bo an ton v linh hot, h iu khin cn phi c s chuyn i d dng t t ng bn t ng hoc bng tay v ngc li nh vy h mi p ng c yu cu thc t. Trong qu trnh lm vic, s khng bnh thng (s c) ca h thng c rt nhiu loi; v vy trong qu trnh phn tch h thng c gng m t chng mt cch y nht, ngha l cc s kin v li a s phi c nh ngha trc. Trong vn v s c ngi ta thng phn ra lm 3 nhm sau: + H hng mt b phn trong cu trc iu khin. + H hng cu trc trnh t iu khin. + H hng b phn chp hnh. Khi thit k h thng phi tnh n cc phng n khc nhau nh: vic dng my khn cp, x l tc ngn vt liu v nhiu hin tng nguy him khc ng thi cho php ngi vn hnh can thip ngay im xy ra s c hoc c lp vng xy ra s c . Grafcet l cng c rt hu ch thit k v thc hin y cc yu cu ca h thng t ng ho cc qu trnh cng ngh.
24
1.8.2. nh ngha Grafcet: Grafcet l t vit tt ca ting Php Graphe fontionnel de commande tape transition, l hnh chc nng cho php m t cc trng thi hot ng ca h thng v biu din qu trnh iu khin vi cc trng thi chuyn bin t trng thi ny sang trng thi khc, l mt graphe nh hng v xc nh bi cc phn t sau: G := {E, T, A, M} Trong : + E = {E1, E2, E3, ... , Em} l mt tp hu hn cc trng thi (giai on ) ca h thng, c k hiu bng hnh vung. ng vi mi trng thi sao cho hnh vi iu khin l khng thay i, hnh vi c th hot ng hoc l khng hot ng. iu khin chnh l thc hin cc mnh logic cha cc bin vo/ra h thng c c trng thi xc nh trong h v y cng chnh l mt trong cc trng thi ca Grafcet. (P, M: a.Ek) Ej Trng thi Ej hnh 1.13 l s phi hp gia bin ra P v M, vi M = a.Ek , trong Ek l bin c trng cho hot ng ca trng thi Ek cn a l bin u vo ca h. Hnh 1.13 + T = {t1, t2, t3, ... ti} l tp hu hn cc chuyn trng thi, biu din bng du gch ngang. Gia hai trng thi lun tn ti mt chuyn trng thi, chuyn trng thi ny c dng hm Bool gn vi mt chuyn trng thi mt tip nhn . Vic thc hin chuyn trng thi tj hnh 1.14 c thc hin bi tch Ev.a. c , trong Ev l bin c trng cho s tj Ev.a. c hot ng trng thi Ev, cn a, c l cc bin vo. iu kin chuyn trng thi tj l tj = Ev.a. c . Hnh 1.14 tj Ev.(a) Hnh 1.15 Vic chuyn trng thi tj hnh 1.15 c thc hin bi iu kin logic: Ev.(a), trong Ek l bin c trng cho s hot ng trng thi Ek, cn a biu din s thay i t 0 ln 1ca bin u vo a.
+ A = {a1, a2, a3, ... ai} l tp cc cung nh hng ni gia 1 trng thi vi 1 chuyn trng thi hoc 1 chuyn trng thi vi mt trng thi. + M = {m1, m2, m3, ... mi} l tp cc gi tr (0,1). Nu mi = 1 th trng thi i l hot ng, ngc li trng thi i khng hot ng. 1.8.3. Mt s k hiu dng trong Grafcet: a) Hnh vung c nh s nh hnh 1.16 a), b) biu th trng thi; hnh ch nht bn phi dng m t hot ng ca trng thi . b) Hai hnh ch nht lng vo nhau c nh s, biu th trng thi khi u. c) Hnh vung nh s c km theo du chm . biu th trng thi hot ng.
25
Khi ng qut ht
dng bng ti ph gia
2.
a)
b)
c)
d)
Hnh 1.16 a, b k hiu trng thi ; c trng thi khi u; d trng thi hot ng
3 b 4
5 c
7
d
9 t/q/2s 10
a)
b) Hnh 1.17
c)
d)
1 t12 2 a) OR 3 t13
7 t79 9
8 t89
b) OR
1 t123 2 c) AND Hnh 1.18

7 t789 9
d) AND
26
d) Du gch ngang biu th cho vic chuyn trng thi. Trng thi c chuyn khi iu kin chuyn c tho mn. Xem hnh 1.17 e) Cc k hiu phn nhnh hnh 1.18: Hnh 1.18 a) khi TT1 ang hot ng nu t12 tho mn th TT2 hot ng; nu t13 tho mn th TT3 hot ng; nu t12 v t13 cng tho mn th TT2 v TT3 cng hot ng gi l TT OR. Tng t cho hnh 1.18 b). Hnh 1.18 c) TT1 ang hot ng nu t123 tho mn th c hai TT2 v TT3 hot ng gi l trng thi AND. Hnh 1.18 d) TT7 v TT8 ang hot ng nu t789 tho mn th TT9 hot ng trng thi ny gi l TT AND. f) Hnh 1.19 a) cho php thc hin bc nhy, nu ang hot ng TT2, iu kin a tho mn th h thng s chuyn hot ng t TT2 sang TT5 b qua TT3 v TT4; ngc li nu a khng tho mn th cc trng thi 3, 4, 5 ln lt s c thc hin. 2 a 3 b 4 c 5 a) Hnh 1.19 Hnh 1.19 b) nu iu kin f cha tho mn th TT8 s quay v li TT7, nu f tho mn th TT8 mi chuyn sang TT9. 1.8.4. ng dng Grafcet: Ta xt mt v d c th m t hot ng ca h thng t ng iu khin qu trnh. H thng trn c s cng ngh hnh 1.20. Thng X dng cha nc chun b cho h thng trn. Trc khi ng c M ko cnh khuy trn yu cu thng Y phi c nc; cn 1 v 2 cn vt liu; lc ng c M khi ng cnh khuy cng l lc hai bng ti C1, C2 c khi ng a hai vt liu A, B vo thng trng Y. b) 9 8 f
a
6 d 7 e
27
A B V2 1 V4 C1 V1 P Nlim Nma x C2 2 V3 V5
Ev
M
Y
Nmin
Sn phm ra
Hnh 1.20: S cng ngh ca h thng trn Trnh t khuy trn nh sau: - Nu mc vt liu thng trn l min (Nmin) th h thng lm vic ch t ng (AUT) Cp tn hiu cho m cc van V1, V2, V3. - Bm P c khi ng bm nc t thng X vo thng Y. - Khi khi lng cn trn cc cn 1, 2 th van V2, V3 ng li. - Nc trong thng Y tng dn cho n khi t mc max (Nmax) th bm P dng v van V1 ng li. - Khi vic chun b nguyn vt liu trn xong, ng c khuy M bt u hot ng ng thi cc van V4, V5 m, bng ti C1, C2 hot ng a liu vo thng Y. - Qu trnh trn c tnh bng thi gian t2, sau thi gian t2 th c tn hiu Ft2 xut hin v ct ng c khuy M kt thc qu trnh trn. - Nlim l tn hiu cc hn trn cm hot ng khi thng trn Y qu y. - Trc khi ng c M hot ng th van Ev m tho ht vt liu trong thng Y ra ngoi n mc min (Nmin ng), ng thi vt liu trn cn 1, 2 ht th van V4, V5 t ng ng li nhng bng ti C1, C2 cn phi quay thm mt on na a ht vt liu trn bng ti xung thng Y. - V l do an ton, h thng cn c nt dng khn cp (AU) khi h thng c s c bt thng, ng thi trc khi h thng hot ng li cn c tn hiu t li cho h thng (REP).
S cu trc ca h thng:
AU AUTT REP Cu trc ca h iu khin
M P C1 C2 V1 V2 V3 V4 V5 Ev
Nlim A Nmin B
Cc thit b ca qu trnh
Nmax
Hnh 1.21: S cu trc chung ca h thng trn y: M, P, C1, C2, V1, V2, V3, V4, V5, Ev l bin iu khin qu trnh: AUT, AU, REP. A, B, Nmin, Nmax, Nlim l tn hiu qu trnh a v iu khin trng thi. Vi v d c th ny chng ta cn lu n hai phng thc iu khin sau: 1. Phng thc lm vic t ng theo chu k. Chu k y l chu k trn, ngha l h thng thc hin xong mi m trn. Mt m trn c bt u bng tn hiu iu khin AUT (iu kin bt u l P, M, V1, V2... trng thi cha lm vic). 2. Phng thc kho khi c s c, khi c s c ngu nhin th h thng phi c dng khn cp bng lnh AU. Lc ny phi cht li ngay kt qu ang x l, n khi no s c c khc phc xong th c hot ng theo trnh t t li bng lnh REP vi vic tnh n hoc khng tnh n iu kin khi ng ban u. Ban u chng ta bt u i vo thit k h thng cha c lnh AU v REP tham gia, l Grafcet hnh 1.22. Trng thi khi u trong trng hp ny l TT1. Gi s cc iu kin u l thng mc min, c cu chp, hnh trng thi tt (sn sng lm vic) th trng thi 2, 3, 4 c thc hin (van V1 m, bm P quay, van V2, V3 m a vt liu xung cn 1, 2). Khi nc trong thng dng ln n mc max (Nmax) th h thng chuyn sang trng thi 5. Khi khi lng trn cn 1 (tn hiu bo A), khi lng
trn cn 2 (tn hiu bo B) th h thng chun sang trng thi 6, 7. Trng thi 5, 6, 7 biu hin cho nguyn liu trong mt m trn chun b xong. Khi cc iu kin Nmax, A, B tha mn th h thng s chuyn sang trng thi 8, tng ng ng c trn M hot ng, thi gian t2 c tnh, van V4, V5 m, bng ti C1, C2 hot ng. Khi x ht liu trn hai cn 1, 2 th van V1, V2 dng v thi gian t1 c tnh hai bng ti chy thm 1 thi gian na (t1). Sau thi gian ny bng ti dng v tn hiu Ft1 xut hin v h thng chuyn sang trng thi 9, ti y M vn cn hot ng n khi thi gian t2 kt thc h thng s chuyn v trng thi ngh chun b cho chu k tip theo.
1 AU_Nmin Mmin P, V1 10
2
Nmax
3
A
V2
4
B
V3
REP_ AU
AU
11
M, V4, V5, C1, C2, t1 Ft1
M, t2 Ft2
Hnh 1.22 Hnh 1.22 b) xt cho trng hp s c v khc phc xong s c tin hnh chy li h thng.
30
Hnh 1.23 v 1.24 tnh n cc trng hp s c v t li.
1 AU_Nmin.M10 Mmin.M10 10
P, V1 Nmax.M10
V2.M10 A.M10
V3.M10 B.M10
REP. AU
AU
11
M10
M, V4, V5, C1, C2, t1 Ft1. AU M, t2 Ft2. AU
AU AU
12 REP.M10
9
Ev.M10 Nmin.M10 15 16 13 14 C1, C2, t1:M10 Ft1.M10
Hnh 1.23
31
15
AU .REP
14
14
REP.M14
Ev:M14 M14.Nmin
15
15
C1,C2,t1:M14 Ft1.M14
15
15
AUT.M14.Nlim
P,V1,Nlim:M14 Nmax.M14
15
15
V2:M14 A.M14
15
V3:M14 B.M14
15
15
15
M14 AU
M,V4,V5,C1,C2,t1 F1. AU M,t2 F2. AU
15
15
AU
Hnh 1.24
32
Chng 2: B iu khin lp trnh PLC
CHNG 2: B IU KHIN LP TRNH PLC

2.1. c im b iu khin logic kh trnh (PLC): Programmable Control Systems Programmable Logic Controller (PLC) S ra i ca b iu khin PLC: - Nm 1642, Pascal pht minh ra my tnh c kh dng bnh rng. n nm 1834 Babbage hon thin my tnh c kh "vi sai" c kh nng tnh ton vi chnh xc ti 6 con s thp phn. - Nm 1808, Joseph M.Jaquard dng cc l trn tm ba th kim loi mng, sp xp chng trn my dt theo nhiu chiu khc nhau iu khin my dt t ng thc hin cc mu hng phc tp. - Trc nm 1904, Hoa K v c s dng mch rle trin khai chic my tnh in t u tin trn th gii. - Nm 1943, Mauhly v Ackert ch to "ci my tnh" u tin gi l "my tnh v tch phn s in t" vit tt l ENIAC. My c: 18.000 n in t chn khng. 500.000 mi hn th cng. Chim din tch 1613 ft2. Cng sut tiu th in 174 kW. 6000 nt bm. Khong vi trm phch cm. Chic my tnh ny phc tp n ni ch mi thao tc c vi pht li v h hng xut hin. Vic sa cha lp t li n in t chy li phi mt n c tun. Ch ti khi p dng k thut bn dn vo nm 1948, a vo sn xut cng nghip vo nm 1956 th nhng my tnh in t lp trnh li mi c sn xut v thng mi ho. S pht trin ca my tnh cng km theo k thut iu khin t ng. Mch tch hp in t - IC - nm 1959. Mch tch hp gam rng - LSI - nm 1965. B vi x l - nm 1974. D liu chng trnh - iu khin. K thut lu gi... Nhng pht minh ny nh du mt bc rt quan trng v quyt nh trong vic pht trin t k thut my tnh v cc ng dng ca n nh PLC, CNC,... lc ny khi nim iu khin bng c kh v bng in t mi c phn bit. n cui thp k 20, ngi ta dng nhiu ch tiu phn bit cc loi k thut iu khin, bi v trong thc t sn xut i hi iu khin tng th nhng h thng my tnh ch khng iu khin n l tng my. S pht trin ca PLC em li nhiu thun li v lm cho n cc thao tc my tr nn nhanh, nhy, d dng v tin cy hn. N c kh nng thay th hon ton cho cc phng php iu khin truyn thng dng rle (loi thit b phc tp v cng knh);
kh nng iu khin thit b d dng v linh hot da trn vic lp trnh trn cc lnh logic c bn; kh nng nh thi, m; gii quyt cc vn ton hc v cng ngh; kh nng to lp, gi i, tip nhn nhng tn hiu nhm mc ch kim sot s kch hot hoc nh ch nhng chc nng ca my hoc mt dy chuyn cng ngh. Nh vy nhng c im lm cho PLC c tnh nng u vit v thch hp trong mi trng cng nghip: Kh nng khng nhiu rt tt. Cu trc dng module rt thun tin cho vic thit k, m rng, ci to nng cp... C nhng modul chuyn dng thc hin nhng chc nng c bit hay nhng modul truyn thng kt ni PLC vi mng cng nghip hoc mng Internet... Kh nng lp trnh c, lp trnh d dng cng l c im quan trng xp hng mt h thng iu khin t ng . Yu cu ca ngi lp trnh khng cn gii v kin thc in t m ch cn nm vng cng ngh sn xut v bit chn thit b thch hp l c th lp trnh c. Thuc vo h sn xut linh hot do tnh thay i c chng trnh hoc thay i trc tip cc thng s m khng cn thay i li chng trnh. 2.2. Cc khi nim c bn v PLC: Cc thnh phn ca mt PLC thng c cc modul phn cng sau: 1. Modul ngun. 2. Modul n v x l trung tm. 3. Modul b nh chng trnh v d liu. 4. Modul u vo. 5. Modul u ra. 6. Modul phi ghp ( h tr cho vn truyn thng ni b). 7. Modul chc nng ( h tr cho vn truyn thng mng).
Panel lp trnh, vn hnh, gim st.
B nh chng trnh
Khi ng vo n v x l trung tm Qun l vic phi ghp
B nh d liu
Ngun
Khi ng ra
Hnh 2.1: M hnh tng qut ca mt PLC
34
2.2.1. PLC hay PC: thc hin mt chng trnh iu khin s th yu cu PLC phi c tnh nng nh mt my tnh (PC). CPU (n v x l trung tm). B nh chnh (RAM, EEPROM, EPROM...), b nh m rng. H iu hnh. Port vo/ra (giao tip trc tip vi thit b iu khin). Port truyn thng (trao i thng tin vi mi trng xung quanh). Cc khi chc nng c bit nh: T, C, cc khi chuyn dng khc. 2.2.2. So snh vi h thng iu khin khc:
iu khin Vi chc nng c lu tr bng : Tp xc vt l Quy trnh cng Khng thay i Lin kt cng Thay i c Lin kt phch cm B nh kh lp trnh Quy trnh mm Kh lp trnh t do RAM EEPROM B nh thay i c ROM EPROM
Rle, linh kin in t, mch in t, c - thu kh
PLC x l mt bit. PLC x l t ng
Hnh 2.2: Nhng c trng lp trnh ca cc loi iu khin PLC c u im vt tri so vi cc h thng iu khin c in nh rle, mch t hp in t, IC s. Thit b cho php thc hin linh hot cc thut ton iu khin s thng qua ngn ng lp trnh. B iu khin s nh gn. D dng trao i thng tin vi mi trng xung quanh nh: TD (text display), OP (operation), PC, PG hay mng truyn thng cng nghip, k c mng internet.
Thc hin chng trnh lin tc theo vng qut. 2.3. Cu trc phn cng ca PLC: 2.3.1. n v x l trung tm (CPU Central Procesing Unit): Thng trong mi PLC c mt n v x l trung tm, ngoi ra cn c mt s loi ln c ti hai n v x l trung tm dng thc hin nhng chc nng iu khin phc tp v quan trng gi l hot standby hay redundant. a) n v x l "mt -bit": Thch hp cho nhng ng dng nh, ch n thun l logic ON/OFF, thi gian x l di, nhng kt cu n gin nn gi thnh h vn c th trng chp nhn. b) n v x l "t - ng": X l nhanh cc thng tin s, vn bn, php tnh, o lng, nh gi, kim tra. Cu trc phn cng phc tp hn nhiu. Gi thnh cao. * Nguyn l hot ng: - Thng tin lu tr trong b nh chng trnh gi tun t (do c iu khin v kim sot bi b m chng trnh do n v x l trung tm khng ch). - B x l lin kt cc tn hiu (d liu) n l (theo mt quy nh no - do thut ton iu khin) rt ra kt qu l cc lnh cho u ra. - S thao tc tun t ca chng trnh i qua mt chu trnh y ri sau li bt u li t u thi gian gi l "thi gian qut". - o thi gian m b x l x l 1 Kbyte chng trnh lm ch tiu nh gi gia cc PLC. Nh vy b vi x l quyt nh kh nng v chc nng ca PLC. Bng 2.1: So snh b vi x l 1 bt v b vi x l t ng B x l mt - bit B x l t - ng X l trc tip cc tn hiu u vo Cc tn hiu vo/ra ch c th c (a ch n). a ch ho thng qua t ng. Cung cp lnh nh hn, thng Cung cp tp lnh ln hn, i hi thng ch l mt quyt nh phi c nhng kin thc v vi tnh. c/ khng. Ngn ng u vo n gin, khng Ngn ng u vo phc tp dng cn kin thc tnh ton. cho vic cung cp lnh ln. Kh nng hn ch trong vic x l Thu thp v x l d liu s. d liu s (khng c chc nng ton hc v logic). Chng trnh thc hin lin tip, Cc qu trnh thi gian ti hn khng b gin on, thi gian ca c a ch ho qua cc lnh gin chu trnh tng i di. on hoc chuyn i iu khin khn cp. Ch phi c vi my tnh n Phi ghp vi my tnh hoc h gin. thng cc my tnh. Kh nng x l cc tn hiu tng X l tn hiu tng t c u t b hn ch. vo v u ra.
2.2.3. B nh: Bao gm c RAM, ROM, EEPROM. Mt ngun in d phng l cn thit cho RAM duy tr d liu ngay c khi mt ngun in chnh. B nh c thit k thnh dng modul cho php d dng thch nghi vi cc chc nng iu khin vi cc kch c khc nhau. Mun rng b nh ch cn cm th nh vo rnh cm ch sn trn modul CPU. 2.3.4. Khi vo/ra: Hot ng x l tn hiu bn trong PLC: 5VDC, 15VDC (in p cho h TTL & CMOS). Trong khi tn hiu iu khin bn ngoi c th ln hn. khong 24VDV n 240VDC hay 110VAC n 220VAC vi dng ln. Khi giao tip vo ra c vai tr giao tip gia mch vi in t ca PLC vi mch cng sut bn ngoi.Thc hin chuyn mc in p tn hiu v cch ly bng mch cch ly quang (Opto-isolator) trn cc khi vo ra. Cho php tn hiu nh i qua v ghim cc tn hiu c mc cao xung mc tn hiu chun. Tc dng chng nhiu tt khi chuyn cng tc bo v qu p t ngun cung cp in ln n in p 1500V. Ng vo: nhn trc tip tn hiu t cm bin. Ng ra: l cc transistor, rle hay triac vt l. 2.3.5. Thit b lp trnh: C 2 loi thit b c th lp trnh c l Cc thit b chuyn dng i vi tng nhm PLC ca hng tng ng. My tnh c ci t phn mm l cng c l tng nht. 2.3.6. Rle: Rle l b nh 1 bt, c tc dng nh rle ph tr vt l nh trong mch iu khin dng rle truyn thng gi l cc r le logic. Theo thut ng my tnh th rle cn c gi l c, k hiu l M. C rt nhiu loi rle chng ta s kho st k hn i vi loi cc PLC ca hng. 2.3.7. Modul qun l vic phi ghp: Dng phi ghp b PLC vi cc thit b bn ngoi nh my tnh, thit b lp trnh, bng vn hnh v mng truyn thng cng nghip. 2.3.8. Thanh ghi (Register): l b nh 16 bit hay 32 bit lu tr tm thi khi PLC thc hin qu trnh tnh ton. - Thanh ghi cht (Latch register) duy tr ni dung cho n khi n c chng ln bng ni dung mi. - Thanh ghi chuyn dng (Special register). - Thanh ghi tp tin hay thanh ghi b nh chng trnh (Program memory registers). - Thanh ghi iu chnh gi tr c t bin tr bn ngoi (External adjusting register). - Thanh ghi ch mc (Index register). 2.3.9. B m (Counter): k hiu l C. a) Phn loi theo tn hiu u vo: - B m ln. - B m xung. - B m ln - xung, b m ny c c chuyn dng chn chiu m. - B m pha ph thuc vo s lch pha gia hai tn hiu xung kch.
- B m tc cao (high speed counter), xung kch c tn s cao khong vi kHz n vi chc kHz. b) Phn loi theo kch thc ca thanh ghi v chc nng ca b m: - B m 16 bit: thng l b m chun, c gi tr m trong khong -32768 32767. - B m 32 bit: cng c th l b m chun nhng thng l b m tc cao. - B m cht: duy tr ni dung m ngay c khi PLC b mt in. 2.3.10. B nh th (timer): k hiu l T, c dng nh cc s kin c quan tm n vn thi gian, b nh th trn PLC c gi l b nh th logic. Vic t chc nh th thc cht l mt b m xung vi chu k c th thay i c. Chu k ca xung tnh bng n v ms gi l phn gii. Tham s ca b nh th l khong thi gian nh th, tham s ny c th l bin hoc l hng nhp vo l s nguyn. 2.4. Gii thiu mt s nhm PLC ph bin hin nay trn th gii: 1. Siemens: c ba nhm CPU S7 200: CPU 21x: 210; 212; 214; 215-2DP; 216. CPU 22x: 221; 222; 224; 224XP; 226; 226XM. CPU S7300: 312IFM; 312C; 313; 313C; 313C-2DP+P; 313C-2DP; 314; 314IFM; 314C-2DP+P; 314C-2DP; 315; 315-2DP; 315E-2DP; 316-2DP; 318-2 CPU S7400: Lin h cataloge Siemens. 2. Mitsubishi: H FX 3. Omron: H CMQ 4. Controtechnique: H Compact TWD LCAA 10DRP; TWD LCAA 16DRP; TWD LCAA 24DRP... 5. ABB: Ba nhm AC 100M AC 400M AC 800M, y l loi c 2 module CPU lm vic song song theo ch d phng nng. 2.5. Tng quan v h PLC S7-200 ca hng Siemens: C hai series: 21x (loi c khng cn sn xut na) v 22x (loi mi). V mt tnh nng th loi mi c u im hn nhiu. Bao gm cc loi CPU sau: 221, 222, 224, 224XP, 226, 226XM trong CPU 224XP c h tr analog 2I/1O onboard v 2 port truyn thng.
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Bng 2.2: Cc loi CPU S7-200
Bng 2.3: So snh cc thng s v c im k thut ca series 22x
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Bng 2.4: M s v cc thng s v in p ngun v I/O
Bng 2.5: Cc thng s v cng sut tiu th v dng in I/O
2.6. Cu trc phn cng ca S7-200: 2.6.1. Hnh dng bn ngoi: 1. Cc n trng thi: n RUN-mu xanh: Ch nh PLC ch lm vic v thc hin chng trnh c np vo b nh chng trnh. n STOP-mu vng: Ch nh PLC ch STOP, dng chng trnh ang thc hin li (cc u ra u ch off). n SF-mu , n bo hiu h thng b hng c ngha l li phn cng hoc h iu hnh. y cn phn bit r li h thng vi li chng trnh ngi dng, khi li chng trnh ngi dng th CPU khng th nhn bit c v trc khi download xung CPU, phn mm lp trnh lm nhim v kim tra trc khi dch sang m my.
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Hnh 2.3: CPU S7-200 module n Ix.x-mu xanh: Ch nh trng thi On/Off ca u vo s. n Qx.x-mu xanh: Ch nh trng thi On/Off ca u vo s. Port truyn thng ni tip: RS 485 protocol, 9 chn s dng cho vic phi ghp vi PC, PG, TD200, TD200C, OP, mng bin tn, mng cng nghip. Tc truyn - nhn d liu theo kiu PPI tc chun l 9600 baud. Tc truyn - nhn d liu theo kiu Freeport l 300 38400 baud.
Hnh 2.4: Cu trc ca port RS 485
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Bng 2.6: M t chc nng ca cc chn ca port RS 485
2. Cng tc chn ch : Cng tc chn ch RUN: Cho php PLC thc hin chng trnh, khi chng trnh gp li hoc gp lnh STOP th PLC s t ng chuyn sang ch STOP mc d cng tc vn ch RUN (nn quan st n trng thi). Cng tc chn ch STOP: Khi chuyn sang ch STOP, dng cng bc chng trnh ang chy, cc tn hiu ra lc ny u v off. Cng tc chn ch TERM: cho php ngi vn hnh chn mt trong hai ch RUN/STOP t xa, ngoi ra ch ny c dng download chng trnh ngi dng. 3. Vt chnh nh tng t: Mi CPU c t 1 n 2 vt chnh nh tng t, c th xoay c mt gc 270, dng thay i gi tr ca bin s dng trong chng trnh. 4. Pin v ngun nui b nh: S dng t vn nng v pin. Khi nng lng ca t b cn kit PLC s t ng chuyn sang s dng nng lng t pin. 2.6.2. Giao tip vi thit b ngoi vi: a) Thit b lp trnh loi PGxx c trang b sn phn mm lp trnh, ch lp trnh c vi ngn ng STL. b) My tnh PC: H iu hnh Win 95/98/ME/2000/NT4.x. Trn c ci t phn mm Step7 Micro/Win 32 v Step7 Micro/Dos. Hin nay hu ht s dng Step7 Mcro/Win 32 version 3.0, 3.2, 4.0. V4.0 cho php ngi lp trnh c th xem c gi tr, trng thi cng nh th ca cc bin. Nhng ch s dng c trn my tnh c ci t h iu hnh Window 2000/ WinNT v PLC loi version mi nht hin nay. Sau y l cch ci t v giao tip gia PC-PLC:
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Hnh 2.6: Ci t phn mm STEP7 trn Window 95/98/ME/2000/NT Sau khi thc hin xong, trn mn hnh s xut hin:
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Hnh 2.7: Giao tip gia PC/PG vi PLC thng qua PC/PPI cable
Sau khi tin hnh lp t phn cng xong, ta tin hnh thit lp truyn thng gia PC/PG vi PLC. l thit lp tc , s bit d liu truyn/nhn, bit chn l, cng COM, a ch PLC, thi gian Time out... c tin hnh nh sau:
Hnh 2.8: Thit lp kt ni gia PC/PG ti PLC 1. Kch chut vo biu tng Communications trn Group bar. 2. Kim tra vic thit lp truyn thng. 3. Kch double vo biu tng Refresh d tm a ch v cc thng s ca PLC. 4. Nu khng nhn c phn hi t PLC hoc Window vn khng thit lp c truyn thng th kch vo Set PG/PC interface sau kch double vo PC/PPI cable. 5. nh du vo PC/PPI cable v chn properties... 6. Vo PPI/Addres t a ch 2 (a ch mc nh) v tc truyn l 9.6 kbps. Vo Local connection/ connnection to chn port kt ni (COM1/COM2/USB), chp nhn vic la chon ny bng nt OK.
7. Vo kch double biu tng Refresf ln na xem s kt ni gia PC v PLC. c) Giao tip vi mng cng nghip: Nu l mng PPI th ch cn u ni v ni trc tip vo Port truyn thng ca CPU. Nu l mng Profibus - DP phi c thm modul EM 277. Nu l mng Ethernet hoc internet phi c thm modul CP 243-1/ CP 2431IT. Nu l mng AS-I phi c thm modul CP 243-2. Ngoi ra cn c thm TD200 (Text Display) dng hin th v thng bo bng text, c th iu chnh trc tip gi tr ca bin trong chng trnh ngi dng, ng vai tr nh mt panel vn hnh. TP070 loi ny l Touch panel, c thit k c bit cho S7-200, c chc nng nh HMI (Human Mechanical Interface). Tip!: Gi phn mm STEP 7 Micro/Win32 V3.x cng c chia ra nhiu modul. Modul chnh dng thc hin nhnh chc nng c bn, mt s modul chuyn dng nh: USS hay Modbus, S7-200 Toolbox: TP_Desinger cho OP 070 ( cu hnh cho TO 070), Microcomputing limited, ActiveX components h tr vic truyn thng gia PC vi PLC qua cc ngn lp trnh khc. S7-200 OPC server for random OPC clients cng s dng cho vic truy xut d liu vi S7-200. 2.6.3. Giao tip gia sensor v c cu chp hnh: S7-200 c hai loi c bn: AC/DC/RLY_loi ny in p ngun cung cp t 85 264VAC, tn s 47 63 Hz; in p vo: c ngun cung cp in p chun cho sensor l 24VDC. in p ra: loi ny s dng ngun in ngoi, c th l DC hoc AC nhng khng vt qu 220V. Nu s dng i vi nhng thit b tiu th c cng sut b khong chng vi Woat th c th ly trc tip ngun ca cm bin. Sau y l th d v mch in giao tip gia PLC vi cm bin v c cu chp hnh l ng c 1 chiu c o chiu quay.
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Hnh 2.9: S mch in giao tip gia CPU 221 loi AC/DC/RLY v c cu chp hnh
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Hnh 2.10: S mch giao tip gia CPU 224 AC/DC/RLY vi sensor v c cu chp hnh
Hnh 2.11: S mch giao tip gia CPU 224 DC/DC/DC vi sensor v c cu chp hnh DC/DC/DC_Ngun nui 24VDC. Ngun nui cm bin 24VDC.
u ra Transitor h colector ngun cung cp 24VDC.
2.7. Cu trc b nh S7-200: 2.7.1. Phn chia b nh: B nh c chia lm 4 vng c bn, hu ht cc vng nh u c kh nng c/ghi ch tr vng nh c bit SM (Special Memory) l vng nh c s ch c, s cn li c th c/ghi c. Vng nh chng trnh: L min b nh c dng lu gi cc lnh. chng trnh. Vng ny thuc kiu non-valatie c/ghi c. Vng nh tham s: L min lu gi cc tham s nh t kho, a ch trm... cng ging nh vng chng trnh, vng ny thuc kiu (non-valatile) c/ghi c.
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Vng d liu: c s dng ct cc d liu ca chng trnh bao gm kt qu ca cc php tnh, hng s c nh ngha trong chng trnh, b m truyn thng... Vng i tng: Timer, b m, b m tc cao v cc cng vo/ra tng t c t trong vng nh cui cng. Vng ny khng thuc kiu non-valatile nhng c/ghi c. Hai vng nh cui cng c ngha quan trng trong vic thc hin mt chng trnh. Do vy s c trnh by chi tit mc tip theo.
Chng trnh Tham s Chng trnh Tham s D liu Chng trnh Tham s D liu
T
D liu i tng
EEPROM
Min nh ngoi
Hnh 2.12: B nh trong v ngoi ca S7200 2.7.2. Vng nh d liu v i tng v cch truy cp: Vng nh d liu l vng nh ng, n c th truy cp theo tng bit, byte, t n (worrd), t kp (double word) v cng c th truy nhp c vi mng d liu. c s dng lm min lu tr d liu cho cc thut ton, cc hm truyn thng, lp bng, cc hm dch chuyn, xoay vng thanh ghi, con tr a ch... Vng i tng c s dng lu gi d liu cho cc i tng lp trnh nh cc gi tr tc thi, gi tr t trc ca Counter hay Timer. D liu kiu i tng bao gm cc thanh ghi ca counter, Timer, cc b m tc cao, b m vo/ra tng t v cc thanh ghi AC (Accumulator). Vng nh d liu v i tng c chia ra nhiu min nh nh vi nhng ng dng khc nhau. Chng c k hiu bng ch ci u ca tn ting Anh. Thng s, chc nng, gii hn ca cc vng nh tng ng vi tng CPU c m t qua cc bng sau:
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Bng 2.7: c im v gii hn vng nh ca CPU S7 22x.
a ch truy nhp c quy c vi cng thc: Truy nhp theo bit: - Vit: tn min (+) a ch byte (+).(+) ch s bit (t 07). - c: ngc li, v d: V12.7_bit 7 ca byte 12 trong vng nh V. M8.2_bit 2 ca byte 8 trong vng nh M. Truy nhp theo byte: - Vit: tn min (+) B (+) a ch ca byte trong min. - c: ngc li, v d: VB32_byte 32 trong vng nh V. truy nhp theo Word (t n): - Vit: tn min (+) W (+) a ch byte cao ca t trong min. - c: ngc li, v d: VW180_Word 180 trong vng nh V, t ny gm c 2 byte 180 v 181.
15 14 13 12 11 10
VW180
VB180 (byte cao)
VB181(byte thp)
Truy nhp theo double Word (t kp): - Vit: tn min (+) D (+)a ch byte cao ca t cao trong min. - c: ngc li, v d: VD8_double Word 8 trong vng nh V, t kp ny bao gm 4 byte 8, 9, 10, 11.
31 24 23 16 15 8 7 0
VD8
Byte 8
Byte 9
Byte 10
Byte 11
Tt c cc byte thuc vng d liu u c th truy nhp bng con tr. Con tr quy nh trong vng nh V, L hoc cc thanh ghi AC1, AC2, AC3. Mi con tr gm 4 byte, dng lnh MOVD. Quy c s dng con tr truy nhp nh sau: Truy nhp con tr a ch: &a ch byte (cao) l ton hng ly a ch ca byte, t hoc t kp m con tr ang ch vo. V d: - AC1=&VB10, thanh ghi AC1 cha i ch ca byte 10 thuc vng nh V. - VD100=&VW110, t kp VD100 cha a ch byte cao (VB110) ca t n VW110. - AC2=&VD150, thanh ghi AC2 cha a ch ca byte cao (VB150) ca t kp VD150. Truy nhp con tr d liu: *con tr d liu l ton hng ly ni dung ca byte, t hoc t kp m con tr ang ch vo. V d nh i php gn a ch trn th: - *AC1 = VB10, ly ni dung ca byte VB10. - *VD100 = VW110, ly ni dung ca t n VW110. - *AC1 = VD150, ly ni dung ca t kp VD150. Php gn a ch v s dng con tr nh trn cng c tc dng vi nhng thanh ghi 16 bit ca Timer, b m thuc vng i tng hay cc vng nh I, Q, V, M, AI, AQ, SM.
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AC1
MOVD &VW110, AC1 to con tr a ch bng cch a a ch ca byte cao VB110 vo thanh ghi AC1. MOVD *AC1, AC0, a gi tr trong word VW110 vo trong thanh ghi AC0. +D +2, AC1 cng 2 vo gi tr a ch ca con tr VW110 ri lu gi trong thanh ghi AC1. MOVD *AC1, AC0, a gi tr trong word VW112 vo trong thanh ghi AC0.
VB109 VB110 VB111 VB112 VB113 VB109 VB110 VB111 VB112 VB113
a ch VW110
1 3 5 7
2 4 6 8
AC0
1 2 3 4
AC1
a ch VW112
1 3 5 7
2 4 6 8
AC0
5 6 7 8
Hnh 2.13: Cch to v s dng con tr a ch 2.7.3 M rng cng vo ra: S module m rng tu thuc vo tng loi CPU, s module tng ng vi tng loi CPU c trnh by theo bng 2.3. Cch mc ni cc module m rng c mc ni tip (theo mt mc xch) v pha bn phi ca module CPU. Cc module s hoc tng t u chim ch trn b m vo/ra tng ng vi u vo/ra ca module. V d v cch khai bo a ch trn cc module m rng:
Hnh 2.14: Ghp ni CPU 224XP vi module m rng
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Hnh 2.15: Ghp ni CPU 212 vi module m rng
Hnh 2.16: Ghp ni CPU 214 hoc 215 vi module m rng
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Chng 3: Ngn ng lp trnh v ng dng
CHNG 3: NGN NG LP TRNH V NG DNG 3.1.Gii thiu cc ngn ng lp trnh: Lp trnh cho S7 200 v cc PLC khc ca hng Siemens da trn 3 phng php c bn: Phng php hnh thang (Ladder logic _ LAD). Phng php khi hm (Function Block Diagram _ FBD). Phng php lit k cu lnh (Statement List _ STL). Chng ny s gii thiu cc thnh phn c bn ca ba phng php v cch s dng chng trong lp trnh. Nu chng trnh c vit theo ngn ng LAD (hoc FBD) th c th chyn sang ngn ng STL hay FBD (hoc LAD) tng ng. Nhng khng phi bt c chng trnh vit theo STL no cng chuyn sang ngn ng LAD hay FBD c. B tp lnh STL c trnh by trong gio n ny u c mt chc nng nh cc tip im, cun dy, cc hp (trong LAD) hay IC s trong FBD. Nhng lnh ny phi phi hp c trng thi cc tip im quyt nh v gi tr trng thi u ra hoc gi tr logic cho php hoc khng cho php thc chc nng ca mt (hay nhiu) cun dy hoc hp. Trong lp trnh lgic thng hay s dng hai ngn ng LAD v STL v n gn gi hn i vi chuyn ngnh in. Sau y l nhng nh ngha cn phi nm khi bt tay vo thit k mt chng trnh: 3.1.1. nh ngha v LAD: LAD l ngn ng lp trnh bng ha. Nhnh thnh phn c bn dng trong LAD tng ng vi nhng thnh phn c bn dng trong bng mch rle. + Tip im c hai loi: Thng ng Thng h + Cun dy (coil): ( ) + Hp (box): M t cc hm khc nhau, n lm vic khi c tn hiu a n hp. C cc nhm hp sau: hp cc b nh thi, hp cc b m, hp di chuyn d liu, hp cc hm ton hc, hp trong truyn thng mng... + Mng LAD: L mch ni cc phn t thnh mt mng hon thin, cc phn t nh cun dy hoc cc hp phi c mc ng chiu. Ngun in c hai ng chnh, mt ng bn tri th hin dy nng, mt ng bn phi l dy trung tnh (neutral) nhng khng c th hin trn giao din lp trnh. Mt mch lm vic c khi cc phn t c mc ng chiu v kn mch. 3.1.2. nh ngha v STL: L phng php th hin chng trnh di dng tp hp cc cu lnh. to ra mt chng trnh bng STL, ngi lp trnh cn phi hiu r phng thc s dng 9 bit trong ngn xp (stack) logic ca S7 200. Ngn xp l mt khi 9 bit chng ln nhau t S0S8, nhng tt c cc thut ton lin quan n ngn xp u lm vic vi bit u tin v bit th hai (S0 v S1) ca ngn xp. gi tr logic mi c th c gi hoc ni thm vo ngn xp. Hai bit S0 v S1 phi hp vi nhau th ngn xp c ko ln mt bit. Ngn xp ca S7 200 (logic stack):
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S0 S1 S2 S3 S4 S5 S6 S7 S8
Stack0 bit u tin ca ngn xp. Stack1 bit th hai ca ngn xp. Stack2 bit th ba ca ngn xp. Stack3 bit th t ca ngn xp. Stack4 bit th nm ca ngn xp. Stack5 bit th su ca ngn xp. Stack6 bit th by ca ngn xp. Stack7 bit th tm ca ngn xp. Stack8 bit th chn ca ngn xp.
3.2.Vng qut (thc hin chng trnh) v cu trc ca mt chng trnh: PLC thc hin chng trnh theo vng lp. Mi vng lp c gi l vng qut (scan). Cc giai on ca vng qut:
Khi gp lnh vo/ra tc thi ngay lp tc h thng dng tt c mi cng vic khc, ngay c chng trnh x l ngt thc hin chng trnh ny trc tip vi cng vo/ra. Nu s dng cc ch ngt, chng trnh con tng ng vi tng tn hiu ngt c son tho v ci t nh mt b phn ca chng trnh. Chng trnh x l ngt ch c thc hin trong vng qut khi xut hin tn hiu bo ngt v c th xy ra bt c thi im n trong vng qut.
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3.3.Tp lnh S7-200: Tp lnh ca S7-200 c chia lm 3 nhm: 1. Cc lnh m khi thc hin th lm vic c lp khng ph thuc vo gi tr logic ca bit u tin trong ngn xp (gi l nhm lnh khng iu kin). 2. Cc lnh ch thc hin khi bit u tin trong ngn xp c gi tr bng 1 (gi l nhm lnh c iu kin). 3. Cc nhn lnh nh du v tr trong tp lnh (gi l nhm lnh iu khin chng trnh). ! Cc ngn ng s dng ch I (Immediately) ch ngha tc thi.
Cy lnh Tp lnh Bit Tp lnh can thip vo thi gian h thng Tp lnh truyn thng Tp lnh so snh Tp lnh bin i Tp cc b m Tp lnh ton hc Tp lnh ton hc
Tp lnh iu khin ngt

Tp lnh cc php tnh logic bin i Tp lnh di chuyn d liu Tp lnh iu khin chng trnh Tp lnh thao tc vi thanh ghi (dch/quay vng thanh ghi) Tp lnh lm vic vi chui Tp lnh lm vic vi bng d liu Tp cc b nh thi Tp lnh gi chng trnh con v chng trnh ngt
Hnh 3.3: M t cy lnh vi SIMATIC S7-200

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1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 3
Hnh 3.4: M t cy lnh bit

2 2
Hnh 3.5: M t cy lnh can thip vo thi gian h thng

2 2 2 2 2 2
Hnh 3.6: M t cy lnh truyn thng
57
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
58

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Hnh 3.7: M t cy lnh so snh
59
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
Hnh 3.8: M t cy lnh bin i

2 2 2 2 2 2
Hnh 3.9: M t cy lnh cc b m

2 2 2
Hnh 3.10: M t cy lnh cc b nh thi

2 2 2 2 2
Hnh 3.11: M t cy lnh iu khin ngt

60
2 2 2 2 2 2 2 2 2 2 2
Hnh 3.12: M t cy lnh hc kiu Floating-Point

2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
Hnh 3.13: M t cy lnh ton hc kiu Integer

2 2 2 2 2 2 2 2 2 2 2 2
Hnh 3.14: M t cy lnh php tnh logic bin i

61
2 2 2 2 2 2 2 2 2 2
Hnh 3.15: M t cy lnh di chuyn d liu

3 3 3 3 3 3 3 3 3 3 3 3
Hnh 3.16: M t cy lnh iu khin chng trnh

2 2 2 2 2 2 2 2 2 2 2 2 2
Hnh 3.17: M t cy lnh iu khin chng trnh
62
2 2 2 2 2 2
2 2 2 2 2 2
2 2 2 2 2 2
Hnh 3.18: M t cy lnh lm vic vi chui
2 2 2 2 2 2 2 2
Hnh 3.19: M t cy lnh lm vic vi bng d liu ! 1_Cc lnh khng iu kin. 2_Cc lnh c iu kin. 3_Cc lnh iu khin chng trnh. 3.4. C php v cch ng dng SIMATIC struction S7-200: 3.4.1. Ton hng v gii hn cho php:
63
Bng 3.1: Gii hn ton hng ca CPU S7-200 series CPU 22x
3.4.2. SIMATIC instructions: 1. SIMATIC Bit Logic Instructions:

M t (Description) Ton hng (Operands) Kiu d liu (Data Types)
STL
LAD
64
Chng 3: Ngn ng lp trnh v ng dng LD A O LDN AN ON LDI AI OI LDNI AIN OIN NOT
NOT bit bit bit
Tip im thng m s c ng khi bit = 1 Tip im thng ng s c m khi bit = 1 Tip im thng m s ng tc thi (khng ph thuc vo chu k vng qut) Tip im thng ng s m tc thi (khng ph thuc vo chu k vng qut) o gi tr logic ca bit u tin trong ngn xp Bit u tin trong ngn xp c gi tr bng 1 (trong khong thi gian ng bng 1 chu k vng qut) khi pht hin sn ln ca tn hiu u vo. Bit u tin trong ngn xp c gi tr bng 1 (trong khong thi gian ng bng 1 chu k vng qut) khi pht hin sn xung ca tn hiu u vo.
bit: I, Q, M, V, SM, T, C, S, L bit: I, Q, M, V, SM, T, C, S, L
Bool
bit
Bool
bit: I
Bool
bit: I Khng bit: I, Q, M, V, SM, T, C, S, L
Bool Khng
EU
Bool bit: I, Q, M, V, SM, T, C, S, L Bool
ED
Hnh 3.20: V d minh ho lnh LD, NOT, ED trong chng trnh LAD v STL
65
STL
LAD
M t Description Cun dy u ra trng thi ON khi c dng in iu khin i qua. Cun dy u ra trng thi ON tc thi (khng ph thuc vo chu k vng qut) khi c dng in iu khin i qua.
Ton hng Operands bit: I, Q, M, V, SM, T, C, S, L bit: Q
Kiu d liu Data Types Bool Bool
= bit =I bit
bit bit
bit, n
bit S n
Set 1 mng gm n tip im, tnh t tip im "bit" (n <= 128 tip im).
bit: I, Q, M, V, SM, T, C, S, L n: IB, QB, MB, Bool VB, SMB, SB, LB, AC, Constant, VD, AC, LD
R bit, n
bit
R
bit: I, Q, M, V, SM, Reset 1 mng gm n tip im, tnh t tip im "bit" (n T, C, S, L n: IB, QB, MB, <= 128 tip im).
VB, SMB, SB, LB, Bool AC, Constant, VD, AC, LD
bit SI bit, n
SI
Set tc thi 1 mng gm n tip bit: Q im, tnh t tip im "bit" (n n: IB, QB, MB, VB, SMB, SB, LB, <= 128 tip im).
Bool
AC, Constant, VD, AC, LD bit: Q n: IB, QB, MB, VB, SMB, SB, LB, Bool AC, Constant, VD, AC, LD n: 0 255 Byte
bit RI bit, n
RI
n n
NOP
Reset tc thi 1 mng gm n tip im, tnh t tip im "bit" (n <= 128 tip im).
NOP
Lnh rng, khng hot ng n ln.
66
Hnh 3.21: V d minh ho lnh =, S, R trong chng trnh LAD v STL
2. SIMATIC Compare Byte Instructions:

STL LAD M t (Description) COMPARE BYTE Lnh so snh gi tr ca hai byte IN1 v IN2. Trng thi tip im l ng khi lnh so snh IN1= IN2 l ng. Ton hng (Operands) IB, QB, MB, VB, SMB, SB, LB, AC, Constant, VD, AC, LD IB, QB, MB, VB, SMB, SB, LB, AC, Constant, VD, AC, LD IB, QB, MB, VB, SMB, SB, LB, AC, Constant, VD, AC, LD IB, QB, MB, Kiu d liu (Data Types)
LDB= AB= OB= LDB<> AB<> OB<> LDB< AB< OB< LDB<=
IN1 ==B IN2
Byte
IN1 <>B IN2
Lnh so snh gi tr ca hai byte IN1 v IN2. Trng thi tip im l ng khi lnh so snh IN1<> IN2 l ng.
Byte
IN1 <B IN2
Lnh so snh gi tr ca hai byte IN1 v IN2. Trng thi tip im l ng khi lnh so snh IN1< IN2 l ng.
Byte
Lnh so snh gi tr ca hai byte

IN1 <=B IN2
Byte
67
AB<= OB<= LDB> AB> OB> LDB>= AB>= OB>=

IN1 >=B IN2 IN1 >B IN2
LDW= AW= OW= LDW<> AW<> OW<> LDW> AW> OW> LDW>= AW>= OW>= LDW< AW< OW< LDW<= AW<= OW<=
IN1 >I IN2 IN1 ==I IN2
IN1 <>I IN2
VB, SMB, SB, LB, AC, Constant, VD, AC, LD Lnh so snh gi tr ca hai byte IB, QB, MB, VB, SMB, SB, IN1 v IN2. Trng thi tip im l ng khi LB, AC, Byte Constant, lnh so snh IN1> IN2 l ng. VD, AC, LD Lnh so snh gi tr ca hai byte IB, QB, MB, VB, SMB, SB, IN1 v IN2. Trng thi tip im l ng khi LB, AC, Byte lnh so snh IN1>= IN2 l ng. Constant, VD, AC, LD COMPARE WORD (COPARE INTEGER) IW, QW, MW, VW, Lnh so snh gi tr ca hai SMW, SW, LW, Word IN1 v IN2. Word Trng thi tip im l ng khi AC, Constant, VD, lnh so snh IN1= IN2 l ng. AC, LD IW, QW, MW, VW, Lnh so snh gi tr ca hai SMW, SW, LW, Word IN1 v IN2. Trng thi tip im l ng khi AC, Constant, VD, Word lnh so snh IN1<> IN2 l ng. AC, LD IN1 v IN2. Trng thi tip im l ng khi lnh so snh IN1<= IN2 l ng. IW, QW, MW, VW, SMW, SW, LW, AC, Constant, VD, AC, LD IW, QW, MW, VW, Lnh so snh gi tr ca hai SMW, SW, LW, Word IN1 v IN2. Trng thi tip im l ng khi AC, Constant, VD, lnh so snh IN1 >= IN2 l ng. AC, LD IW, QW, MW, VW, Lnh so snh gi tr ca hai SMW, SW, LW, Word IN1 v IN2. Trng thi tip im l ng khi AC, Constant, VD, lnh so snh IN1 < IN2 l ng. AC, LD IW, QW, MW, VW, Lnh so snh gi tr ca hai SMW, SW, LW, Word IN1 v IN2. Trng thi tip im l ng khi AC, Constant, VD, lnh so snh IN1 <= IN2 l ng. AC, LD COMPARE DOUBLEWORD Lnh so snh gi tr ca hai Word IN1 v IN2. Trng thi tip im l ng khi lnh so snh IN1 > IN2 l ng.
Word
IN1 >=I IN2
Word
IN1 <I IN2
Word
IN1 <=I IN2
Word
68
Chng 3: Ngn ng lp trnh v ng dng LDDW= ADW= ODW= LDDW<> ADW<> ODW<> LDDW> ADW> ODW> LDDW>= ADW>= ODW>= LDDW< ADW< ODW< LDDW<= ADW<= ODW<= LDR= AR= OR= LDR<> AR<> OR<> LDR> AR> OR> LDR>= AR>= OR>= LDR<
IN1 ==D IN2 IN1 <>D IN2
IN1 >D IN2
IN1 >=D IN2
IN1 <D IN2 IN1 <D IN2
IN1 ==R IN2
IN1 <>R IN2
IN1 >R IN2
IN1 >=R IN2
IN1 <R IN2
ID, QD, MD, VD, SMD, SD, LD, AC, Constant, VD, AC, LD ID, QD, MD, VD, Lnh so snh gi tr ca hai SMD, SD, LD, AC, DoubleWord IN1 v IN2. Trng thi tip im l ng khi Constant, VD, lnh so snh IN1 <> IN2 l ng. AC, LD ID, QD, MD, VD, Lnh so snh gi tr ca hai SMD, SD, LD, AC, DoubleWord IN1 v IN2. Trng thi tip im l ng khi Constant, VD, lnh so snh IN1 > IN2 l ng. AC, LD ID, QD, MD, VD, Lnh so snh gi tr ca hai SMD, SD, LD, AC, DoubleWord IN1 v IN2. Trng thi tip im l ng khi Constant, VD, lnh so snh IN1 >= IN2 l ng. AC, LD ID, QD, MD, VD, Lnh so snh gi tr ca hai SMD, SD, LD, AC, DoubleWord IN1 v IN2. Trng thi tip im l ng khi Constant, VD, lnh so snh IN1 < IN2 l ng. AC, LD ID, QD, MD, VD, Lnh so snh gi tr ca hai SMD, SD, LD, AC, DoubleWord IN1 v IN2. Trng thi tip im l ng khi Constant, VD, lnh so snh IN1 <= IN2 l ng. AC, LD COMPARE REAL ID, QD, MD, VD, Lnh so snh gi tr ca hai s SMD, SD, LD, AC, thc IN1 v IN2. Trng thi tip im l ng khi Constant, VD, lnh so snh IN1 = IN2 l ng. AC, LD Lnh so snh gi tr ca hai s ID, QD, MD, VD, thc IN1 v IN2. SMD, SD, LD, AC, Trng thi tip im l ng khi Constant, VD, lnh so snh IN1 <> IN2 l ng AC, LD Lnh so snh gi tr ca hai s ID, QD, MD, VD, thc IN1 v IN2. SMD, SD, LD, AC, Trng thi tip im l ng khi Constant, VD, lnh so snh IN1 > IN2 l ng AC, LD Lnh so snh gi tr ca hai s ID, QD, MD, VD, thc IN1 v IN2. SMD, SD, LD, AC, Trng thi tip im l ng khi Constant, VD, lnh so snh IN1 >= IN2 l ng AC, LD Lnh so snh gi tr ca hai s ID, QD, MD, VD, thc IN1 v IN2. SMD, SD, LD, AC, Lnh so snh gi tr ca hai DoubleWord IN1 v IN2. Trng thi tip im l ng khi lnh so snh IN1 = IN2 l ng.
Double Word
Double Word
Double Word
Double Word
Double Word
Double Word
Real
Real
Real
Real Real
69
Chng 3: Ngn ng lp trnh v ng dng AR< OR< LDR<= AR<= OR<=

IN1 <=R IN2
B mn T ng o Lng Khoa in Constant, VD, AC, LD ID, QD, MD, VD, SMD, SD, LD, AC, Constant, VD, AC, LD
Trng thi tip im l ng khi lnh so snh IN1 < IN2 l ng Lnh so snh gi tr ca hai s thc IN1 v IN2. Trng thi tip im l ng khi lnh so snh IN1 <= IN2 l ng
Real
Hnh 3.22: V d minh ho lnh so snh trong chng trnh LAD, FBD v STL
3. SIMATIC Timer Instructions:

STL LAD M t (Description) On_Delay_Timer (TON) y l lnh m thi gian hot khi tn hiu Ton hng (Operands) Txxx: Constant IN : power flow Kiu d liu (Data Types) word bool
70
TON Txxx, PT
Txxx
TON EN PT
EN l ON. Khi gi tr m tc thi trong thanh ghi CT >= gi tr t trc trong thanh ghi PT th bit trng thi Txxx ca b Timer l ON.
Txxx
TONR Txxx, PT
TONR EN PT
Txxx
TOF EN PT
TOF Txxx, PT
Gi tr m tc thi trong thanh ghi CT = 0 v bit trng thi v off khi tn hiu u vo l off. Ngc li vi b TON, thanh ghi CV v bit trng thi vn gi nguyn tr khi c lnh Reset b TONR. Ngoi ra c th s dng lnh Reset xo thanh ghi tc thi cng nh bit trng thi ca b TON. Ta c th s dng ton hng Word (INT) tng ng vi lnh INT hay ton hng bit tng ng vi bit trng thi. Trng thi ca bit Txxx c cung trng thi vi tn hiu ti chn EN u vo, ti thi im ny gi tr trong thanh ghi CT= 0. Ti thi im
PT: IW, QW, MW, SMW, VW, LW, SW, AIW, T, C, AC, Constant, VD, AC, LD
INT
71
khi c sn xung ca tn hiu chn EN gi tr trong thanh ghi CV bt u tng dn n khi CT = PT bit Txxx xung mc thp v CT gi nguyn gi tr ny cho n khi c tn hiu (mc cao mi kch vo chn EN). C th xo CT v Txxx bng lnh Reset. Bng 3.2: S Timer v phn gii
Note: Khng th cng mt lc s dng c 2 b TON v TOF cho cng 1 a ch (v d T37). Bng 3.3: Gi tr t ti a cho tng loi v trng thi lm vic ca cc loi Timer
Vic s dng tip im thng ng Q0.0 bn di m lm tn hiu u vo cho Timer m bo cho Q0.0 s c gi tr logic bng 1 trong mt vng qut mi thi im m gi tr m tc thi ca b Timer t gi tr t trc PT.
72
To khong thi gian tr 300ms bng cc loi timer c phn gii khc nhau:
Hnh 3.23: V d cch s dng b TON
73
Hnh 3.24: V d cch s dng b TONR
. Hnh 3.25: V d cch s dng b TOF
74
4. SIMATIC Counter Instructions (Count Up, Count Up Down, Count Down ):

STL LAD M t Description Khai bo b m tin theo sn ln ca tn hiu u vo CU. Khi gi tr m tc thi CWord ln hn hoc bng gi tr t trc PV, th bit trng thi Cxxx c gi tr bng 1. B m c Reset khi R c gi tr logic bng 1. B m ngng m khi gi tr m t gi tr cc i 32767. Khai bo b m tin/li; m tin theo sn ln ca tn hiu u vo CU, m li theo sn ln ca tn hiu u vo CD. Khi g tr m tc thi C-Word ln hn hoc bng gi tr t trc PV, ht bit trng thi Cxxx c gi tr bng 1. B m c Reset khi R c gi tr logic bng 1. B m ngng m tin khi gi tr m t gi tr cc i 32767. B m ngng m li khi gi tr m t gi tr cc i -32768. CTUD reset khi u vo R c gi tr logic bng 1. Khai bo b m li theo sn ln ca tn hiu u vo CD. Khi c sn ln ti LD, gi tr t trc PV c load vo thanh tc thi C-Word. Mi khi c sn ln ti CD, gi tr trong C-Word gim i 1 n v, cho n khi C-Word = 0 th bt trng thi Cbit = 1. Ton hng Operands Cxxx: Constant EU, R : power flow. PT: IW, QW, MW, SMW, VW, LW, SW, AIW, T, C, AC, Constant, VD, AC, LD Cxxx: Constant EU, ED, R : power flow. PT: IW, QW, MW, SMW, VW, LW, SW, AIW, T, C, AC, Constant, VD, AC, LD Kiu d liu Data Types word bool
Cxxx
CTU
CTU Cxxx, PV
CU R PV
INT
word bool
Cxxx
CTUD CU CD R PV
CTUD Cxxx, PV
INT
Cxxx
CTU
CTD Cxxx, PV
CD LD PV
75
Hnh 3.26: V d cch s dng b CTD
Hnh 3.27: V d cch s dng b CTUD
76
5. SIMATIC Integer Math Instructions:

M t Description Ton hng Operands Kiu d liu Data Types
STL
LAD
Add Integer and Subtract Integer

MOVW IN1, OUT +I IN2, OUT hoc +I IN1, IN2
ADD_I EN IN1 OUT IN2
Lnh cng hai s nguyn 16 bit IN1 + IN2 kt qu cha trong OUT (16 bit) Lnh tr hai s nguyn 16 bit IN1- IN2 kt qu cha trong OUT (16 bit)
MOVW IN1, OUT -I IN2, OUT hoc -I IN1, IN2
SUB_I EN IN1 OUT IN2
IN1, IN2: IW, QW, MW, SMW, VW, LW, SW, AIW, T, C, AC, Constant, VD, AC, LD OUT: IW, QW, MW, SMW, VW, LW, SW, T, C, AC, VD, AC, LD
INT
Add Double Integer and Subtract Double Integer

MOVD IN1, OUT +D IN2, OUT hoc +D IN1, IN2
ADD_DI EN IN1 OUT IN2
MOVD IN1, OUT -D IN2, OUT hoc -D IN1, IN2
SUB_DI EN IN1 OUT IN2
Lnh cng hai s nguyn 32 bit IN1 + IN2 kt qu cha trong OUT (32 bit) Lnh tr hai s nguyn 32 bit IN1 - IN2 kt qu cha trong OUT (32 bit)
IN1, IN2: ID, QD, MD, VD, SMD, SD, LD, HC,AC, Constant, VD, AC, LD OUT: ID, QD, MD, VD, SMD, SD, LD,AC, VD, AC, LD
DINT
Add Real and Subtract Real

MOVR IN1, OUT +R IN2, OUT hoc +R IN1, IN2 MOVR IN1, OUT -R IN2, OUT
ADD_R EN IN1 OUT IN2
IN1, IN2: ID, QD, MD, VD, SMD, SD, LD, HC,AC, Constant, VD, AC, LD OUT: ID, QD, MD, VD, SMD, SD, LD,AC, VD, AC, LD Lnh tr hai s IN1, IN2: ID, QD, MD, thc 32 bit IN1 VD, SMD, SD, LD, Lnh cng hai s thc 32 bit IN1 + IN2 kt qu cha trong OUT (32 bit)
Real
Real
77

hoc IN1, IN2
B mn T ng o Lng Khoa in HC,AC, Constant, VD, AC, LD OUT: ID, QD, MD, VD, SMD, SD, LD,AC, VD, AC, LD
-R
SUB_R EN IN1 OUT IN2
+ IN2 kt qu cha trong OUT (32 bit)
Miltiply Integer and Divide Integer

MOVW IN1, OUT *I IN2, OUT hoc *I IN1, IN2
MULL_I EN IN1 OUT IN2
Lnh nhn hai s nguyn 16 bit IN1*IN2 kt qu cha trong OUT (16 bit) Lnh chia hai s nguyn 16 bit IN1/IN2 kt qu cha trong OUT (16 bit)
MOVW IN1, UT /I IN2, OUT hoc /I IN1, IN2
DIV_I EN IN1 OUT IN2
IN1, IN2: IW, QW, MW, SMW, VW, LW, SW, AIW, T, C, AC, Constant, VD, AC, LD OUT: IW, QW, MW, SMW, VW, LW, SW, T, C, AC, VD, AC, LD
INT
Miltiply Double Integer and Divide Double Integer

MOVD IN1, OUT *D IN2, OUT hoc *D IN1, IN2
MUL_DI EN IN1 OUT IN2
Lnh nhn hai s nguyn 32 bit IN1*IN2 kt qu cha trong OUT (32 bit) Lnh chia hai s nguyn 32 bit IN1/IN2 kt qu cha trong OUT (32 bit)
MOVD IN1, OUT /D IN2, OUT hoc /D IN1, IN2
DIV_DI EN IN1 OUT IN2
IN1, IN2: ID, QD, MD, VD, SMD, SD, LD, HC,AC, Constant, VD, AC, LD OUT: ID, QD, MD, VD, SMD, SD, LD,AC, VD, AC, LD
DINT
Multiply Integer to Double Double Integer and Divide Integer to Double Double Integer
MOVW IN1, OUT MUL IN2, OUT hoc MUL IN1, IN2
MUL EN IN1 OUT IN2
Lnh nhn hai s nguyn 16 bit IN1*IN2 kt qu cha trong OUT (32 bit)
IN1, IN2: IW, QW, MW, SMW, VW, LW, SW, AIW, T, C, AC, Constant, VD, AC, LD OUT: ID, QD, MD, VD, SMD, SD, LD,AC, VD, AC, LD
INT
DINT
78
MOVW IN1, OUT DIV IN2, OUT hoc DIV IN1, IN2
DIV EN IN1 OUT IN2
Lnh chia hai s nguyn 16 bit IN1*IN2 kt qu cha trong OUT (32 bit)
INT
DINT
Miltiply Real and Divide Real

MUL_R EN IN1 OUT IN2
MOVR IN1, OUT *R IN2, OUT hoc *R IN1, IN2
Lnh nhn hai s thc 32 bit IN1*IN2 kt qu cha trong OUT (32 bit)
MOVR IN1, OUT /R IN2, OUT hoc /R IN1, IN2
DIV_R EN IN1 OUT IN2
Lnh chia hai s thc 32 bit IN1/IN2 kt qu cha trong OUT (32 bit)
Real
Nhng lnh ny lm n gin ho cc vng iu khin bn trong chng trnh hoc l cc qu trnh lp. Trong LAD hay trong STL cc lnh tng hoc gim u lm vic vi cc ton hng c kiu Byte, t n, kiu t kp theo nguyn tc cng hoc tr ton hng vi s nguyn 1. tit kim nh ta c th s dng u vo ng thi lm u ra.
Increment Byte and Decrement Byte

INC_B EN
INCB OUT
IN OUT
M t trn. DECB OUT

DEC_B EN IN OUT
IN: IB, QB, MB, VB, SMB, SB, LB, AC, Constant, VD, AC, LD OUT:IB, QB, MB, VB, SMB, SB, LB, AC, VD, AC, LD
Byte
Increment Word and Decrement Word
79
IN: IW, QW, MW, SMW, VW, LW, SW, AIW, T, C, AC, Constant, VD, AC, LD OUT: IW, QW, MW, SMW, VW, LW, SW, AIW, T, C, AC, VD, AC, LD
INCW OUT
INC_W EN IN OUT
M t trn
INT
DECW OUT
DEC_W EN IN OUT
Increment Double Word and Decrement Double Word INCD OUT

INC_DW EN IN OUT
M t trn DECB OUT

DEC_DW EN IN OUT
IN: ID, QD, MD, VD, SMD, SD, LD, HC,AC, Constant, VD, AC, LD OUT: ID, QD, MD, VD, SMD, SD, LD, HC,AC, VD, AC, LD
DINT
Hnh 3.28: V d v cch s dng lnh MIL, DIV

80
Hnh 3.29: V d v cch s dng lnh INC. DEC
Hnh 3.30: V d v cch s dng lnh ADD, MUL, DIV vi s thc

81
6. SIMATIC Numerical Function Instructions:

STL LAD M t (Description) Square Root Lnh thc hin php ly cn bc hai ca s thc 32 bit. Kt qu cng l s 32 bit c ghi vo t kp OUT. Ton hng (Operands) Kiu d liu (Data Types)
SQRT IN, OUT
LN IN, OUT
EPX IN, OUT
IN: ID, QD, MD, VD, SMD, SD, LD, HC,AC, Constant, SQRT EN VD, AC, LD OUT: ID, QD, MD, IN OUT VD, SMD, SD, LD, HC,AC, VD, AC, LD Natural Logarithm (logarit t nhin) IN: ID, QD, MD, Lnh Natural VD, SMD, SD, LD, Logarithm thc hin HC,AC, Constant, php logirit t nhin ca s thc 32 bit, Kt VD, AC, LD SQRT EN qu c lu vo t OUT: ID, QD, MD, kp OUT. VD, SMD, SD, LD, IN OUT Lnh ny cng c HC,AC, VD, AC, s dng thc hin LD php logarit c s 10 t php ly logarit t nhin. Natural Exponential (php ly t nhin) IN: ID, QD, MD, VD, SMD, SD, LD, EPX HC,AC, Constant, EN VD, AC, LD IN OUT OUT: ID, QD, MD, VD, SMD, SD, LD, HC,AC, VD, AC, LD
Real
Real
Real
82
SIN IN, OUT
SIN EN IN OUT
COS EN
COS IN, OUT
IN OUT
TAN IN, OUT
TAN EN IN OUT
Sine, Cosine and Tangent Lnh Sine, Cosine v Tangent nh gi tr hm lng gic ca gc IN (s thc 32 bit). Kt qu c lu vo doubleword OUT. Vi iu kin: IN tnh bng radian, nu l th phi thc hin php chuyn t sang radian bng cch thc hin lnh MUL_R nhn gi tr IN Vi 1.745329E2 (/180) Lnh thc hin tnh ton vng lp, vi s th t l LOOP (0<=LOOP<=7) v bng tham chiu ca qu trnh l TBL. ! Trc khi thc hin qu trnh tnh ton vng lp PID ny cn phi thc hin mt s th tc quy nh trc khi qu trnh tnh ton din ra nh: vic khai bo tham s ca hm, a ch ca mng d liu, ly mu tn hiu vo analog u vo, thc hin qu trnh tnh ton, chun ho, hiu chnh... Phn ny s c trnh by c th chng sau.
IN: ID, QD, MD, VD, SMD, SD, LD, HC,AC, Constant, VD, AC, LD OUT: ID, QD, MD, VD, SMD, SD, LD, HC,AC, VD, AC, LD
Real
TBL: VB
BYTE
PID TBL, LOOP
PID EN TBL OUT LOOP
LOOP: Constant (0 7)
BYTE
83
7. SIMATIC Move Instructions:

M t Ton hng Description Operands Move Byte, Move Word, Move Double Word and Move Real IN: IB, QB, MB, VB, Lnh thc hin SMB, SB, LB, AC, vic chuyn d MOV_B liu t byte IN vo Constant, VD, EN byte OUT khi c MOVB IN, OUT AC, LD IN OUT sn ln ca tn OUT:IB, QB, MB, hiu vo. VB, SMB, SB, LB, AC, VD, AC, LD IN: IW, QW, VW, Lnh thc hin LW, SW, AIW, T, C, vic chuyn d MOV_W AC, Constant, VD, liu t Word IN EN AC, LD vo Word OUT MOVW IN,OUT OUT: IW, QW, MW, IN OUT khi c sn ln SMW, VW, LW, SW, ca tn hiu vo. STL LAD
AIW, T, C, AC, VD, AC, LD
Kiu d liu Data Types
Byte
Word, INT
IN: ID, QD, MD, VD, SMD, SD, LD, HC,AC, &VB, &IB, MOV_DW &QB, &SB, &MB, EN &T, &C, Constant, DoubleWord, MOVD IN, OUT IN OUT VD, AC, LD DINT OUT: ID, QD, MD, VD, SMD, SD, LD, HC,AC, VD, AC, LD IN: ID, QD, MD, Lnh thc hin VD, SMD, SD, LD, vic chuyn d MOV_R HC,AC, Constant, liu l s thc t EN t kp IN vo t VD, AC, LD MOVR IN, OUT Real IN OUT kp OUT khi c OUT: ID, QD, MD, sn ln ca tn VD, SMD, SD, LD, hiu vo. HC,AC, VD, AC, LD Block Move Byte, Block Move Word, Block Move Double Word and Block Move Real IN, OUT: IB, QB, Lnh thc hin BMB IN, OUT, Byte MB, VB, SMB, SB, vic chuyn N N BLKMOV_B byte d liu tnh t LB, VD, AC, LD. EN Lnh thc hin vic chuyn d liu t kp IN vo t kp OUT khi c sn ln ca tn hiu vo.
IN N OUT
84
B mn T ng o Lng Khoa in N: IB, QB, MB, VB, SMB, SB, LB, AC, Constant, VD, AC, LD 1 <= N <= 255 IN: IW, QW, VW,
LW, SW, SMW, AIW, T, C, AC, VD, AC, LD OUT: IW, QW, VW, LW, SW, SMW, AQW, T, C, AC, VD, AC, LD
BLKMOV_W EN
BMW IN, OUT, N
IN N
OUT
byte IN vo vng a ch tnh t byte OUT khi c sn ln ca tn hiu vo. Lnh thc hin vic chuyn N t n d liu tnh t t n IN vo vng a ch tnh t t n OUT khi c sn ln ca tn hiu vo.
Byte
Word
BMD IN, OUT, N
BLKMOV_D EN IN N OUT
Lnh thc hin vic chuyn N t kp d liu tnh t t kp IN vo vng a ch tnh t t kp OUT khi c sn ln ca tn hiu vo. Swap Byte Lnh o d liu ca 2 byte trong t n IN.
N: IB, QB, MB, VB, SMB, SB, LB, AC, Constant, VD, AC, LD 1 <= N <= 255 IN, OUT: ID, QD, MD, VD, SMD, SD, LD, VD, AC, LD. N: IB, QB, MB, VB, SMB, SB, LB, AC, Constant, VD, AC, LD 1 <= N <= 255 IN: IW, QW, VW, LW, SW, SMW, AIW, T, C, AC.
Byte
DWord
Byte
SWAP IN
SWAP EN ENO IN
Word
BIR IN, OUT
BIW IN, OUT
Move Byte Immedieate Read/ Write IN: IB Lnh c tc thi MOV_BIR gi tr byte u EN OUT: IB, QB, MB, vo cng vt l IN OUT IN v ghi trc tip VB, SMB, SB, LB, vo byte OUT. AC, VD, AC, LD IN: IB, QB, MB, VB, Lnh c tc thi MOV_BIW gi tr byte IN v SMB, SB, LB, AC, EN ghi trc tip ra u Constant, VD, AC, IN OUT ra cng vt l LD byte OUT. OUT: QB
Byte
Byte
85
Hnh 3.31: V d minh ho v cch s dng lnh khi hm
Hnh 3.32: V d minh ho v cch s dng lnh khi hm
86
8. SIMATIC Table Instructions: Cc lnh lm vic vi bng d liu gi tc l lnh bng, cho php nhp d liu vo mt bng, sp xp s lng theo th t c nhp vo hoc theo th t ngc li. Bng c nh ngha l mt mng t n xp lin nhau t a ch thp nht tnh t u bng n a ch cao nht tnh n cui bng. Hai t n u tin ca bng dng qun l bng. D liu c ghi vo trong bng bt u t t n th 3 trong bng, mi d liu chim mt t n, mt bng ch cha ti a 100 d liu. C ngha l bng ln nht c 204 byte. Hai t n u bng c ngha nh sau:
Hnh 3.33: M t bng d liu + T u k hiu bng TL, cha kch thc ca bng khng k hai t n qun l. + T n th hai k hiu bng EC, qun l s cc d liu hin c trong bng. Bit SM1.4 c dng bo trng thi y bng. Cc lnh lm vic vi bng gm c cc lnh: + Nhp thm d liu vo bng: ATT - Add to Table (AT_T_TBL). + Ly d liu ra khi bng theo th t vo trc ra trc: First - In - First - Out (FIFO). + Ly d liu ra khi bng theo th t vo sau ra trc: Last - In - First - Out (LIFO). Tip: Lnh bng c thc hin lin tc (mt t trong mt vng qut) khi u vo vn cn c kch. Bi vy trc khi gi lnh lm vic vi bng nn thc hin lnh pht hin sn ln (EU) cho tn hiu u vo.
M t Description Add to Table Lnh ghi thm vo bng mt d liu kiu t n, c xc nh bng ni dung ca ton hng DATA trong lnh. Bng c ch nh trong lnh bng ton hng TBL xc nh t u tin ca bng tc l TL Nu Ton hng Operands DATA: IW, QW, VW,
LW, SW, MW, SMW, AIW, T, C, AC, Constant, VD, AC, LD
STL
LAD
ATT DATA, TABLE
AD_T_TBL EN ENO DATA TBL
INT
87
tin ca bng, tc l TL. Nu bng y tc l EC=TL, Bit SM1.4=1. D liu mi c a vo s nm trong t cha dng u tin, tc l ngay sau d liu c nhp trc . Khi lnh thc hin xong th ni dung ca t EC tng thm 1 n v.
TBL: IW, QW, VW,

LW, SW, MW, SMW, T, C, VD, AC, LD
Word
Hnh 3.34: V d v cch thc hin lnh ATT S dng lnh tm kim tm d liu theo mu cho trc trong mt bng. Mu d liu nh trc l ni dung ca ton hng PTN ca lnh. Tham s CMD l lut tm kim, c 4 lut tm kim: =, <>, <, >. Bng c ch nh trong lnh tm kim c ch nh bng ni dung ca ton hng TBL ch nh nm ngay trc vng cha d liu ca bng ( ny chnh l t n EC). Bng quy nh cho lnh tm kim bao gm b m EC tc thi c kiu t n ghi s cc d liu c trong bng v vng d liu ca bng. S lng ln nht cc d liu ca bng c th c ca bng l 100. Mi d liu trong bng c kch thc bng t n. D liu trong bng c nh s t 0n vi n c gi tr cc i bng 99. S cc d liu c trong bng l ni dung ca t n EC, khng bt buc lnh tm kim phi bt u t u bng. Lnh c th bt u cng vic tm kim ti mt im bt k trong vng d liu. Ton hng INDX xc nh im xut pht ca cng vic tm kim bng vic ch ra ch s (099) ca d liu u tin trong
88
vng nh tm kim. Nh vy mun tm t u bng INDX phi c gi tr bng 0. Ni dung ca INDX l s nguyn trong khong t 0 n EC. Nu s dng lnh tm kim vi bng c to bi cc lnh ATT, FIFO, LIFO th nh EC l nh u bng phi c ch nh trong lnh ti ton hng TBL. Khi s dng lnh ATT, FIFO, LIFO i hi phi thng bo t s cc u vo cc i cho lnh ( nh TL) cn khi s dng lnh tm kim TBL_FIND th khng cn. Ton hng SRC ca lnh tm kim l tn ca nh EC (2 byte). C php ca lnh tm kim trong LAD v STL khc nhau. Trong khi c 4 lut tm kim CMD trong LAD, th trong STL tng ng vi mi lut tm kim c 1 lnh tm kim ring. Nh vy trong LAD ch c 1 hp cho 4 lnh tm kim th trong STL l: FND=, FND<>, FND<, FND>. Ni dung ca ton hng trong LAD c quy nh nh sau: a) CMD = 1, tm theo lut = (bng nhau.). b) CMD = 2, tm theo lut <> (khc nhau). c) CMD = 3, tm theo lut < (nh hn). d) CMD = 4, tm theo lut > (ln hn).
STL LAD M t Description Table Fine Thc hin vic tm kim trong bng xc nh bi TBL , bt u t v tr d liu INDX nh ch d liu PARNT. Lut tm kim c quy nh bi CMD c gi tr t 1 n 4 tng ng =, <>, <, >. Khi tm thy , INDX s ch vo d liu u tin tm c trong bng v lnh c kt thc. Do tm kim d liu tip theo, INDX phi c tng gi tr l v gi li lnh ny. Nu nh khng tm thy INDX c gi tr ng bng gi tr ca b m EC. Ton hng Operands TBL: IW, QW,
VW, LW, SW, MW, SMW, AIW, T, C, VD, AC, LD
FND= TBL, PARNT, INDX
Word
PTN: IW, QW,

VW, LW, SW, MW, SMW, AIW, T, C, AC, Constant, VD, AC, LD INDX: LW, SW, MW, SMW, AIW, T, C, VD, AC, LD
FND<> TBL, PARNT, INDX
AD_T_TBL EN ENO TBL PTN INDX
INT
FND< TBL, PARNT, INDX
CMD
Word
CMD: Constant Byte
FND> TBL, PARNT, INDX
89
Bng 3.5: S khc nhau gia bng d liu nh ngha bng lnh ATT, FIFO, LIFO v lnh FIN
Hnh 3.35: V d v cch s dng lnh tm kim FND
90
B mn T ng o Lng Khoa in Kiu d liu (Data Types)
STL
LAD
M t (Description)
Ton hng (Operands)
FIFO TABLE, DATA
EN
FIFO ENO DATA
TBL
Fisrt - In - Fisrf - Out Lnh ly d liu u TBL: IW, QW, VW, LW, SW, tin ca bng ra khi MW, T, C, VD, bng. Nu bng trng AC, LD c ngha l d liu trong c ly ra ht, hay EC=0, bit SM1.4=1. D liu ly ra c ghi vo DATA (kiu t). Cc d liu cn li c dn ln DATA: IW, QW, VW, LW, SW, v tr trn lp ch MW, SMW, AIW, trng va mi b ly i. Khi lnh thc hin xong T, C, AQW, VD, AC, LD ni dung ca EC gim i mt n v.
INT
Word
Hnh 3.36: V d v cch s dng lnh FIFO

.
91
B mn T ng o Lng Khoa in Kiu d liu Data Types
STL
LAD
M t Description Last - In - Fisrf - Out Lnh ly d liu cui cng ca bng ra khi bng tc l d liu c nhp sau cng. Nu bng trng c ngha l d liu trong c ly ra ht, hay EC=0, bit SM1.4=1. D liu ly ra ghi vo DATA (kiu t). Cc d liu cn li c dn ln v tr trn lp ch trng va mi b ly i. Khi lnh thc hin xong ni dung ca EC gim i mt n v.
Ton hng Operands TBL: IW, QW,

VW, LW, SW, MW, T, C, VD, AC, LD
INT
LIFO
LIFO TABLE, DATA
EN TBL
ENO DATA
DATA: IW, QW,

VW, LW, SW, MW, SMW, AIW, T, C, AQW, VD, AC, LD
Word
Hnh 3.37: V d v cch s dng lnh LIFO
92
B mn T ng o Lng Khoa in Ton hng Operands IN: IW, QW, VW, Kiu d liu Data Types
STL
LAD
M t Description Memory Fill Lnh in gi tr cha trong Word IN vo mng bt u t a ch Word OUT. N l s t n ca mng, 1<=N<=255
FILL EN ENO
LW, SW, MW, SMW, AIW, T, C, AC, Constant, VD, AC, LD
Word
FILL IN, OUT, N
IN N
OUT
N: IB, QB, MB, VB, SMB, SB, LB, AC, Constant, VD, AC, LD OUT: IW, QW, VW,
LW, SW, MW, SMW, AIW, T, C, VD, AC, LD
Byte
Word
Hnh 3.38: V d v cch s dng lnh FILL 9. SIMATIC Logical Operation Instructions:
STL LAD M t Description Ton hng Operands IN1, IN2: IB, QB, MB, VB, SMB, SB, LB, AC, Constant, VD, AC, LD Kiu d liu Data Types Byte
And Byte, Or Byte, Exclusive Or Byte

WAND_B EN ENO IN1 OUT IN2
ANDB IN1, OUT
Lnh thc hin AND gia cc bit tng ng ca hai Byte IN1 v IN2, kt qu ghi vo Byte OUT.
93
B mn T ng o Lng Khoa in OUT: IB, QB, MB, VB, SMB, SB, LB, AC, VD, AC, LD Byte
ORB IN1, OUT
WOR_B EN ENO IN1 OUT IN2
Lnh thc hin OR gia cc bit tng ng ca hai Byte IN1 v IN2, kt qu ghi vo Byte OUT. Lnh thc hin XOR gia cc bit tng ng ca hai Byte IN1 v IN2, kt qu ghi vo Byte OUT.
XORB IN1, OUT
WXOR_B EN ENO IN1 OUT IN2
ANDW IN1, OUT
And Word, Or Word, Exclusive Or Word Lnh thc hin AND gia cc IN1, IN2: WAND_W IW, QW, VW, bit tng ng ca hai Word EN ENO LW, SW, MW, IN1 v IN2, kt qu ghi vo IN1 OUT SMW, AIW, T, Word OUT.
IN2
ORW IN1, OUT
WOR_W EN ENO IN1 OUT IN2
Lnh thc hin OR gia cc bit tng ng ca hai Word IN1 v IN2, kt qu ghi vo Word OUT. Lnh thc hin XOR gia cc bit tng ng ca hai Word IN1 v IN2, kt qu ghi vo Word OUT.
C, AC, Constant, VD, AC, LD
Word OUT: IW, QW, VW,

LW, SW, MW, SMW, T, C, AC, VD, AC, LD
XORW IN1, OUT
WXOR_W EN ENO IN1 OUT IN2
ANDD IN1, OUT
And DWord, Or DWord, Exclusive Or DWord Lnh thc hin AND gia cc IN1, IN2: WAND_DW ID, QD, VD, bit tng ng ca hai t kp EN ENO IN1 v IN2, kt qu ghi vo t LD, SD, MD, IN1 OUT SMD, HD, AC, kp OUT. IN2
WOR_DW EN ENO IN1 OUT IN2
Double Word
ORD 1, OUT
Lnh thc hin OR gia cc bit tng ng ca hai t kp IN1 v IN2, kt qu ghi vo t kp OUT.
Constant, VD, AC, LD
XORD IN1, OUT
WXOR_DW EN ENO IN1 OUT IN2
Lnh thc hin XOR gia cc OUT: ID, QD, VD, bit tng ng ca hai t kp IN1 v IN2, kt qu ghi vo t LD, MD, SMD, AC, VD, kp OUT.
AC, LD
94
Hnh 3.39: V d v cch s dng lnh AND, OR, XOR

STL LAD M t Description Ton hng Operands Kiu d liu Data Types
INVB
OUT
Invert Byte, Invert Word, Invert DWord IN:IB, QB, MB, Lnh o tng bit ca byte u vo IN, kt qa VB, SMB, SB, LB, AC, Constant, a ra u ra OUT. INV_B EN ENO Thng th u vo v VD, AC, LD ra cng a ch. OUT:IB, QB, MB, IN1 OUT VB, SMB, SB, LB, AC, Constant, VD, AC, LD
Byte
95
B mn T ng o Lng Khoa in IN: IW, QW, VW,

LW, SW, MW, SMW, AC, AIW , T, C, Constant, VD, AC, LD
INVW
OUT
INV_W EN ENO IN1 OUT
Lnh o tng bit ca t n u vo IN, kt qa a ra u ra OUT. Thng th u vo v ra cng a ch.
OUT: IW, QW,

VW, LW, SW, MW, SMW, AC, T, C, VD, AC, LD
Word
INVD
OUT
INV_DW EN ENO IN1 OUT
Lnh o tng bit ca t kp u vo IN, kt qa a ra u ra OUT. Thng th u vo v ra cng a ch.
IN: ID, QD, VD, LD, SD, MD, SMD, HD, AC, Constant, VD, AC, LD OUT: ID, QD, VD, LD, SD, MD, SMD, AC, VD, AC, LD
DWord
Hnh 3.40: V d v cch s dng lnh INVB, INVW, INVD 10. SIMATIC Stack Logic Instructions: Cc lnh tip im trong i s Boolean cho php to lp c cc mch logic (khng c nh). Trong LAD cc mch ny biu din thng qua cu trc mch, mc ni tip hay song song cc mch tip im thng ng v cc tip im thng m. STL c th s dng cc lnh A (And) v O (Or) cho cc tip im mc ni tip v song song l thng h hoc cc lnh AN (And Not) v ON (Or Not) cho cc tip im mc ni tip v song song l thng ng. Gi tr ca cc bit trong ngn xp thay i tu thuc vo tng lnh. Trong phn ny chng ta s i su hn v s lm vic ca cc bit trong ngn xp, vic hiu v nm bt v ngn xp l iu rt cn thit trong vn lp trnh dng ngn ng STL. Ngoi nhng lnh lm vic trc tip vi tip im, S7-200 cn c 5 lnh c bit biu din cc php tnh ca i s Boolean cho cc bit trong ngn xp, c gi l cc lnh stack logic. Trong LAD khng dng nhng lnh ny. STL s dng cc lnh ny
thc hin nhng php ton ca phng trnh c nhiu biu thc con. Sau y l bng tm tt c php v hng dn cch s dng lnh.
STL LAD M t Description And Load Lnh t hp gi tr u tin v gi tr ca bit th hai trong ngn xp bng php tnh . Kt qu c ghi li vo bit u tin ca ngn xp. Gi tr cn li c ko ln 1 bit. Or LoaD Lnh t hp gi tr u tin v gi tr ca bit th hai trong ngn xp bng php tnh . Kt qu c ghi li vo bit u tin ca ngn xp. Gi tr cn li c ko ln 1 bit. Logic PuSh Sao chp gi tr ca bit u tin vo bit th hai trong ngn xp. Ga tr cn li b y xung 1 bit. Bit cui cng b y ra ngoi. Logic ReaD Lnh sao chp gi tr ca bit th hai vo bit u tin ca ngn xp, cc gi tr cn li ca ngn xp vn gi nguyn. Logic PoP Lnh ko ngn xp ln 1 bit theo nguyn tc bit sao ln bit trc. LoaD Stack Lnh sao chp gi tr ca bit th n (ngn xp c 9 bit th bit th nh c tnh l 1...n bit cui cng l 8) ca ngn xp ln bit u tin. Cc gi tr cn li ca ngn xp b y li xung 1 bit, bit cui cng b y ra khi ngn xp. Ton hng Operands Kiu d liu Data Types
ALD
none
none
none
OLD
none
none
none
LPS
none
none
none
LRD
none
none
none
LPP
none
none
none
LDS n
none
n: 18
Byte
Hnh 3.41: M t hot ng ca lnh LDS

Hnh 3.42: M t hot ng ca lnh ALD v OLD
Hnh 3.43: M t hot ng ca lnh LPS, LRD, LPP
Hnh 3.44: V d v cch s dng lnh ALD, OLD, LPP, LPS, LRD
11. SIMATIC Conversion Instructions: Cc hm i kiu d liu cho php thc hin vic i kiu d liu t kiu ny sang kiu khc. Sau y l cc lnh bin i kiu d liu trong STL v LAD:
BCD to Integer and Integer to BCD

BCDI OUT
BCD_I EN ENO IN OUT
Lnh chuyn i mt s nh_thp phn IN sang s nguyn v lu kt qu vo OUT. Gii hn ca IN: 09999.
IBCD OUT
I_BCD EN ENO IN OUT
Lnh chuyn i mt s nguyn IN sang s nh_thp phn v lu kt qu vo OUT. Gii hn ca IN: 09999.
IN: IW, QW, VW, LW, MW, SMW, AIW ,AC, T, C, Constant, VD, AC, LD, SW. OUT: IW, QW, VW, LW, MW, SMW, AC, T, C, VD, AC, LD, SW. IN: IW, QW, VW, LW, MW, SMW, AIW ,AC, T, C, Constant, VD, AC, LD. OUT: IW, QW, VW, LW, MW, SMW, AC, T, C, VD, AC, LD. IN: ID, QD, VD, LD, MD, SMD, AC, HD, Constant, VD, AC, LD, SD. OUT:ID, QD, VD, LD, MD, SMD, AC, HD, VD, AC, LD, SD. IN: ID, QD, VD, LD, MD, SMD, AC, Constant, VD, AC, LD, SD.
Word
Word
DTR IN, OUT
DI_R EN ENO IN OUT
Double Integer to Real Lnh chuyn i s nguyn 32 bit IN sang s thc (32 bit) v lu kt qu vo OUT.
DWord
ROUND IN,
RONUD EN ENO IN OUT
Round Lnh chuyn i s thc IN thnh s nguyn double Integer (lm trn s) v kt qa lu vo
Real
99
Chng 3: Ngn ng lp trnh v ng dng OUT
B mn T ng o Lng Khoa in OUT:ID, QD, VD, LD, MD, SMD, AC, HD, VD, AC, LD, SD.
OUT. Nu phn l >= 0.5 th c lm trn v pha ln hn 1 n v.
DINT
Truncate IN: ID, QD, VD, LD, MD, SMD, AC, Constant, VD, AC, LD, SD. OUT:ID, QD, VD, LD, MD, SMD, AC, HD, VD, AC, LD, SD. Real
TRUNC IN, OUT
TRUNC EN ENO IN OUT
Hm chuyn i s thc 32 bit c du sang s nguyn 32 bit c du.
DINT
Double Integer to Integer and Integer to Double Integer

IN: IW, QW, VW, LW, MW,SW, SMW, I_DI AIW ,AC, T, C, EN ENO Lnh chuyn i s Constant, VD, AC, nguyn 16 bit sang s IN OUT LD. nguyn 32 bit. OUT: ID, QD,VD, LD, MD,SD, SMD, AC, VD, AC, LD. IN: ID, QD,VD, LD, MD,SD, SMD, AC,Constant, VD, DI_I Lnh chuyn i s EN ENO AC, LD. nguyn 32 bit sang s OUT: IW, QW, VW, IN OUT nguyn 16 bit. LW, MW,SW, SMW, AC, T, C, VD, AC, LD. Integer to Real, Byte to Integer and Integer to Byte Khng c lnh chuyn i trc tip ny. Ta c th thc hin c bng cch dng lnh ITD (chuyn s nguyn 16 bit none none thnh s nguyn 32 bit) sau dng tip lnh DTR (chuyn s nguyn 32 bit sang s thc ). INT
ITD IN, OUT
DINT
DINT
DTI IN, OUT
INT
(Integer to Real)
none
100
B mn T ng o Lng Khoa in IN: IB, QB, MB, SMB, VB, SB, LB, AC, Constant, VD, AC, LD. OUT: IW, QW, VW, LW, MW,SW, SMW, AC, T, C, VD, AC, LD. IN: IW, QW, VW, LW, MW,SW, SMW, AC, T, C, AIW, Constant, VD, AC, LD. OUT: IB, QB, MB, SMB, VB, SB, LB, AC, VD, AC, LD.
BTI IN, OUT
Lnh chuyn i gi tr ca Byte IN thnh gi tr Integer 16 bit v lu vo OUT.
Byte
INT
IBT IN, OUT
I_B EN ENO IN OUT
Lnh chuyn i gi tr trong Word IN thnh gi Byte v lu gi tr ny vo OUT.
INT
Byte
101
Hnh 3.45: V d minh ho cch s dng cc lnh chuyn i
STL
LAD
M t Description Decode Lnh t gi tr logic 1 vo bit ca t n OUT c ch s (trng s ca bit thuc Word) bng s nguyn nm trong nibble (4 bit) thp ca byte u vo IN. Cc bit cn li ca t n c gi tr logic bng 0.
Ton hng Operands IN: IB, QB, MB, SMB, VB, SB, LB, AC, Constant, VD, AC, LD OUT: IW, QW, VW, LW, MW,SW, SMW, AC, T, C, AIW, VD, AC, LD. IN: IW, QW, VW, LW, MW,SW, SMW, AC, T, C, AIW, VD, AC, LD. OUT: IB, QB, MB, SMB, VB, SB, LB, AC, VD, AC, LD.
DECO EN ENO
Byte
DECO IN, OUT
IN OUT
Word
ENCO IN, OUT
ENCO EN ENO IN OUT
Lnh xc nh ch s ca bit thp nht trong t n IN c gi tr logic 1v ghi kt qu ny vo nibble thp nht ca byte u ra OUT.
Word
Byte
102
Hnh 3.46: V d v cch s dng lnh DECO
Hnh 3.47: V d v cch s dng lnh ENCO

M t (Description) Segment Ton hng (Operands) Kiu d liu (Data Types)
STL
LAD
103
SEG EN ENO
SEG IN, OUT
IN OUT
ATH EN
ATH IN, OUT, LEN
IN OUT LEN
ATH EN IN OUT LEN
HTA IN, OUT, LEN
Lnh xut cc bit cho IN: IB, QB, MB, SMB, LB, VB, AC, thanh ghi 7 on tng ng vi ni dung ca 4 Constant, VD, AC, bit thp nht ca byte SB, LD. u vo IN. Kt qu OUT: IB, QB, MB, c chi vo byte u SMB, LB, VB, AC, ra. VD, AC, SB, LD. ASCII to Hexa and Hexa to ASCII Thc hin php bin i IN, OUT: mt chui k t c IB, QB, MB, SMB, di c ch th trong LB, VB, VD, AC, ton hng LEN, bt u SB, LD. bng k t ch nh trong ton hng IN, sang s LEN: nguyn h c s 16 v IB, QB, MB, SMB, ghi vo vng nh k t LB, VB, AC, byte c ch nh bi Constant, VD, AC, OUT. di cc i SB, LD. ca chui k t l 255. Nhng k t hp l l nhng k t c m ASCII t 3039 v 4146 (c s 16, ng vi cc k t t 09, AF ). Nu m ho mt k t b sai th qu trnh m ho b dng li v bit SM1.7 c gi tr logic bng 1. Thc hin i mt dy IN, OUT: ch vit trong h c s IB, QB, MB, SMB, 16 thnh chui k t m LB, VB, VD, AC, ASCII. Dy s u vo SB, LD. c lu trong mng bt u bng IN v c di l LEN. di cc LEN: i ca dy s l 255. IB, QB, MB, SMB, Chui k t u ra c LB, VB, AC, ghi vo mng c byte Constant, VD, AC, u l OUT. SB, LD.
Byte
Byte
Byte
Byte
104
Hnh 3.48: V d v cch s dng lnh ATH, HTA
Hnh 3.49: V d v cch s dng lnh SEG
Hnh 3.50: M hin th thanh ghi 7 on 12. SIMATIC Clock Instrutions: Tuyt i khng s dng lnh c/ghi (TODR/TODW) thi gian thc cng mt lc trong chng trnh chnh v chng trnh x l ngt. Khi mt lnh TODR hoc TODW thc hin th khi gi chng trnh x l ngt, cc lnh lm vic vi ng h thi gian thc trong chng trnh x l ngt s khng c thc hin na. Bit SM4.5 s c mc logic 1 trong nhng trng hp nh vy.
105
ng h thi gian thc ch c i vi CPU214 tr ln. c th lm vic vi ng h thi gian thc th CPU s cung cp 2 lnh c/ghi gi tr cho ng h. Nhng gi tr c c hoc ghi c vi ng h thi gian thc l cc gi tr v ngy, thng, nm v cc gi tr v gi, pht, giy. Cc d liu c/ghi vi ng h thi gian thc trong LAD, STL c di 1 byte v phi c m ho theo kiu s nh thp phn BCD (Ex: 16#95 cho nm 95). Chng nm trong b m gm 8 byte lin nhau theo th t nh sau:
Hnh 3.51: B m 8 byte ca lnh ng h thi gian thc Cc gi tr ca cc thng s phi nm trong gii hn:
CPU S7-200 khng thc hin kim tra li ngy thng, ngy ca tun iu chnh li ngy thng. Gi tr v ngy thng nh l February 30 c th c chp nhn. Do bn s phi chc chn rng ngy thng ca bn a vo l ng.
Read Real-Time Clock and Set Real-Time Clock

READ_RTC EN ENO
TODR T
TODW T
SET_RTC EN ENO T
Lnh c ni dung ca ng h thi gian thc vo b m 8 byte c ch nh trong lnh bng ton hng T. Lnh ghi ni dung ca b m 8 byte c ch nh trong lnh bng ton hng T vo ng h thi gian thc.
T: VB,IB, QB, MB, SMB, SB, LB, VD,

AC, LD.
Byte
106
13. SIMATIC Program Control Instrutions: Cc lnh ca chng trnh, nu khng c nhng lnh iu khin ring, s c thc hin tun t t trn xung di trong mt vng qut. Lnh iu khin chng trnh cho php thay i th t thc hin lnh. Chng cho php chuyn th t nh: ng l ra l lnh tip theo, ti mt lnh bt c no khc ca chng trnh; trong ni iu khin chuyn n phi c nh du trc bng nhn ch ch. Nhm lnh iu khin chng trnh gm: lnh nhy, lnh gi chng trnh con, nhn ch ch (hay gi n gin l nhn), phi c nh du trc khi thc hin lnh nhy hay lnh gi chng trnh con. Vic t nhn cho lnh nhy phi nm trong chng trnh. Nhn ca chng trnh con hay nhn ca chng trnh x l ngt phi c khai bo u chng trnh. Khng th dng lnh JMP chuyn iu khin t chng trnh chnh vo nhn bt k trong chng trnh con hoc chng trnh x l ngt. Ngc li cng khng c php t mt chng trnh con hay chng trnh x l ngt nhy ra ngoi chng trnh chnh . Lnh gi chng trnh con l lnh chuyn quyn iu khin n chng trnh con. Sau khi chng trnh con thc hin xong th quyn iu khin li c chuyn v lnh tip theo trong chng trnh chnh ngay sau lnh gi chng trnh con. T mt chng trnh con c th gi mt chng trnh con khc trong n, c th gi nh vy nhiu nht l 8 ln. Php quy cng c th thc hin c trong S7-200, mc d khng b cm song phi ch n gii hn trn. Trng thi ca ngn xp: Nu lnh nhy hay lnh gi chng trnh con c thc hin th nh ngn xp lun c gi tr logic bng 1. Nh vy trong chng trnh con cc lnh c iu kin c thc hin nh lnh khng c iu kin. Sau cc lnh LBL (lnh t nhn) v SBR, lnh LD trong STL s b v hiu ho. Khi mt chng trnh con c gi, ton b ni dung trong ngn xp s c ct i, nh ca ngn xp nhn gi tr logic mi l 1, cc bit khc cn li ca ngn xp nhn gi tr logic l 0 v iu khin c chuyn n chng trnh con c gi. Khi thc hin xong chng trnh con v trc khi quyn iu khin c chuyn n chng trnh gi n th ni dung ca ngn xp c ct gi trc s c chuyn tr li cho ngn xp. Ni dung ca thanh ghi AC khng c ct gi khi gi chng trnh con, nhng khi mt chng trnh x l ngt c gi, ni dung thanh ghi AC s c ct gi trc khi thc hin chng trnh x l ngt v tr li sau khi chng trnh x l ngt va thc hin xong. Bi vy chng trnh x l ngt c th t do s dng 4 thanh ghi AC ca S7200.
M t (Description) Jump to Label and Label Ton hng (Operands) Kiu d liu (Data Types)
STL
LAD
107
JMP
JMP
LBL
n
JMP
Lnh nhy thc hin chuyn quyn iu khin n nhn n n: trong mt chng CPU 212:0 n 63 trnh. CPU 21x khc t Lnh khai bo nhn n 0 n 255. trong mt chng trnh.
none
Hnh 3.52: V d cch s dng lnh JMP, LBL

M t Description Ton hng Operands Kiu d liu Data Types
STL
LAD
Subroutine and Return Subroutine

SBRn EN
108
SBR
RET
RET
Lnh gi chng trnh con, thc hin php chuyn quyn iu khin n chng trnh con c nhn n. Lnh tr v chng trnh gi chng trnh con khng iu kin. Lnh tr v chng trnh gi chng trnh con c iu kin.
n: CPU 212:0 n 15 CPU 21x khc t 0 n 255.
none
none
none
CRET
CRET
109
Hnh 3.53: V d cch s dng lnh gi v thot khi chng trnh con Cc lnh sau s can thip vo thi gian vng qut, n c dng kt thc chng trnh ang thc hin hoc ko di thm thi gian ca vng qut. Trong chng trnh chnh, kt thc chng trnh bng lnh MEND, nhng trong son tho chng trnh chng ta khng cn lnh kt thc ny m Step 7 MicroWin mc nh ri. Lnh END cng l lnh kt thc chng trnh nhng l lnh kt thc c iu kin. Khi chng trnh chnh hoc chng trnh con gp lnh STOP th chng trnh s kt thc ngay ti cui vng qut hin thi v CPU chuyn sang ch STOP. Nu trong chng trnh x l ngt gp lnh STOP th ngt cng c dng li ngay lp tc, cc tn hiu x l ngt ang cn nm trong hng i s b hu b, phn cn li ca chng trnh s khng thc hin.Vic thc s chuyn sang ch STOP xy ra cui chu k vng qut hin thi sau giai on xut tn hiu cho u ra. Lnh WDR s khi ng li ng h quan st (Watchdog Timer), chng trnh tip tc thc hin trong vng qut ch quan st. Nn cn thn khi s dng lnh ny. Khi trong chng trnh s dng lnh lp, hoc thi gian tr qu ln th nhng qu trnh sau b hn ch: - Truyn thng (loi tr kiu Freeport). - Cp nht vo ra (tr nhng lnh vo ra tc th). - Cp nht cng bc. - Cp nht cc bit kiu SM. - Chun on thi gian chy. - Vi cc vng qut ln hn 25 giy th cc b Timer c phn gii10ms v 100ms s khng c chnh xc. Nu thi gian ca vng qut ln hn 300ms, hoc khi gp mt ngt c chng trnh x l ngt vi thi gian chy chng trnh lu hn 300ms th cn phi s dng lnh WDR khi ng li ng h quan st.
110
Vic chuyn cng tc phn cng sang ch STOP hoc thc hin lnh STOP trong chng trnh s l nguyn nhn t ch iu khin vo ch dng trong khong thi gian 1.4s.
STL LAD M t (Description) Ton hng (Operands) Kiu d liu (Data Types)
END
STOP
End and Stop and Watchdog Timer Lnh kt thc chng END trnh hin hnh c iu kin. Lnh kt thc chng trnh hin hnh v STOP chuyn sang ch STOP.
WDR
none
none
WDR
Lnh khi ng li ng h quan st.
Hnh 3.54: V d v cch s dng lnh STOP, WDR, END xy dng cu trc vng lp nhm thc hin lp mt khi lnh ring bit trong chng trnh. S dng lnh FOR...NEXT thit k mt vng lp vi s ln c th nh trc bng hai ton hng INIT kiu t n ch im khi pht v FINAL cng kiu t n ch im kt thc. Ngoi ra lnh cn s dng mt t n INDX lu s vng lp tc thi. Mi mt cu lnh FOR i hi phi c mt cu lnh NEXT ng cui khi lnh c lp. Cc vng FOR...NEXT c th c lng vo nhau nhng s lnh lng vo nhau khng c vt qu 8 ln.
111
Ti thi im bt u thc hin lnh vng lp FOR, t n INDX nhn gi tr ca INIT. Sau , mi khi kt thc mt vng lp, tc l khi gp lnh NEXT, ni dung ca INDX c tng ln 1 n v v c so snh vi ni dung ca FINAL. Nu ni dung ca INDX cha ln hn ni dung ca FINAL th chng trnh s tip tc thc hin li vng lp, ngc li khi ni dung ca INDX ln hn ni dung ca FINAL th chng trnh s kt thc lnh FOR...NEXT v tip tc thc hin lnh k tip nm ngay sau lnh NEXT. Khi lnh NEXT thc hin th bit u tin trong ngn xp c gi tr logic bng 1.
STL LAD M t (Description) Ton hng (Operands) Kiu d liu (Data Types) INT
FOR INDX, INIT, FINAL
FOR EN ENO INDX INIT FINAL
FOR...NEXT V d a vo INIT INDX: IW, QW, VW, LW, gi tr 1, FINAL gi MW,SW, SMW, AC, T, C, tr l 10. Lnh s VD, AC, LD. thc hin lp ng INIT: IW, QW, VW, LW, 10 ln, s ln lp MW,SW, SMW, AC, T, C, c qun l trong AIW, Constant, VD, AC, t n INDX. Vt LD. qu 10 ln lnh s FINAL: IW, QW, VW, LW, kt thc v chng MW,SW, SMW, AC, T, C, trnh tip tc thc AIW, Constant, VD, AC, hin cc lnh k tip. LD. Lnh kt thc vng lp. none
INT
INT
NEXT
NEXT
none
Hnh 3.55: V d v cch s dng lnh FOR...NEXT
112
14. SIMATIC Shift and Rotate Register Instrutions: Lm vic vi thanh ghi c nhm lnh sau: Lnh dch chuyn thanh ghi, trong ny cng c hai nhm: + Lnh dch chuyn thanh ghi 8 bit, 16 bit, 32 bit. + Lnh dch chuyn thanh ghi c di tu , c nh ngha trong lnh. Lnh quay vng thanh ghi, trong ny cng c hai nhm : + Lnh quay vng thanh ghi 8 bit, 16 bit, 32 bit. + Lnh quay vng thanh ghi c di tu , c nh ngha trong lnh. Khi s dng lnh dch chuyn cc bit ca thanh ghi (Byte, Word, DWord) cn ch cc im sau y: 1. Khng thc hin vic dch chuyn nu s ln y bng 0. 2. Nu s ln y c gi tr ln hn 0, bit nh trn SM1.1 s c gi tr ca bit cui cng c y ra. 3. Nu s ln y ln hn hoc bng 8 i vi byte, 16 i vi Word, 32 i vi t kp th lnh s thc hin lnh y ln nht ch bng 8, 16, 32. 4. Lnh SLB (y cc bit ca byte sang tri), SLW (y cc bit ca Word sang tri) v SLD (y cc bit ca t kp sang tri) s chuyn gi tr 0 vo bit thp nht ca Byte, Word hoc DWord sau mi ln y. Sau lnh thc hin, bit SM1.1 s c gi tr logic ca bit th 8-N, 16-N hoc 32-N, trong N l s ln y. 5. Lnh SRB (y cc bit ca byte sang phi), SRW (y cc bit ca Word sang phi) v SRD (y cc bit ca t kp sang phi) s chuyn gi tr 0 vo bit thp nht ca Byte, Word hoc DWord sau mi ln y. Sau lnh thc hin, bit SM1.1 s c gi tr logic ca bit th N-1, trong N l s ln y. 6. Bit bo kt qu 0 (bit SM1.0) s c gi tr logic bng 1 nu nh sau khi thc hin lnh y ni dung ca Byte, Word, DWord bng 0. Khi s dng lnh quay vng cc bit ca thanh ghi (Byte, Word, DWord) cn ch cc im sau y: 1. Lnh quay thc hin php y vng trn sang tri hoc sang phi cc bit ca mt Byte, Word, DWord. Ti mi mt ln quay, gi tr ca cc bit b y ra mt u ca thanh ghi li c a vo u kia ca thanh ghi . 2. Khng thc hin vic quay vng nu s ln quay bng 0. Hay bng mt bi s ca 8 (i vi byte), ca 16 (i vi word) v ca 32 (i vi DWord). 3. i vi cc gi tr ca s m ln quay ln hn 8 (i vi byte), ca 16 (i vi word) v ca 32 (i vi DWord) lnh s thc hin vi s m ln quay mi bng phn d ca ca php chia tng ng. 4. Khi thc hin lnh quay sang phi RRB (quay cc bit ca byte sang phi), RRW (quay cc bit ca Word sang phi) v RRD (quay cc bit ca t kp sang phi), ti mi ln quay gi tr ca bit thp nht c ghi vo bit bo trn SM1.1. Sau khi lnh thc hin, bit SM1.1 s c gi tr logic ca bit th N - 1, trong N l s m ln quay.
113
5. Khi thc hin lnh quay sang tri RLB (quay cc bit ca byte sang tri), RLW (quay cc bit ca Word sang tri) v RLD (quay cc bit ca t kp sang tri), ti mi ln quay gi tr ca bit cao nht c ghi vo bit bo trn SM1.1.Sau khi lnh thc hin, bit SM1.1 s c gi tr logic ca bit th N - 8, N 16, N 32, trong N l s m ln quay. 6. Bit bo kt qu 0 (bit SM1.0) s c gi tr logic bng 1 nu nh sau khi thc hin lnh quay ni dung ca Byte, Word, DWord bng 0. Cc lnh dich chuyn hoc quay vng nh hng n kt qu ca cc bit c bit nh sau:
Lnh Kiu lnh SM1.0 (kt qu 0) SM1.1 (bo trn) SM1.2 (kt qa m) SM1.3 (chia cho 0)
SRB khng du c c khng khng SLB khng du c c khng khng SRW khng du c c khng khng SLW khng du c c khng khng SRD khng du c c khng khng SLD khng du c c khng khng RRB khng du c c khng khng RLB khng du c c khng khng RRW khng du c c khng khng RLW khng du c c khng khng RRD khng du c c khng khng RLD khng du c c khng khng SHRB khng du khng c khng khng Nhng iu sau y ch ng vi cc hm dch chuyn bit ca byte, t n v t kp: + Nu b m chuyn dch c gi tr ln hn 0 th bit nh trn SM1.1 c gi tr logic ca bit cui cng c y ra. + Bit bo kt qu 0 SM1.0 c gi tr logic 1 nu sau khi lnh c thc hin, byte, t hoc t kp c ni dung bng 0. Nhng iu sau y ch ng vi cc hm dch chuyn bit ca byte, t n v t kp: + Nu b m chuyn dch khng phi l b s nguyn ca 8, 16, 32 i vi byte, Word, DWord th gi tr ca bit cui cng b y ra ngoi s c gn cho bit nh trn SM1.1. + Nu bit bo kt qu 0 c gi tr logic bng 1 th gi tr ca byte, t hay t kp bng 0.
Shift Right Byte and Shift Left Byte Lnh dch phi hay lnh dch tri thc Byte
114
Chng 3: Ngn ng lp trnh v ng dng hin dch chuyn cc bit ca Byte u vo IN i N ln sang phi hay tri. kt qu c lu vo u ra OUT. Lnh shift in gi tr zero vo cc bit va b dch chuyn i, bit cui cng b dch chuyn ra s c a vo bit bo trn SM1.1. Bit bo kt qu 0 s c set ln 1 nu gi tr ca byte dch chuyn l 0.
SRB N
OUT,
SHR_B EN ENO IN OUT N
IN: IB, QB, MB, SMB, VB, SB, LB, AC, Constant, VD, AC, LD. OUT: IB, QB, MB, SMB, VB, SB, LB, AC, VD, AC, LD. N: IB, QB, MB, SMB, VB, SB, LB, AC, Constant, VD, AC, LD.
SLB N
OUT,
SHL_B EN ENO IN OUT N
SRW OUT, N
SLW OUT, N
Shift Right Word and Shift Left Word Lnh dch phi hay IN: IW, QW, VW, LW, lnh dch tri thc MW,SW, SMW, AIW ,AC, T, C, Constant, hin dch chuyn cc bit ca Word VD, AC, LD. SHR_W EN ENO u vo IN i N ln sang phi hay IN OUT N tri. kt qu c lu vo u ra OUT: IW, QW, VW, OUT. LW, MW,SW, SMW, Lnh shift in gi AC, T, C, VD, AC, tr zero vo cc bit LD. va b dch chuyn i, bit cui cng b dch chuyn ra s SHL_W EN ENO c a vo bit N: IB, QB, MB, SMB, bo trn SM1.1. IN OUT VB, SB, LB, AC, N Bit bo kt qu 0 Constant, VD, AC, s c set ln 1 LD. nu gi tr ca Word dch chuyn l 0.
Word
Byte
115
Chng 3: Ngn ng lp trnh v ng dng M t Description
B mn T ng o Lng Khoa in Ton hng Operands Kiu d liu Data Types
STL
LAD
Shift Right Double Word and Shift Left Double Word Lnh dch phi hay lnh dch tri thc hin dch chuyn IN: VD, ID, QD, MD, cc bit ca t kp SHR_DW EN ENO LD, SD, HC, SMD, AC, u vo IN i N l n sang ph i hay Constant, VD, AC, IN OUT N tri. kt qu c LD. lu vo u ra OUT. Lnh shift in gi OUT: VD, ID, QD, tr zero vo cc bit MD, LD, SD, SMD, va b dch chuyn AC, VD, AC, LD. SHL_DW i, bit cui cng b EN ENO dch chuyn ra s IN OUT c a vo bit N: IB, QB, MB, SMB, N bo trn SM1.1. VB, SB, LB, AC, Bit bo kt qu 0 Constant, VD, AC, s c set ln 1 LD. nu gi tr ca t kp dch chuyn l 0. Rotate Right Byte and Rotate Left Byte IN: IB, QB, MB, Lnh quay vng sang SMB, VB, SB, phi hay lnh quay vng ROR_B sang tri thc hin dch LB, AC, VD, EN ENO chuyn cc bit ca byte AC, LD. IN OUT u vo IN i N ln sang N phi hay tri. kt qu c lu vo u ra OUT: IB, QB, OUT. Ti mi ln quay, MB, SMB, VB, gi tr ca bit cui cng SB, LB, AC, (bit 0) c a vo bit VD, AC, LD. SM1.1 ng thi a vo bit u tin (bit 7) ca ROL_B EN ENO byte nu l quay phi, N: IB, QB, MB, cn ngc li i vi lnh SMB, VB, SB, IN OUT N quay tri. Bit bo kt qu LB, AC, 0 s c gi tr bng 1 nu Constant, VD, gi tr trong byte bng AC, LD. 0.
SRD N
OUT,
DWord
SLD N
OUT,
Byte
RRB N
OUT,
Byte
RLB N
OUT,
116
RRW N
OUT,
RLW N
OUT,
RRD N
OUT,
RLD N
OUT,
Rotate Right Word and Rotate Left Word IN: IW, QW, Lnh quay vng sang VW, LW, phi hay lnh quay vng MW,SW, SMW, sang tri th c hi n d ch ROL_W EN ENO chuyn cc bit ca t n AIW ,AC, T, C, u vo IN i N ln sang Constant, VD, IN OUT N phi hay tri. kt qu AC, LD. c lu vo u ra OUT: IW, QW, OUT. Ti mi ln quay, VW, LW, gi tr ca bit cui cng MW,SW, SMW, (bit 0) c a vo bit AC, T, C, VD, ROL_W SM1.1 ng thi a vo AC, LD. EN ENO bit u tin (bit 7) ca IN OUT byte nu l quay phi, N: IB, QB, MB, N cn ngc li i vi lnh SMB, VB, SB, quay tri. Bit bo kt qu LB, AC, 0 s c gi tr bng 1 nu Constant, VD, gi tr trong t n AC, LD. bng 0. Rotate Right Double Word and Rotate Left Double Word IN: VD, ID, QD, Lnh quay vng sang MD, LD, HC, phi hay lnh quay vng SMD, AC, sang tri thc hin dch ROL_DW chuyn cc bit ca t kp Constant, VD, EN ENO u vo IN i N ln sang AC, LD. IN OUT phi hay tri. kt qu N c lu vo u ra OUT. Ti mi ln quay, OUT: VD, ID, gi tr ca bit cui cng QD, MD, LD, (bit 0) c a vo bit SMD, AC, VD, ROL_DW SM1.1 ng th i a vo AC, LD. EN ENO bit u tin (bit 7) ca t IN OUT kp nu l quay phi, N cn ngc li i vi lnh N: IB, QB, MB, quay tri. Bit bo kt qu SMB, VB, LB, 0 s c gi tr bng 1 nu AC, Constant, gi tr trong t kp VD, AC, LD. bng 0.
Word
Byte
DWord
Byte
117
Hnh 3.56: V d v cch s dng lnh dch chuyn v quay vng thanh ghi Lnh lm vic vi thanh ghi c di tu : Lnh thuc nhm ny cung cp mt phng php ni tip v iu khin dng sn phm hoc d liu. Thanh ghi c xc nh trong lnh bi ton hng S_BIT ch a ch bit thp ca thanh ghi v di l gi tr tuyt i ca ton hng N trong lnh (ngha l thanh ghi c di |N| bit). D liu c chuyn vo trong thanh ghi c tn l DATA (DATA = Bool), mt ln trong mt vng qut. S_BIT l bit thp nht ca thanh ghi, nu gi cao nht trong thanh ghi l MSB.b th MSB.b s c tnh theo cng thc sau: MSB.b = [(byte ca S_BIT) + phn nguyn ca(|N| - 1 + bit ca S_BIT)/8].[phn cn tha ca php chia 8] L do tr i 1 bi v S_BIT chim mt 1 bit ca thanh ghi. V d S_BIT l V33.4 v N = 14 th MSB.b s l: MSB.b = [(33) + (|14| - 1 + 4)/8]*remainder of the division by 8 = (33 + 2)*remainder of the division by 8 = 35.1 MSB.b l: V35.1 Chiu thc hin php dch chuyn ph thuc vo du ca ton hng N trong lnh. Min gi tr cho php ca ton hng N l: -64 N 64.
Nu N dng th php dch chuyn l php dch tri, gi tr ca DATA c chuyn vo bit thp nht, gi tr logic trong bit cao nht b y ra ngoi (vo bit bo trn SM1.1). Ngc li N l m th php dch chuyn l php dch phi, gi tr ca DATA c chuyn vo bit cao nht, gi tr logic trong bit thp nht b y ra ngoi (vo bit bo trn SM1.1). SHRB Lnh dch chuyn cc bit ca thanh ghi mt v tr trong mt vng qut. Thanh ghi c xo trong lnh bng cc ton hng S_BIT ch a ch bit thp trong thanh ghi v |N| ch di thanh ghi. Gi tr logic ca bit b y ra khi thanh ghi c ghi vo bit bo trn SM1.1. STL LAD
Ton hng Operands Kiu d liu Data Types
Shift Register Bit DATA, S_BIT: I, Q, V, M, SM, T, C, S, L. ROL_DW

EN ENO
Bool
SHRB DATA, S_BIT, N
S_BIT OUT DATA N
N: IB, QB, MB, SMB, VB, LB, AC, Constant, VD, AC, LD.
Byte
Hnh 3.57: M t hng dch chuyn ca thanh ghi vi ton hng m v dng
119
Hnh 3.58: V d v cch s dng lnh dch chuyn thanh ghi c di bt k 15. SIMATIC Interupt and Comunication Instrutions: Cc ch ngt v x l ngt cho php thc hin cc qu trnh tc cao, phn ng kp thi vi cc s kin bn trong v bn ngoi. Nguyn tc c bn ca mt ch ngt cng ging nh thc hin vic gi mt chng trnh con, ch khc nhau y l chng trnh con c gi ch ng bng lnh gi chng trnh con CALL, cn chng trnh x l ngt c gi b ng bng tn hiu bo ngt. Khi c mt tn hiu bo ngt, h thng s t chc thc hin gi v thc hin chng trnh con tng ng vi tn hiu ngt , hay ni cch khc l h thng s t chc x l tn hiu bo ngt . Chng trnh con ny c gi l chng trnh x l ngt. Do vic gi chng trnh x l ngt bng mt tn hiu bo ngt m thi im xut hin tn hiu bo ngt hon ton b ng, bi vy h thng s phi h tr thm cho cng vic x l ngt nh: ct gi ni dung ngn xp, ni dung thanh ghi AC v cc bit nh c bit; t chc xp hng u tin cho cc tn hiu x l ngt trong trng hp chng cha kp thi x l.
120
Bng3.7:Lit k cc tn hiu bo ngt tng ng vi tng loi CPU 21x

Kiu ngt 0 1 2 3 4 5 6 7 8 M t tn hiu ngt Ngt theo sn ln ca I0.0 Ngt theo sn xung ca I0.0 Ngt theo sn ln ca I0.1 Ngt theo sn xung ca I0.1 Ngt theo sn ln ca I0.2 Ngt theo sn xung ca I0.2 Ngt theo sn ln ca I0.3 Ngt theo sn xung ca I0.3 Ngt nhn k t Port 0 Y Ngt bo vic truyn d liu hon tt 9 Y Y Y Port 0 10 Ngt thi gian 0 Y Y Y 11 Ngt thi gian 1 Y Y Ngt theo HSC0, khi gi tr tc thi bng gi 12 Y Y Y tr t trc. Ngt theo HSC1, khi gi tr tc thi bng gi 13 Y Y Y tr t trc. Ngt theo HSC1, khi c tn hiu bo i 14 Y Y hng m t bn ngoi. Ngt theo HSC1, khi c tn hiu Reset t 15 Y Y ngoi Ngt theo HSC2, khi gi tr tc thi bng gi 16 Y Y tr t trc. Ngt theo HSC2, khi c tn hiu bo i 17 Y Y hng m t bn ngoi. Ngt theo HSC2, khi c tn hiu Reset t 18 Y Y ngoi 19 PLS0 Ngt bo hon tt vic m xung Y Y 20 PLS1 Ngt bo hon tt vic m xung Y Y Ngt theo b nh thi T32, khi gi tc thi 21 Y CT=PT. Ngt theo b nh thi T96, khi gi tc thi 22 Y CT=PT. 23 Ngt bo hon tt vic nhn 1 gi tin Port 0 Y 24 Ngt bo hon tt vic nhn 1 gi tin Port 1 25 Ngt nhn k t Port 1 Ngt bo vic truyn d liu hon tt 26 Port 1 Nu khai bo kiu ngt 12 (HSC0, PV=CV) th hai ku ngt 0 v 1 b v hiu ho. Ngc li, nu s dng kiu ngt 0 v 1 th kiu ngt 12 b v hiu ho. CPU 212 Y Y CPU 214 Y Y Y Y Y Y Y Y Y CPU 215_2DP Y Y Y Y Y Y Y Y Y CPU 216 Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y
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Bng 3.8: Lit k cc tn hiu bo ngt tng ng vi tng loi CPU 22x
Kiu ngt 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 M t tn hiu ngt Ngt theo sn ln ca I0.0 Ngt theo sn xung ca I0.0 Ngt theo sn ln ca I0.1 Ngt theo sn xung ca I0.1 Ngt theo sn ln ca I0.2 Ngt theo sn xung ca I0.2 Ngt theo sn ln ca I0.3 Ngt theo sn xung ca I0.3 Ngt nhn k t Port 0 Ngt bo vic truyn d liu hon tt Port 0 Ngt thi gian 0, SNB34 Ngt thi gian 1, SMB35 Ngt theo HSC0, khi gi tr tc thi bng gi tr t trc CV=PV. Ngt theo HSC1, khi gi tr tc thi bng gi tr t trc CV=PV. Ngt theo HSC1, khi c tn hiu bo i hng m t bn ngoi. Ngt theo HSC1, khi c tn hiu Reset t ngoi Ngt theo HSC2, khi gi tr tc thi bng gi tr t trc CV=PV. Ngt theo HSC2, khi c tn hiu bo i hng m t bn ngoi. Ngt theo HSC2, khi c tn hiu Reset t ngoi PLS0 Ngt bo hon tt vic m xung PLS1 Ngt bo hon tt vic m xung Ngt theo b nh thi T32, khi gi tc thi CT=PT. Ngt theo b nh thi T96, khi gi tc thi CT=PT. Ngt bo hon tt vic nhn 1 gi tin Port 0 Ngt bo hon tt vic nhn 1 gi tin Port 1 Ngt nhn k t Port 1 Ngt bo vic truyn d liu hon tt Port 1 Ngt theo HSC0, khi c tn hiu bo i hng m t bn ngoi. Ngt theo HSC0, khi c tn hiu Reset t ngoi Ngt theo HSC4, khi gi tr tc thi bng gi tr t trc CV=PV. Ngt theo HSC4, khi c tn hiu bo i hng m t bn ngoi. Ngt theo HSC4, khi c tn hiu Reset t ngoi Ngt theo HSC3, khi gi tr tc thi bng gi tr t CPU 221 Y Y Y Y Y Y Y Y Y Y Y Y Y CPU 222 Y Y Y Y Y Y Y Y Y Y Y Y Y CPU 214, 224XP Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y CPU 226, 226XM Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y
Y Y Y Y Y Y
Y Y Y Y Y Y
Y Y Y Y Y Y
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33
trc CV=PV. Ngt theo HSC5, khi gi tr tc thi bng gi tr t trc CV=PV.
Th t u tin (priority) v hng i (Queuing) ca cc kiu ngt: Th t u tin ca cc kiu ngt khc nhau c cng ho t trc theo nguyn tc tn hiu no c trc th x l trc. Nu cng mt lc c nhiu tn hiu bo ngt th h thng s sp hng i theo th t u tin sau: Nhm ngt truyn thng (ni tip). Nhm ngt vo ra (k c ngt cho b m HSC v ngt truyn xung). Nhm cc tn hiu bo ngt thi gian. Ti mi thi im ch c 1 chng trnh x l ngt c thc hin. Cng ni thm rng, nhm ngt truyn thng c v tr u tin cao nht v ngt thi gian c v tr u tin thp nht nhng khi h thng ang x l ngt thi gian m c tn hiu bo nht thi gian th h thng vn tip tc x l n khi kt thc mi tip tc x l ngt truyn thng. Bng hng i ln nht m tng CPU c th c: Nhm u tin 212 214 215 216 221 222 224 226 Ngt truyn thng 4 4 4 8 4 4 4 8 Ngt vo ra 4 16 16 16 16 16 16 16 Ngt thi gian 2 4 8 8 8 8 8 8 Ring i vi tn hiu bo ngt truyn thng, mc d cha c x l, nhng k t nhn c cng bit kim tra chn l vn c ghi nh li trong b m km theo ng th t ca tn hiu bo ngt. bit Start 7 hoc 8 bit ca k t Parity Stop Khi hng i y th bit bo trn tng ng cho tng nhm ngt s set ln 1: Nhm u tin Bit bo trn Ngt truyn thng SM4.0 Ngt vo ra SM4.1 Ngt thi gian SM4.2 Cng vi vic chuyn vo ch RUN ca PLC, tt c cc ch ngt trc khai bo trc s t ng hu (v hiu ho). N c kch li bng lnh ENI (kch ngt ton cc). Khai bo mt ch ngt phi thc hin hai vic: 1. Kch tn hiu bo ngt cho ch ngt tng ng (bng cch khai bo ti ton hng EVENT) bng lnh ATCH. 2. Sau son tho ni dung ca chng trnh ngt trong khi INT_x. C th gp nhiu tn hiu bo ngt vo cng mt chng trnh (chnh hoc con) nhng mt tn hiu bo ngt ch c duy nht mt chng trnh x l ngt. Khi hu tn hiu ngt bng lnh DISI th cc ngt vn tip tc nm vo hng i cho n khi chng c kch kli bng lnh ENI.
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Chng 3: Ngn ng lp trnh v ng dng STL LAD
B mn T ng o Lng Khoa in Ton hng Operands INT: 0 127 EVENT: xem bng lit k cc tn hiu bo ngt tng ng vi tng loi CPU Kiu d liu Data Types
ATCH INT, EVENT
ATCH EN INT EVENT
M t Description Attach Interupt Lnh khai bo ngt m hiu INT (khi ngt), Kiu ngt EVENT
Byte
DTCH EVENT
DTCH EN EVENT
Detach Interupt Lnh hu ngt cc b tng ng vi kiu ngt EVENT. Enable Interupt Lnh kch ngt ton cc.
EVENT: xem bng lit k cc tn hiu bo ngt tng ng vi tng loi CPU none
Byte
ENI
ENI
none
DISI
CRETI
RETI
Disable Interupt Lnh hu tt c DISI cc ngt cng none mt lc. Conditional Return from Interupt Lnh thot tc thi khi chng trnh ngt khi CRETI none chng trnh ngt cha kt thc. Return from Interupt Lnh kt thc chng trnh x RETI none l ngt, cui chng trnh.
none
none
none
Chng trnh x l ngt: Cng nh chng trnh con, mi chng trnh x l ngt c mt nhn ring c nh du ti im u ca chng trnh. Nhn ny c khai bo bng lnh INT. Tt c cc lnh nm gia nhn ca chng trnh x l ngt v lnh quay v khng iu kin RETI ca chng trnh x l ngt u thuc v ni dung ca chng trnh x l ngt. C th kt thc chng trnh x l ngt sm hn bng lnh CRETI, nhng lnh RETI vn l lnh kt thc ca chng trnh x l ngt. Nhng lnh ny khng cn khai
bo v chng trnh STEP t ng khai bo ging nh lnh MEND (kt thc chng trnh chnh), lnh RET (lnh kt thc chng trnh con). Chng trnh x l ngt cn phi c vit ti u, cng nhanh cng tt, khng nn thc hin chng trnh x l ngt qu lu. Khng c s dng cc lnh sau trong CTXLN: DISI, ENI, CALL, HDEF, FOR...NEXT, END.
Hnh 3.59: V d v cch t chc mt chng trnh x l ngt Ngt tryn thngni tip: Cng truyn thng ni tip ca PLC c th iu khin bng chng trnh vit trong LAD, STL. Chng trnh iu khin ny gi l iu khin cng t do (Freeport Control). Trc khi thc hin qu trnh truyn thng, cc vn sau y cn phi c thc hin: Kiu bin bn truyn/nhn (giao thc truyn_Protocol). Tc truyn/nhn tn hiu. S bit c truyn cho 1 k t (7 or 8 bit). Ch kim tra li (cho k t nhn) chn l Parity. Tt c cc vn ny c nh ngha trong byte c bit SMB30 sau:
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Hnh 3.60: M t byte nh ngha vic truyn thng ni tip ! Khi truyn thng ch Freeport th PLC khng lm vic vi my lp trnh PG. Byte SMB2 lm b m ghi nh k t nhn c. Bit SM3.0 dng kim tra li chn l k t nhn c, nu c li chn l c pht hin th SM3.0 set ln 1. S dng thng bo vic truyn thng hon tt. Cc vn v gi/nhn message c m t nh sau:
Trm A
gi d liu
Trm
chng trnh x l ngt EVENT 8
Port RS485
SMB2 Bufer Recive
SM3.0 Parity test
Vng mong mun
Hnh 3.61: M t cch nhn message ca PLC
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Chng 4: Ngn ng lp trnh LADDER
CHNG 4 NGN NG LP TRNH LADDER

(Phn ny s c nhc cc chng trc ) 4.1. Thit k chng trnh. 4.1.1. Cc khi chc nng h thng. 4.1.2. V d v mch kho ln. 4.1.3. V d v mch iu khin trnh t. 4.2. Thit k mch logic t hp. 4.2.1. V d mt mch logic t hp. 4.2.2. V d nhiu mch logic t hp. 4.3. Thit k mch iu khin trnh t. 4.3.1. Phng php lp trnh trnh t. 4.3.2. V d iu khin c cu cp phi cho my dp. 4.3.3. Phn nhnh trong iu khin trnh t.
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Chng 5: K thut lp trnh iu khin trnh t
CHNG 5 K THUT LP TRNH IU KHIN TRNH T 5.1. iu khin trnh t dng thanh ghi. 5.1.1. Nguyn l c bn iu khin trnh t dng thanh ghi. 5.1.2. V d v iu khin tay my dng thanh ghi. (Lin h li chng 3) 5.2 Sequence Control Relay (Relay iu khin tun t): 5.2.1. Lnh STL v lp trnh SCR: + Lnh SCR: Lnh nh du v tr bt u ca on iu khin trnh t. Khi n c gi tr logic bng 1 th c c pht cho php on iu khin trnh t bt u lm vic. on iu khin trnh t phi c kt thc bng lnh SCRE. + Lnh SCRT:Lnh thc hin vic chuyn bit iu khin trnh t sang mt trng thi k tip khc (set bit k tip). Khi c tn hiu truyn n lnh th S bit c tham chiu s set ln v relay iu khin trnh t ny bt u hot ng. on SCR ang c thc hin lp tc tr v off. + Lnh SCRE: Lnh nh du s kt thc ca on chng trnh iu khin trnh t c bt u bng lnh SCR. Trong STL, LAD, FBD cc relay iu khin trnh t c s dng qun l cc hot ng ca my mc hoc nhng on chng trnh iu khin theo tng bc. Lnh LSCR chuyn trng thi logic ca SCR vo trong ngn xp (stacks) tng ng vi gi tr ca S bit c tham chiu bi lnh. on chng trnh c hot ng hay khng l ph thuc vo kt qu ca SCR stack. nh ngn xp c a kt qu ca S bit (c tham chiu trong lnh) ra trc tip cun dy (LAD) hay hp (FBD). Hnh 1 m t s hot ng ca S stack v logic stack v kt qu ca vic thc hin lnh LSCR. + Cc vn cn lu trong khi s dng relay iu khin trnh t: - Tt c cc vn logic gia lnh LSCR v SCRE to ra bi relay iu khin trnh t tu Hnh 5.1: Kt qu ca vic thc hin lnh thuc vo kt qu ca S stack
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ca qu trnh thc hin lnh. Cn cc vn logic gia lnh SCRE v lnh LSCR (bn ngoi ni dung ca chng trnh iu khin trnh t) khng ph thuc vo kt qu cu S stack. - Lnh SCRT set S bit cho php thc hin on lnh SCR k tip v cng reset S bit c thc hin trc . + Cc vn hn ch khi s dng lnh iu khin trnh t: - Bn khng th s dng nhiu S bit ging nhau cho nhiu hn mt chng trnh. V d, nu bn s dng S0.1 trong chng trnh chnh, bn khng th s dng n trong chng trnh con hoc chng trnh x l ngt. - Khng s dng lnh nhy JMP v lnh khai bo nhn LBL trong on SSR. Ngha l khng cho php nhy vo trong on SCR t bn ngoi hoc bn trong hoc t bn trong nhy ra. Bn c th thc hin cp lnh JMP v LBL xung quanh on SCR. - Bn khng th s dng lnh FOR...NEXT v lnh END trong on chng trnh SCR. 5.2.2. AND nhnh SCR: V d cch s dng lnh SCR (y cng l v d v cch s dng lnh AND nhnh): Trong v d ny, bit SM0.1 c s dng set bit S0.1 tng ng vi trng thi SCR1 hot ng trong vng qut u tin. Sau thi gian delay 2s, bit T37 s chuyn tip n trng thi SCR2. Trong qu trnh chuyn tip ny, n s lm ngng trng thi SCR1 v bt u hot ng trng thi SCR2 (S0.2). Trong vng nh d liu ca PLC S7-200 c vng nh S 32 byte dnh cho iu khin trnh t.
128
5.2.3. iu khin phn k: Trong nhiu ng dng, dng trng thi n phn ng thi thnh hai hoc nhiu dng. Khi cc dng trong iu khin phn k cng i ra t mt dng n phi hot ng ng thi. Xem m t hai dng phn k hnh 2.
State L
Transition Condition
State L
State L
Hnh 5.2: Dng iu khin phn k Dng iu khin phn k c th c thc hin bng cch b sung cng mt lc nhiu lnh SCRT vo trong mt chng trnh SCR. Xem v d sau:
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5.2.4. iu khin hi t: Cng nhiu trng hp tng t pht sinh khi hai hoc nhiu dng trng thi tun t phi kt hp li thnh dng n. S kt hp gi l hi t. Tt c cc dng n phi hon tt trc khi trng thi tip theo c thc hin. Xem m t hai dng phn k hnh 5.3.
State L State M
Transition Condition
State N
Hnh 5.3: Dng iu khin phn k iu khin dng hi t c th b sung vo trong chng trnh SCR bng cch truyn t trng thi L n trng thi L v t trng thi M n trng thi M. Khi hai bit trng thi c trnh din l ng th trng thi N tip theo c cho php, xem v d sau:
130
ng dng: Dng kt thc mt hoc nhiu thit b ca qu trnh iu khin khi khng mun n tip din trong chu trnh. 5.2.5. S lp li hot ng trnh t: c ng dng trong nhng bi ton cng ngh hot ng theo tng bc (step) v theo mt chu trnh nht nh khng c php thay i. V d iu khin my gpt; n giao thng; iu khin my trn nhin liu ...c th m t nh sau:
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Hnh 5.4: iu khin trnh t theo chu trnh lp li V d 1: iu khin hot ng ca cnh tay my mt bc t do gp chi tit my t bng chuyn A chuyn sang bng chuyn B
Hnh 5.5: S cng ngh ca my gp- t

Chng 6: Cc chc nng chuyn dng trn S7-200
CHNG 6: CC CHC NNG CHUYN DNG TRN PLC S7-200

6.1. o lng v gim st nhit vi module EM235 nhn cm bin nhit in tr Pt100: Yu cu phn cng: 1 S7-200 CPU 1 Pt100 Temperature Sensor 1 TD200 Operator Interface 1 EM235 Analog Expansion Module Chn dy in p trong gii hn 0V10V cho EM235, bt cc cng tc trn module theo cc v tr c n nh tng ng vi tng dy in p u v phn di ca tn hiu vo theo bng di y:
Khng o du SW1 SW2 SW3 ON OFF OFF OFF ON OFF ON OFF OFF OFF ON OFF ON OFF OFF ON OFF OFF OFF ON OFF o du SW1 SW2 SW3 ON OFF OFF OFF ON OFF OFF OFF ON ON OFF OFF OFF ON OFF OFF OFF ON ON OFF OFF OFF ON OFF OFF OFF ON SW4 ON ON OFF OFF OFF OFF OFF SW4 ON ON ON OFF OFF OFF OFF OFF OFF SW5 OFF OFF ON ON OFF OFF OFF SW5 OFF OFF OFF ON ON ON OFF OFF OFF SW6 ON ON ON ON ON ON ON SW6 OFF OFF OFF OFF OFF OFF OFF OFF OFF Gii hn dy in p u vo 0 50 mV 0 100 mV 0 500 mV 01V 05V 0 20 mA 0 10 V Gii hn dy in p u vo 25 mV 50mV 100mV 250 mV 500 mV 1V 2.5V 5V 10V phn di 12.5 V 25 V 125 V 250 V 12.5 mV 5 A 2.5 mV phn di 12.5 V 25 V 50 V 125 V 250 V 500 V 12.5 mV 25 mV 50 mV
SW6: chn in p v dng vo c du hoc khng du; SW4, SW5: chn h s khuych i; SW3,2,1: chn h s suy gim.
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Gi tr chuyn i ADC 12 bit ca t n i vi tn hiu vo c/khng c du:
Hnh 6.1: Cu trc ca module EM235 Tu thuc vo s knh s dng trn module analog EM235 tng ng vi a ch u vo (t n) phi s dng trong qu trnh lp trnh: AWI0_cho channel 1, AWI2_cho channel 2, AWI4_cho channel 3. Sau y l chng trnh gi m cho ngi s dng trong qu trnh o lng v gim st nhit da trn h thng 1 module CPU, 1 module EM235, 1 cm bin nhit in Pt100 v 1 TD200 (Text Display). Module tin hnh c gi tr nhit in tr c bin thnh gi tr in p theo bc. u u ra analog c s dng nh hng s ca ngun dng. Dng cung cp cho Pt100 l 12.5 mA ngun dng. Vi mch ny u vo l tuyn tnh ca 5mV/1C. Gi tr analog ca u vo c s ho qua h thng bin i ADC v c c u n theo chu k. T gi tr ny, chng trnh s thc hin tnh ton v chuyn i theo cng thc sau: T[C] = (Digital value - 0C offset)/ 1C value
Digital value: gi tr u vo analog c chuyn i. 0C offset: gi tr s, c o 0C; trong v d ny gi tr offset l 4000. 1C value: gi tr tng ng vi 1C, trong v d ny th 1C =16. Chng trnh tnh ton gi tr thp phn v ghi kt qu vo bin ca message1: "Temperature = xxx.xC" gi tr ny c hin th trn TD200. Trc khi khi to chng trnh ny, phi xc nh c gii hn nhit thp nht v nhit cao nht. Nu nhit vt qu ngng th s xut hin dng cnh bo trn TD200. Xut hin dng thng bo Message 2: "Temperature > xxx.xC" nu nhit vt qu ngng. Message 3: "Temperature < xxx.xC" nu nhit di ngng.
Hnh 6.2: Cch lp TD200 vi CPU v module EM235
Hnh 6.3: Cch lp ghp cm bin vi module EM235

Chng trnh vit trn Step 7 bng ngn ng STL: Network 1: Set the High and Low Temperature Limits LD First_Scan_On:SM0.1 // In the first scan cycle, MOVD +0, VD196 // clear VW196 and VW198. MOVW +16, VW250 // Load 1 C = 16 in VW250 MOVW +4000, VW252 // Set the 0 C offset = 4000. MOVW +300, VW260 // Set the high temperature // limit = 30 C. MOVW +200, VW262 // Set the low temperature // limit = 20 C. MOVW +20000, AQW0 // Initialize a 12.5 mA current // at analog output word AQW0. Network 2: Calculate the Value and Enable Message 1 LD Always_On:SM0.0 // Every scan cycle, MOVW AIW4, VW200 // move the value in analog // input word AIW4 to VW200. -I VW252, VW200 // Subtract the 0 C offset. DIV VW250, VD198 // Divide the result by the 1 C // value. MUL +10, VD196 // Multiply the remainder by 10. DIV VW250, VD196 // Divide the value in variable // double word VD196 (remainder x 10) // by the 1 C value. MOVW VW198, VW160 // Shift the quotient by 1 decimal // point to the left. MOVW +0, VW198 // Clear VW198. MUL +10, VD198 // Multiply the temperature value // by 10. +I VW160, VW200 // Add the result of temperature // value x 10 with the value that // is stored as the digit following // the decimal point. MOVW VW200, VW116 // Transfer the result to VW116 // (embedded value on the TD 200) // for display. S V12.7, 1 // Enable message 1 for display // on the TD 200. Network 3: If Temperature Exceeds High Limit, Enable Message 2 and Turn Off Furnace LDW>= VW200, VW260 // If the temperature value >= // the high temperature limit // stored in VW260, = V12.6 // enable message 2 on the TD 200. R Q0.0, 1 // Turn off the furnace.
// Move the high temperature limit // value to VW136 (embedded value // on the TD 200) for display // in message 2. Network 4: If Temperature Drops Below Low Limit, Enable Message 3 and Turn On Furnace LDW<= VW200, VW262 // If the temperature value <= // the low temperature limit // stored in VW262, = V12.5 // enable message 3 on the TD 200. S Q0.0, 1 // Turn on the furnace. MOVW VW262, VW156 // Move the low temperature limit // value to VW156 (embedded value // on the TD 200) for display in // message 3. Network 5: Main Program End 6.2. o lng v gim st nhit vi module EM235 nhn cm bin truyn tnh nhit in Pt100: Yu cu phn cng: 1 S7-200 CPU 1 Pt100 Temperature Detector 1 TD200 Operator Interface 1 EM235 Analog Expansion Module y l chng trnh gi m lm th no c th o v gim st trong phm vi gii hn theo danh ngha l thuyt s dng module m rng analog EM235. Nh u d nhit Pt100 l c kt ni ti knh vo analog ca module. Qa trnh chuyn i in tr trn Pt100 thnh nhit da trn s chuyn i in p. Ngun ni Pt100 c s dng nh 1 ngun dng. Tn hiu cung cp c dng n nh mc 2.5mA cho u d Pt100. Vi mch in ny, in p u vo thay i tuyn tnh ca 1mV/C. EM235 chuyn i gi tr analog (p) thnh digital c thc hin tun t theo chu k. Chng trnh tnh ton nhit da tren cng thc sau: T[C] = (te - to)/t1 te : gi tr s c trc tip t knh u vo AWIx(x = 0,2,4) to : gi tr s, o 0C (C offset) t1 : s nguyn tng ng vi 1C Chng trnh tnh ton gi tr thp phn v ghi kt qu vo bin nh ca Message 1: "Temperature xxx.xC" kt qu ny c hin th trn TD200. Trong qu trnh khi to, phi ch nh r vng gii hn (gi tr thp nht v gi tr cao nht). Ngoi ra trn TD200 cn xem c cnh bo nu nhit vt qu gii hn n nh trc. Cch lp TD200 vi CPU v module EM23 xem hnh 2.
MOVW VW260, VW136
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o in tr shunt ca Pt100 s dng v d ny l ph hp trong gii hn nhit t -200C100C. ng c tnh ca Pt100 xem bn di, n khng hon ton tuyn tnh. Sai khc mt t so vi ng thng, hu ht s sai lch ny u nm trong gii hn.
Hnh 6.4: ng c tnh nhit in tr ca Pt100 Nhit trong gii hn t -200C -130C v t 0C 100C.Nhit o c t hn gi tr thc t mt t v phi b thm. S sai lch v in tr ph thuc vo nhit , xem hnh bn di. Trong trng hp ny ta phn dy nhit ra lm 30 on, 10C cho mi on. Nh ta mi tm c gi tr lch trung bnh cho tng on. Kt qu lch trong 30 on ny s c s dng trong sut qu trnh "tuyn tnh ho" ca chng trnh bng cch b gi tr nhit tng ng cho tng on.
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Hnh 6.5: B gi tr nhit tng ng cho tng on in tr thay i 0.4 tng ng vi nhit thay i 1C. Gi tr b c th chuyn i sang C v c th a trc tip vo chng trnh tnh ton nhit . Gi tr b c lit k theo bng sau:
Trong sut qu trnh thit lp, gi tr hiu chnh c lu li trong vng nh m v sau chng trnh s thm vo trong gi tr nhit o c. Gi tr in tr o c ca Pt100 0C l 100. in tr thay i tuyn tnh theo nhit theo h s 0.4/C. Ngun nui cung cp cho cm bin phi l ngun dng n nh 2.5mA. Dy in p la chn t 0V 1V, trong phn di l 10A/n v. Nh vy 2.5mA c quy i thnh 250 n v. Chn gi tr ngng thp tng ng vi 2.5mA l 4000, t phng trnh bin i sau: (32000*2.5mA)/20mA = 4000. La chn in p trong gii hn t 0V 1V bng cch la chn cc cng tc theo cc ch nh sau:
139
Switch: 1 3 5 7 9 11 ON OFF ON OFF ON OFF Cch lp ghp cm bin vi module EM235 xem hnh 3. Chng trnh vit trn Step 7 bng ngn ng STL: Network 1: Initialize the Current for the Pt100 LD First_Scan_On:SM0.1 // In the first scan cycle, MOVW +4000, AQW0 // move 4000 into analog output // word AQW0 to initialize a // 2.5 mA current for the Pt100. Network 2: Load the Measured Value and Calculate the Temperature MOVW AIW4, VW200 // load measured value from AIW4 // in VW200. -I VW252, VW200 // Subtract the 0 C offset from // the temperature value. DIV VW250, VD198 // Divide the result by C. MUL +10, VD196 // Multiply the remainder by 10. . . DIV VW250, VD196 // Divide the result by the C // value and add the resulting // value to the first // position after decimal. MOVW VW198, VW160 // Move VW198 to temporary // location VW160. MOVW +0, VW198 // Clear VW198. MUL +10, VD198 // Multiply the temperature value // by 10. +I VW160, VW200 // Add the temperature value and // the value in the first position // after the decimal to determine // the exact temperature. Network 3: Enable Message 2 On the TD 200 LDW>= VW200, VW260 // If the temperature value measured // >= the high limit, R V12.5, 3 // reset all three TD 200 messages. = V12.6 // Enable the TD 200 message, // "Temperature>". MOVW VW260, VW136 // Move the high limit into the // TD 200 embedded value display. JMP 1 // Jump to Label 1. Network 4: Enable Message 3 On the TD 200 LDW<= VW200, VW262 // If the temperature value measured // <= the low limit, R V12.5, 3 // reset all three TD 200 messages. = V12.5 // Enable the TD 200 message,
MOVW VW262, VW156 JMP 1
// "Temperature<". // Move the low limit into the // TD 200 embedded value display. // Jump to Label 1.
Network5: Find the Compensation Value and Display the Temperature LD Always_On:SM0.0 // Every scan cycle, MOVD +0, AC1 // load the starting address for // the temperature table B // into accumulator AC1. FND> VW398, VW200, AC1 // Begin searching table B at // VW398 until the value stored // in VW200 is found. // Then, place the index value // in accumulator AC1. MOVD &VB300, AC2 // Load the starting address of // table A into AC2. MUL +2, AC1 // Multiply the index by 2. +D AC1, AC2 // Add the index to the starting // address. MOVW *AC2, VW116 // Move the adjustment value into // VW116. +I VW200, VW116 // Add the adjustment value to // the measured temperature to // get the true value. S V12.7, 1 // Enable the first TD 200 message, // "Temperature=". Network 6: Label One LBL 1 // This is the destination for // the Jump to Label instruction // in Network 3 and Network 4. Network 7: Main Program End 6.3. Cch s dng b m tc cao ghi li gi tr analog bng cch chuyn i gi tr analog sang tn s: Yu cu phn cng: Trong phn ny c s dng u ra xung phc v cho mc ch iu khin nn phi s dng PLC DC/DC/DC CPU loi 214, 215, 216, 221, 222, 224, 224XP, 226, 226XM. B chuyn i in p sang tn s loi SFW01 (Trnker Commpany), c tiu chun k thut nh sau:
+ Ngun cung cp: 24VDC + p vo: 0VDC 10VDC + u ra: Sng xung vung, 24VDC-GND + Gii hn o: 0VDC 10VDC 0Hz 2000Hz + Ratio ( tng tuyn tnh): 200Hz/V M t: Vi s tr gip ca b chuyn i in p sang tn s, b m tc cao (HSC) ca PLC 214 c s dng ghi li gi tr in p ny. B chuyn i s dng in p vo t 0V 10V. Gi tr ny c chuyn i sang dy xung vung c tn s tng ng 0Hz 2000Hz. Tn hiu ny c a vo b m tc cao ca CPU 214. Dy xung ny s c m, sau khong thi gian nh trc, lng xung s c ghi v gi tr in p c tnh ton.
Hnh 6.6: Cch lp b bin i in p sang tn s vi u vo ca b m tc cao Chng trnh vit trn Step 7 bng ngn ng STL: Main Program (OB1): Network 1: Call Subroutine SBR0 LD First_Scan_On:SM0.1 // Load SM0.1. CALL SBR_0:SBR0 // Call SBR0. Network 2: Main Program End Subroutine Program (SBR0): Network 1: Subroutine SBR0 Network 2: Initialize High-Speed Counter and Enable Timed Interrupt LD Always_On:SM0.0 // Load SM0.0. MOVB 16#FC, HSC1_Ctrl:SMB47 // Load control bits for HSC1.
HDEF 1, 0 // Assign mode 0 to HSC1. MOVD +0, HSC1_CV:SMD48 // Set the new current value of // HSC1. MOVD 16#0000FFFF, HSC1_PV:SMD52 // Set the new preset value of // HSC1 (not used in this example). MOVB 100, Time_0_Intrvl:SMB34 // Set the time interval for // timed INT0 = 100 ms. ATCH INT_0:INT0, 10 // Attach interrupt event 10 to // INT0. ENI // Enable all interrupt events. HSC 1 // Start HSC1. Network 3: End of Subroutine SBR0 Interupt Program (INT0): Network 1: Interrupt Routine INT0 Network 2: Evaluate High-Speed Counter HSC1 LD Always_On:SM0.0 // Load SM0.0. MOVD HC1, VD100 // Move the value in HSC1 to // VD100 to store the current // count. MOVD +0, HSC1_CV:SMD48 // Reset the current value (CV) // of HSC1 = 0. MOVB 16#C0, HSC1_Ctrl:SMB47 // Enable HSC1 and update current // value (CV). HSC 1 // Start HSC1. SRD VD100, 1 // Divide the count stored in // VD100 in half. MOVB VB103, Display_Voltage:QB0 // Display the result at QB0. // (10 times the voltage). Network 3: End of Interrupt Routine INT0 6.4. Cch o mc t u vo analog: Yu cu phn cng: EM235 mudule, v tr cc DIP Switching nh sau: 1 3 5 7 9 off off on off off TD200 (Text Display) y l chng trnh c gi tr analog t knh vo ca S7-200 v cung cp cho gi tr u ra mc. Tt c cc gi tr yu cu phi c cung cp vi gi tr c thit lp trong chng trnh. Cc bin sau y c a vo v tr thch hp trong cng thc: Ov : gi tr u ra mc Iv : gi tr u vo analog Osh : gii hn mc cao cho gi tr u ra Osl : gii hn mc thp cho gi tr u ra
Ish : gii hn trn ca gi tr du vo analog Isl : gii hn di ca gi tr du vo analog S quan h gia gi tr u vo analog v gi tr u ra mc c th hin theo th sau:
Hnh 6.7: th biu din quan h gia u vo analog v u ra mc Cng thc sau tnh ton gi tr mc c th say ra t th: Ov = [(Osh - Osl)*(Iv - Isl)/(Ish - Isl)] + Osl Thut ton ca chng trnh:
Bt u chng trnh chnh Khi d liu: Thit lp cu hnh cho TD200, thit lp mc thp v mc cao
Khai bo tham s trong vng nh V v chun b gi chng trnh con SBR0
SBR0: gi tr mc cho u ra analog
Lm trn v a ti u ra Word (analog)
SBR0: gi tr mc cho TD200
Hin th message trn TD200
Kt thc chng trnh chnh
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Chng trnh vit trn Step 7 bng ngn ng STL: Main Program (OB1): Network 1: Read the Analog Input Value and Convert to Real LD Always_On:SM0.0 // Load SM0.0. MOVD +0, AC1 // Move 0 to AC1 to clear AC1. MOVW AIW0, AC1 // Move the value in AIW0 into AC1. DTR AC1, VD500 // Convert the value in AC1 from // decimal to real and store the // real number in VD500. Network 2: Store the Maximum and Minumum Scaling Values LD Always_On:SM0.0 // Load SM0.0. MOVD VD500, VD1000 // Move the value in VD500 into // VD1000. MOVD VD200, VD1004 // Move the value in VD200 into // VD1004. MOVD VD204, VD1008 // Move the value in VD204 into // VD1008. MOVW VW208, VW1012 // Move the value in VW208 into // VW1012. MOVD VD212, VD1016 // Move the value in VD212 into // VD1016. CALL SBR_0:SBR0 // Call SBR0. Network 3: Truncate the Value Received from Subroutine SBR0 LD Always_On:SM0.0 // Load SM0.0. TRUNC VD2000, AC1 // Truncate the value in VD2000 // and store the result in AC1. MOVW AC1, AQW0 // Move the value in AC1 to // AQW0. Network 4: Store the TD 200 Maximum and Minimum Scale Values LD Always_On:SM0.0 // Load SM0.0. MOVD VD216, VD1012 // Move the value in VD216 into // VD1012. MOVD VD220, VD1016 // Move the value in VD220 into // VD1016. CALL SBR_0:SBR0 // Call SBR0. Network 5: Enable the TD 200 Message to Display the Liquid Level Value LD Always_On:SM0.0 // Load SM0.0. MOVR VD2000, AC1 // Move the value in VD2000 into // accumulator AC1. *R 100.0, AC1 // Multiply the value in AC1 // by 100. TRUNC AC1, AC1 // Truncate value in AC1. MOVW AC1, VW116 // Move the value in AC1 into
// VW116 for TD 200 display. // Enable 'Liquid Level = ' message // on the TD 200. Network 6: Enable Max. Level Reached Message on the TD 200 LDR>= VD2000, VD224 // If VD2000 >= VD224, = V12.6 // enable 'Max. Level Reached' // message on the TD 200. Network 7: Enable Min. Level Reached Message on the TD 200 LDR<= VD2000, VD228 // If VD2000 <= VD228, = V12.5 // enable 'Min. Level Reached' // message on the TD 200. Network 8: Open the Inlet Valve LDN V12.6 // Load variable memory bit V12.6 // as a Normally Closed contact. // If V12.6 is not set A I0.0 // and input I0.0 is set AN Q0.1 // and output Q0.1 is not set, = Q0.0 // set output Q0.0. Network 9: Open the Outlet Valve LDN V12.5 // Load variable memory bit V12.5 // as a Normally Closed contact. // If V12.5 is not set A I0.1 // and input I0.1 is set AN Q0.0 // and output Q0.0 is not set, = Q0.1 // set output Q0.1. Network 10: End of Main Program = V12.7 Subroutine Program (SBR0): Network 1: Subroutine SBR0 Network 2: Subtract Minimum Scale Values from Maximum Scale Values LD Always_On:SM0.0 // Load SM0.0. MOVR VD1012, AC1 // Move the value in VD1012 into // AC1. -R VD1016, AC1 // Subtract the value in VD1016 // from the value in AC1. MOVR VD1004, AC2 // Move the value in VD1004 into // AC2. -R VD1008, AC2 // Subtract the value in VD1008 // from the value in AC2. MOVR VD1000, AC3 // Move the value in VD1000 into // AC3. -R VD1008, AC3 // Subtract the value in VD1008
// from the value in AC3. Network 3: Perform Final Mathematical Calculations LD Always_On:SM0.0 // Load SM0.0. /R AC2, AC3 // Divide the value in AC3 by // the value in AC2. *R AC1, AC3 // Multiply the value in AC1 // by the value in AC3. MOVR AC3, VD2000 // Add the value in AC3 to // the value in VD1016 +R VD1016, VD2000 // and place the sum in VD2000. Network 4: End of Subroutine SBR0 6.5. Module iu khin v tr mt trc: Yu cu phn cng: Mt CPU-221 or 222 or 224 or 224XP or 226 or 226XM Bi v u ra xung c s dng trong phn gi ny nn CPU loi DC/DC/DC c la chn. Mt cp PC/PPI. Mt b lp trnh (PG) hoc my tnh (PC). Mt motor bc loi SIMOSTEP vi tng trng moment l 2Nm, tng trng dng in l 1.8A. tra thng s k thut ca cc lai ng c bc ny da vo trang web sau: ht//www.ad.siemens.de/. Mt module FM STEPDRIVE. Mt on cp cho motor khong chng 10m. in tr hoc CALEX module 8502. Mt b cp cho tn hiu iu khin ti ngun nui. Mt b m phng cho S7 200. CPU 221 s dng trong v d ny s dng hai u ra pht xung tc cao iu khin motor (c th pht ti tn s 20kHz), nn dng chc nng ramp up hoc ramp down ca cc i CPU 221 tr ln. S dng b ngun c bit FM STEPDRIVE chuyn i xung iu khin thnh ngun dng cung cp cho cc cun dy ca motor. T trng quay ca motor c th chuyn i sang v tr, c th l s bc tng ng vi gc o .A do xung iu khin to ra mt cch tun t. Dy xung tun t tng ng vi tn s ca nhng bc ging nhau (xung ng b). Nu tn s khng cao th s xy ra hin tng chuyn ng step-to-step ca trc ng c s chuyn thnh chuyn ng quay lin tc (iu ny c th gy ra mt bc). Trong v d mu ny s dng u ra pht xung Q0.0 cho motor; I0.0 tn hiu iu khin motor; vic iu khin c ra s xung vung c n nh nh l vic c s bc ca motor; u vo I0.1 l cng tc off ca motor; u vo I0.5 la chn hng quay ca motor. gim thiu li trong qu trnh iu khin tn s cao, nn s dng c tnh ramp lc tng hoc gim tc iu ny s hiu qu hn rt nhiu. c tnh ramp ny s c gii thiu phn s dng hai hm pht xung tc cao PTO v PWM.
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+ Module FM STEPDRIVE: Module ny c th iu khin bng tn hiu clock mc cao l u im ni bt. Mi mt xung clock tng ng vi mt bc ca motor. Ngi ta c th n nh gi tr ca dng pha, s bc, suy gim dng bng cc la chn trn cc cng tc ca module. + Input Signals: PULSE Clock pulse Mi sn ln to nn mt bc, in p 24VDC Drection of Chn chiu quay thun ngc DIR rotation Nu c tn hiu vo l cho php th b phn ngun s sn ENABLE Enable sng cung cp Mc dng pha ca motor c set ln, n c th thay i PWM Current Control c bng cch iu bin rng xung. + Out Signals: READY1_N Ready Status Sau khi u vo enable cho php hot ng, b phn ngun s c bo co sn sng hot ng cho u ra READY1_N. + Tn hiu giao tip: Tn hiu ca b iu khin mc cao c cung cp bng xung iu khin u vo 24VDC, c th cho php iu khin motor u vo GATE_N.
Hnh 6.8: S ghp ni step motor vi b iu khin
148
+ Inputs: GATE_N Enable the clock pulse signal : Khi c 24V cng vo GATE_N, tn hiu ang ch i cho vic iu khin stepper motor. Nu cho 0V, tn hiu ch b hu b. + Outputs: V tr zero ca b m vng quay bn trong, in ZERO Zero signal right counter p 24V c cp cho u ra zero ny. Sau khi u vo cho php hot ng, b phn READY2 Ready status ngun bo co l c c bi u ra ready2. Nu tn hiu clock b hu bi u vo GATE_N MSTILL Motor Stepped v motor dng li, s dng li ny l s chp nhn bi tn hiu MSTILL. + B chuyn i in p cho b iu khin Stepper Motor: Xem hnh sau y bn c th d dng to mt mch in kt ni b iu khin lp trnh ti b drive ca stepper motor. Tt c cc u vo ca b FM STEPDRIVE l 5V.
Hnh 6.9: S ghp ni gia u ra ca PLC vi module FM STEPDRIVE Cng c th la chn b chuyn i Callex (nh l module 8502) to ra ngun tn hiu 5V.
Hnh 6.10: S ghp ni gia u ra ca PLC vi Calex
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M t chng trnh: Trong vng qut u tin (SM0.1=1) cc gi tr quan trng cho vic to xung c t li. y tc hot ng cng nh s bc theo danh ngha l thuyt. Cch la chn hng quay ca motor: Bn c th s dng cng tc I0.5 la chn hng quay. Nu u vo I0.5 = 1 u ra Q0.2 c set ln mc cao v chiu quay ca ng c lc ny l ngc chiu kim ng h. Nu u vo I0.5 = 0, u ra Q0.2 c reset xung mc thp v chiu quay ca motor lc ny l cng chiu kim ng h. Trong trng hp trnh motor mt bc, hng quay ch c th thay i c khi bit nh trng thi hot ng ca motor l off (M0.1 = 0). Cc bc khi ng motor: 1. n nt Start, iu c ngha l c sn ln truyn ti u vo I0.0. 2. Khng c kho lin ng, iu c ngha l bit nh lin ng b reset. 3. B iu khin chuyn sang ch off, c ngha l bit nh hot ng b reset. Nu cc yu t c hi t, bit nh M0.1 c reset v b iu khin s dng lnh PLS khi ng vic pht ra dy xung cng Q0.0. iu cn thit cho vic pht xung l phi c d liu c khai bo tng ng trong vng nh c bit tng ng vi lnh PTO/PWM v u ra Q0.3 c set. Cch dng motor: 1. n nt Stop, iu ny tng ng vi vic truyn xung ln n port I0.1 2. B iu khin bt ln on, iu tng ng vi M0.1 c set. Nu cc yu t c hi t, bit nh M0.1 c reset. Sau xung ra ti port Q0.0 b ngt i bi v qu trnh iu bin rng xung b gii phng kt ni vi lnh PLS0. Khi iu ny xy ra, rng xung b gim xung zero. Sau ngt 0 c x l, bit nh M0.1 c reset ln na chun b cho vic khi ng b iu khin ln tip theo. Cu trc chng trnh iu khin:
Khi ng CT chnh
Ch nh rng v chu k xung, cho php INT0 hot ng.
No
Bt motor sang off? Yes
150
La chn chiu quay

I0.5
No
Nt khi ng Motor hot ng v removebit lin ng?
Yes Pht dy xung ra ti cng Q0.0
No
Stop motor, nut I0.1 hot ng ?
Yes Ngt dy xung ra ti cng Q0.0
Kt thc CT chnh
Chng trnh th hin di dng ngn ng STL: Network 1: ***MAIN PROGRAM*** Specify Pulse Width and Cycle Time LD First_Scan_On // Load SM0.1. MOVW +500, PLS0_Cycle // Specify cycle time of 500 // microseconds for PWM. MOVW +0, PWM0_PW // Specify pulse width of 0. MOVD +40000, PTO0_PC // Read out 40,000 pulses. S Enable_Drive, 1 // Enable the FM STEPDRIVE. ATCH INT_0, 19 // Attach interrupt event 19 to // INT0. ENI // Enable interrupt. Network 2: Enable Counterclockwise Rotation LDN Drive_ON // Load M0.1 as a Normally Closed // contact.
// If M0.1 is not set A Direction // and input I0.5 is set, S Q0.2, 1 // set output Q0.2. Network 3: Enable Clockwise Rotation LDN Drive_ON // Load M0.1 as a Normally Closed // contact. // If M0.1 is not set AN Direction // and input I1.5 is not set, R Q0.2, 1 // reset output Q0.2. Network 4: Activate Interlock LD Motor_STOP // Load input I0.1. // If input I0.1 is set, S Interlock, 1 // set memory bit M0.2. Network 5: Cancel Interlock LDN Motor_START // Load input I0.0 as a Normally // Closed contact. // If input I0.0 is not set AN Motor_STOP // and input I0.1 is not set, R Interlock, 1 // reset memory bit M0.2. Network 6: Set PWM/PTO Control for Output Q0.0 and Start Drive LD Motor_START // Load input I0.0 EU // If there is a positive transition // (Edge Up) at input I0.0 AN Interlock // and memory bit M0.2 is not set AN Drive_ON // and memory bit M0.1 is not set, MOVB 16#85, PLS0_Ctrl // load the control bits for pulse // train output at output Q0.0. PLS 0 // Enable pulse function at output // Q0.0. S Drive_ON, 1 // Set memory bit M0.1. Network 7: Stop Drive and Set PWM/PTO Control for Output Q0.0 LD Motor_STOP // Load input I1.1 EU // If there is a positive transition // (Edge Up) at input I0.1 A Drive_ON // and memory bit M0.1 is set, R Drive_ON, 1 // reset memory bit M0.1. MOVB 16#CB, PLS0_Ctrl // Load control bits for pulse width // modulation at output Q0.0. PLS 0 // End pulse output at Q0.0. Network 8: Kt thc chng trnh chnh. Network 1: Bt u chng trnh con ( Interrupt Routine INT0) Network 2: Reset Memory Bit M0.1 (drive ON) LD Always_On // Load SM0.0.
R Drive_ON, 1 // Reset memory bit M0.1. Network 3: End of Interrupt Routine INT0. RETI // End INT0. 6.6. Cc ng dng truyn thng trn Step 7-200: 6.6.1. Kt ni PLC vi my in qua cng song trong ch truyn thng Freeport:
Hnh 6.11: Kt ni PLC vi my in qua cng song 6.6.2. Truyn thng gia S505 v S7 trong mng qua module giao din trng MIF:
Hnh 6.12: Kt ni S505 v S7 trong mng qua module giao din trng MIF
6.6.3. Truyn thng S7-200 ch Freeport s dng modem in thoi telephone network:
Hnh 6.12: Kt ni S7-200 ch Freeport s dng modem in thoi
Hnh 6.13: Kt ni port truyn thng gia S7 v modem
154
6.6.4. Truyn thng Freeport kt ni mng vi S7-200 CPUs trong trng hp I/O xa:
Hnh 6.14: Truyn thng gia cc S7-200 vi nhau 6.6.5. S dng trnh ng dng Hyper Terminal window kt ni gia PC v PLC:
Hnh 6.15: Truyn thng gia S7 v PC
155
6.6.6. Kt ni gia S7-200 vi encoder s dng port truyn thng RS485:
Hnh 6.16: Kt ni Encoder vo port truyn thng
156
6.6.7. Truyn thng theo giao thc Mudbus kt ni cc S7-200 slave:
Hnh 6.17: Kt ni truyn thng theo giao thc Mudbus 6.6.8. S dng modem Radio kt ni mng S7-200:
Hnh 6.18: Kt ni truyn thng s dng Radio modem
157
6.6.9. S dng TD-200 iu khin v gim st S7-200:
Hnh 6.19: Kt ni truyn thng S7-200 v TD200
158
6.6.10. Tch hp mng AS-I vi S7-200:
Hnh 6.20: Kt ni truyn thng S7-200 vi sensor v c cu chp hnh qua mng AS-I 6.6.11. Kt ni S7-300 vi S7-200 theo chun Profibus v vi my lp trnh:
Hnh 6.21: Truyn thng S7-200 v S7-300 theo chun Profibus

6.6.12. Kt ni S7-200 vi mng Ethernet:
Hnh 6.22: Truyn thng S7-200 trong mng Ethernet
Hnh 6.23: Cc modem kt ni S7-200 vi mng Ethernet
160
Chng 7: Nhng ng dng ca PLC
CHNG 7 NHNG NG DNG CA PLC

7.1. ng dng PLC trong lnh vc iu khin robot: V vn robot cng nghip ch yu l cc cnh tay my lm vic trong cc nh my lp rp v sn xut t, m t, ti cc bn cng, kho bi cha hngth PLC c nhng vai tr rt ln. y ch gii thiu n bn c ch yu l cc bn sinh vin tham d cc cuc thi robocon. y l chng trnh thng xuyn t chc hng nm, vic cho robot t ng d theo cc vch trng l ti chnh m rt nhiu bn trong cuc tn rt nhiu thi gian. Sau y ti s a ra mt gii php cc bn tham kho trong qu trnh ng dng PLC vo lnh vc ny. y l m hnh s sn u:
Hnh 7.1: S sn u v hnh trnh m robot cn phi thc hin Bng 1: M t hnh trnh lm vic ca Robot
S 4 5 8 9 10 12 13 vch Bnh T1 T1 T1 T1 T1 T1 cng tri thm 1 Bnh vch T2 L2 T2 L2 T2 L2 phi ch chy chy b r chy r r phi lm thng thng bng phi thng phi vic 16 T1 T2 chy thng 17 L1 T2 r tri 23 T1 T2 chy thng 24 L1 T2 r tri 27 T1 T2 28 T1 L2 29 T1 T2 30 cng thm 1 vch
chy r chy b thng phi thng bng
161

S 31 33 36 vch Bnh L1 T1 L1 tri Bnh T2 T2 T2 phi ch chy r tri lm r tri thng vic 41 T1 T2 chy thng 42 T1 L2 43 T1 T2
>43
ngng & b bng
r chy phi thng
7.2. ng dng PLC trong h thng sn xut linh hot: Hin nay, h thng cn bng nh lng c ng dng rt rng ri trong cc nh my x nghip cng nghip. ni u c s phi trn cc cht theo t l nh trc (bi ton phi liu) th c s tham gia ca cn bng nh lng, c bit l cc nh my ch bin vt liu xy dng, nh my phn bn, cao su... H thng ny c kh nng iu chnh t ng c tng cht ng vi t l t trc da trn c s cc vng lp iu chnh v d PI, PID.
t vn : Lm th no phi liu theo gi tr t trc ca 3 cht clanhke, thch cao, ph gia tng ng l 70%, 20%,10% nghin xi thnh xi mng. Trong tng khi lng cn phi vo my nghin l A tn/h. Ngoi ra, h thng lm vic cn ph thuc vo cn liu hi v u vo ca my nghin (sau khi ra khi my nghin nhng ht c khi lng ln c hi v nh phn ly ng) v in Hnh 7.2: S cng ngh ca h thng phi liu y ca my nghin. C ngha l lc no h thng lm vic cng phi m bo c yu t u tin l in dy ca my nghin 80%. Nu lng liu t h thng phi liu a n cng vi liu hi v lm cho in y ca my nghin vt mc 80%B tn/h th h s t ng
gim lng liu cung cp n nhng vn m bo c t l phn trm ca bi ton phi liu mc d khi lng xut khng t A tn/h, ngoi ra vng lp iu chnh cn phi nhn bit c s thay i tham s ca Clanhke kp thi iu chnh ph gia v thch cao. S thay i thng s trn thch cao v ph gia l hm bc nht vi bin l clanhke. Nh vy mi bng ti c mt vng lp iu chnh PI vi thng s phn hi l tn hiu tng hp t hai tn hiu ca loadcell v encoder, u ra l gi tr setpoint xung bin tn theo ng USS. Ngoi ra h thng cn lm vic c ch Manual, trong ch ny h thng khng quan tm n lng liu hi v v in y ca my nghin. Nh vy h thng lm vic 3 ch : MN80%B; MN>80%B; Manual. gi s 80% lng liu trong my nghin l 270 tn. C th m t s khi iu khin h thng nh sau:
A PID_0 PV CV SP Clanhke MM4 M Bng ti
270 B
chun ho
B t hp chuyn mch Cn liu hi v
PID_1 PV CV SP
Thch cao MM4 M Bng ti
in y ca MN
chun ho PID_2 PV CV SP Ph gia MM4 M Bng ti
Manual
chun ho
Hnh 7.3: S m t h thng iu khin CBL cho h thng nghin xi mng ng nhin l h thng phi qun l trong gii hn nht nh, nu mt trong 3 bng ti gp s c v d lng liu vt mc ngng c t ti u cn bng, lc dng a v vt mc 20mA th h thng s dng lm vic thng qua chng trnh con x l s c. Hoc bt c 1 bng chuyn no cng c gim st trt ai, nu xy ra th chng trnh x l s c cng s c gi. Yu cu phn cng ca h thng: + 1 PLC_CPU 226 + 2 EM235 Module + 3 Bin tn MM3 hoc MM4 (iu chnh tc 3 bng ti)
+ 4 Load cell (ly tn hiu v u cn) + 4 u cn (chun ho tn hiu v t 420 mA; ci t gi tr gii hn trn) + 1 Sound Sensor + B cp ng trc ni t RS-485 Port n PLC + 3 Encoder S u ni h thng nh hnh 2. Qa trnh tnh ton, chun ho, setpoint cho tng vng lp c thc hin nh sau: Bi ton t ra l lm th no tn hiu phn hi v c chuyn sang n v tn/h so snh vi gi tr setpoint.
Tnh ti trng Q:
q.L 2 Vi: Q: Ti trng im [Kg] q: Ti trng trn bng ti [Kg/m] L: Chiu di tnh ton [m] Cng thc tnh trng lng P trn bng ti theo thi gian : Hnh 7.4: Mt ct dc ca bng 2.Q P = q.V = .V (*) L Vi: P: Trng lng bng ti theo thi gian [Kg/s] V: Vn tc di ca bng ti [m/s] Theo (*), tnh q bng cch tnh Q v L bit trc. chun ho q t [01]ta chia q cho qmax ; tnh qmax ta da vo Pmax l gi tr t tng ng vi % ca mi cht v Vmax ca bng ti (da vo tc nh mc ca ng c). Nh vy, tn hiu phn hi v chnh l P [tn/h]. Cn phi tm vn tc V [m/h] v ti trng trn bng ti q [tn/m]. Xy dng cng thc tnh ton tc ca bng ti nh vo Encoder: Gi s chn thi gian tnh ton l 250ms tng ng vi s xung tnh c l x xung Nu ta chn loi encoder c thng s 500xung/vng th sau x xung: x 2x (vng) tng ng vi gc quay (rad). Bnh xe encoder quay c: 500 500 2x Sau 1ms bnh xe encoder quay c: (rad). Q=
250.500
Nh vy vn tc gc ca bnh xe l: 1 2x rad . = 1000. ( ) 250 500 s Vn tc di ca bnh xe bng vn tc di ca bng ti: m d 1 2x d Ved = . = 1000. . . ( ) = Vbt 2 250 500 2 s
d: ng knh ca bnh xe: chn d = 0,1 [m]; L=0.5 [m] m 1000.2x.d = 18,086 x ( ) Vbt = Ved = 3600. 250.500 h Chun ho v gi tr t [01] tin hnh chia cho Vmax ; tnh Vmax da vo tc nh mc ca ng c.
Hnh 7.5: S khi chng trnh iu khin h thng cn bng

Chun ho v a v u vo CV (Current Value) ca b PID ca PLC: [0 q max ] = [0,0 1,0] q = q max q max q.Vbt P = = [0,0 1,0][ . 0,0 1,0] = [0,0 1,0] Pmax q max .Vmax Qu trnh thc hin c thc hin theo s khi hnh 7.5. Cc qu trnh tnh ton ny thc hin trong PLC. tnh Q da vo u vo analog tng ng, ti y ta phi thc hin cc bc ly mu. i vi b PID ta phi c chng trnh khai bo cc tham s cn thit ca b PID lin h chng 3. tnh vn tc V phi s dng b m tc cao... iu khin cc bin tn trong mng dng giao thc USS protocol nh trnh by phn 7.5. 7.3. ng dng PLC trong iu khin qu trnh: Di y l s cng ngh ca h thng phi liu, nghin, phn loi v phn phi xi mng vo trong cc sil. y khng xt n vic iu khin h thng phi liu nh nu trn phn 7.2. Ch thc hin cng vic tng i n gin: Chn sil mun nhp vo thng qua cc van sau: chuyn v tr ca van 3 ng v chn v tr ca van trn mng kh ng 3. Nu chuyn van 3 ng sang bn phi th sil 1 c nhp. Sang v tr gia th sil 1 v sil 2 hoc sil 3, nu van trn mng kh ng 3 ng th sil 2 c nhp, van trng thi m th sil 3 c nhp. Nu van 3 ng chuyn sang tri th sil 2 hoc sil 3, nu van trn mng kh ng 3 ng th sil 2 c nhp, van trng thi m th sil 3 c nhp. Gi s khi ang nhp cho sil 1 (van 3 ng v tr bn tri) m pht hin y th h thng s t ng chuyn van 3 ng sang bn phi nhp cho sil 2 hoc 3 (nu 2 y th nhp vo 3 v ngc li). iu kin khi ng h thng:
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Hnh 7.6: S cng ngh ca h thng cp liu, nhin, phn loi, phn phi xi mng Cc sil cha y. Du thu lc cp cho my nghin p sut. Cc bng chuyn khng b trt ai. Sau khi chn sil v kim tra cc iu kin an ton cho vic khi ng, h thng phi c khi ng theo trnh t nh sau: MK2, MK3 MK1 M van Qut ht (lc bi) Gu ti Phn ly ng M van du My nghin BTC BTTG BTCL, BTPG, BTTC. T yu cu cng nh nh trn ta tin hnh thit k chng trnh nh sau: 1. V gin thi gian hoc vit lu thut ton. 2. Tnh chn PLC v module m rng. 3. Phn cng I/O. 4. Quy nh cc nh gim st li, khi ng hoc dng t xa. 5. Tin hnh dch sang ngn ng ca PLC t gin thi gian hoc vit lu thut ton. 7.4. ng dng PLC trong mng thu nhn d liu t bin tn: iu khin bin tn thng qua PLC ngi ta thng dng cc cch sau:
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1. Dng cc du vo/ra s ca PLC, nhng ch thc hin c nhng chc nng n gin nh dng, khi ng, o chiu cn vic thay i thi gian khi ng hc dng, t li tc ...khng th thc hin c ch ny. 2. thay i gi tr setpoint trong iu khin phn hi, mi bin tn mt i 1 u vo analog v 1 u ra analog . Ngoi ra cn phi dng cc du vo/ra s iu khin bin tn. 3. iu khin bin tn qua mng Profibus, i vi loi MM3, MM4 ca Siemens c sn giao din Profibus trn RS458 Port. Nhng i vi nhng ng dng nh th vic thit k mt mng Profibus s a gi thnh ln cao, do khng kinh t. 4. Dng Port 0 ca PLC kt ni ti cc Port ca bin tn, 1 PLC c th u khin ti a 1 mng gm 31 bin tn. Mng ny gi l mng USS. Dng kt ni l im-im. Ta c th iu khin ton b cc chc nng ca bin tn thng qua mng ny, ngoi ra cn cn c th gim st c dng in, in p, tc , hng quay...da vo cc vng nh m PLC dnh ring cho mi bin tn. Chi ph cho mng ny l thp v ti u nht cho cc ng dng nh v va.
5. Chun iu khin mng bin tn (giao thc USS)
Sau y l phng php iu khin mng bin tn dng PLC qua giao thc USS: 7.4.1. iu kin s dng giao thc USS: Th vin lnh ca STEP 7 - Micro/Win cung cp 14 chng trnh con, 3 th tc ngt v mt tp lnh (gm 8 lnh) h tr cho giao thc USS. + Giao thc USS s dng Cng 0 (Port 0) cho truyn thng USS. S dng lnh USS_INIT la chn Port 0 cho c USS hoc PPI. Sau khi la chn Port 0 cho truyn thng vi chun USS, khng c s dng Port 0 cho bt k mc ch no khc. pht trin cc chng trnh ng dng s dng giao thc USS, nn s dng CPU 226, CPU 226XM hoc module EM 277 PROFIBUS-DP kt ni n card PROFIBUS-CP my tnh. Cng truyn thng th hai cc loi CPU ny s cho php STEP 7 - Micro/Win gim st c ng dng trong khi s dng giao thc USS. + Cc lnh USS tc ng n tt c cc bit SM vi truyn thng Freeport qua Port 0. + Cc lnh USS s dng 14 chng trnh con v 3 th tc ngt. + Cc gi tr ca cc lnh USS yu cu 400 byte ca min nh V. a ch bt u c n nh bi ngi s dng v phn cn li dnh cho cc gi tr khc. + Vi lnh trong lnh USS yu cu mt b m truyn thng 16 byte. Chng hn vi mt tham s cho lnh, cn phi cung cp mt a ch bt u trong min nh V ca b m ny. + Khi thc hin cc php tnh, cc lnh USS s dng thanh ghi AC0 n AC3. Cng c th s dng cc thanh ghi trong chng trnh; tuy nhin, gi tr trong cc thanh ghi s b thay i bi lnh USS.
+ Cc lnh USS s lm tng b nh ca chng trnh ln n 3450 byte. Tu thuc vo loi lnh USS m dung lng ca b nh c th tng t 2150 byte n 3450 byte. + Cc lnh USS khng th s dng trong chng trnh con.
Hnh 7.7: Kt ni PLC v bin tn theo giao thc USS
* Lu : thay i phng thc truyn thng ca Port 0 tr li PPI truyn thng vi STEP 7 - Micro/Win, cn phi s dng lnh USS _ INIT khc n nh li phng thc cho Port 0. Cng c th nh li phng thc bng cch chuyn S7-200 sang ch STOP, vic ny s Reset cc tham s ca Port 0. 7.4.2. Thi gian yu cu cho vic truyn thng vi bin tn: Truyn thng vi cc MicroMaster (MM) khng ng b vi vng qut ca S7200. S7-200 hon thnh vi vng qut trc khi mt MM hon thnh vic truyn thng. Cc yu t gip xc nh thi gian yu cu: s MM c trong mng, tc baud, v thi gian vng qut ca S7-200. C vi loi yu cu thi gian tr di hn khi s dng cc lnh truy xut thng s. Thi gian yu cu cho vic truy nhp cc tham s tu thuc loi thit b v tham s c truy nhp. Sau khi lnh USS _ INIT n nh Port 0 cho giao thc USS, S7-200 s thc hin hi vng tt c cc bin tn trong nhng khong thi gian theo di y. Bng 7.1: Thi gian yu cu cho truyn thng vi MM Tc Thi gian hi vng gia cc bin tn 1200 240 ms (max) 2400 130 ms (max) 4800 75 ms (max) 9600 50 ms (max) 19200 35 ms (max) 38400 30 ms (max) 57600 25 ms (max) 115200 25 ms (max)
7.4.3. S dng cc lnh USS: s dng cc lnh trong chng trnh iu khin S7-200, cn phi theo cc bc sau: 1. a lnh USS _INIT vo trong chng trnh v thc hin lnh ny cho mi mt vng qut. C th s dng lnh ny thit lp cc gi tr hoc thay i cc thng s truyn thng. Khi s dng lnh USS _ INIT s c vi n chng trnh con v th tc ngt c t ng thm vo trong chng trnh. 2. Ch thc hin mt lnh USS _ INIT trong chng trnh cho mi Drive. C th a vo nhiu lnh USS_RPM_x hay USS_WPM_x khi c yu cu, nhng ch mt lnh c lm vic trong mt thi im. 3. Cp pht vng nh V cho th vin lnh bng cch kch chut phi (ly t menu) trn Program Block trong cy th mc. 4. Ci t cc tham s v a ch v tc c s dng trong chng trnh cho drive. 5. Dng cp kt ni truyn thng t S7-200 n cc drive. * Ch : Cc thit b kt ni vi in th khc nhau c th l nguyn nhn sinh ra dng in khng mong mun trong cp kt ni. Dng in ny l nguyn nhn dn n cc li truyn thng hoc lm hng thit b. Cn phi chc chn rng cc thit b c kt ni vi cp u c cng dng in nh mc hoc c cch ly ngn nga dng in khng mong mun. 7.4.4. Cc lnh trong giao thc USS: 4.1. Lnh USS- INIT: Cu trc lnh:
Lnh USS_ INIT c s dng cho php thit lp hoc khng cho php truyn thng vi cc MM. Trc khi bt k mt lnh USS no khc c s dng, lnh USS_INIT phi c thc hin trc m khng c xy ra li no. Khi lnh thc hin xong v bit Done c set ln ngay lp tc trc khi thc hin lnh k tip. Lnh ny c thc hin mi vng qut khi u vo EN c tc ng.
Thc hin lnh USS_INIT ch mt ln cho mi s thay i trng thi truyn thng. S dng lnh chuyn i dng to mt xung u vo EN. Khi thay i gi tr ban u cc tham s s thc hin mt lnh USS_ INIT mi. Gi tr cho u vo Mode la chn giao thc truyn thng: u vo c gi tr 010 s n nh Port 0 dng cho giao thc USS v ch cho php lm vic theo giao thc ny. Nu u vo c gi tr 000 s n nh Port 0 dng cho giao thc PPI v khng cho php lm vic theo giao thc USS. Tc truyn c t cc gi tr: 1200, 2400, 4800, 9600, 19200, 38400, 57600 v 115200 (baud). u vo Active dng xc nh a ch ca Drive. Ch h tr s a ch Drive t 0 n 30. Cc tham s s dng trong lnh USS_INIT. Bng 7.2: Kiu d liu v ton hng ca cc u vo/ra trong lnh USS_INIT u vo/ra Mode Baud,Activ e Done Error Kiu liu Byte Dword Bool Byte d Ton hng VB,IB,QB,MB,SB,SMB,LB,AC,Constant,*VD,*AC, *LD VD,ID,QD,MD,SD,SMD,LD,Constant,AC, *VD,*AC,*LD I, Q, M, S, SM, T, C, V, L VB, IB, QB, MB, SB, SMB, LB, AC,*VD,*AC,*LD
Khi lnh USS_INIT kt thc, u ra Done c set ln. u ra Error (kiu byte) cha kt qu thc hin lnh. 4.2. Lnh USS - CTRL: Cu trc lnh:
Lnh USS_CTRL c s dng iu khin hot ng ca bin tn. Lnh ny c a vo b m truyn thng, t y, lnh c gi ti a ch ca bin tn, nu a ch c xc nh tham s Active trong lnh USS _ INIT.
Ch mt lnh USS _CTRL c n nh cho mi Drive. - Bit EN phi c set ln mi cho php lnh USS_CTRL thc hin. Lnh ny lun mc cao (mc cho php). - RUN (RUN/STOP) cho thy drive l on hoc off. Khi bit RUN mc cao, MM nhn lnh khi ng tc danh nh v theo chiu chn trc. Drive lm vic, cc iu kin phi theo ng nh sau: + a ch Drive phi c la chn t u vo Active trong lnh USS_INIT. + u vo OFF2 v OFF3 phi c set 0. + Cc u ra Fault v Inhibit phi l 0. - Khi u vo RUN l OFF , mt lnh c chuyn n MM iu khin gim tc ng c xung cho n khi ng c dng. - u vo OFF2 c s dng cho php iu khin MM dng vi tc chm. - u vo OFF3 c s dng cho php iu khin MM dng vi tc nhanh. - Bit Resp_R bo nhn phn hi t Drive. Tt c cc hot ng ca MM c thm d thng tin trng thi. Ti mi thi im, S7-200 nhn mt phn hi t Drive, bit Resp_R c set ln v tt c cc gi tr tip theo c cp nht. - Bit F_ACK (Fault Acknowledge) c s dng nhn bit li t Drive. Cc li ca Drive c xo khi F_ACK chuyn t 0 ln 1. - Bit Dir (Direction) xc nh hng quay m MM s iu khin. - u vo Drive (Drive address) l a ch ca MM m lnh USS_ CTRL iu khin ti. a ch hp l: 0 n 31. - u vo Type (Drive type) dng la chn kiu MM. i vi th h MM3 (hoc sm hn) u vo Type c t 0; cn i vi MM4 gi tr t l 1. - Speed-SP (speed setpoint): l tc cn t theo t l phn trm. Cc gi tr m s lm ng c quay theo chiu ngc li. Phm vi t: -200% 200%. - Error: l mt byte li cha kt qu mi nht ca yu cu truyn thng n Drive. - Status: l mt word th hin gi tr phn hi t bin tn. - Speed l tc ng c theo t l phn trm. Phm vi: -200% n 200%. - D-Dir: cho bit hng quay. - Inhibit: cho bit tnh trng ca the inhibit bit on the drive (0 - not inhibit, 1inhibit ). xo bit inhibit ny, bit Fault phi tr v off, v cc u vo RUN, OFF2, OFF3 cng phi tr v off. - Fault: cho bit tnh trng ca bit li ( 0 - khng c li, 1- li ). Drive s hin th m li. xo bit Fault, cn phi cha li xy ra li v set bit F_ACK.
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Bng 7.3: Kiu d liu v ton hng ca cc u vo/ra trong lnh USS _CTRL u vo/ra Kiu d liu Ton hng RUN, OFF2, OFF3, BOOL I, Q, M, S, SM, T, C, V, C, L, Power Flow F_ACK, DIR Resp_R, Run_EN, BOOL I, Q, M, S, SM, T, C, V, C, L D_Dir, Inhibit, Fault VB, IB, QB, MB, SB, SMB, LB, AC, *VD, Drive, Type BYTE *AC, *LD, Constant VB, IB, QB, MB, SB, SMB, LB, AC, *VD, Error BYTE *AC, *LD VW, T, C, IW, QW, SW, MW, SMW, LW, Status WORD AC, AQW, *VD, *AC, *LD VD, ID, QD, MD, SMD, LD, AC, *VD, Speed_SP REAL *AC, *LD, Constant VD, ID, QD, MD, SMD, LD, AC, *VD, Speed REAL *AC, *LD 4.3. Lnh USS_RPM_x: Cu trc lnh:
C 3 lnh c cho giao thc USS. USS_RPM_W: l lnh c mt tham s Word. USS_RPM_D: l lnh c mt tham s Douple Word. USS_RPM_R: l lnh c mt tham s thc. Ch mt lnh c (USS_RPM_x) hoc ghi (USS_WPM_x) c th lm vic ti mt thi im. Lnh USS_RPM_x hon thnh vic thc hin lnh khi MM nhn bit cch thc ca lnh, hoc khi mt li trng thi c thng bo. Vng qut vn tip tc thc hin trong khi qu trnh ch s phn hi. - Bit EN phi c set cho php truyn i cc yu cu, v nn gi li trng thi cho n khi bit Done c set ln - tn hiu hon thnh qu trnh (V d:
mt lnh USS_RPM_x truyn n MM mi vng qut khi u vo XMT _REQ l on). Do , u vo XMT-REQ nn c kch xung khi nhn c sn xung ln truyn mt yu cu cho mi chuyn tip dng ca u vo EN. Bng 7.4: Kiu d liu v ton hng ca cc u vo/ra trong lnh USS_RPM_x u vo/ra Kiu d liu Ton h?ng XMT-REQ BOOL I, Q, M, SM, T, C, V, L Drive BYTE VB, IB, QB, MB, SB, SMB, LB, AC, *VD, *AC, *LD, Constant Param, WORD VW, IW, QW, MW, SW, SMW, LW, T, C, Index AC, AIW, *VD, *AC, *LD, Constant DB-Ptr DWORD &VB Value WORD VW, IW, QW, MW, SW, SMW, LW, T, C, AC, AQW, *VD, *AC, *LD DWORD,REAL VD, ID, QD, MD, SD, SMD, LD, *VD, *AC Done BOOL I, Q, M, S, SM, T, C, V, L Error BYTE VB, IB, QB, MB, SB, SMB, LB, AC, *VD, *AC, *LD u vo Drive l a ch ca MM m lnh USS_RPM_x c chuyn ti. a ch hp l l 0 n 31. - Param l s tham s (l gi tr cn c t MM). - Index l con tr ch vo gi tr c. - Value l gi tr ca thng s phn hi. - u vo DB_Ptr c cung cp bi a ch ca b m 16 byte. Trong lnh USS _RPM_x, b m ny dng cha kt qu ca lnh a n t MM. Khi lnh USS_RPM_x hon tt, u ra Done c set ln v u ra Error (kiu byte) v u ra Value cha cc kt qu ca vic thc hin lnh. u ra Error v Value s khng hp l cho n khi u ra Done c set ln. 4.4. Lnh USS _WPM _x: Cu trc lnh: -
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C 3 lnh ghi cho giao thc USS: USS_WPM_W: l lnh ghi mt tham s Word. USS_WPM_D: l lnh ghi mt tham s Double Word. USS _WPM_R: l lnh ghi mt tham s thc. Ch mt lnh c (USS_WPM _x) hoc ghi (USS_WPM_x) c th lm vic ti mt thi im. Lnh USS_WPM_x hon thnh vic thc hin lnh khi MM nhn bit cch thc ca lnh, hoc khi mt li trng thi c thng bo.Vng qut vn tip tc thc hin trong khi qu trnh ch s phn hi. - Bit EN phi c set cho php truyn i cc yu cu, v nn gi li trng thi cho n khi bit Done c set ln - tn hiu hon thnh qu trnh ( V d: mt lnh USS-WPM-x truyn n MM mi vng qut khi u vo XMT_REQ l on). Do , u vo XMT-REQ nn c kch xung khi nhn c sn xung ln truyn mt yu cu cho mi chuyn tip dng ca u vo EN. - u vo Drive l a ch ca MM m lnh USS_WPM_x c chuyn ti. a ch hp l l 0 n 31. - Param l s tham s. - Index l bin ch vo gi tr c. - Value l gi tr ca thng s cn ghi n b nh RAM trong bin tn. i vi MM3 cng c th ghi gi tr ny vo EEPROM, bng cch ci t tham s P971. - u vo DB-Ptr c cung cp bi a ch ca b m 16 byte. Trong lnh USS _WPM_x, b m ny dng cha kt qu ca lnh a n t MM. Khi lnh USS_WPM_x hon tt, u ra Done c set ln v u ra Error (kiu byte) cha cc kt qu ca vic thc hin lnh. Khi u vo EEPROM c set ln, lnh s ghi vo c b nh RAM v EEPROM ca bin tn. Khi u vo EEPROM khng c set th lnh ny s ch ghi
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vo b nh RAM v MM3 khng h tr chc nng ny, do , cn phi chc chn rng u vo khng c set lnh ch lm vic vi MM3. Bng 7.5: Kiu d liu v ton hng ca cc u vo/ra trong lnh USS_WPM_x u vo/ra Kiu d liu Ton hng XMT-REQ BOOL I, Q, M, SM, T, C, V, L EEPROM BOOL I, Q, M, S, SM, T, C, V, L Drive BYTE VB, IB, QB, MB, SB, SMB, LB, AC, *VD, *AC, *LD, Constant Param, Index WORD VW, IW, QW, MW, SW, SMW, LW, T, C, AC, AIW, *VD, *AC, *LD, Constant DB-Ptr DWORD &VB Value WORD VW, IW, QW, MW, SW, SMW, LW, T, C, AC, AQW, *VD, *AC, *LD DWORD,REAL VD, ID, QD, MD, SD, SMD, LD, *VD, *AC Done BOOL I, Q, M, S, SM, T, C, V, L Error BYTE VB, IB, QB, MB, SB, SMB, LB, AC, *VD, *AC, *LD 7.4.5. Kt ni v ci t MicroMaster Series 3 (MM3): 5.1. Kt ni MM3: C th s dng cp chun PROFIBUS v cc u ni kt ni S7-200 vi MicroMaster Series 3. * Ch : Cc thit b kt ni vi in th khc nhau c th s l nguyn nhn dn ti vic pht sinh dng in khng mong mun trong cp kt ni. Dng in ny l nguyn nhn dn ti cc li truyn thng hoc lm hng thit b. Cn phi chc chn rng tt c cc thit b c kt ni vo mt cp truyn thng u c cng dng in nh mc hoc c cch ly ngn nga dng in pht sinh khng mong mun. 5.2. Ci t MM3: Trc khi kt ni n S7-200, cn phi chc chn rng c cc thng s ca MM. S dng cc keypad c sn trn bin tn ci t nh sau: 1. Reset bin tn ci t li (tu chn). Nhn phm P: hin th P000. Nhn phm mi tn ln hoc xung cho n khi hin th P944. Nhn P nhp thng s: P944 = 1 2. Cho php truy xut c/ghi tt c cc thng s. Nhn P, nhn phm mi tn ln hoc xung cho n khi hin th P009. Nhn P nhp: P009 = 3
3. Kim tra li vic ci t thng s ng c cho bin tn. Vic ci t ny phi theo loi ng c c s dng. Nhn P, nhn phm mi tn ln hoc xung cho n khi hin th thng s cn ci t. Nhn P nhp: P081 = Tn s nh mc ca ng c (Hz). P082 = Tc nh mc ca ng c (RPM). P083 = Dng in nh mc ca ng c (A). P084 = in p nh mc ca ng c (V). P085 = Cng sut nh mc ca ng c (kW/HP). 4. t ch iu khin ti ch hay t xa ( Local/Remove ). Nhn P, nhn phm mi tn ln hoc xung cho n khi hin th P910. Nhn P nhp: P910 = 1 ( Remove ) 5. nh gi tr tc Baud cho chun RS-485. Nhn P, nhn phm mi tn ln hoc xung cho n khi hin th P092. Nhn P nhp, nhn phm mi tn hin th ng gi tr tc Baud cho chun RS-485: P092 3 ( 1200 baud ) 4 ( 2400 baud ) 5 ( 4800 baud ) 6 ( 9600 baud - chun ) 7 ( 19200 baud ) 6. Nhp a ch Slave. Mi drive (ti a 31) c th vn hnh qua mt bus. Nhn P, nhn phm mi tn ln hoc xung cho n khi hin th P091. Nhn P nhp. Nhn phm mi tn hin th a ch mong mun, nhn P nhp: P091 = 0 31 7. nh thi gian tng tc (tu chn). Vi thi gian t ny tc ng c s tng dn cho n khi t max. Nhn P, nhn phm mi tn ln hoc xung cho n khi hin th P002. Nhn P nhp: P002 = 0 650.00 8. nh thi gian gim tc (tu chn). Sau khong thi gian ny ng c s gim n tc cho n khi dng. Nhn P, nhn phm mi tn ln hoc xung cho n khi hin th P003. Nhn P nhp: P003 = 0 650.00 9. Serial Link Time-out. y l khong thi gian ln nht cho php gia hai ln truy nhp d liu. Thi gian ny c tnh sau khi mt d liu c nhn. Nu mt d liu ca bc in khng c nhn, bin tn s ngt v hin th m li F008. t gi tr 0 ngng vic iu khin. Nhn P, nhn phm mi tn ln hoc xung cho n khi hin th P093. Nhn P nhp. Nhn phm mi tn nhp gi tr mong mun: P093 = 0 ( 240 (thi gian c tnh bng giy)
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10. Serial Link Nominal System Setpoint. Gi tr ny c th thay i, nhng phi tng ng 50Hz hoc 60Hz, c nh ngha tng ng vi gi 100% gi tr cho PV hoc SP. Nhn P, nhn phm mi tn ln hoc xung cho n khi hin th P094. Nhn P nhp. Nhn cc phm mi tn chn gi tr mong mun: P094 = 0 400.00 11. Tng thch USS (tu chn). Nhn P, nhn phm mi tn ln hoc xung cho n khi hin th P095. Nhn P nhp: P095 = 0 phn gii 0,1Hz phn gii 0,01Hz 12. EEPROM iu khin (tu chn). Nhn P, nhn phm mi tn ln hoc xung cho n khi hin th P971. Nhn P nhp: P971 = 0: Thay i cc thng s ci t (bao gm c P971) b mt khi mt ngun. 1: Tham s ci t c lu li trong sut thi gian mt ngun. 13: Hin th vn hnh. Nhn P thot. 7.4.6. Kt ni v ci t MicroMaster Series 4 (MM4): 1) Kt ni MM4: kt ni vi MM4, ta s dng cp RS-485 (ni trc tip S7-200 vi MM4). Ngoi ra, cn c th dng cp chun PROFIBUS v cc u ni kt ni. * Ch : Cc thit b kt ni vi in th khc nhau c th s l nguyn nhn dn ti vic pht sinh dng in khng mong mun chy trong cp kt ni. Dng in ny l nguyn nhn dn ti cc li truyn thng hoc lm hng thit b. Cn phi chc chn rng tt c cc thit b c kt ni vo mt cp truyn thng u c cng dng in nh mc hoc c cch ly ngn nga dng in pht sinh khng mong mun. Nu S7-200 l im nt cui trong mng, hoc nu kt ni l im - im (point-to-point), cn phi s dng u A1 v B1 (khng phi A2 v B2) ca u cm. 2) Ci t MM4: Trc khi kt ni n S7-200, cn phi chc chn rng c cc thng s ca MM. S dng cc keypad c sn trn bin tn ci t nh sau: 1. Reset ci t li cho h thng (tu chn): P0010 = 30 P0970 = 1 Nu b qua bc ny, cc thng s tip theo s c set theo cc gi tr: USS PZD length: P2012 Index0 = 2 USS PKW length: P2013 Index0 = 127 2. Cho php truy nhp c/ghi cc thng s: P0003 = 3 3. Kim tra ci dt thng s ng c cho bin tn:
P0304 = in p ng c (V) P0305 = dng in ng c (A) P0307 = cng sut ng c (W) P0310 = tn s ng c (Hz) P0311 = tc ng c (RPM) Cc thng s ci t ny c th thay i tu thuc vo loi ng c c s dng. Trc khi ci t cc thng s P0304, P0305, P0307, P0310, P0311, cn thit phi set thng s P0010 ln 1 trc. Sau khi kt thc vic ci t, t thng s P0010 v 0. Cc thng s P0304, P0305, P0307, P0310, P0311 ch c th thay i trong ch quick commissioning. 4. nh ch iu khin t xa hay ti ch (Local/Remove): P0700 Index0 = 5 5. t la chn tn s setpoint cho USS cng COM P1000 Index0 = 5 6. nh thi gian tng tc (tu chn), l thi gian ng c tng tc n tc max: P1120 = 0 650,00 (s). 7. nh thi gian gim tc (tu chn), l thi gian ng c gim dn tc cho n khi dng: P1121 = 0 650,00 (s). 8. t tn s tham chiu: P2000 = 1 n 650 Hz 9. Tiu chun ho USS: P2009 Index0 = 0 10. t gi tr tc baud cho chun RS-485: P2010 Index0 = 4 (2400 baud) 5 (4800 baud) 6 (9600 baud) 7 (19200 baud) 8 (38400 baud) 9 (57600 baud) 10 (115200 baud) 11. Nhp a ch Slave: P2011 Index0 = 0 n 31 12. t thi gian trng gia hai bc in, y l khong thi gian cho php gia hai ln truy nhp d liu bc in. N c s dng ct bin tn trong khong thi gian xy ra li truyn thng. Thi gian ny tnh t lc sau khi mt d liu hp l ca bc in c nhn. Nu c mt d liu khng c nhn, bin tn s ngt v hin th m li F0070. t gi tr 0 ngng iu khin.
P2014 Index0 = 0 n 65,535 ms 13. Chuyn d liu t RAM n EEPROM: P0971 = 1 (bt u chuyn). Lu ci t s thay i cc thng s vo EEPROM. 7.4.7. Chng trnh t PLC iu khin v thu thp cc thng s t mng bin tn:
Network 1: Chng trnh ci t tham s v truyn thng vi bin tn Clanhke. // 1_chn USS Protocol // 9600_Tc truyn gia PLC v bin tn // 16#00000001_a ch ca bin tn // MB3_Cha kt qu ca vic thc hin lnh (xem bng m li) // M0.3_bit bo trng thi lm vic ca lnh USS_INIT
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Chng 7: Nhng ng dng ca PLC Network 2: Chng trnh iu khin bin tn.
// V500.0_Khi ng hoc dng ng c . // V500.1=1 _Dng ng c vi thi gian lu hn trng hp OFF3. //F_ACKN Li ca bin tn s c xo khi tn hiu a n t chn ny tch cc. //SM0.0_lun bng 0 c ngha l ng c lun quay thun. //Drive = 0, a ch ca bin tn trong mng. //Type = 0, kiu bin tn l MM3, nu bng 1 th tng ng vi MM4. // VD88_gi tr setpoint tc ca ng c (nm trong gii hn t 200%+200%) //V501.1_bo nhn c tn hiu phn hi (ch set ln trong 1 vng qut sau cc gi tr tip theo s c cp nht). //VB617_bo kt qu mi nht ca vic truyn thng ti Drive. //VW618_thanh ghi trng thi (c hai loi tng ng cho MM3, MM4). //MD620_cha gi tr thc ca tc ng c(-200%+200%). //V601.4_bo trng thi lm vic hin ti ca ng c (0-Stop, 1-Run). //V601.5 cho bit hng quay. Network 3: //DB_Ptr_dnh b m 16 byte cho vic ghi cc d liu t PLC n bin tn, ghi c gi tr ti y ta phi dng bin con tr &VB630. //Param=009_cho php c/ghi tt c cc gi tr t bin tn.
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Chng trnh cng c tin hnh tng t i vi n bin tn trong mng USS, vi n = (0 31), t cc b m, t kp, t n, byte v bit trng thi chng ta c th dng cc phn mm khc nh VisualBasic, Delphi... thit k giao din, to lp c s d liu, nht k, cnh bo c th hnh thnh mng SCADA mini iu khin v gim st h thng. Ngoi mng bin tn dng PLC iu khin, chng ta cng c th tch hp mng bao gm nhiu PLC v bin tn c s iu khin v gim st t PC. lm iu ny rt kh khn nu nh khng c s h tr ca gi phn mm Microcomputing ca Siemens. Phn mm ny khi c ci t, n s c cc tool, file .ocx, .dll rt hu ch cho vic nh ngha ng truyn, qut v cp nht theo s kin, to lp giao din, truy xut d liu t PLC...Phn mm ny ch h tr cho VisualBasic. 7.5. ng dng PLC trong h thng iu khin gim st: Cc bc tin hnh thit lp h thng iu khin v gim st t PC: + Cp trng: 1. Thit k phn cng da vo yu cu ca qu trnh cng ngh. 2. Thut ton iu khin cho mi trm trong mng. 3. Quy nh a ch ca trm, giao thc truyn thng, thut ton truyn thng gia cc trm trong mng, quy nh trm master/slave nu l trong mng PPI; cc trm l ngang cp nu l mng Freeport (giao thc ny gi l iu khin cng t do_mi trm u l trm ch v cng u l trm t). y l vic rt cn thit trong qu trnh tch hp mng. 4. Lp bng quy nh cc a ch, m hiu, li... cn thit cho vic truyn thng. 5. Vit chng trnh iu khin tng ng cho tng trm. + Cp iu khin v gim st: 1. Ci t cc phn mm h tr nh: Prodave, microcomputing... 2. Thit kt giao din HMI trn cc mm VisualBiasic, Delphi... 3. Lp trnh hng i tng tng ng vi tng thit b trn s cng ngh kt hp vi bng quy nh c tin hnh bc 4. 4. Thit lp c s d liu, nht k vn hnh, cnh bo, bo co, v th, truy xut n my in nu cn thit. 5. Kim tra ton b v tin hnh th tc kt ni.
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Chng 8: La chn TB, kim tra v bo tr HT
CHNG 8 LA CHN, LP T, KIM TRA V BO TR H THNG

8.1. Xem xt s kh thi: Kho st h thng: ti liu ny cp ti PLC ca mt s hng cng nghip ln trn th gii c bit l h CPU S7-200 ca Siemens. c im ca loi PLC ny l b nh chng trnh v d liu b, kh nng tnh ton, x l vi tc khng cao, h tr cc ngt (thi gian, vo ra, truyn thng) t. S module m rng ti a ch c 7 module, s u vo/ra tng cng xem bng chi tit trch t catalogue ca hng. S7-200 gm c series c v series mi: Series c 21x bao gm cc loi sau: CPU 210, 212, 214, 215-2DP, 216 loi ny hin nay khng cn c sn xut na, ch sn xut theo n t hng ca mt s nh my phc v cho mc ch thay th. Series mi 22x bao gm cc loi sau: CPU 221, 222, 224, 224XP, 226, 226XM hin ti hng ang sn xut loi ny. Do trong ti liu ny ch yu cp n cc loi CPU Series 22x. Bng 8.1: Quy nh ngun dng cung cp cho cc module
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Bng 8.2: Cu hnh I/O max ca S7-200 series CPU 22x
T bng cu hnh trn cho thy CPU S7-200 ch thch hp cho nhng ng dng nh v va. Da vo quy m ca h thng, nu h thng sn xut theo dy chuyn th c th phn dy chuyn ra lm nhiu cm da trn c im cng ngh. Sao cho mi
cm lm vic tng i c lp nhau, khong cch dy ni n cm bin v c cu chp hnh khng vt qu chiu di quy nh tng ng vi tng loi, s I/O hp l nm trong khong m cc loi PLC nh cho php. 8.2. Trnh t thit k h thng PLC: Trnh t thit k h thng thc hin qua cc bc sau: 1. T mi cm c chia trong phn xem xt s kh thi ca h thng tin hnh phn tch chi tit quy trnh cng ngh, h truyn ng v trang b in. M t chi tit s lin ng gia cc phn t ca h thng trn c s thnh lp gin thi gian hay lu thut ton c bit phi ch n cc li c th xy ra trong qu trnh my ang hot ng bnh thng. 2. Tnh chn thit b cm bin v c cu chp hnh: Nu u vo ch c chc nng logic 0&1 th tnh chn cho u vo s. Nu c chc nng phn tch tn hiu phc v cho vic gim st (nhit , m, mc, lu lng, khi lng, lc tc dng) hoc iu khin c phn hi th phi tnh chn cho u vo analog. Nu iu chnh ng c theo phng php PID loop th phi tnh chn cho u ra analog. C cu chp hnh l Piton thu lc hay kh nn th phi tnh chn van thu hoc kh tng ng. iu khin cc van ny phi tnh chn cho u ra s, ngoi tr cc van tit lu hoc van phn trm iu khin thng qua ng c th c th tnh chn bin tn hoc b iu chnh tng ng vi ng c. Ngoi ra c th dng PID loop iu khin cc van , lc phi tnh chn cho du ra analog. C cu chp hnh l ng c phi xem xt c cn thit phi iu khin tc khng. Nu c th phi tnh chn bin tn, b iu chnh in p nu l ng c mt chiu hay module iu khin v tr nu l ng c bc. Xem xt c cn thit phi kt ni bin tn vi PLC khng? Nu ch n thun l vic khi ng v dng ng c th khng nht thit phi kt ni qua cng truyn thng m ch cn dng cc u ra s l . Nu cn thit gim st dng in, in p, nhit hoc t li gi tr tc th phi kt ni bin tn vi PLC thng qua cng truyn thng theo giao thc ring ca hng. Hin hai giao thc c s dng thng dng nht i vi bin tn MicroMaster 430, 440 l USS protocol v Mudbus protocol. Tnh chn cng tc, nt n trn panel iu khin bng tay. Ngoi ra cn phi xem xt dng ra ca c cu chp hnh: Ich > 1.5A i vi PLC loi DC/DC/RLY; Ich > 0.2A i vi loi DC/DC/DC th nht thit phi thng qua h r le trung gian, Transistor, Tiristor hay Triac. 3. Tnh chn PLC: Cc ng dng s dng u ra pht xung nhanh th nht thit phi chn PLC u ra Transistor (loi DC/DC/DC).
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Nu khng s dng cho cc ng dng c u ra pht xung nhanh th nn chn PLC loi u ra l rle (loi DC/DC/RLY). V loi ny n gin hn trong vic giao tip vi c cu chp hnh. Tnh tng s: - u vo s - u ra s - u vo analog - u ra analog Tnh chn module Digital. Tnh chn muodule analog. (da vo bng 1)
Xem xt nu s dng cng truyn thng vo nhng mc ch nh iu khin bin tn, kt ni panel, OPs (Operation), PC hay mng th nn s dng PLC c hai cng truyn thng PPI nh CPU 2224XP, 226, 226XM. 4. Nu h thng lm vic dy chuyn th phi thit k mng kt ni cc PLC li vi nhau. Quy trnh thit k v chy mng s nu r hn mn hc mng truyn thng cng nghip, trong gio trnh ny ch gii hn trn 1 PLC. 8.3. Thit k chng trnh trn PLC: Trnh t thit k chng trnh ca PLC thc hin theo cc bc sau y: 1. Trn c s gin thi gian hay lu thut ton da theo bi ton cng ngh phn tch phn 8.2. Tin hnh phn chia a ch vo/ra, thit lp nhng vng nh phc v cho qu trnh x l d liu. Lit k cc b m, b nh thi cn thit phi s dng trong chng trnh, cc bit, byte trong vng nh c bit. Lit k cc chng trnh con, chng trnh x l ngt... 2. Sau tin hnh bin dch t gin thi gian hay lu thut ton sang ngn ng ca PLC. 3. C th dng cc cng tc v n Led hay dng phn mm PLCsim cho S7-200 chy th chng trnh ch offline. Trn c s xem xt, nh gi mc ti u ca chng trnh. Chng trnh cn phi c vit ngn gn (nht l cc chng trnh x l ngt) v tin cy, c bit cn phi c cc chng trnh x l s c. 8.4. T chc b tr phn cng h thng: H thng PLC bao gm: Module ngun, module CPU, Module m rng tt c u c lp trn gi theo chn DIN nh trong hnh v 1 v 2.
Hnh 8.1: Gi lp t PLC theo chun DIN
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hai mt giao tip vi dy ni ca cm bin v c cu chp hnh, khng gian ti
Hnh 8.2: Khong cch lp t cho php ca PLC trong t in thu phi 25mm. C th lp t cc Rack theo chiu ng hoc ngang. S rack khng vt qu hai rack. Khong cch gia hai mt trc v sau t khng c nh hn 75mm. PLC phi t trong khng gian tng i thong, t bi. Trong cc t in thng phi c qut thng gi.
Hnh 8.3: M hnh ca t in c lp t PLC
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Hnh 8.4: M hnh ca t in c lp t PLC v bin tn Trn y l m hnh ca vi t in lm v d chng ta c th tham kho cch b tr phn cng ca h thng. 8.5. Chy th chng trnh: y l qu trnh chy tht trn my ch online. Trc khi chy ch ny phi thc hin cc bc sau: 1. Kim tra mc tip xc dy ni cng nh a ch u vo ca cng tc, nt nhn, cng tc hnh trnh da vo cc n trng thi trn u vo ca PLC. Dng ng h o c cc tn hiu tng t. 2. Kim tra dy ni n cc c cu chp hnh ln cui trc khi cho chy th nghim. Xem xt chc chn u ni ng theo s hay cha. Kim tra in p trn cc c cu chp hnh xem th t cha. 3. C th vit tng on chng trnh nh kim tra trng thi hot ng ca tng u ra, nht l i vi cc c cu thu lc v kh nn. Bc ny gi l bc chy n ng. Thng thc hin cho nhng my mc c cng ngh tng i phc tp. Cc my n gin c th b qua bc ny. a cc c cu v tr li trng thi ban u (ng vi quy trnh thit k theo gin thi gian hay lu thut ton). 4. Np chng trnh vo PLC v chy lin ng ton b h thng. Xem xt, nh gi mc tin cy ca chng trnh nu cha tt th c th hiu chnh thm mt vi ln na.
8.6. Lp ti liu cho h thng: Lp ti liu theo cc gi sau: 1. Ti liu chung cho h thng nh: Ti liu v phn cng v phn mm ca PLC, ng c, bin tn 2. Ti liu lp t: Cc bn v, ti liu hng dn lp t cng nh ti liu v cch ci t phn mm v chy th nghim h thng. 3. Ti liu vn hnh: Hng dn cc quy trnh vn hnh my. 4. Ti liu bo dng.
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cng chi tit mn hc iu khin logic
B mn t ng o Lng Khoa in
CNG CHI TIT MN HC IU KHIN LOGIC

M s : S n v hc trnh: 04(LT:3.5;TN:0.5) Ging vin ph trch: ThS. Lm Tng c ThS. Khng Cng Minh KS. Nguyn Mnh H
M T MN HC Mn hc iu khin logic trnh by cc kin thc c bn h thng iu khin logic. Cc vn c cp n iu khin logic, cc phng php phn tch v thit k h thng iu khin logic. ng thi gio trnh ny trnh by cc kin thc c bn v b lp trnh PLC. S dng b lp trnh PLC v nghin cu cc vn c lin quan ti ngt, truyn thng, x l li. MC TIU MN HC: Cung cp cho sinh vin nhng kin thc c bn v chuyn su v h thng iu khin logic. Sinh vin nm vng cc phng php phn tch v tng hp h thng iu khin logic v nm bt c cc vn c lin quan n thit b lp PLC.
CHNG 0 L THUYT C S (5 LT)

1.1. Khi nim v logic hai trng thi. 1.2. Cc hm c bn ca i s logic v cc tnh cht c bn ca chng. 1.3.Cc phng php biu din hm logic. 1.4. Cc phng php ti thiu hm logic.
CHNG 1 MCH T HP V MCH TRNH T (7 LT)

2.1. 2.2. 2.3. 2.4. 2.5. 2.6. 2.7. 2.8. 2.9. M hnh ton hc ca mch t hp. Phn tch mch t hp. Tng hp mch t hp. Gii thiu mt s mch t hp thng gp. Khi nim v mch trnh t. Mt s phn t nh trong mch trnh t. Phng php m t mch trnh t. Tng hp mch trnh t. Grafcet.
Ngi bin son: Lm Tng c - Nguyn Kim nh
CHNG 2 B IU KHIN LP TRNH PLC (7 LT)

2.1 c im b iu khin lp trnh PLC. 2.2 Khi nim c bn v PLC. 2.2.1 .PC hay PLC. 2.2.2. S so snh vi h thng iu khin khc. 2.3. PLC-Cu trc phn cng. 2.3.1. B x l trung tm. 2.3.2. B nh. 2.3.3. Khi vo/ra. 2.3.4. Thit b lp trnh. 2.4. C bn v lp trnh PLC. 2.4.1 Gii thch chng trnh Ladder. 2.4.2. Ng vo v ng ra. 2.4.3. R le. 2.4.4. Thanh ghi. 2.4.5. B m. 2.4.6. B nh thi. 2.4.7. Tp lnh. 2.5. C ch hot ng v x l tn hiu trn PLC. PLC loi FXO,FXOS. PLC loi FXON,FX,FX2C,FX2N. Tm tt. Cu hi n tp.
CHNG 3 PHNG PHP LP TRNH PLC (10 LT)

3.1. Ngn ng lp trnh Instruction (STL) v Ladder. 3.2. Cc lnh c bn. 3.3. Lp trnh cho cc tc v c bn trn PLC. 3.3.1. Lp trnh s dng r le ph tr. 3.3.2. Lp trnh s dng thanh ghi. 3.3.3. Lp trnh cho b nh th. 3.3.4. Lp trnh cho b m. 3.4 Cc lnh ng dng. 3.4.1. Nhm lnh v iu khin lu trnh. 3.4.2. Nhm lnh v so snh v dch chuyn. 3.4.3. Nhm lnh v x l s hc v logic. 3.4.4. Nhm lnh quay v dch chuyn chui bit. Tm tt. Cu hi n tp.
CHNG 4 NGN NG LP TRNH LADDER (5 LT)

(Phn ny s c nhc li cc chng ) 4.1. Thit k chng trnh. 4.1.1. Cc khi chc nng h thng. 4.1.2. V d v mch kho ln. 4.1.3. V d v mch iu khin trnh t. 4.2. Thit k mch logic t hp. 4.2.1. V d mt mch logic t hp. 4.2.2. V d nhiu mch logic t hp. 4.3. Thit k mch iu khin trnh t. 4.3.1. Phng php lp trnh trnh t. 4.3.2. V d iu khin c cu cp phi cho my dp. 4.3.3. Phn nhnh trong iu khin trnh t. Tm tt. Cu hi n tp.
CHNG 5 K THUT LP TRNH IU KHIN TRNH T (5 LT)

V d v cc bc th tc tng qut. 5.1. iu khin trnh t dng thanh ghi. 5.1.1. Nguyn l c bn iu khin trnh t dng thanh ghi. 5.1.2. V d v iu khin tay my dng thanh ghi. 5.2. iu khin trnh t dng STEPLADDER. 5.2.1. Hot ng ca mch trnh t STL. 5.2.2. Lnh STL v lp trnh STL. 5.2.3. OR nhnh STL. 5.2.4. AND nhnh STL. 5.2.5. S kt hp cc loi nhnh STL. 5.2.6. S lp li hot ng trnh t. 5.3. V d lp trnh STL iu khin my gp-t. 5.4. ng dng v iu khin trnh t dng lnh ng dng IST. Tm tt. Cu hi n tp.
CHNG 6 CC CHC NNG CHUYN DNG TRN PLC (4 LT)

6.1.Mun m rng vo/ra. 6.2.1. Mun nhn cm bin nhit . 6.2.2. Mun nhn cm bin cp nhit in. 6.2.3. Mun chuyn dng m tc cao.
3
6.2.4. Mun x l tn hiu lin tc. 6.2.5. B iu khin cam lp trnh. 6.2.6. Mun ch iu khin vo/ra xa. 6.2.7. Mun iu khin v tr mt trc. Tm tt. Cu hi n tp.
CHNG 7 NHNG NG DNG CA PLC (5 LT)

7.1. ng dng PLC trong lnh vc iu khin robot. 7.2. ng dng PLC trong h thng sn xut linh hot. 7.3. ng dng PLC trong iu khin qu trnh. 7.4. ng dng PLC trong mng thu nhn d liu. 7.5. iu khin trnh t my phn loi bi mu. 7.6. ng dng PLC trong h thng iu khin gim st. Tm tt. Cu hi n tp.
CHNG 8 LA CHN, LP T, KIM TRA V BO TR H THNG (5 LT)

9.1. Xem xt s kh thi. 8.2. Trnh t thit k h thng PLC. 8.3. T chc b tr phn cng h thng. 8.4. Chy th chng trnh. 8.5. Lp ti liu cho h thng. 8.6. Bo tr h thng PLC. Tm tt. Cu hi n tp.
CC BI TH NGHIM TI LU THAM KHO
[1] PLC-Step7-200 Nguyn Don Phc & Phan Xun Minh [2] PLC-Step7-300 Nguyn Don Phc & Phan Xun Minh [3] Allen Bradley Trainning Center, A New View into Control, H Ni,1995 [4] E.P Popov & E.I. Yurevich, Robotics, Mir Publishers - Moscow,1987. [5] Ian G.Warnock, Progarmmable controllers.-Operation and application, Prentice all, 1988. [6] Mitsubishi Electric Training Center, PLC MELSEC, Osaka 1996. [7] Mitsubishi Electric, FX Series Programmable Controllers - Progamming Mannual, Osaka, 8/1996.
4
[8] Philip John Mc Kerrow: Introdution to Robotics, British Library, England,1993. [9] R.Ackermann, J.Franz, T.Hartmann, A.Hopf, M.Kantel, B.Plagemann, Programmable Logic Controllers -Advanced Level, Festo Didactic KG, Esslingen,1987. [10] Ray Asfaht. Robots And Manufacturing Automation, University of Arkansas, Fayetteville, 1989. [11] Richarch C.Dorf, Robert H.Bishop, Modern Con troll System. 7th edition Addison Wesley,1995. [12] Richard S.Sandige, Moderr Digital Design, Mc. Graw-Hill,1990. [13] SIEMENS Traning Center, Simatic S-5 PLC & Simatic S7 PLC, Singapore 1995. [14] S.Brian Morriss, Automated Manufacturing Systems: Actuators, Controls, Sensors, and Robotics, Glencoe/Mc Graw-Hill 1995.
FILE : S7-200-e.pdf
FILE : S7-200New.pdf
FILE : S7-21x-e.pdf
FILE : S7-200N-e.pdf
FILE : S7-200N-e.pdf
10
FILE : S7-CP 342-1_e
11
FILE : Communication With SIMATIC
12
FILE : 2h_prime_en.pdf Trnh by phng php iu khin tun t. FILE : 2h_feb_1299_komplett.pdf Trnh by phng php iu khin tun t. gii thiu 3 phng php v qu trnh iu khin tun t.
MOV-B EN ENO IN OUT
bit S n bit R n
MOV-B EN ENO IN OUT
NOP
P N
MOV-B EN ENO IN OUT
bit
bit
bit
bit
13
Bi th nghim
Trng i Hc Bch Khoa Khoa in B mn T ng o Lng
BI THC HNH IU KHIN LOGIC
LU ! Trc khi n PTN yu cu mi Sinh Vin phi thc hin thit k trc chng trnh nh.
Bin son : Lm Tng c - Nguyn Kim nh
190
Bi th nghim
1. Khi ng ng c bng in tr ph:
Phn a ch vo/ra: u vo (Input) Start I0.0 Stop I0.1 Circuit Breaker I0.2 u ra (Output) Khi ng t Q0.0 K1 Q0.1 K2 Q0.2 K3 Q0.3
Yu cu: Khi ng ng c ng khi ng t Sau 3s ng Relay K1 Sau 2s ng Relay K2 Sau 2s ng Relay K3 Stop Dng ng c, a cc Relay v trng thi ban u. Nu ng c ang hot ng m xy ra s c ngn mch Dng ngay lp tc.
191
Bi th nghim
2. M hnh iu khin my trn liu:
Phn a ch vo/ra: u vo (Input) Start I0.0 Stop I0.1 Reset I0.2 S1 I0.3 S2 I0.4 u ra (Output) K1 Q0.0 K1 Q0.1 K3 Q0.2 K4 Q0.3 n Run Q0.4 n Stop Q0.5
Yu cu: Khi ng n RUN sng ln; K1, K2 khi ng, liu khc nhau c cung cp bi hai bng ti S3 tc ng Dng K1, K2; Khi ng K3 bt u trn Sau 15s Dng K3; Khi ng K4 xut liu ra khi bnh trn S2 xung mc thp K4 dng; Qa trnh t ng lp li trong 2 ln na v t ng dng h thng; n (n stop) sng ln v xanh tt i. Nu ang lm vic bnh thng m gp s c th n Stop dng khn cp h thng; sau khi khc phc xong, trc khi chy li phi n Reset xo gi tr c trong thanh ghi tc thi ca b m bt u li t u.
192
Bi th nghim
3. M hnh iu khin n giao thng:
Phn a ch vo/ra: u vo (Input) Start I0.0 Stop I0.1 u ra (Output) n Xanh 1 Q0.0 n vng 1 Q0.1 n 1 Q0.2 n Xanh 2 Q0.3 n vng 2 Q0.4 n 2 Q0.5
Yu cu: iu khin cc n hot ng theo gin thi gian trn.
193
Bi th nghim
4. M hnh iu khin hot ng ca my gp-t:
Phn a ch vo/ra: u vo (Input) Start I0.0 Stop I0.1 Reset S1 S2 S3 S4 u ra (Output) A1 Q0.0 A2 Q0.1 A3 Q0.2 A4 Q0.3 A5 Q0.4
Yu cu: Cnh tay my thc hin gp vt trn bng chuyn A b sang bng chuyn B. Trc khi xut pht, v tr ca cnh tay v tr bng chuyn B (S1 tc ng). n nt Start Cnh tay quay ngc chiu kim ng h S2 tc ng Dng quay, bng chun A hot ng S3 tc ng Dng bng chuyn A, gp vt (A5 = 1) S4 tc ng Cnh tay quay cng chiu kim ng h S1 tc ng Dng Quay, nh vt (A5 = 0; S4 = 0); Sau thc hin lp li hnh trnh nh trn. Khi c s c bt thng xy ra, n Stop Dng h thng; sau khi khc phc xong s c n Reset Cnh tay t ng quay v li v tr xut pht ban u v dng ti y.
194
Mc lc
CHNG 0: L THUYT C S
0.1. Khi nim v logic trng thi.....................................................................................1 0.2. Cc hm c bn ca i s logic v cc tnh cht c bn ca chng.........................1 0.2.1. Quan h gia cc h s...............................................................................4 0.2.2. Quan h gia cc bin v hng s..............................................................4 0.2.3. Cc nh l tng t i s thng............................................................4 0.2.4. Cc nh l c th ch c trong i s logic.............................................4 0.2.5. Mt s ng thc tin dng........................................................................4 0.3. Cc phng php biu din hm logic ....................................................................5 0.3.1. Phng php biu din thnh bng...........................................................5 0.3.2. Phng php biu din hnh hc................................................................5 0.3.3. Phng php biu din biu thc i s...................................................6 0.3.4. Phng php biu din bng bng Karnaugh...........................................7 0.4 . Phng php ti thiu ho hm logic......................................................................8 0.4.1. Phng php ti thiu hm logic bng bin i i s.............................8 0.4.2. Phng php ti thiu ho hm logic bng bng Karnaugh...................11 0.4.3. Phng php ti thiu hm logic bng thut ton Quire MC.Cluskey...12 Bi tp...........................................................................................................................14
CHNG 1: MCH T HP V MCH TRNH T

M hnh ton hc ca mch t hp....................................................................17 Phn tch mch t hp........................................................................................17 Tng hp mch t hp.......................................................................................18 Mt s mch t hp thng gp trong h thng................................................18 Khi nim v mch trnh t (hay mch dy) _ sequential circuits.....................19 Mt s phn t nh trong mch trnh t............................................................19 Phng php m t mch trnh t......................................................................21 1.7.1. Phng php bng chuyn trng thi.......................................................21 1.7.2. Phng php hnh trng thi...............................................................22 a. hnh Mealy....................................................................................22 b. hnh Moore...................................................................................22 1.7.3. Phng php lu ..................................................................................23 2.8. Tng hp mch trnh t..........................................................................................24 2.9. Grafcet....................................................................................................................25 1.1. 1.2. 1.3. 1.4. 1.5. 1.6. 1.7.
CHNG 2: B IU KHIN LP TRNH PLC

2.1. c im b iu khin logic kh trnh (PLC).......................................................33 2.2. Cc khi nim c bn v PLC.................................................................................34 2.2.1. PLC hay PC...............................................................................................35
Mc lc
2.2.2. So snh vi h thng iu khin khc.......................................................35 2.3. Cu trc phn cng ca PLC...................................................................................36 2.3.1. n v x l trung tm (CPU Central Procesing Unit).............................36 a) n v x l "mt -bit".......................................................................36 b) n v x l "t - ng".......................................................................36 2.2.3. B nh.......................................................................................................37 2.3.4. Khi vo/ra..................................................................................................37 2.3.5. Thit b lp trnh........................................................................................37 2.3.6. Rle...........................................................................................................37 2.3.7. Modul qun l vic phi ghp...................................................................37 2.3.8. Thanh ghi (Register).................................................................................37 2.3.9. B m (Counter)......................................................................................37 a) Phn loi theo tn hiu u vo...........................................................37 b) Phn loi theo kch thc ca thanh ghi v chc nng ca b m...37 2.3.10. B nh th (timer)...................................................................................38 2.4. Gii thiu mt s nhm PLC ph bin hin nay trn th gii...............................38 2.5. Tng quan v h PLC S7-200 ca hng Siemens...................................................38 2.6. Cu trc phn cng ca S7-200..............................................................................40 2.6.1. Hnh dng bn ngoi.................................................................................40 2.6.2. Giao tip vi thit b ngoi vi....................................................................42 a) Kt ni vi PG....................................................................................42 b) Kt ni vi PC....................................................................................42 c) Giao tip vi mng cng nghip.........................................................46 2.6.3. Giao tip gia sensor v c cu chp hnh...............................................46 2.7. Cu trc b nh S7-200..........................................................................................48 2.7.1. Phn chia b nh.......................................................................................48 2.7.2. Vng nh d liu v i tng v cch truy cp......................................49 2.7.3. M rng cng vo ra.................................................................................52
CHNG 3: NGN NG LP TRNH V NG DNG

3.1.Gii thiu cc ngn ng lp trnh.............................................................................54 3.1.1. nh ngha v LAD...................................................................................54 3.1.2. nh ngha v STL....................................................................................54 3.2.Vng qut (thc hin chng trnh) v cu trc ca mt chng trnh...................55 3.3.Tp lnh S7-200.......................................................................................................56 3.4. C php v cch ng dng SIMATIC struction S7-200.........................................63 3.4.1. Ton hng v gii hn cho php...............................................................63 3.4.2. SIMATIC instructions...............................................................................64 1. SIMATIC Bit Logic Instructions.............................................................64 2. SIMATIC Compare Byte Instructions.....................................................67 3. SIMATIC Timer Instructions...................................................................70
Mc lc
4. SIMATIC Counter Instructions (Count Up, Count Up Down, Count Down )......................................................................................................75 5. SIMATIC Integer Math Instructions........................................................77 6. SIMATIC Numerical Function Instructions............................................82 7. SIMATIC Move Instructions...................................................................84 8. SIMATIC Table Instructions...................................................................87 9. SIMATIC Logical Operation Instructions...............................................93 10. SIMATIC Stack Logic Instructions.........................................................96 11. SIMATIC Conversion Instructions.........................................................99 12. SIMATIC Clock Instrutions...................................................................105 13. SIMATIC Program Control Instrutions.................................................106 14. SIMATIC Shift and Rotate Register Instrutions....................................112 15. SIMATIC Interupt and Comunication Instrutions.................................119
CHNG 4: NGN NG LP TRNH LADDER

4.1. Thit k chng trnh............................................................................................126 4.1.1. Cc khi chc nng h thng .................................................................126 4.1.2. V d v mch kho ln.......................................................................... 126 4.1.3. V d v mch iu khin trnh t...........................................................126 4.2. Thit k mch logic t hp........................................................................ 126 4.2.1. V d mt mch logic t hp...................................................................126 4.2.2. V d nhiu mch logic t hp................................................................126 4.3. Thit k mch iu khin trnh t........................................................................ 126 4.3.1. Phng php lp trnh trnh t.............................................................. .126 4.3.2. V d iu khin c cu cp phi cho my dp......................................126 4.3.3. Phn nhnh trong iu khin trnh t..................................................... 126 Bi Tp
CHNG 5: K THUT LP TRNH IU KHIN TRNH T

5.1. iu khin trnh t dng thanh ghi.......................................................................127 5.1.1. Nguyn l c bn iu khin trnh t dng thanh ghi.............................127 5.1.2. V d v iu khin tay my dng thanh ghi..........................................127 5.2 Sequence Control Relay (Relay iu khin tun t)..............................................127 5.2.1. Lnh STL v lp trnh SCR.....................................................................127 5.2.2. AND nhnh SCR.....................................................................................128 5.2.3. iu khin phn k.................................................................................129 5.2.4. iu khin hi t.....................................................................................130 5.2.5. S lp li hot ng trnh t....................................................................131
Mc lc
CHNG 6: CC CHC NNG CHUYN DNG TRN PLC S7-200

6.1.
6.2. 6.3.
o lng v gim st nhit vi module EM235 nhn cm bin nhit in tr Pt100.................................................................................................................133

o lng v gim st nhit vi module EM235 nhn cm bin truyn tnh nhit in Pt100...................................................................................................................137 Cch s dng b m tc cao ghi li gi tr analog bng cch chuyn i gi tr analog sang tn s........................................................................................................141
6.4. Cch o mc t u vo analog........................................................................143 6.5. Module iu khin v tr mt trc.....................................................................147 6.6. Cc ng dng truyn thng trn Step 7-200......................................................153 6.6.1. Kt ni PLC vi my in qua cng song trong ch truyn thng Freeport..................................................................................................153 6.6.2. Truyn thng gia S505 v S7 trong mng qua module giao din trng MIF.........................................................................................................153 6.6.3. Truyn thng S7-200 ch Freeport s dng modem in thoi telephone network..................................................................................154 6.6.4. Truyn thng Freeport kt ni mng vi S7-200 CPUs trong trng hp I/O xa...........................................................................................155 6.6.5. S dng trnh ng dng Hyper Terminal window kt ni gia PC v PLC........................................................................................................155 6.6.6. Kt ni gia S7-200 vi encoder s dng port truyn thng RS485....156 6.6.7. Truyn thng theo thc Mudbus kt ni cc S7-200 slave..............156 6.6.8. S dng modem Radio kt ni mng S7-200...................................157 6.6.9. S dng TD-200 iu khin v gim st S7-200.............................158 6.6.10. Tch hp mng AS-I vi S7-200...........................................................159 6.6.11. Kt ni S7-300 vi S7-200 theo chun Profibus v vi my LP.........159 6.6.12. Kt ni S7-200 vi mng Ethernet........................................................160
CHNG 7: NHNG NG DNG CA PLC

7.1. ng dng PLC trong lnh vc iu khin robot...................................................161 7.2. ng dng PLC trong h thng sn xut linh hot.................................................162 7.3. ng dng PLC trong iu khin qu trnh............................................................166 7.4. ng dng PLC trong mng thu nhn d liu t bin tn......................................167 7.4.1. iu kin s dng giao thc USS...........................................................168 7.4.2. Thi gian yu cu cho vic truyn thng vi bin tn............................169 7.4.3. S dng cc lnh USS.............................................................................170 7.4.4. Cc lnh trong giao thc USS.................................................................170 7.4.5. Kt ni v ci t MicroMaster Series 3 (MM3)....................................176 7.4.6. Kt ni v ci t MicroMaster Series 4 (MM4)....................................178 7.5. ng dng PLC trong h thng iu khin gim st..............................................180
Mc lc
CHNG 8: LA CHN, LP T, KIM TRA V BO TR H THNG

8.1. Xem xt s kh thi................................................................................................183 8.2. Trnh t thit k h thng PLC..............................................................................185 8.3. Thit k chng trnh trn PLC............................................................................186 8.4. T chc b tr phn cng h thng.......................................................................186 8.5. Chy th chng trnh..........................................................................................188 8.6. Lp ti liu cho h thng.......................................................................................189
CC BI TH NGHIM......................................................................................................190
TI LU THAM KHO
[1] PLC-Step7-200 Nguyn Don Phc & Phan Xun Minh [2] PLC-Step7-300 Nguyn Don Phc & Phan Xun Minh [3] T ng ho vi PLC & Inverter ca Omron_Nguyn Tn Phc, Nguyn Thanh Giang_Nh xut bn tr. [4] Allen Bradley Trainning Center, A New View into Control, H Ni,1995 [5] S tay hng dn lp trnh PLC_Nguyn Thu Thin, Mai Xun V_Nh xut bn tr. [6] iu khin Logic_PGS.TS Nguyn Trng Thun_Nh xut bn khoa hc k thut, 2004. [7] Siemens Training Center on CD. [8] Siemens Catalog. [9] Ian G.Warnock, Progarmmable controllers.-Operation and application, Prentice all, 1988. [10] Mitsubishi Electric Training Center, PLC MELSEC, Osaka 1996. [11] Mitsubishi Electric, FX Series Programmable Controllers - Progamming Mannual, Osaka, 8/1996. [12] iu khin Logic v ng dng; PGS.TS Nguyn Trng Thun; Nh XBKH &KT. [13] K thut S; PGS.TS Nguyn Hu Phng.

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i Hc Nng Trng i Hc Bch Khoa Khoa in B mn T ng - o Lng

GIO TRNH MN HC IU KHIN LOGIC

Ngi bin son: Lm Tng c Nguyn Kim nh

Nng, thng 11 nm 2005

CHNG 0: L THUYT C S (3T)

Bin son: Lm Tng c - Nguyn Kim nh

0 0 1 1 Y3 = x 1 0 1 0 0 Y4 = x 1. x2 0 0 1 1 Y5 = x 2 Y6 = x 1. x2+ 0 1 1 0 x1 . x 2 Y6 =x1 x2 0 1 1 1 Y7 = x 1 + x 2 1 0 0 0 Y8 = x 1 . x 2 0 1 1 1 Y9= x 1 x 2 Cng module

Hm hoc Y7 Hm piec Hm cng du Hm o x1 Hm ko theo x1 Hm o x2 Hm ko theo x2 Hm cheffer Hm n v Y8 Y9

Bin son: Lm Tng c - Nguyn Kim nh

Bin son: Lm Tng c - Nguyn Kim nh

Bin son: Lm Tng c - Nguyn Kim nh

c) Hm ba bin biu din trong khng gian 3 chiu:

111 X1 000 100 101

Bin son: Lm Tng c - Nguyn Kim nh

x 3 x 4x 5 000 001 011 010 110 111 101 100 x 1x 2 00 01 11 10

Bin son: Lm Tng c - Nguyn Kim nh

Bin son: Lm Tng c - Nguyn Kim nh

Bin son: Lm Tng c - Nguyn Kim nh

Hnh 0.1: M t hot ng ca h thng l si

Bin son: Lm Tng c - Nguyn Kim nh

Bin son: Lm Tng c - Nguyn Kim nh

2,3,6,7 0-12,6,3,7 6,7,14,15 -116,14,7,15 12,14,13,15 11--

Bin son: Lm Tng c - Nguyn Kim nh

1.Tm cc tch cc tiu

2.Tm cc tch cc tiu ti thiu nh 1

Bin son: Lm Tng c - Nguyn Kim nh

1) y = a b c +ab 2) y = ab+ ac +b c 3) S = a1 + b a 2 a3 + b ( a1 a2 + a3)

Bin son: Lm Tng c - Nguyn Kim nh

Chng 1: Mch t hp v mch trnh t

Biu thc logic

Bin son: Lm Tng c - Nguyn Kim nh

Chng 1: Mch t hp v mch trnh t

Chng 1: Mch t hp v mch trnh t

Hnh 1.6: Nguyn l lm vic ca cng AND

B ln cc AA A ln cc BB ln cao cao tr tr ln cao caotr tr

Hnh 1.8: S relay thi gian

Bin son: Lm Tng c - Nguyn Kim nh

Chng 1: Mch t hp v mch trnh t

2.Cc mch lt: Loi ng b Khng FF ng b

Cng khng c ch khng ng b

Bin son: Lm Tng c - Nguyn Kim nh

Chng 1: Mch t hp v mch trnh t

Bin son: Lm Tng c - Nguyn Kim nh

Chng 1: Mch t hp v mch trnh t

Chng 1: Mch t hp v mch trnh t

Chng 1: Mch t hp v mch trnh t

Cu trc iu khin trnh t

Bin son: Lm Tng c - Nguyn Kim nh

Chng 1: Mch t hp v mch trnh t

Bin son: Lm Tng c - Nguyn Kim nh

Chng 1: Mch t hp v mch trnh t

dng bng ti ph gia

1 t123 2 c) AND Hnh 1.18

Chng 1: Mch t hp v mch trnh t

Bin son: Lm Tng c - Nguyn Kim nh

Chng 1: Mch t hp v mch trnh t

Chng 1: Mch t hp v mch trnh t

AU AUTT REP Cu trc ca h iu khin

Chng 1: Mch t hp v mch trnh t

M, V4, V5, C1, C2, t1 Ft1

Bin son: Lm Tng c - Nguyn Kim nh

Chng 1: Mch t hp v mch trnh t

Hnh 1.23 v 1.24 tnh n cc trng hp s c v t li.

M, V4, V5, C1, C2, t1 Ft1. AU M, t2 Ft2. AU