Input Filter Design: R - C R - L R - L

Chapter 10
Input Filter Design

10.1 Introduction 10.1.1 Conducted EMI 10.1.2 The Input Filter Design Problem Effect of an Input Filter on Converter Transfer Functions 10.2.1 Discussion 10.2.2 Impedance Inequalities Buck Converter Example 10.3.1 Effect of Undamped Input Filter 10.3.2 Damping the Input Filter Design of a Damped Input Filter RfCb Parallel Damping 10.4.1 10.4.2 RfLb Parallel Damping 10.4.3 RfLb Series Damping 10.4.4 Cascading Filter Sections 10.4.5 Example: Two Stage Input Filter Summary of Key Points
1
10.2
10.3
10.4
10.5
Fundamentals of Power Electronics
Chapter 10: Input Filter Design
10.1.1 Conducted Electromagnetic Interference (EMI)

Input current ig(t) is pulsating:
ig(t) i i
Buck converter example

ig 1 2 C v R i L + vg(t) +
DTs
Ts
Approximate Fourier series of ig(t):
i g(t) = DI +
2I sin k = 1 k
kD cos kt
High frequency current harmonics of substantial amplitude are injected back into vg(t) source. These harmonics can interfere with operation of nearby equipment. Regulations limit their amplitude, typically to values of 10 A to 100 A.
2
Addition of Low-Pass Filter

iin Lf ig 1 2 Cf C v Input filter R L +
ig(t) iin(t) 0 0 0 DTs Ts t

vg(t) +
Magnitudes and phases of input current harmonics are modified by input filter transfer function H(s):
i in(t) = H (0)DI +
k=1
H (kj) 2I sin kD cos kt + H (kj) k
The input filter may be required to attenuate the current harmonics by factors of 80 dB or more.
3
Electromagnetic Compatibility
Ability of the device (e.g. power supply) to:
function satisfactorily in its electromagnetic environment (susceptibility or immunity aspect) without introducing intolerable electromagnetic disturbances (emission aspect) EMC Emission Susceptibility
Radiated
Conducted Harmonics EMI
Radiated
Conducted
Electrostatic Discharge
Conducted EMI
Spectrum analyzer Test result: spectrum of the voltage across a standard impedance in the LISN
AC line source iac(t) vac(t) LISN EMI filter
ig(t) + vg(t) AC/DC rectifier
i2(t) + C vC(t) Energy storage capacitor
pload(t) = VI = Pload
+ i(t) DC/DC converter v(t) Regulated DC output load
Earth ground
Sample of EMC regulations that include limits on radiofrequency emissions: European Community Directive on EMC: Euro-Norm EN 55022 or 55081, earlier known as CISPR 22 National standards: VDE (German), FCC (US)
5
LISN
R1 5 50H L1 C1 1F
AC line source
0.1F CN
Measurement points Device under test
RN 50 RN 50 1F C1 0.1F CN R1 5 50H L1
LISN: Line Impedance Stabilization Network, or artificial mains network Purpose: to standardize impedance of the power source used to supply the device under test Spectrum of conducted emissions is measured across the standard impedance (50 above 150kHz)
LISN example
An Example of EMI Limits

70 dBV EN 55022 Class B limits

1mV 631V
60 dBV
Quasi-peak
50 dBV
Average
316V 200V
40 dBV 100 kHz
1 MHz
10 MHz
100V 100 MHz
Frequency range: 150kHz-30MHz Class B: residential environment Quasi-peak/Average: two different setups of the measurement device (such as narrow-band voltmeter or spectrum analyzer) Measurement bandwidth: 9kHz
Differential and Common-Mode EMI

Spectrum analyzer Test result: spectrum of the voltage across a standard impedance in the LISN
AC line source iac(t) vac(t) LISN EMI filter + ig(t) vg(t) AC/DC rectifier Earth ground Differential-mode EMI currents Common-mode EMI currents i2(t) C + vC(t)
pload(t) = VI = Pload
+ i(t) DC/DC converter v(t) Regulated DC output load
Differential mode EMI: input current waveform of the PFC. Differential-mode noise depends on the PFC realization and circuit parameters. Common-mode EMI: currents through parasitic capacitances between high dv/dt points and earth ground (such as from transistor drain to transistor heat sink). Common-mode noise depends on: dv/dt, circuit and mechanical layout.
8
10.1.2 The Input Filter Design Problem

A typical design approach: 1. Engineer designs switching regulator that meets specifications (stability, transient response, output impedance, etc.). In performing this design, a basic converter model is employed, such as the one below:
Converter model 1:D i L + C R v d
(no input filter) (buck converter example)

vg + Id
Vg d
Input Filter Design Problem, p. 2

2. Later, the problem of conducted EMI is addressed. An input filter is added, that attenuates harmonics sufficiently to meet regulations. 3. A new problem arises: the controller no longer meets dynamic response specifications. The controller may even become unstable. Reason: input filter changes converter transfer functions
Input filter Converter model 1:D
+
Converter ac model is modified by input filter
i Vg d
L + C R v
Lf vg + Cf Id
d
10
Input Filter Design Problem, p. 3

|| Gvd ||
40 dB 30 dB 20 dB 10 dB 0 dB 10 dB 180
|| Gvd ||
Gvd
Effect of L-C input filter on control-tooutput transfer function Gvd (s), buck converter example.
Gvd
Dashed lines: original magnitude and phase Solid lines: with addition of input filter
360
100 Hz
1 kHz
540 10 kHz
f
11
10.2 Effect of an Input Filter on Converter Transfer Functions

H(s) Input filter Converter Zo(s) Zi(s)
vg
T(s)
Control-to-output transfer function is
Controller
Gvd (s) =
v(s) d (s)
v g(s) = 0
12
Determination of Gvd(s)
Gvd (s) = v(s) d (s)
v g(s) = 0
Converter v Zo(s) Gvd(s)
vg(s) source short circuit Zo(s) = output impedance of input filter
We will use Middlebrooks Extra Element Theorem to show that the input filter modifies Gvd (s) as follows:
1+ Gvd (s) = Gvd (s)

Z o(s) = 0
Z o(s) Z N (s) Z o(s) Z D(s)
1+
13
How an input filter changes Gvd(s)

Summary of result
Z o(s) = 0
1+
Gvd (s)
Z o(s) = 0
is the original transfer function, before addition of input filter is the converter input impedance, with d set to zero is the converter input impedance, with the output v nulled to zero
Z D(s) = Z i(s)
Z N (s) = Z i(s)
d (s) = 0
v(s) o 0
(see Appendix C for proof using EET)
14
Design criteria for basic converters

Table 10.1 Input lter design criteria for basic converters Converter ZN(s) ZD(s) Ze(s)
Buck
R2 D
R D2
1 + s L + s 2LC R 1 + sRC
2 LC 1+s L 2 +s D 2 D R
sL D2
Boost
D R 1 sL D 2R
2
D 2R
sL
1 + sRC
Buckboost
2 D 2R 1 sDL D D 2R
2 LC 1+s L 2 +s D 2 D R D 2R D2 1 + sRC
sL D2
15
10.2.2 Impedance Inequalities

Z o(s) = 0
1+
The correction factor
1+ 1+
shows how the input filter modifies the transfer function Gvd (s).
The correction factor has a magnitude of approximately unity provided that the following inequalities are satisfied:
Z o < Z N , and Zo < ZD
These provide design criteria, which are relatively easy to apply.

16
Effect of input filter on converter output impedance

A similar analysis leads to the following inequalities, which guarantee that the converter output impedance is not substantially affected by the input filter:
Z o < Z e , and Zo < ZD

The quantity Ze is given by:
Ze = Zi
v=0
(converter input impedance when the output is shorted)
17
10.2.1 Discussion
H(s) Input filter Converter Zo(s) Zi(s)
vg
d Controller
T(s)
Z N (s) = Z i(s)
v(s) o 0
is the converter input impedance, with the output v nulled to zero
Note that this is the same as the function performed by an ideal controller, which varies the duty cycle as necessary to maintain zero error of the output voltage. So ZN coincides with the input impedance when an ideal feedback loop perfectly regulates the output voltage.
18
When the output voltage is perfectly regulated

i g(t)
Closed-loop voltage regulator

Ts
+
vg(t)
Ts
Pload
For a given load characteristic, the output power Pload is independent of the converter input voltage If losses are negligible, then the input port i-v characteristic is a power sink characteristic, equal to Pload:
vg(t)
Ts
i g(t)
vg(t)
Ts
Ts
i g(t)
Ts
= Pload
i g(t)
Quiescent operating point Ig

slope =
2 Ig = M Vg R
Ts
= Pload
Incremental input resistance is negative, and is equal to:
R2 M
(same as dc asymptote of ZN)
Vg
vg(t)
Ts
19
Negative resistance oscillator

It can be shown that the closed-loop converter input impedance is given by:
T (s) 1 = 1 1 + 1 Z i(s) Z N (s) 1 + T (s) Z D(s) 1 + T (s)
where T(s) is the converter loop gain. At frequencies below the loop crossover frequency, the input impedance is approximately equal to ZN, which is a negative resistance. When an undamped or lightly damped input filter is connected to the regulator input port, the input filter can interact with ZN to form a negative resistance oscillator.
20
10.3 Buck Converter Example

10.3.1 Effect of undamped input filter
Buck converter with input filter
Vg
30 V
Input filter Lf
330 H
Converter 1 2 L
100 H
i + C
100 F
Cf
470 F
R v
3
Small-signal model
Input filter Lf
330 H
D = 0.5
Converter model 1:D
+
i Vg d
L
100 H
+ C R
3
vg +
Cf
470 F
Id Zo(s) Zi(s) d
100 F
21
Determination of ZD
1:D i L + C ZD(s) R v
Z D(s) = 12 sL + R || 1 sC D
40 dB 30 dB 20 dB 10 dB 0 dB 100 Hz
f1 = R = 12 D2
1 2RC 530 Hz 1 D 2C
fo =
1 2 LC 1.59 kHz
L D2
|| ZD || || ZN ||
R0 / D 2 Q=R
C = fo = 3 9.5 dB L f1
10 kHz
1 kHz
f
22
Determination of ZN
Z N (s) = vtest(s) i test(s)
1:D
+
vo0
io0 + vs o 0 d Vg d
L + C R vo0
+ vtest Id
itest
ZN(s)
Solution:
i test(s) = I d (s)
vtest(s) = Vg d (s) D
Hence,
Z N (s) = Vg d (s) D I d (s) = R2 D
23
Zo of undamped input filter

40 dB 30 dB 20 dB 10 dB 0 dB
Qf
Lf Cf Zo(s)
|| Zo ||
R0 f = L f ff =
100 Hz
Z o(s) = sL f || 1 sC f
Lf = 0.84 Cf 1 C f
10 dB 20 dB
1 = 400 Hz 2 L f C f
1 kHz
No resistance, hence poles are undamped (infinite Q-factor). In practice, losses limit Q-factor; nonetheless, Qf may be very large.
24
Design criteria
40 dB 30 dB 20 dB 10 dB 0 dB 10 dB
Z o < Z N , and Zo < ZD
Qf
12
f1 = 530 Hz fo = 1.59 kHz
L D2
|| ZD || || ZN ||
R0 / D 2
|| Zo ||
L f
1 D 2C
R0f
Q=3
ff = 400 Hz
1 kHz
1 C f
10 kHz
Can meet inequalities everywhere except at resonant frequency ff. Need to damp input filter!
20 dB 100 Hz
25
Resulting correction factor

10 dB
Zo ZN Z 1+ o ZD 1+
0 dB 10 dB 0
Zo ZN 180 Z 1+ o ZD 1+
100 Hz 1 kHz 360 10 kHz
26
Resulting transfer function

|| Gvd ||
40 dB 30 dB 20 dB 10 dB 0 dB 10 dB 180
|| Gvd ||
Gvd
Dashed lines: no input filter

Gvd
Solid lines: including effect of input filter
360
100 Hz
1 kHz
540 10 kHz
f
27
10.3.2 Damping the input filter

Undamped filter: Two possible approaches:
Lf
Lf Cf Zo(s)
Rf
Cf Rf
Lf Cf
28
Addition of Rf across Cf
To meet the requirement Rf < || ZN ||:
Lf
R f < R2 D
The power loss in Rf is Vg2/ Rf, which is larger than the load power!
Lf
Cf
Rf
A solution: add dc blocking capacitor Cb. Choose Cb so that its impedance is sufficiently smaller than Rf at the filter resonant frequency.
Cf
Rf Cb
29
Damped input filter

|| Zo ||, with large Cb
Lf
Rf
Rf Cf Cb
R0f
L f
ff
1 C f
30
Design criteria, with damped input filter

40 dB 30 dB 20 dB 10 dB 0 dB 10 dB
f1 = 530 Hz 12 fo = 1.59 kHz
L D2
|| ZD || || ZN ||
R0 / D 2
1 D 2C
Rf = 1
|| Zo ||
Q=3
R0f ff = 400 Hz
1 kHz
L f
1 C f
10 kHz
20 dB 100 Hz
f
31
Resulting transfer function

|| Gvd ||
40 dB 30 dB 20 dB 10 dB 0 dB 10 dB 90
|| Gvd ||
Gvd
Dashed lines: no input filter

Gvd
0
Solid lines: including effect of input filter
100 Hz
1 kHz
180 10 kHz
f
32
10.4 Design of a Damped Input Filter

Rf Cb Parallel Damping
Lf + v1 + Rf Cf Cb v2
Rf Lb Series Damping
Lb Lf Rf v1 + Cf + v2
Rf Lb Parallel Damping
Rf Lb + Cf v2
Lf v1 +
Size of Cb or Lb can become very large Need to optimize design
33
Dependence of || Zo || on Rf
Rf Lb Parallel Damping
30 dB
20 dB
Original undamped filter (Qf = ) Suboptimal damping (Qf = 5Qopt ) Optimal damping (Qopt = 0.93)
Undamped filter (Qf = 0) Suboptimal damping (Qf = 0.2Qopt )
10 dB
For this example, n = Lb/L = 0.516
Zo R0 f
0 dB
-10 dB
-20 dB
-30 dB 0.1 1 10
f fo
34
10.4.1 RfCb Parallel Damping

Lf + v1 + Rf Cf Cb v2
Filter is damped by Rf Cb blocks dc current from flowing through Rf Cb can be large in value, and is an element to be optimized
35
Optimal design equations

Rf Cb Parallel Damping
Define
n= Cb Cf
The value of the peak output impedance for the optimum design is
Zo
= R0 f mm
2 2+n n
where R0f = characteristic impedance of original undamped input filter
Given a desired value of the peak output impedance, can solve above equation for n. The required value of damping resistance Rf can then be found from: 2 + n 4 + 3n Rf Qopt = = R0 f 2n 2 4 + n The peak occurs at the frequency
fm = f f
2 2+n
36
Example
Buck converter of Section 10.3.2
n= R2 0f
2 Z o mm
1+
1+4
Zo
2 mm
R2 0f
20 dB
= 2.5
R f = R0 f
2 + n 4 + 3n 2n 2 4+n
= 0.67
|| Zo ||
10 dB
Undamped Suboptimal damping Cb = 4700 F Rf = 1
Comparison of designs Optimal damping achieves same peak output impedance, with much smaller Cb.
0 dB 10 dB 20 dB 30 dB 100 Hz
Optimal damping Cb = 1200 F Rf = 0.67
1 kHz
10 kHz
f
37
Summary Optimal R-Cd damping

Basic results
Qopt = R = R0
Z mm = R0 2 2+n n
10
+ R v1 + C Cd v2
2 + n 4 + 3n 2n 2 4 + n
Does not degrade HF attenuation No limit on || Z ||mm Cd is typically larger than C

100
with
n= R0 = Cd C L C
Z o mm Ro
1
0.1 0.1 1 10
n=
Cd C
38
Ld + C v2
Optimal R-Ld damping

Basic results
Qopt = n 3 + 4n 1 + 2n 2 1 + 4n
Z mm R0
30 dB 20 dB
v1
Original undamped filter (Q = ) Suboptimal damping (Q = 5Qopt ) Optimal damping (Qopt = 0.93)
Undamped filter (Q = 0) Suboptimal damping (Q = 0.2Qopt )
10 dB
Z mm = R0
0 dB
2n 1 + 2n
-10 dB
with
optimum value of R Qopt = R0
-20 dB
-30 dB 0.1 1 10
f f0
n=
Ld L
R0 =
L C
39
Ld + C v2
Discussion: Optimal R-Ld damping

Ld is physically very small A simple low-cost approach to damping the input filter Disadvantage: Ld degrades highfrequency attenuation of filter, by the factor
30 dB
L v1 +
20 dB
Degradation of HF filter attenuation

Z mm R0
10 dB
L =1+ 1 n L || L d
Basic tradeoff: peak output impedance vs. high-frequency attenuation Example: the choice n = 1 (Ld = L) degrades the HF attenuation by 6 dB, an leads to peak output impedance of
0 dB
-10 dB 0.1 1 10
Ld L
mm
= 6 R0
40
Ld
Optimal R-Ld series damping

Basic results
Qopt = R0 n = 1+ n R 2 1+n 4+n 2 + n 4 + 3n
R v1 +
L C
+ v2
Does not degrade HF attenuation Ld must conduct entire dc current Peak output impedance cannot be reduced below 2 R 0
100
Z mm = R0
2 1+n 2+n n
with
L n= d L R0 = L C
10
Z mm R0
Qopt
1 0.1 1 10
41
n=
Ld L Chapter 10: Input Filter Design
10.4.4 Cascading Filter Sections

Cascade connection of multiple L-C filter sections can achieve a given high-frequency attenuation with much smaller volume and weight Need to damp each section of the filter One approach: add new filter section to an existing filter, using new design criteria Stagger-tuning of filter sections
42
Addition of filter section

+ Zo v test itest
vg
Additional filter section
Za
Zi1
Existing filter
How the additional filter section changes the output impedance of the existing filter: Z (s) 1+ a Z N 1(s) modified Z o(s) = Z o(s) Z (s) = 0 a Z (s) 1+ a Z D1(s)
Z N 1(s) = Z i1(s)
v test(s) o 0
Z D1(s) = Z i1(s)
i test(s) = 0
43
Design criteria
+ Zo v test itest
vg
Additional filter section
Za
Zi1
Existing filter
Z N 1(s) = Z i1(s)
v test(s) o 0
(with filter output port short-circuited) (with filter output port open-circuited)
Z D1(s) = Z i1(s)
i test(s) = 0
The presence of the additional filter section does not substantially alter the output impedance Zo of the existing filter provided that
Z a < Z N1 Z a < Z D1
44
and
10.4.5 Example
Two-Stage Input Filter
Requirements: For the same buck converter example, achieve the following:
80 dB of attenuation at 250 kHz Section 1 to satisfy Zo impedance inequalities as before:
40 dB 30 dB 20 dB 10 dB 0 dB 100 Hz
vg + R2 n2L2 R1 n1L1
L2 C2
L1 C1 Zo
Section 2
Section 1
f1 = R = 12 D2
1 2RC 530 Hz 1 D 2C
fo =
1 2 LC 1.59 kHz
L D2
|| ZD || || ZN ||
R0 / D 2 Q=R
C = fo = 3 9.5 dB L f1
10 kHz
1 kHz
f
45
Section 2 impedance inequalities

R2 n2L2 R1 n1L1
L2 vg + C2 Za Zi1
L1 C1
+ vtest itest
Section 2
Section 1
To avoid disrupting the output impedance Zo of section 1, section 2 should satisfy the following inequalities:
Z a < Z N 1 = Z i1
output shorted
= R1 + sn 1L 1 || sL 1
Z a < Z D1 = Z i1
1 + R + sn L || sL = 1 1 1 1 output open-circuited sC 1
46
Plots of ZN1 and ZD1

20 dB
|| ZD1 ||
0 dB
|| ZN1 || || Za ||
20 dB 90
ZN1
45
Za
45
ZD1
10 kHz 100 kHz 1 MHz
90 1 kHz
47
Section 1 output impedance inequalities

30 dB
|| ZD ||
|| ZN ||
20 dB
fo
10 dB
Cascaded sections 1 and 2 Section 1 alone
0 dB
-10 dB
-20 dB 1 kHz
10 kHz
48
100 kHz
Resulting filter transfer function

20 dB
|| H ||
0 dB -20 dB -40 dB -60 dB -80 dB -100 dB -120 dB 1 kHz
80 dB at 250 kHz
10 kHz
100 kHz
1 MHz
49
Comparison of single-section and two-section designs

Lf
330 H 0.67
Rf
vg
Cf
470 F
Cb
1200 F
0.65
R2
2.9 H
n2L2
1.9
R1
15.6 H
n1L1
L2 5.8 H vg + C2
11.7 F
L1 31.2 H C1
6.9 F
50

Input Filter Design: R - C R - L R - L

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Chapter 10

Input Filter Design

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

10.1.1 Conducted Electromagnetic Interference (EMI)

Buck converter example

Approximate Fourier series of ig(t):

Chapter 10: Input Filter Design

Addition of Low-Pass Filter

ig(t) iin(t) 0 0 0 DTs Ts t

H (kj) 2I sin kD cos kt + H (kj) k

Chapter 10: Input Filter Design

Conducted Harmonics EMI

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

AC line source iac(t) vac(t) LISN EMI filter

ig(t) + vg(t) AC/DC rectifier

i2(t) + C vC(t) Energy storage capacitor

+ i(t) DC/DC converter v(t) Regulated DC output load

Chapter 10: Input Filter Design

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

An Example of EMI Limits

40 dBV 100 kHz

100V 100 MHz

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

Differential and Common-Mode EMI

+ i(t) DC/DC converter v(t) Regulated DC output load

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

10.1.2 The Input Filter Design Problem

(no input filter) (buck converter example)

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

Input Filter Design Problem, p. 2

Converter ac model is modified by input filter

Chapter 10: Input Filter Design

Input Filter Design Problem, p. 3

Chapter 10: Input Filter Design

10.2 Effect of an Input Filter on Converter Transfer Functions

Control-to-output transfer function is

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

Converter v Zo(s) Gvd(s)

vg(s) source short circuit Zo(s) = output impedance of input filter

1+ Gvd (s) = Gvd (s)

Z o(s) Z N (s) Z o(s) Z D(s)

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

How an input filter changes Gvd(s)

Z o(s) Z N (s) Z o(s) Z D(s)

(see Appendix C for proof using EET)

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

Design criteria for basic converters

Fundamentals of Power Electronics

Chapter 10: Input Filter Design

10.2.2 Impedance Inequalities

Z o(s) Z N (s) Z o(s) Z D(s)

The correction factor

These provide design criteria, which are relatively easy to apply.

Chapter 10: Input Filter Design